Commit | Line | Data |
---|---|---|
2c162f9b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * PowerMac G5 SMU driver | |
4 | * | |
5 | * Copyright 2004 J. Mayer <l_indien@magic.fr> | |
6 | * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
1da177e4 | 10 | * TODO: |
0365ba7f BH |
11 | * - maybe add timeout to commands ? |
12 | * - blocking version of time functions | |
13 | * - polling version of i2c commands (including timer that works with | |
f18816ba | 14 | * interrupts off) |
0365ba7f BH |
15 | * - maybe avoid some data copies with i2c by directly using the smu cmd |
16 | * buffer and a lower level internal interface | |
17 | * - understand SMU -> CPU events and implement reception of them via | |
18 | * the userland interface | |
1da177e4 LT |
19 | */ |
20 | ||
1da177e4 LT |
21 | #include <linux/types.h> |
22 | #include <linux/kernel.h> | |
23 | #include <linux/device.h> | |
24 | #include <linux/dmapool.h> | |
57c8a661 | 25 | #include <linux/memblock.h> |
1da177e4 LT |
26 | #include <linux/vmalloc.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/rtc.h> | |
0365ba7f BH |
31 | #include <linux/completion.h> |
32 | #include <linux/miscdevice.h> | |
33 | #include <linux/delay.h> | |
0365ba7f | 34 | #include <linux/poll.h> |
14cc3e2b | 35 | #include <linux/mutex.h> |
ad9e05ae | 36 | #include <linux/of_device.h> |
5af50730 | 37 | #include <linux/of_irq.h> |
ad9e05ae | 38 | #include <linux/of_platform.h> |
5a0e3ad6 | 39 | #include <linux/slab.h> |
174cd4b1 | 40 | #include <linux/sched/signal.h> |
1da177e4 LT |
41 | |
42 | #include <asm/byteorder.h> | |
43 | #include <asm/io.h> | |
44 | #include <asm/prom.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/pmac_feature.h> | |
47 | #include <asm/smu.h> | |
48 | #include <asm/sections.h> | |
7c0f6ba6 | 49 | #include <linux/uaccess.h> |
0365ba7f | 50 | |
183d0202 | 51 | #define VERSION "0.7" |
0365ba7f | 52 | #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." |
1da177e4 | 53 | |
0365ba7f | 54 | #undef DEBUG_SMU |
1da177e4 LT |
55 | |
56 | #ifdef DEBUG_SMU | |
1beb6a7d | 57 | #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) |
1da177e4 LT |
58 | #else |
59 | #define DPRINTK(fmt, args...) do { } while (0) | |
60 | #endif | |
61 | ||
62 | /* | |
63 | * This is the command buffer passed to the SMU hardware | |
64 | */ | |
0365ba7f BH |
65 | #define SMU_MAX_DATA 254 |
66 | ||
1da177e4 LT |
67 | struct smu_cmd_buf { |
68 | u8 cmd; | |
69 | u8 length; | |
0365ba7f | 70 | u8 data[SMU_MAX_DATA]; |
1da177e4 LT |
71 | }; |
72 | ||
73 | struct smu_device { | |
74 | spinlock_t lock; | |
75 | struct device_node *of_node; | |
2dc11581 | 76 | struct platform_device *of_dev; |
0365ba7f | 77 | int doorbell; /* doorbell gpio */ |
1da177e4 | 78 | u32 __iomem *db_buf; /* doorbell buffer */ |
f620753b BH |
79 | struct device_node *db_node; |
80 | unsigned int db_irq; | |
0365ba7f | 81 | int msg; |
f620753b BH |
82 | struct device_node *msg_node; |
83 | unsigned int msg_irq; | |
1da177e4 LT |
84 | struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ |
85 | u32 cmd_buf_abs; /* command buffer absolute */ | |
0365ba7f BH |
86 | struct list_head cmd_list; |
87 | struct smu_cmd *cmd_cur; /* pending command */ | |
592a607b | 88 | int broken_nap; |
0365ba7f BH |
89 | struct list_head cmd_i2c_list; |
90 | struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ | |
91 | struct timer_list i2c_timer; | |
1da177e4 LT |
92 | }; |
93 | ||
94 | /* | |
95 | * I don't think there will ever be more than one SMU, so | |
96 | * for now, just hard code that | |
97 | */ | |
d851b6e0 | 98 | static DEFINE_MUTEX(smu_mutex); |
1da177e4 | 99 | static struct smu_device *smu; |
14cc3e2b | 100 | static DEFINE_MUTEX(smu_part_access); |
f620753b | 101 | static int smu_irq_inited; |
91b6fad5 | 102 | static unsigned long smu_cmdbuf_abs; |
0365ba7f | 103 | |
0788f285 | 104 | static void smu_i2c_retry(struct timer_list *t); |
730745a5 | 105 | |
1da177e4 | 106 | /* |
0365ba7f | 107 | * SMU driver low level stuff |
1da177e4 | 108 | */ |
1da177e4 | 109 | |
0365ba7f | 110 | static void smu_start_cmd(void) |
1da177e4 | 111 | { |
0365ba7f BH |
112 | unsigned long faddr, fend; |
113 | struct smu_cmd *cmd; | |
1da177e4 | 114 | |
0365ba7f BH |
115 | if (list_empty(&smu->cmd_list)) |
116 | return; | |
117 | ||
118 | /* Fetch first command in queue */ | |
119 | cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); | |
120 | smu->cmd_cur = cmd; | |
121 | list_del(&cmd->link); | |
122 | ||
123 | DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, | |
124 | cmd->data_len); | |
ebd004e4 | 125 | DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf); |
0365ba7f BH |
126 | |
127 | /* Fill the SMU command buffer */ | |
128 | smu->cmd_buf->cmd = cmd->cmd; | |
129 | smu->cmd_buf->length = cmd->data_len; | |
130 | memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); | |
131 | ||
132 | /* Flush command and data to RAM */ | |
133 | faddr = (unsigned long)smu->cmd_buf; | |
134 | fend = faddr + smu->cmd_buf->length + 2; | |
1cfb725f | 135 | flush_dcache_range(faddr, fend); |
0365ba7f | 136 | |
592a607b BH |
137 | |
138 | /* We also disable NAP mode for the duration of the command | |
139 | * on U3 based machines. | |
140 | * This is slightly racy as it can be written back to 1 by a sysctl | |
141 | * but that never happens in practice. There seem to be an issue with | |
142 | * U3 based machines such as the iMac G5 where napping for the | |
143 | * whole duration of the command prevents the SMU from fetching it | |
144 | * from memory. This might be related to the strange i2c based | |
145 | * mechanism the SMU uses to access memory. | |
146 | */ | |
147 | if (smu->broken_nap) | |
148 | powersave_nap = 0; | |
149 | ||
0365ba7f | 150 | /* This isn't exactly a DMA mapping here, I suspect |
1da177e4 LT |
151 | * the SMU is actually communicating with us via i2c to the |
152 | * northbridge or the CPU to access RAM. | |
153 | */ | |
0365ba7f | 154 | writel(smu->cmd_buf_abs, smu->db_buf); |
1da177e4 LT |
155 | |
156 | /* Ring the SMU doorbell */ | |
0365ba7f | 157 | pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); |
1da177e4 LT |
158 | } |
159 | ||
0365ba7f | 160 | |
7d12e780 | 161 | static irqreturn_t smu_db_intr(int irq, void *arg) |
1da177e4 | 162 | { |
0365ba7f BH |
163 | unsigned long flags; |
164 | struct smu_cmd *cmd; | |
165 | void (*done)(struct smu_cmd *cmd, void *misc) = NULL; | |
166 | void *misc = NULL; | |
167 | u8 gpio; | |
168 | int rc = 0; | |
1da177e4 | 169 | |
0365ba7f BH |
170 | /* SMU completed the command, well, we hope, let's make sure |
171 | * of it | |
172 | */ | |
173 | spin_lock_irqsave(&smu->lock, flags); | |
1da177e4 | 174 | |
0365ba7f | 175 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); |
a44fe13e BH |
176 | if ((gpio & 7) != 7) { |
177 | spin_unlock_irqrestore(&smu->lock, flags); | |
0365ba7f | 178 | return IRQ_HANDLED; |
a44fe13e | 179 | } |
0365ba7f BH |
180 | |
181 | cmd = smu->cmd_cur; | |
182 | smu->cmd_cur = NULL; | |
183 | if (cmd == NULL) | |
184 | goto bail; | |
185 | ||
186 | if (rc == 0) { | |
187 | unsigned long faddr; | |
188 | int reply_len; | |
189 | u8 ack; | |
190 | ||
191 | /* CPU might have brought back the cache line, so we need | |
192 | * to flush again before peeking at the SMU response. We | |
193 | * flush the entire buffer for now as we haven't read the | |
efad798b | 194 | * reply length (it's only 2 cache lines anyway) |
0365ba7f BH |
195 | */ |
196 | faddr = (unsigned long)smu->cmd_buf; | |
1cfb725f | 197 | flush_dcache_range(faddr, faddr + 256); |
0365ba7f BH |
198 | |
199 | /* Now check ack */ | |
200 | ack = (~cmd->cmd) & 0xff; | |
201 | if (ack != smu->cmd_buf->cmd) { | |
202 | DPRINTK("SMU: incorrect ack, want %x got %x\n", | |
203 | ack, smu->cmd_buf->cmd); | |
204 | rc = -EIO; | |
205 | } | |
206 | reply_len = rc == 0 ? smu->cmd_buf->length : 0; | |
207 | DPRINTK("SMU: reply len: %d\n", reply_len); | |
208 | if (reply_len > cmd->reply_len) { | |
209 | printk(KERN_WARNING "SMU: reply buffer too small," | |
210 | "got %d bytes for a %d bytes buffer\n", | |
211 | reply_len, cmd->reply_len); | |
212 | reply_len = cmd->reply_len; | |
213 | } | |
214 | cmd->reply_len = reply_len; | |
215 | if (cmd->reply_buf && reply_len) | |
216 | memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); | |
217 | } | |
218 | ||
219 | /* Now complete the command. Write status last in order as we lost | |
220 | * ownership of the command structure as soon as it's no longer -1 | |
221 | */ | |
222 | done = cmd->done; | |
223 | misc = cmd->misc; | |
224 | mb(); | |
225 | cmd->status = rc; | |
592a607b BH |
226 | |
227 | /* Re-enable NAP mode */ | |
228 | if (smu->broken_nap) | |
229 | powersave_nap = 1; | |
0365ba7f BH |
230 | bail: |
231 | /* Start next command if any */ | |
232 | smu_start_cmd(); | |
233 | spin_unlock_irqrestore(&smu->lock, flags); | |
234 | ||
235 | /* Call command completion handler if any */ | |
236 | if (done) | |
237 | done(cmd, misc); | |
238 | ||
239 | /* It's an edge interrupt, nothing to do */ | |
240 | return IRQ_HANDLED; | |
1da177e4 LT |
241 | } |
242 | ||
0365ba7f | 243 | |
7d12e780 | 244 | static irqreturn_t smu_msg_intr(int irq, void *arg) |
1da177e4 | 245 | { |
0365ba7f BH |
246 | /* I don't quite know what to do with this one, we seem to never |
247 | * receive it, so I suspect we have to arm it someway in the SMU | |
248 | * to start getting events that way. | |
249 | */ | |
250 | ||
251 | printk(KERN_INFO "SMU: message interrupt !\n"); | |
1da177e4 | 252 | |
0365ba7f BH |
253 | /* It's an edge interrupt, nothing to do */ |
254 | return IRQ_HANDLED; | |
255 | } | |
1da177e4 | 256 | |
1da177e4 | 257 | |
0365ba7f BH |
258 | /* |
259 | * Queued command management. | |
260 | * | |
261 | */ | |
1da177e4 | 262 | |
0365ba7f BH |
263 | int smu_queue_cmd(struct smu_cmd *cmd) |
264 | { | |
265 | unsigned long flags; | |
1da177e4 | 266 | |
0365ba7f BH |
267 | if (smu == NULL) |
268 | return -ENODEV; | |
269 | if (cmd->data_len > SMU_MAX_DATA || | |
270 | cmd->reply_len > SMU_MAX_DATA) | |
271 | return -EINVAL; | |
272 | ||
273 | cmd->status = 1; | |
274 | spin_lock_irqsave(&smu->lock, flags); | |
275 | list_add_tail(&cmd->link, &smu->cmd_list); | |
276 | if (smu->cmd_cur == NULL) | |
277 | smu_start_cmd(); | |
278 | spin_unlock_irqrestore(&smu->lock, flags); | |
279 | ||
f620753b | 280 | /* Workaround for early calls when irq isn't available */ |
ef24ba70 | 281 | if (!smu_irq_inited || !smu->db_irq) |
f620753b BH |
282 | smu_spinwait_cmd(cmd); |
283 | ||
0365ba7f | 284 | return 0; |
1da177e4 | 285 | } |
0365ba7f | 286 | EXPORT_SYMBOL(smu_queue_cmd); |
1da177e4 | 287 | |
0365ba7f BH |
288 | |
289 | int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | |
290 | unsigned int data_len, | |
291 | void (*done)(struct smu_cmd *cmd, void *misc), | |
292 | void *misc, ...) | |
1da177e4 | 293 | { |
0365ba7f BH |
294 | struct smu_cmd *cmd = &scmd->cmd; |
295 | va_list list; | |
296 | int i; | |
297 | ||
298 | if (data_len > sizeof(scmd->buffer)) | |
299 | return -EINVAL; | |
300 | ||
301 | memset(scmd, 0, sizeof(*scmd)); | |
302 | cmd->cmd = command; | |
303 | cmd->data_len = data_len; | |
304 | cmd->data_buf = scmd->buffer; | |
305 | cmd->reply_len = sizeof(scmd->buffer); | |
306 | cmd->reply_buf = scmd->buffer; | |
307 | cmd->done = done; | |
308 | cmd->misc = misc; | |
309 | ||
310 | va_start(list, misc); | |
311 | for (i = 0; i < data_len; ++i) | |
312 | scmd->buffer[i] = (u8)va_arg(list, int); | |
313 | va_end(list); | |
314 | ||
315 | return smu_queue_cmd(cmd); | |
1da177e4 | 316 | } |
0365ba7f | 317 | EXPORT_SYMBOL(smu_queue_simple); |
1da177e4 | 318 | |
0365ba7f BH |
319 | |
320 | void smu_poll(void) | |
1da177e4 | 321 | { |
0365ba7f BH |
322 | u8 gpio; |
323 | ||
324 | if (smu == NULL) | |
325 | return; | |
326 | ||
327 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); | |
328 | if ((gpio & 7) == 7) | |
7d12e780 | 329 | smu_db_intr(smu->db_irq, smu); |
1da177e4 | 330 | } |
0365ba7f BH |
331 | EXPORT_SYMBOL(smu_poll); |
332 | ||
1da177e4 | 333 | |
0365ba7f | 334 | void smu_done_complete(struct smu_cmd *cmd, void *misc) |
1da177e4 | 335 | { |
0365ba7f BH |
336 | struct completion *comp = misc; |
337 | ||
338 | complete(comp); | |
1da177e4 | 339 | } |
0365ba7f BH |
340 | EXPORT_SYMBOL(smu_done_complete); |
341 | ||
1da177e4 | 342 | |
0365ba7f | 343 | void smu_spinwait_cmd(struct smu_cmd *cmd) |
1da177e4 | 344 | { |
0365ba7f BH |
345 | while(cmd->status == 1) |
346 | smu_poll(); | |
347 | } | |
348 | EXPORT_SYMBOL(smu_spinwait_cmd); | |
349 | ||
350 | ||
351 | /* RTC low level commands */ | |
352 | static inline int bcd2hex (int n) | |
353 | { | |
354 | return (((n & 0xf0) >> 4) * 10) + (n & 0xf); | |
1da177e4 LT |
355 | } |
356 | ||
0365ba7f BH |
357 | |
358 | static inline int hex2bcd (int n) | |
1da177e4 | 359 | { |
0365ba7f | 360 | return ((n / 10) << 4) + (n % 10); |
1da177e4 | 361 | } |
0365ba7f | 362 | |
1da177e4 LT |
363 | |
364 | static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, | |
365 | struct rtc_time *time) | |
366 | { | |
367 | cmd_buf->cmd = 0x8e; | |
368 | cmd_buf->length = 8; | |
369 | cmd_buf->data[0] = 0x80; | |
370 | cmd_buf->data[1] = hex2bcd(time->tm_sec); | |
371 | cmd_buf->data[2] = hex2bcd(time->tm_min); | |
372 | cmd_buf->data[3] = hex2bcd(time->tm_hour); | |
373 | cmd_buf->data[4] = time->tm_wday; | |
374 | cmd_buf->data[5] = hex2bcd(time->tm_mday); | |
375 | cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; | |
376 | cmd_buf->data[7] = hex2bcd(time->tm_year - 100); | |
377 | } | |
378 | ||
1da177e4 | 379 | |
0365ba7f | 380 | int smu_get_rtc_time(struct rtc_time *time, int spinwait) |
1da177e4 | 381 | { |
0365ba7f | 382 | struct smu_simple_cmd cmd; |
1da177e4 LT |
383 | int rc; |
384 | ||
385 | if (smu == NULL) | |
386 | return -ENODEV; | |
387 | ||
388 | memset(time, 0, sizeof(struct rtc_time)); | |
0365ba7f BH |
389 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, |
390 | SMU_CMD_RTC_GET_DATETIME); | |
391 | if (rc) | |
392 | return rc; | |
393 | smu_spinwait_simple(&cmd); | |
1da177e4 | 394 | |
0365ba7f BH |
395 | time->tm_sec = bcd2hex(cmd.buffer[0]); |
396 | time->tm_min = bcd2hex(cmd.buffer[1]); | |
397 | time->tm_hour = bcd2hex(cmd.buffer[2]); | |
398 | time->tm_wday = bcd2hex(cmd.buffer[3]); | |
399 | time->tm_mday = bcd2hex(cmd.buffer[4]); | |
400 | time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; | |
401 | time->tm_year = bcd2hex(cmd.buffer[6]) + 100; | |
402 | ||
403 | return 0; | |
1da177e4 LT |
404 | } |
405 | ||
0365ba7f BH |
406 | |
407 | int smu_set_rtc_time(struct rtc_time *time, int spinwait) | |
1da177e4 | 408 | { |
0365ba7f | 409 | struct smu_simple_cmd cmd; |
1da177e4 LT |
410 | int rc; |
411 | ||
412 | if (smu == NULL) | |
413 | return -ENODEV; | |
414 | ||
0365ba7f BH |
415 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, |
416 | SMU_CMD_RTC_SET_DATETIME, | |
417 | hex2bcd(time->tm_sec), | |
418 | hex2bcd(time->tm_min), | |
419 | hex2bcd(time->tm_hour), | |
420 | time->tm_wday, | |
421 | hex2bcd(time->tm_mday), | |
422 | hex2bcd(time->tm_mon) + 1, | |
423 | hex2bcd(time->tm_year - 100)); | |
424 | if (rc) | |
425 | return rc; | |
426 | smu_spinwait_simple(&cmd); | |
1da177e4 | 427 | |
0365ba7f | 428 | return 0; |
1da177e4 LT |
429 | } |
430 | ||
0365ba7f | 431 | |
1da177e4 LT |
432 | void smu_shutdown(void) |
433 | { | |
0365ba7f | 434 | struct smu_simple_cmd cmd; |
1da177e4 LT |
435 | |
436 | if (smu == NULL) | |
437 | return; | |
438 | ||
0365ba7f BH |
439 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, |
440 | 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) | |
441 | return; | |
442 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
443 | for (;;) |
444 | ; | |
1da177e4 LT |
445 | } |
446 | ||
0365ba7f | 447 | |
1da177e4 LT |
448 | void smu_restart(void) |
449 | { | |
0365ba7f | 450 | struct smu_simple_cmd cmd; |
1da177e4 LT |
451 | |
452 | if (smu == NULL) | |
453 | return; | |
454 | ||
0365ba7f BH |
455 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, |
456 | 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) | |
457 | return; | |
458 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
459 | for (;;) |
460 | ; | |
1da177e4 LT |
461 | } |
462 | ||
0365ba7f | 463 | |
1da177e4 LT |
464 | int smu_present(void) |
465 | { | |
466 | return smu != NULL; | |
467 | } | |
0365ba7f | 468 | EXPORT_SYMBOL(smu_present); |
1da177e4 LT |
469 | |
470 | ||
183d0202 | 471 | int __init smu_init (void) |
1da177e4 LT |
472 | { |
473 | struct device_node *np; | |
018a3d1d | 474 | const u32 *data; |
73f38fe1 | 475 | int ret = 0; |
1da177e4 LT |
476 | |
477 | np = of_find_node_by_type(NULL, "smu"); | |
478 | if (np == NULL) | |
479 | return -ENODEV; | |
480 | ||
592a607b | 481 | printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); |
0365ba7f | 482 | |
91b6fad5 BH |
483 | /* |
484 | * SMU based G5s need some memory below 2Gb. Thankfully this is | |
485 | * called at a time where memblock is still available. | |
486 | */ | |
0ba9e6ed | 487 | smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL); |
1da177e4 | 488 | if (smu_cmdbuf_abs == 0) { |
91b6fad5 | 489 | printk(KERN_ERR "SMU: Command buffer allocation failed !\n"); |
73f38fe1 JL |
490 | ret = -EINVAL; |
491 | goto fail_np; | |
1da177e4 LT |
492 | } |
493 | ||
7e1c4e27 | 494 | smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES); |
8a7f97b9 MR |
495 | if (!smu) |
496 | panic("%s: Failed to allocate %zu bytes\n", __func__, | |
497 | sizeof(struct smu_device)); | |
1da177e4 LT |
498 | |
499 | spin_lock_init(&smu->lock); | |
0365ba7f BH |
500 | INIT_LIST_HEAD(&smu->cmd_list); |
501 | INIT_LIST_HEAD(&smu->cmd_i2c_list); | |
1da177e4 | 502 | smu->of_node = np; |
ef24ba70 ME |
503 | smu->db_irq = 0; |
504 | smu->msg_irq = 0; | |
0365ba7f | 505 | |
1da177e4 LT |
506 | /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a |
507 | * 32 bits value safely | |
508 | */ | |
509 | smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; | |
48817c58 | 510 | smu->cmd_buf = __va(smu_cmdbuf_abs); |
1da177e4 | 511 | |
f620753b BH |
512 | smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); |
513 | if (smu->db_node == NULL) { | |
1da177e4 | 514 | printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); |
73f38fe1 JL |
515 | ret = -ENXIO; |
516 | goto fail_bootmem; | |
1da177e4 | 517 | } |
01b2726d | 518 | data = of_get_property(smu->db_node, "reg", NULL); |
1da177e4 LT |
519 | if (data == NULL) { |
520 | printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); | |
73f38fe1 JL |
521 | ret = -ENXIO; |
522 | goto fail_db_node; | |
1da177e4 LT |
523 | } |
524 | ||
525 | /* Current setup has one doorbell GPIO that does both doorbell | |
526 | * and ack. GPIOs are at 0x50, best would be to find that out | |
527 | * in the device-tree though. | |
528 | */ | |
0365ba7f BH |
529 | smu->doorbell = *data; |
530 | if (smu->doorbell < 0x50) | |
531 | smu->doorbell += 0x50; | |
0365ba7f BH |
532 | |
533 | /* Now look for the smu-interrupt GPIO */ | |
534 | do { | |
f620753b BH |
535 | smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); |
536 | if (smu->msg_node == NULL) | |
0365ba7f | 537 | break; |
01b2726d | 538 | data = of_get_property(smu->msg_node, "reg", NULL); |
0365ba7f | 539 | if (data == NULL) { |
f620753b BH |
540 | of_node_put(smu->msg_node); |
541 | smu->msg_node = NULL; | |
0365ba7f BH |
542 | break; |
543 | } | |
544 | smu->msg = *data; | |
545 | if (smu->msg < 0x50) | |
546 | smu->msg += 0x50; | |
0365ba7f | 547 | } while(0); |
1da177e4 LT |
548 | |
549 | /* Doorbell buffer is currently hard-coded, I didn't find a proper | |
550 | * device-tree entry giving the address. Best would probably to use | |
551 | * an offset for K2 base though, but let's do it that way for now. | |
552 | */ | |
553 | smu->db_buf = ioremap(0x8000860c, 0x1000); | |
554 | if (smu->db_buf == NULL) { | |
555 | printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); | |
73f38fe1 JL |
556 | ret = -ENXIO; |
557 | goto fail_msg_node; | |
1da177e4 LT |
558 | } |
559 | ||
592a607b BH |
560 | /* U3 has an issue with NAP mode when issuing SMU commands */ |
561 | smu->broken_nap = pmac_get_uninorth_variant() < 4; | |
562 | if (smu->broken_nap) | |
563 | printk(KERN_INFO "SMU: using NAP mode workaround\n"); | |
564 | ||
1da177e4 LT |
565 | sys_ctrler = SYS_CTRLER_SMU; |
566 | return 0; | |
567 | ||
73f38fe1 | 568 | fail_msg_node: |
4b7d8358 | 569 | of_node_put(smu->msg_node); |
73f38fe1 JL |
570 | fail_db_node: |
571 | of_node_put(smu->db_node); | |
572 | fail_bootmem: | |
2013288f | 573 | memblock_free(__pa(smu), sizeof(struct smu_device)); |
1da177e4 | 574 | smu = NULL; |
73f38fe1 JL |
575 | fail_np: |
576 | of_node_put(np); | |
577 | return ret; | |
1da177e4 | 578 | } |
0365ba7f BH |
579 | |
580 | ||
581 | static int smu_late_init(void) | |
582 | { | |
583 | if (!smu) | |
584 | return 0; | |
585 | ||
0788f285 | 586 | timer_setup(&smu->i2c_timer, smu_i2c_retry, 0); |
730745a5 | 587 | |
f620753b BH |
588 | if (smu->db_node) { |
589 | smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); | |
ef24ba70 | 590 | if (!smu->db_irq) |
b6a945ae RH |
591 | printk(KERN_ERR "smu: failed to map irq for node %pOF\n", |
592 | smu->db_node); | |
f620753b BH |
593 | } |
594 | if (smu->msg_node) { | |
595 | smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); | |
ef24ba70 | 596 | if (!smu->msg_irq) |
b6a945ae RH |
597 | printk(KERN_ERR "smu: failed to map irq for node %pOF\n", |
598 | smu->msg_node); | |
f620753b BH |
599 | } |
600 | ||
0365ba7f BH |
601 | /* |
602 | * Try to request the interrupts | |
603 | */ | |
604 | ||
ef24ba70 | 605 | if (smu->db_irq) { |
0365ba7f | 606 | if (request_irq(smu->db_irq, smu_db_intr, |
dace1453 | 607 | IRQF_SHARED, "SMU doorbell", smu) < 0) { |
0365ba7f BH |
608 | printk(KERN_WARNING "SMU: can't " |
609 | "request interrupt %d\n", | |
610 | smu->db_irq); | |
ef24ba70 | 611 | smu->db_irq = 0; |
0365ba7f BH |
612 | } |
613 | } | |
614 | ||
ef24ba70 | 615 | if (smu->msg_irq) { |
0365ba7f | 616 | if (request_irq(smu->msg_irq, smu_msg_intr, |
dace1453 | 617 | IRQF_SHARED, "SMU message", smu) < 0) { |
0365ba7f BH |
618 | printk(KERN_WARNING "SMU: can't " |
619 | "request interrupt %d\n", | |
620 | smu->msg_irq); | |
ef24ba70 | 621 | smu->msg_irq = 0; |
0365ba7f BH |
622 | } |
623 | } | |
624 | ||
f620753b | 625 | smu_irq_inited = 1; |
0365ba7f BH |
626 | return 0; |
627 | } | |
730745a5 BH |
628 | /* This has to be before arch_initcall as the low i2c stuff relies on the |
629 | * above having been done before we reach arch_initcalls | |
630 | */ | |
631 | core_initcall(smu_late_init); | |
0365ba7f BH |
632 | |
633 | /* | |
634 | * sysfs visibility | |
635 | */ | |
636 | ||
c4028958 | 637 | static void smu_expose_childs(struct work_struct *unused) |
0365ba7f | 638 | { |
a28d3af2 BH |
639 | struct device_node *np; |
640 | ||
9c826d31 | 641 | for_each_child_of_node(smu->of_node, np) |
55b61fec | 642 | if (of_device_is_compatible(np, "smu-sensors")) |
730745a5 BH |
643 | of_platform_device_create(np, "smu-sensors", |
644 | &smu->of_dev->dev); | |
0365ba7f BH |
645 | } |
646 | ||
c4028958 | 647 | static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); |
0365ba7f | 648 | |
00006124 | 649 | static int smu_platform_probe(struct platform_device* dev) |
0365ba7f BH |
650 | { |
651 | if (!smu) | |
652 | return -ENODEV; | |
653 | smu->of_dev = dev; | |
654 | ||
655 | /* | |
656 | * Ok, we are matched, now expose all i2c busses. We have to defer | |
657 | * that unfortunately or it would deadlock inside the device model | |
658 | */ | |
659 | schedule_work(&smu_expose_childs_work); | |
660 | ||
661 | return 0; | |
662 | } | |
663 | ||
46759a7c | 664 | static const struct of_device_id smu_platform_match[] = |
0365ba7f BH |
665 | { |
666 | { | |
667 | .type = "smu", | |
668 | }, | |
669 | {}, | |
670 | }; | |
671 | ||
00006124 | 672 | static struct platform_driver smu_of_platform_driver = |
0365ba7f | 673 | { |
4018294b GL |
674 | .driver = { |
675 | .name = "smu", | |
4018294b GL |
676 | .of_match_table = smu_platform_match, |
677 | }, | |
0365ba7f BH |
678 | .probe = smu_platform_probe, |
679 | }; | |
680 | ||
681 | static int __init smu_init_sysfs(void) | |
682 | { | |
0365ba7f | 683 | /* |
0365ba7f BH |
684 | * For now, we don't power manage machines with an SMU chip, |
685 | * I'm a bit too far from figuring out how that works with those | |
686 | * new chipsets, but that will come back and bite us | |
687 | */ | |
00006124 | 688 | platform_driver_register(&smu_of_platform_driver); |
0365ba7f BH |
689 | return 0; |
690 | } | |
691 | ||
692 | device_initcall(smu_init_sysfs); | |
693 | ||
2dc11581 | 694 | struct platform_device *smu_get_ofdev(void) |
0365ba7f BH |
695 | { |
696 | if (!smu) | |
697 | return NULL; | |
698 | return smu->of_dev; | |
699 | } | |
700 | ||
701 | EXPORT_SYMBOL_GPL(smu_get_ofdev); | |
702 | ||
703 | /* | |
704 | * i2c interface | |
705 | */ | |
706 | ||
707 | static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) | |
708 | { | |
709 | void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; | |
710 | void *misc = cmd->misc; | |
711 | unsigned long flags; | |
712 | ||
713 | /* Check for read case */ | |
714 | if (!fail && cmd->read) { | |
715 | if (cmd->pdata[0] < 1) | |
716 | fail = 1; | |
717 | else | |
718 | memcpy(cmd->info.data, &cmd->pdata[1], | |
719 | cmd->info.datalen); | |
720 | } | |
721 | ||
722 | DPRINTK("SMU: completing, success: %d\n", !fail); | |
723 | ||
724 | /* Update status and mark no pending i2c command with lock | |
725 | * held so nobody comes in while we dequeue an eventual | |
726 | * pending next i2c command | |
727 | */ | |
728 | spin_lock_irqsave(&smu->lock, flags); | |
729 | smu->cmd_i2c_cur = NULL; | |
730 | wmb(); | |
731 | cmd->status = fail ? -EIO : 0; | |
732 | ||
733 | /* Is there another i2c command waiting ? */ | |
734 | if (!list_empty(&smu->cmd_i2c_list)) { | |
735 | struct smu_i2c_cmd *newcmd; | |
736 | ||
737 | /* Fetch it, new current, remove from list */ | |
738 | newcmd = list_entry(smu->cmd_i2c_list.next, | |
739 | struct smu_i2c_cmd, link); | |
740 | smu->cmd_i2c_cur = newcmd; | |
741 | list_del(&cmd->link); | |
742 | ||
743 | /* Queue with low level smu */ | |
744 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
745 | if (smu->cmd_cur == NULL) | |
746 | smu_start_cmd(); | |
747 | } | |
748 | spin_unlock_irqrestore(&smu->lock, flags); | |
749 | ||
750 | /* Call command completion handler if any */ | |
751 | if (done) | |
752 | done(cmd, misc); | |
753 | ||
754 | } | |
755 | ||
756 | ||
0788f285 | 757 | static void smu_i2c_retry(struct timer_list *unused) |
0365ba7f | 758 | { |
730745a5 | 759 | struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; |
0365ba7f BH |
760 | |
761 | DPRINTK("SMU: i2c failure, requeuing...\n"); | |
762 | ||
763 | /* requeue command simply by resetting reply_len */ | |
764 | cmd->pdata[0] = 0xff; | |
730745a5 | 765 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
766 | smu_queue_cmd(&cmd->scmd); |
767 | } | |
768 | ||
769 | ||
770 | static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) | |
771 | { | |
772 | struct smu_i2c_cmd *cmd = misc; | |
773 | int fail = 0; | |
774 | ||
775 | DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", | |
776 | cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); | |
777 | ||
778 | /* Check for possible status */ | |
779 | if (scmd->status < 0) | |
780 | fail = 1; | |
781 | else if (cmd->read) { | |
782 | if (cmd->stage == 0) | |
783 | fail = cmd->pdata[0] != 0; | |
784 | else | |
785 | fail = cmd->pdata[0] >= 0x80; | |
786 | } else { | |
787 | fail = cmd->pdata[0] != 0; | |
788 | } | |
789 | ||
790 | /* Handle failures by requeuing command, after 5ms interval | |
791 | */ | |
792 | if (fail && --cmd->retries > 0) { | |
793 | DPRINTK("SMU: i2c failure, starting timer...\n"); | |
730745a5 | 794 | BUG_ON(cmd != smu->cmd_i2c_cur); |
f620753b BH |
795 | if (!smu_irq_inited) { |
796 | mdelay(5); | |
0788f285 | 797 | smu_i2c_retry(NULL); |
f620753b BH |
798 | return; |
799 | } | |
730745a5 | 800 | mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); |
0365ba7f BH |
801 | return; |
802 | } | |
803 | ||
804 | /* If failure or stage 1, command is complete */ | |
805 | if (fail || cmd->stage != 0) { | |
806 | smu_i2c_complete_command(cmd, fail); | |
807 | return; | |
808 | } | |
809 | ||
810 | DPRINTK("SMU: going to stage 1\n"); | |
811 | ||
812 | /* Ok, initial command complete, now poll status */ | |
813 | scmd->reply_buf = cmd->pdata; | |
730745a5 | 814 | scmd->reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
815 | scmd->data_buf = cmd->pdata; |
816 | scmd->data_len = 1; | |
817 | cmd->pdata[0] = 0; | |
818 | cmd->stage = 1; | |
819 | cmd->retries = 20; | |
820 | smu_queue_cmd(scmd); | |
821 | } | |
822 | ||
823 | ||
824 | int smu_queue_i2c(struct smu_i2c_cmd *cmd) | |
825 | { | |
826 | unsigned long flags; | |
827 | ||
828 | if (smu == NULL) | |
829 | return -ENODEV; | |
830 | ||
831 | /* Fill most fields of scmd */ | |
832 | cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; | |
833 | cmd->scmd.done = smu_i2c_low_completion; | |
834 | cmd->scmd.misc = cmd; | |
835 | cmd->scmd.reply_buf = cmd->pdata; | |
730745a5 | 836 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
837 | cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; |
838 | cmd->scmd.status = 1; | |
839 | cmd->stage = 0; | |
840 | cmd->pdata[0] = 0xff; | |
841 | cmd->retries = 20; | |
842 | cmd->status = 1; | |
843 | ||
844 | /* Check transfer type, sanitize some "info" fields | |
845 | * based on transfer type and do more checking | |
846 | */ | |
847 | cmd->info.caddr = cmd->info.devaddr; | |
848 | cmd->read = cmd->info.devaddr & 0x01; | |
849 | switch(cmd->info.type) { | |
850 | case SMU_I2C_TRANSFER_SIMPLE: | |
851 | memset(&cmd->info.sublen, 0, 4); | |
852 | break; | |
853 | case SMU_I2C_TRANSFER_COMBINED: | |
854 | cmd->info.devaddr &= 0xfe; | |
df561f66 | 855 | fallthrough; |
0365ba7f BH |
856 | case SMU_I2C_TRANSFER_STDSUB: |
857 | if (cmd->info.sublen > 3) | |
858 | return -EINVAL; | |
859 | break; | |
860 | default: | |
861 | return -EINVAL; | |
862 | } | |
863 | ||
864 | /* Finish setting up command based on transfer direction | |
865 | */ | |
866 | if (cmd->read) { | |
867 | if (cmd->info.datalen > SMU_I2C_READ_MAX) | |
868 | return -EINVAL; | |
869 | memset(cmd->info.data, 0xff, cmd->info.datalen); | |
870 | cmd->scmd.data_len = 9; | |
871 | } else { | |
872 | if (cmd->info.datalen > SMU_I2C_WRITE_MAX) | |
873 | return -EINVAL; | |
874 | cmd->scmd.data_len = 9 + cmd->info.datalen; | |
875 | } | |
876 | ||
877 | DPRINTK("SMU: i2c enqueuing command\n"); | |
878 | DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", | |
879 | cmd->read ? "read" : "write", cmd->info.datalen, | |
880 | cmd->info.bus, cmd->info.caddr, | |
881 | cmd->info.subaddr[0], cmd->info.type); | |
882 | ||
883 | ||
884 | /* Enqueue command in i2c list, and if empty, enqueue also in | |
885 | * main command list | |
886 | */ | |
887 | spin_lock_irqsave(&smu->lock, flags); | |
888 | if (smu->cmd_i2c_cur == NULL) { | |
889 | smu->cmd_i2c_cur = cmd; | |
890 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
891 | if (smu->cmd_cur == NULL) | |
892 | smu_start_cmd(); | |
893 | } else | |
894 | list_add_tail(&cmd->link, &smu->cmd_i2c_list); | |
895 | spin_unlock_irqrestore(&smu->lock, flags); | |
896 | ||
897 | return 0; | |
898 | } | |
899 | ||
183d0202 BH |
900 | /* |
901 | * Handling of "partitions" | |
902 | */ | |
903 | ||
904 | static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) | |
905 | { | |
6e9a4738 | 906 | DECLARE_COMPLETION_ONSTACK(comp); |
183d0202 BH |
907 | unsigned int chunk; |
908 | struct smu_cmd cmd; | |
909 | int rc; | |
910 | u8 params[8]; | |
911 | ||
912 | /* We currently use a chunk size of 0xe. We could check the | |
913 | * SMU firmware version and use bigger sizes though | |
914 | */ | |
915 | chunk = 0xe; | |
916 | ||
917 | while (len) { | |
918 | unsigned int clen = min(len, chunk); | |
919 | ||
920 | cmd.cmd = SMU_CMD_MISC_ee_COMMAND; | |
921 | cmd.data_len = 7; | |
922 | cmd.data_buf = params; | |
923 | cmd.reply_len = chunk; | |
924 | cmd.reply_buf = dest; | |
925 | cmd.done = smu_done_complete; | |
926 | cmd.misc = ∁ | |
927 | params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; | |
928 | params[1] = 0x4; | |
929 | *((u32 *)¶ms[2]) = addr; | |
930 | params[6] = clen; | |
931 | ||
932 | rc = smu_queue_cmd(&cmd); | |
933 | if (rc) | |
934 | return rc; | |
935 | wait_for_completion(&comp); | |
936 | if (cmd.status != 0) | |
937 | return rc; | |
938 | if (cmd.reply_len != clen) { | |
939 | printk(KERN_DEBUG "SMU: short read in " | |
940 | "smu_read_datablock, got: %d, want: %d\n", | |
941 | cmd.reply_len, clen); | |
942 | return -EIO; | |
943 | } | |
944 | len -= clen; | |
945 | addr += clen; | |
946 | dest += clen; | |
947 | } | |
948 | return 0; | |
949 | } | |
950 | ||
951 | static struct smu_sdbp_header *smu_create_sdb_partition(int id) | |
952 | { | |
6e9a4738 | 953 | DECLARE_COMPLETION_ONSTACK(comp); |
183d0202 BH |
954 | struct smu_simple_cmd cmd; |
955 | unsigned int addr, len, tlen; | |
956 | struct smu_sdbp_header *hdr; | |
957 | struct property *prop; | |
958 | ||
959 | /* First query the partition info */ | |
1beb6a7d | 960 | DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); |
183d0202 BH |
961 | smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, |
962 | smu_done_complete, &comp, | |
963 | SMU_CMD_PARTITION_LATEST, id); | |
964 | wait_for_completion(&comp); | |
1beb6a7d BH |
965 | DPRINTK("SMU: done, status: %d, reply_len: %d\n", |
966 | cmd.cmd.status, cmd.cmd.reply_len); | |
183d0202 BH |
967 | |
968 | /* Partition doesn't exist (or other error) */ | |
969 | if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) | |
970 | return NULL; | |
971 | ||
972 | /* Fetch address and length from reply */ | |
973 | addr = *((u16 *)cmd.buffer); | |
974 | len = cmd.buffer[3] << 2; | |
975 | /* Calucluate total length to allocate, including the 17 bytes | |
976 | * for "sdb-partition-XX" that we append at the end of the buffer | |
977 | */ | |
978 | tlen = sizeof(struct property) + len + 18; | |
979 | ||
cd861280 | 980 | prop = kzalloc(tlen, GFP_KERNEL); |
183d0202 BH |
981 | if (prop == NULL) |
982 | return NULL; | |
983 | hdr = (struct smu_sdbp_header *)(prop + 1); | |
984 | prop->name = ((char *)prop) + tlen - 18; | |
985 | sprintf(prop->name, "sdb-partition-%02x", id); | |
986 | prop->length = len; | |
1a38147e | 987 | prop->value = hdr; |
183d0202 BH |
988 | prop->next = NULL; |
989 | ||
990 | /* Read the datablock */ | |
991 | if (smu_read_datablock((u8 *)hdr, addr, len)) { | |
992 | printk(KERN_DEBUG "SMU: datablock read failed while reading " | |
993 | "partition %02x !\n", id); | |
994 | goto failure; | |
995 | } | |
996 | ||
997 | /* Got it, check a few things and create the property */ | |
998 | if (hdr->id != id) { | |
999 | printk(KERN_DEBUG "SMU: Reading partition %02x and got " | |
1000 | "%02x !\n", id, hdr->id); | |
1001 | goto failure; | |
1002 | } | |
79d1c712 | 1003 | if (of_add_property(smu->of_node, prop)) { |
183d0202 BH |
1004 | printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " |
1005 | "property !\n", id); | |
1006 | goto failure; | |
1007 | } | |
1008 | ||
1009 | return hdr; | |
1010 | failure: | |
1011 | kfree(prop); | |
1012 | return NULL; | |
1013 | } | |
1014 | ||
1015 | /* Note: Only allowed to return error code in pointers (using ERR_PTR) | |
1016 | * when interruptible is 1 | |
1017 | */ | |
3db8715e | 1018 | static const struct smu_sdbp_header *__smu_get_sdb_partition(int id, |
018a3d1d | 1019 | unsigned int *size, int interruptible) |
4350147a BH |
1020 | { |
1021 | char pname[32]; | |
018a3d1d | 1022 | const struct smu_sdbp_header *part; |
4350147a BH |
1023 | |
1024 | if (!smu) | |
1025 | return NULL; | |
1026 | ||
1027 | sprintf(pname, "sdb-partition-%02x", id); | |
183d0202 | 1028 | |
1beb6a7d BH |
1029 | DPRINTK("smu_get_sdb_partition(%02x)\n", id); |
1030 | ||
183d0202 BH |
1031 | if (interruptible) { |
1032 | int rc; | |
14cc3e2b | 1033 | rc = mutex_lock_interruptible(&smu_part_access); |
183d0202 BH |
1034 | if (rc) |
1035 | return ERR_PTR(rc); | |
1036 | } else | |
14cc3e2b | 1037 | mutex_lock(&smu_part_access); |
183d0202 | 1038 | |
01b2726d | 1039 | part = of_get_property(smu->of_node, pname, size); |
183d0202 | 1040 | if (part == NULL) { |
1beb6a7d | 1041 | DPRINTK("trying to extract from SMU ...\n"); |
183d0202 BH |
1042 | part = smu_create_sdb_partition(id); |
1043 | if (part != NULL && size) | |
1044 | *size = part->len << 2; | |
1045 | } | |
14cc3e2b | 1046 | mutex_unlock(&smu_part_access); |
183d0202 BH |
1047 | return part; |
1048 | } | |
1049 | ||
018a3d1d | 1050 | const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) |
183d0202 BH |
1051 | { |
1052 | return __smu_get_sdb_partition(id, size, 0); | |
4350147a BH |
1053 | } |
1054 | EXPORT_SYMBOL(smu_get_sdb_partition); | |
0365ba7f BH |
1055 | |
1056 | ||
1057 | /* | |
1058 | * Userland driver interface | |
1059 | */ | |
1060 | ||
1061 | ||
1062 | static LIST_HEAD(smu_clist); | |
1063 | static DEFINE_SPINLOCK(smu_clist_lock); | |
1064 | ||
1065 | enum smu_file_mode { | |
1066 | smu_file_commands, | |
1067 | smu_file_events, | |
1068 | smu_file_closing | |
1069 | }; | |
1070 | ||
1071 | struct smu_private | |
1072 | { | |
1073 | struct list_head list; | |
1074 | enum smu_file_mode mode; | |
1075 | int busy; | |
1076 | struct smu_cmd cmd; | |
1077 | spinlock_t lock; | |
1078 | wait_queue_head_t wait; | |
1079 | u8 buffer[SMU_MAX_DATA]; | |
1080 | }; | |
1081 | ||
1082 | ||
1083 | static int smu_open(struct inode *inode, struct file *file) | |
1084 | { | |
1085 | struct smu_private *pp; | |
1086 | unsigned long flags; | |
1087 | ||
dd00cc48 | 1088 | pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); |
0365ba7f BH |
1089 | if (pp == 0) |
1090 | return -ENOMEM; | |
0365ba7f BH |
1091 | spin_lock_init(&pp->lock); |
1092 | pp->mode = smu_file_commands; | |
1093 | init_waitqueue_head(&pp->wait); | |
1094 | ||
d851b6e0 | 1095 | mutex_lock(&smu_mutex); |
0365ba7f BH |
1096 | spin_lock_irqsave(&smu_clist_lock, flags); |
1097 | list_add(&pp->list, &smu_clist); | |
1098 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1099 | file->private_data = pp; | |
d851b6e0 | 1100 | mutex_unlock(&smu_mutex); |
0365ba7f BH |
1101 | |
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | ||
1106 | static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) | |
1107 | { | |
1108 | struct smu_private *pp = misc; | |
1109 | ||
1110 | wake_up_all(&pp->wait); | |
1111 | } | |
1112 | ||
1113 | ||
1114 | static ssize_t smu_write(struct file *file, const char __user *buf, | |
1115 | size_t count, loff_t *ppos) | |
1116 | { | |
1117 | struct smu_private *pp = file->private_data; | |
1118 | unsigned long flags; | |
1119 | struct smu_user_cmd_hdr hdr; | |
1120 | int rc = 0; | |
1121 | ||
1122 | if (pp->busy) | |
1123 | return -EBUSY; | |
1124 | else if (copy_from_user(&hdr, buf, sizeof(hdr))) | |
1125 | return -EFAULT; | |
1126 | else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { | |
1127 | pp->mode = smu_file_events; | |
1128 | return 0; | |
183d0202 | 1129 | } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { |
018a3d1d | 1130 | const struct smu_sdbp_header *part; |
183d0202 BH |
1131 | part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); |
1132 | if (part == NULL) | |
1133 | return -EINVAL; | |
1134 | else if (IS_ERR(part)) | |
1135 | return PTR_ERR(part); | |
1136 | return 0; | |
0365ba7f BH |
1137 | } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) |
1138 | return -EINVAL; | |
1139 | else if (pp->mode != smu_file_commands) | |
1140 | return -EBADFD; | |
1141 | else if (hdr.data_len > SMU_MAX_DATA) | |
1142 | return -EINVAL; | |
1143 | ||
1144 | spin_lock_irqsave(&pp->lock, flags); | |
1145 | if (pp->busy) { | |
1146 | spin_unlock_irqrestore(&pp->lock, flags); | |
1147 | return -EBUSY; | |
1148 | } | |
1149 | pp->busy = 1; | |
1150 | pp->cmd.status = 1; | |
1151 | spin_unlock_irqrestore(&pp->lock, flags); | |
1152 | ||
1153 | if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { | |
1154 | pp->busy = 0; | |
1155 | return -EFAULT; | |
1156 | } | |
1157 | ||
1158 | pp->cmd.cmd = hdr.cmd; | |
1159 | pp->cmd.data_len = hdr.data_len; | |
1160 | pp->cmd.reply_len = SMU_MAX_DATA; | |
1161 | pp->cmd.data_buf = pp->buffer; | |
1162 | pp->cmd.reply_buf = pp->buffer; | |
1163 | pp->cmd.done = smu_user_cmd_done; | |
1164 | pp->cmd.misc = pp; | |
1165 | rc = smu_queue_cmd(&pp->cmd); | |
1166 | if (rc < 0) | |
1167 | return rc; | |
1168 | return count; | |
1169 | } | |
1170 | ||
1171 | ||
1172 | static ssize_t smu_read_command(struct file *file, struct smu_private *pp, | |
1173 | char __user *buf, size_t count) | |
1174 | { | |
1175 | DECLARE_WAITQUEUE(wait, current); | |
1176 | struct smu_user_reply_hdr hdr; | |
1177 | unsigned long flags; | |
1178 | int size, rc = 0; | |
1179 | ||
1180 | if (!pp->busy) | |
1181 | return 0; | |
1182 | if (count < sizeof(struct smu_user_reply_hdr)) | |
1183 | return -EOVERFLOW; | |
1184 | spin_lock_irqsave(&pp->lock, flags); | |
1185 | if (pp->cmd.status == 1) { | |
86e4754a JL |
1186 | if (file->f_flags & O_NONBLOCK) { |
1187 | spin_unlock_irqrestore(&pp->lock, flags); | |
0365ba7f | 1188 | return -EAGAIN; |
86e4754a | 1189 | } |
0365ba7f BH |
1190 | add_wait_queue(&pp->wait, &wait); |
1191 | for (;;) { | |
1192 | set_current_state(TASK_INTERRUPTIBLE); | |
1193 | rc = 0; | |
1194 | if (pp->cmd.status != 1) | |
1195 | break; | |
1196 | rc = -ERESTARTSYS; | |
1197 | if (signal_pending(current)) | |
1198 | break; | |
1199 | spin_unlock_irqrestore(&pp->lock, flags); | |
1200 | schedule(); | |
1201 | spin_lock_irqsave(&pp->lock, flags); | |
1202 | } | |
1203 | set_current_state(TASK_RUNNING); | |
1204 | remove_wait_queue(&pp->wait, &wait); | |
1205 | } | |
1206 | spin_unlock_irqrestore(&pp->lock, flags); | |
1207 | if (rc) | |
1208 | return rc; | |
1209 | if (pp->cmd.status != 0) | |
1210 | pp->cmd.reply_len = 0; | |
1211 | size = sizeof(hdr) + pp->cmd.reply_len; | |
1212 | if (count < size) | |
1213 | size = count; | |
1214 | rc = size; | |
1215 | hdr.status = pp->cmd.status; | |
1216 | hdr.reply_len = pp->cmd.reply_len; | |
1217 | if (copy_to_user(buf, &hdr, sizeof(hdr))) | |
1218 | return -EFAULT; | |
1219 | size -= sizeof(hdr); | |
1220 | if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) | |
1221 | return -EFAULT; | |
1222 | pp->busy = 0; | |
1223 | ||
1224 | return rc; | |
1225 | } | |
1226 | ||
1227 | ||
1228 | static ssize_t smu_read_events(struct file *file, struct smu_private *pp, | |
1229 | char __user *buf, size_t count) | |
1230 | { | |
1231 | /* Not implemented */ | |
1232 | msleep_interruptible(1000); | |
1233 | return 0; | |
1234 | } | |
1235 | ||
1236 | ||
1237 | static ssize_t smu_read(struct file *file, char __user *buf, | |
1238 | size_t count, loff_t *ppos) | |
1239 | { | |
1240 | struct smu_private *pp = file->private_data; | |
1241 | ||
1242 | if (pp->mode == smu_file_commands) | |
1243 | return smu_read_command(file, pp, buf, count); | |
1244 | if (pp->mode == smu_file_events) | |
1245 | return smu_read_events(file, pp, buf, count); | |
1246 | ||
1247 | return -EBADFD; | |
1248 | } | |
1249 | ||
afc9a42b | 1250 | static __poll_t smu_fpoll(struct file *file, poll_table *wait) |
0365ba7f BH |
1251 | { |
1252 | struct smu_private *pp = file->private_data; | |
afc9a42b | 1253 | __poll_t mask = 0; |
0365ba7f BH |
1254 | unsigned long flags; |
1255 | ||
1256 | if (pp == 0) | |
1257 | return 0; | |
1258 | ||
1259 | if (pp->mode == smu_file_commands) { | |
1260 | poll_wait(file, &pp->wait, wait); | |
1261 | ||
1262 | spin_lock_irqsave(&pp->lock, flags); | |
1263 | if (pp->busy && pp->cmd.status != 1) | |
a9a08845 | 1264 | mask |= EPOLLIN; |
0365ba7f | 1265 | spin_unlock_irqrestore(&pp->lock, flags); |
2055fb41 RV |
1266 | } |
1267 | if (pp->mode == smu_file_events) { | |
0365ba7f BH |
1268 | /* Not yet implemented */ |
1269 | } | |
1270 | return mask; | |
1271 | } | |
1272 | ||
1273 | static int smu_release(struct inode *inode, struct file *file) | |
1274 | { | |
1275 | struct smu_private *pp = file->private_data; | |
1276 | unsigned long flags; | |
1277 | unsigned int busy; | |
1278 | ||
1279 | if (pp == 0) | |
1280 | return 0; | |
1281 | ||
1282 | file->private_data = NULL; | |
1283 | ||
1284 | /* Mark file as closing to avoid races with new request */ | |
1285 | spin_lock_irqsave(&pp->lock, flags); | |
1286 | pp->mode = smu_file_closing; | |
1287 | busy = pp->busy; | |
1288 | ||
1289 | /* Wait for any pending request to complete */ | |
1290 | if (busy && pp->cmd.status == 1) { | |
1291 | DECLARE_WAITQUEUE(wait, current); | |
1292 | ||
1293 | add_wait_queue(&pp->wait, &wait); | |
1294 | for (;;) { | |
1295 | set_current_state(TASK_UNINTERRUPTIBLE); | |
1296 | if (pp->cmd.status != 1) | |
1297 | break; | |
0365ba7f | 1298 | spin_unlock_irqrestore(&pp->lock, flags); |
94256dd6 AM |
1299 | schedule(); |
1300 | spin_lock_irqsave(&pp->lock, flags); | |
0365ba7f BH |
1301 | } |
1302 | set_current_state(TASK_RUNNING); | |
1303 | remove_wait_queue(&pp->wait, &wait); | |
1304 | } | |
1305 | spin_unlock_irqrestore(&pp->lock, flags); | |
1306 | ||
1307 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1308 | list_del(&pp->list); | |
1309 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1310 | kfree(pp); | |
1311 | ||
1312 | return 0; | |
1313 | } | |
1314 | ||
1315 | ||
fa027c2a | 1316 | static const struct file_operations smu_device_fops = { |
0365ba7f BH |
1317 | .llseek = no_llseek, |
1318 | .read = smu_read, | |
1319 | .write = smu_write, | |
1320 | .poll = smu_fpoll, | |
1321 | .open = smu_open, | |
1322 | .release = smu_release, | |
1323 | }; | |
1324 | ||
6b67f62c | 1325 | static struct miscdevice pmu_device = { |
0365ba7f BH |
1326 | MISC_DYNAMIC_MINOR, "smu", &smu_device_fops |
1327 | }; | |
1328 | ||
1329 | static int smu_device_init(void) | |
1330 | { | |
1331 | if (!smu) | |
1332 | return -ENODEV; | |
1333 | if (misc_register(&pmu_device) < 0) | |
1334 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
1335 | return 0; | |
1336 | } | |
1337 | device_initcall(smu_device_init); |