Commit | Line | Data |
---|---|---|
f938d2c8 RR |
1 | /*P:800 Interrupts (traps) are complicated enough to earn their own file. |
2 | * There are three classes of interrupts: | |
3 | * | |
4 | * 1) Real hardware interrupts which occur while we're running the Guest, | |
5 | * 2) Interrupts for virtual devices attached to the Guest, and | |
6 | * 3) Traps and faults from the Guest. | |
7 | * | |
8 | * Real hardware interrupts must be delivered to the Host, not the Guest. | |
9 | * Virtual interrupts must be delivered to the Guest, but we make them look | |
10 | * just like real hardware would deliver them. Traps from the Guest can be set | |
11 | * up to go directly back into the Guest, but sometimes the Host wants to see | |
12 | * them first, so we also have a way of "reflecting" them into the Guest as if | |
13 | * they had been delivered to it directly. :*/ | |
d7e28ffe | 14 | #include <linux/uaccess.h> |
c18acd73 RR |
15 | #include <linux/interrupt.h> |
16 | #include <linux/module.h> | |
d7e28ffe RR |
17 | #include "lg.h" |
18 | ||
c18acd73 RR |
19 | /* Allow Guests to use a non-128 (ie. non-Linux) syscall trap. */ |
20 | static unsigned int syscall_vector = SYSCALL_VECTOR; | |
21 | module_param(syscall_vector, uint, 0444); | |
22 | ||
bff672e6 | 23 | /* The address of the interrupt handler is split into two bits: */ |
d7e28ffe RR |
24 | static unsigned long idt_address(u32 lo, u32 hi) |
25 | { | |
26 | return (lo & 0x0000FFFF) | (hi & 0xFFFF0000); | |
27 | } | |
28 | ||
bff672e6 RR |
29 | /* The "type" of the interrupt handler is a 4 bit field: we only support a |
30 | * couple of types. */ | |
d7e28ffe RR |
31 | static int idt_type(u32 lo, u32 hi) |
32 | { | |
33 | return (hi >> 8) & 0xF; | |
34 | } | |
35 | ||
bff672e6 | 36 | /* An IDT entry can't be used unless the "present" bit is set. */ |
df1693ab | 37 | static bool idt_present(u32 lo, u32 hi) |
d7e28ffe RR |
38 | { |
39 | return (hi & 0x8000); | |
40 | } | |
41 | ||
bff672e6 RR |
42 | /* We need a helper to "push" a value onto the Guest's stack, since that's a |
43 | * big part of what delivering an interrupt does. */ | |
382ac6b3 | 44 | static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val) |
d7e28ffe | 45 | { |
bff672e6 | 46 | /* Stack grows upwards: move stack then write value. */ |
d7e28ffe | 47 | *gstack -= 4; |
382ac6b3 | 48 | lgwrite(cpu, *gstack, u32, val); |
d7e28ffe RR |
49 | } |
50 | ||
bff672e6 RR |
51 | /*H:210 The set_guest_interrupt() routine actually delivers the interrupt or |
52 | * trap. The mechanics of delivering traps and interrupts to the Guest are the | |
53 | * same, except some traps have an "error code" which gets pushed onto the | |
54 | * stack as well: the caller tells us if this is one. | |
55 | * | |
56 | * "lo" and "hi" are the two parts of the Interrupt Descriptor Table for this | |
57 | * interrupt or trap. It's split into two parts for traditional reasons: gcc | |
58 | * on i386 used to be frightened by 64 bit numbers. | |
59 | * | |
60 | * We set up the stack just like the CPU does for a real interrupt, so it's | |
61 | * identical for the Guest (and the standard "iret" instruction will undo | |
62 | * it). */ | |
df1693ab MZ |
63 | static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi, |
64 | bool has_err) | |
d7e28ffe | 65 | { |
47436aa4 | 66 | unsigned long gstack, origstack; |
d7e28ffe | 67 | u32 eflags, ss, irq_enable; |
47436aa4 | 68 | unsigned long virtstack; |
d7e28ffe | 69 | |
bff672e6 RR |
70 | /* There are two cases for interrupts: one where the Guest is already |
71 | * in the kernel, and a more complex one where the Guest is in | |
72 | * userspace. We check the privilege level to find out. */ | |
a53a35a8 | 73 | if ((cpu->regs->ss&0x3) != GUEST_PL) { |
bff672e6 RR |
74 | /* The Guest told us their kernel stack with the SET_STACK |
75 | * hypercall: both the virtual address and the segment */ | |
4665ac8e GOC |
76 | virtstack = cpu->esp1; |
77 | ss = cpu->ss1; | |
47436aa4 | 78 | |
1713608f | 79 | origstack = gstack = guest_pa(cpu, virtstack); |
bff672e6 RR |
80 | /* We push the old stack segment and pointer onto the new |
81 | * stack: when the Guest does an "iret" back from the interrupt | |
82 | * handler the CPU will notice they're dropping privilege | |
83 | * levels and expect these here. */ | |
382ac6b3 GOC |
84 | push_guest_stack(cpu, &gstack, cpu->regs->ss); |
85 | push_guest_stack(cpu, &gstack, cpu->regs->esp); | |
d7e28ffe | 86 | } else { |
bff672e6 | 87 | /* We're staying on the same Guest (kernel) stack. */ |
a53a35a8 GOC |
88 | virtstack = cpu->regs->esp; |
89 | ss = cpu->regs->ss; | |
47436aa4 | 90 | |
1713608f | 91 | origstack = gstack = guest_pa(cpu, virtstack); |
d7e28ffe RR |
92 | } |
93 | ||
bff672e6 RR |
94 | /* Remember that we never let the Guest actually disable interrupts, so |
95 | * the "Interrupt Flag" bit is always set. We copy that bit from the | |
e1e72965 RR |
96 | * Guest's "irq_enabled" field into the eflags word: we saw the Guest |
97 | * copy it back in "lguest_iret". */ | |
a53a35a8 | 98 | eflags = cpu->regs->eflags; |
382ac6b3 | 99 | if (get_user(irq_enable, &cpu->lg->lguest_data->irq_enabled) == 0 |
e5faff45 RR |
100 | && !(irq_enable & X86_EFLAGS_IF)) |
101 | eflags &= ~X86_EFLAGS_IF; | |
d7e28ffe | 102 | |
bff672e6 RR |
103 | /* An interrupt is expected to push three things on the stack: the old |
104 | * "eflags" word, the old code segment, and the old instruction | |
105 | * pointer. */ | |
382ac6b3 GOC |
106 | push_guest_stack(cpu, &gstack, eflags); |
107 | push_guest_stack(cpu, &gstack, cpu->regs->cs); | |
108 | push_guest_stack(cpu, &gstack, cpu->regs->eip); | |
d7e28ffe | 109 | |
bff672e6 | 110 | /* For the six traps which supply an error code, we push that, too. */ |
d7e28ffe | 111 | if (has_err) |
382ac6b3 | 112 | push_guest_stack(cpu, &gstack, cpu->regs->errcode); |
d7e28ffe | 113 | |
bff672e6 RR |
114 | /* Now we've pushed all the old state, we change the stack, the code |
115 | * segment and the address to execute. */ | |
a53a35a8 GOC |
116 | cpu->regs->ss = ss; |
117 | cpu->regs->esp = virtstack + (gstack - origstack); | |
118 | cpu->regs->cs = (__KERNEL_CS|GUEST_PL); | |
119 | cpu->regs->eip = idt_address(lo, hi); | |
d7e28ffe | 120 | |
bff672e6 RR |
121 | /* There are two kinds of interrupt handlers: 0xE is an "interrupt |
122 | * gate" which expects interrupts to be disabled on entry. */ | |
d7e28ffe | 123 | if (idt_type(lo, hi) == 0xE) |
382ac6b3 GOC |
124 | if (put_user(0, &cpu->lg->lguest_data->irq_enabled)) |
125 | kill_guest(cpu, "Disabling interrupts"); | |
d7e28ffe RR |
126 | } |
127 | ||
e1e72965 | 128 | /*H:205 |
bff672e6 RR |
129 | * Virtual Interrupts. |
130 | * | |
131 | * maybe_do_interrupt() gets called before every entry to the Guest, to see if | |
132 | * we should divert the Guest to running an interrupt handler. */ | |
177e449d | 133 | void maybe_do_interrupt(struct lg_cpu *cpu) |
d7e28ffe RR |
134 | { |
135 | unsigned int irq; | |
136 | DECLARE_BITMAP(blk, LGUEST_IRQS); | |
137 | struct desc_struct *idt; | |
138 | ||
bff672e6 | 139 | /* If the Guest hasn't even initialized yet, we can do nothing. */ |
382ac6b3 | 140 | if (!cpu->lg->lguest_data) |
d7e28ffe RR |
141 | return; |
142 | ||
bff672e6 RR |
143 | /* Take our "irqs_pending" array and remove any interrupts the Guest |
144 | * wants blocked: the result ends up in "blk". */ | |
382ac6b3 | 145 | if (copy_from_user(&blk, cpu->lg->lguest_data->blocked_interrupts, |
d7e28ffe RR |
146 | sizeof(blk))) |
147 | return; | |
177e449d | 148 | bitmap_andnot(blk, cpu->irqs_pending, blk, LGUEST_IRQS); |
d7e28ffe | 149 | |
bff672e6 | 150 | /* Find the first interrupt. */ |
d7e28ffe | 151 | irq = find_first_bit(blk, LGUEST_IRQS); |
bff672e6 | 152 | /* None? Nothing to do */ |
d7e28ffe RR |
153 | if (irq >= LGUEST_IRQS) |
154 | return; | |
155 | ||
bff672e6 RR |
156 | /* They may be in the middle of an iret, where they asked us never to |
157 | * deliver interrupts. */ | |
382ac6b3 GOC |
158 | if (cpu->regs->eip >= cpu->lg->noirq_start && |
159 | (cpu->regs->eip < cpu->lg->noirq_end)) | |
d7e28ffe RR |
160 | return; |
161 | ||
bff672e6 | 162 | /* If they're halted, interrupts restart them. */ |
66686c2a | 163 | if (cpu->halted) { |
d7e28ffe | 164 | /* Re-enable interrupts. */ |
382ac6b3 GOC |
165 | if (put_user(X86_EFLAGS_IF, &cpu->lg->lguest_data->irq_enabled)) |
166 | kill_guest(cpu, "Re-enabling interrupts"); | |
66686c2a | 167 | cpu->halted = 0; |
d7e28ffe | 168 | } else { |
bff672e6 | 169 | /* Otherwise we check if they have interrupts disabled. */ |
d7e28ffe | 170 | u32 irq_enabled; |
382ac6b3 | 171 | if (get_user(irq_enabled, &cpu->lg->lguest_data->irq_enabled)) |
d7e28ffe RR |
172 | irq_enabled = 0; |
173 | if (!irq_enabled) | |
174 | return; | |
175 | } | |
176 | ||
bff672e6 RR |
177 | /* Look at the IDT entry the Guest gave us for this interrupt. The |
178 | * first 32 (FIRST_EXTERNAL_VECTOR) entries are for traps, so we skip | |
179 | * over them. */ | |
fc708b3e | 180 | idt = &cpu->arch.idt[FIRST_EXTERNAL_VECTOR+irq]; |
bff672e6 | 181 | /* If they don't have a handler (yet?), we just ignore it */ |
d7e28ffe | 182 | if (idt_present(idt->a, idt->b)) { |
bff672e6 | 183 | /* OK, mark it no longer pending and deliver it. */ |
177e449d | 184 | clear_bit(irq, cpu->irqs_pending); |
bff672e6 RR |
185 | /* set_guest_interrupt() takes the interrupt descriptor and a |
186 | * flag to say whether this interrupt pushes an error code onto | |
187 | * the stack as well: virtual interrupts never do. */ | |
df1693ab | 188 | set_guest_interrupt(cpu, idt->a, idt->b, false); |
d7e28ffe | 189 | } |
6c8dca5d RR |
190 | |
191 | /* Every time we deliver an interrupt, we update the timestamp in the | |
192 | * Guest's lguest_data struct. It would be better for the Guest if we | |
193 | * did this more often, but it can actually be quite slow: doing it | |
194 | * here is a compromise which means at least it gets updated every | |
195 | * timer interrupt. */ | |
382ac6b3 | 196 | write_timestamp(cpu); |
d7e28ffe | 197 | } |
c18acd73 RR |
198 | /*:*/ |
199 | ||
200 | /* Linux uses trap 128 for system calls. Plan9 uses 64, and Ron Minnich sent | |
201 | * me a patch, so we support that too. It'd be a big step for lguest if half | |
202 | * the Plan 9 user base were to start using it. | |
203 | * | |
204 | * Actually now I think of it, it's possible that Ron *is* half the Plan 9 | |
205 | * userbase. Oh well. */ | |
206 | static bool could_be_syscall(unsigned int num) | |
207 | { | |
208 | /* Normal Linux SYSCALL_VECTOR or reserved vector? */ | |
209 | return num == SYSCALL_VECTOR || num == syscall_vector; | |
210 | } | |
211 | ||
212 | /* The syscall vector it wants must be unused by Host. */ | |
213 | bool check_syscall_vector(struct lguest *lg) | |
214 | { | |
215 | u32 vector; | |
216 | ||
217 | if (get_user(vector, &lg->lguest_data->syscall_vec)) | |
218 | return false; | |
219 | ||
220 | return could_be_syscall(vector); | |
221 | } | |
222 | ||
223 | int init_interrupts(void) | |
224 | { | |
225 | /* If they want some strange system call vector, reserve it now */ | |
b77b881f YL |
226 | if (syscall_vector != SYSCALL_VECTOR) { |
227 | if (test_bit(syscall_vector, used_vectors) || | |
228 | vector_used_by_percpu_irq(syscall_vector)) { | |
229 | printk(KERN_ERR "lg: couldn't reserve syscall %u\n", | |
230 | syscall_vector); | |
231 | return -EBUSY; | |
232 | } | |
233 | set_bit(syscall_vector, used_vectors); | |
c18acd73 | 234 | } |
b77b881f | 235 | |
c18acd73 RR |
236 | return 0; |
237 | } | |
238 | ||
239 | void free_interrupts(void) | |
240 | { | |
241 | if (syscall_vector != SYSCALL_VECTOR) | |
242 | clear_bit(syscall_vector, used_vectors); | |
243 | } | |
d7e28ffe | 244 | |
a6bd8e13 RR |
245 | /*H:220 Now we've got the routines to deliver interrupts, delivering traps like |
246 | * page fault is easy. The only trick is that Intel decided that some traps | |
247 | * should have error codes: */ | |
df1693ab | 248 | static bool has_err(unsigned int trap) |
d7e28ffe RR |
249 | { |
250 | return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17); | |
251 | } | |
252 | ||
bff672e6 | 253 | /* deliver_trap() returns true if it could deliver the trap. */ |
df1693ab | 254 | bool deliver_trap(struct lg_cpu *cpu, unsigned int num) |
d7e28ffe | 255 | { |
0d027c01 RR |
256 | /* Trap numbers are always 8 bit, but we set an impossible trap number |
257 | * for traps inside the Switcher, so check that here. */ | |
fc708b3e | 258 | if (num >= ARRAY_SIZE(cpu->arch.idt)) |
df1693ab | 259 | return false; |
d7e28ffe | 260 | |
bff672e6 RR |
261 | /* Early on the Guest hasn't set the IDT entries (or maybe it put a |
262 | * bogus one in): if we fail here, the Guest will be killed. */ | |
fc708b3e | 263 | if (!idt_present(cpu->arch.idt[num].a, cpu->arch.idt[num].b)) |
df1693ab | 264 | return false; |
fc708b3e GOC |
265 | set_guest_interrupt(cpu, cpu->arch.idt[num].a, |
266 | cpu->arch.idt[num].b, has_err(num)); | |
df1693ab | 267 | return true; |
d7e28ffe RR |
268 | } |
269 | ||
bff672e6 RR |
270 | /*H:250 Here's the hard part: returning to the Host every time a trap happens |
271 | * and then calling deliver_trap() and re-entering the Guest is slow. | |
e1e72965 RR |
272 | * Particularly because Guest userspace system calls are traps (usually trap |
273 | * 128). | |
bff672e6 RR |
274 | * |
275 | * So we'd like to set up the IDT to tell the CPU to deliver traps directly | |
276 | * into the Guest. This is possible, but the complexities cause the size of | |
277 | * this file to double! However, 150 lines of code is worth writing for taking | |
278 | * system calls down from 1750ns to 270ns. Plus, if lguest didn't do it, all | |
e1e72965 | 279 | * the other hypervisors would beat it up at lunchtime. |
bff672e6 | 280 | * |
56adbe9d RR |
281 | * This routine indicates if a particular trap number could be delivered |
282 | * directly. */ | |
df1693ab | 283 | static bool direct_trap(unsigned int num) |
d7e28ffe | 284 | { |
bff672e6 RR |
285 | /* Hardware interrupts don't go to the Guest at all (except system |
286 | * call). */ | |
c18acd73 | 287 | if (num >= FIRST_EXTERNAL_VECTOR && !could_be_syscall(num)) |
df1693ab | 288 | return false; |
d7e28ffe | 289 | |
bff672e6 RR |
290 | /* The Host needs to see page faults (for shadow paging and to save the |
291 | * fault address), general protection faults (in/out emulation) and | |
4cd8b5e2 MZ |
292 | * device not available (TS handling), invalid opcode fault (kvm hcall), |
293 | * and of course, the hypercall trap. */ | |
294 | return num != 14 && num != 13 && num != 7 && | |
295 | num != 6 && num != LGUEST_TRAP_ENTRY; | |
d7e28ffe | 296 | } |
f56a384e RR |
297 | /*:*/ |
298 | ||
299 | /*M:005 The Guest has the ability to turn its interrupt gates into trap gates, | |
300 | * if it is careful. The Host will let trap gates can go directly to the | |
301 | * Guest, but the Guest needs the interrupts atomically disabled for an | |
302 | * interrupt gate. It can do this by pointing the trap gate at instructions | |
303 | * within noirq_start and noirq_end, where it can safely disable interrupts. */ | |
304 | ||
305 | /*M:006 The Guests do not use the sysenter (fast system call) instruction, | |
306 | * because it's hardcoded to enter privilege level 0 and so can't go direct. | |
307 | * It's about twice as fast as the older "int 0x80" system call, so it might | |
308 | * still be worthwhile to handle it in the Switcher and lcall down to the | |
309 | * Guest. The sysenter semantics are hairy tho: search for that keyword in | |
310 | * entry.S :*/ | |
d7e28ffe | 311 | |
bff672e6 RR |
312 | /*H:260 When we make traps go directly into the Guest, we need to make sure |
313 | * the kernel stack is valid (ie. mapped in the page tables). Otherwise, the | |
314 | * CPU trying to deliver the trap will fault while trying to push the interrupt | |
315 | * words on the stack: this is called a double fault, and it forces us to kill | |
316 | * the Guest. | |
317 | * | |
318 | * Which is deeply unfair, because (literally!) it wasn't the Guests' fault. */ | |
4665ac8e | 319 | void pin_stack_pages(struct lg_cpu *cpu) |
d7e28ffe RR |
320 | { |
321 | unsigned int i; | |
322 | ||
bff672e6 RR |
323 | /* Depending on the CONFIG_4KSTACKS option, the Guest can have one or |
324 | * two pages of stack space. */ | |
382ac6b3 | 325 | for (i = 0; i < cpu->lg->stack_pages; i++) |
8057d763 RR |
326 | /* The stack grows *upwards*, so the address we're given is the |
327 | * start of the page after the kernel stack. Subtract one to | |
328 | * get back onto the first stack page, and keep subtracting to | |
329 | * get to the rest of the stack pages. */ | |
1713608f | 330 | pin_page(cpu, cpu->esp1 - 1 - i * PAGE_SIZE); |
d7e28ffe RR |
331 | } |
332 | ||
bff672e6 RR |
333 | /* Direct traps also mean that we need to know whenever the Guest wants to use |
334 | * a different kernel stack, so we can change the IDT entries to use that | |
335 | * stack. The IDT entries expect a virtual address, so unlike most addresses | |
336 | * the Guest gives us, the "esp" (stack pointer) value here is virtual, not | |
337 | * physical. | |
338 | * | |
339 | * In Linux each process has its own kernel stack, so this happens a lot: we | |
340 | * change stacks on each context switch. */ | |
4665ac8e | 341 | void guest_set_stack(struct lg_cpu *cpu, u32 seg, u32 esp, unsigned int pages) |
d7e28ffe | 342 | { |
e1e72965 | 343 | /* You are not allowed have a stack segment with privilege level 0: bad |
bff672e6 | 344 | * Guest! */ |
d7e28ffe | 345 | if ((seg & 0x3) != GUEST_PL) |
382ac6b3 | 346 | kill_guest(cpu, "bad stack segment %i", seg); |
bff672e6 | 347 | /* We only expect one or two stack pages. */ |
d7e28ffe | 348 | if (pages > 2) |
382ac6b3 | 349 | kill_guest(cpu, "bad stack pages %u", pages); |
bff672e6 | 350 | /* Save where the stack is, and how many pages */ |
4665ac8e GOC |
351 | cpu->ss1 = seg; |
352 | cpu->esp1 = esp; | |
353 | cpu->lg->stack_pages = pages; | |
bff672e6 | 354 | /* Make sure the new stack pages are mapped */ |
4665ac8e | 355 | pin_stack_pages(cpu); |
d7e28ffe RR |
356 | } |
357 | ||
bff672e6 RR |
358 | /* All this reference to mapping stacks leads us neatly into the other complex |
359 | * part of the Host: page table handling. */ | |
360 | ||
361 | /*H:235 This is the routine which actually checks the Guest's IDT entry and | |
e1e72965 | 362 | * transfers it into the entry in "struct lguest": */ |
382ac6b3 | 363 | static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap, |
d7e28ffe RR |
364 | unsigned int num, u32 lo, u32 hi) |
365 | { | |
366 | u8 type = idt_type(lo, hi); | |
367 | ||
bff672e6 | 368 | /* We zero-out a not-present entry */ |
d7e28ffe RR |
369 | if (!idt_present(lo, hi)) { |
370 | trap->a = trap->b = 0; | |
371 | return; | |
372 | } | |
373 | ||
bff672e6 | 374 | /* We only support interrupt and trap gates. */ |
d7e28ffe | 375 | if (type != 0xE && type != 0xF) |
382ac6b3 | 376 | kill_guest(cpu, "bad IDT type %i", type); |
d7e28ffe | 377 | |
bff672e6 RR |
378 | /* We only copy the handler address, present bit, privilege level and |
379 | * type. The privilege level controls where the trap can be triggered | |
380 | * manually with an "int" instruction. This is usually GUEST_PL, | |
381 | * except for system calls which userspace can use. */ | |
d7e28ffe RR |
382 | trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF); |
383 | trap->b = (hi&0xFFFFEF00); | |
384 | } | |
385 | ||
bff672e6 RR |
386 | /*H:230 While we're here, dealing with delivering traps and interrupts to the |
387 | * Guest, we might as well complete the picture: how the Guest tells us where | |
388 | * it wants them to go. This would be simple, except making traps fast | |
389 | * requires some tricks. | |
390 | * | |
391 | * We saw the Guest setting Interrupt Descriptor Table (IDT) entries with the | |
392 | * LHCALL_LOAD_IDT_ENTRY hypercall before: that comes here. */ | |
fc708b3e | 393 | void load_guest_idt_entry(struct lg_cpu *cpu, unsigned int num, u32 lo, u32 hi) |
d7e28ffe | 394 | { |
bff672e6 RR |
395 | /* Guest never handles: NMI, doublefault, spurious interrupt or |
396 | * hypercall. We ignore when it tries to set them. */ | |
d7e28ffe RR |
397 | if (num == 2 || num == 8 || num == 15 || num == LGUEST_TRAP_ENTRY) |
398 | return; | |
399 | ||
bff672e6 RR |
400 | /* Mark the IDT as changed: next time the Guest runs we'll know we have |
401 | * to copy this again. */ | |
ae3749dc | 402 | cpu->changed |= CHANGED_IDT; |
bff672e6 | 403 | |
56adbe9d | 404 | /* Check that the Guest doesn't try to step outside the bounds. */ |
fc708b3e | 405 | if (num >= ARRAY_SIZE(cpu->arch.idt)) |
382ac6b3 | 406 | kill_guest(cpu, "Setting idt entry %u", num); |
56adbe9d | 407 | else |
382ac6b3 | 408 | set_trap(cpu, &cpu->arch.idt[num], num, lo, hi); |
d7e28ffe RR |
409 | } |
410 | ||
bff672e6 RR |
411 | /* The default entry for each interrupt points into the Switcher routines which |
412 | * simply return to the Host. The run_guest() loop will then call | |
413 | * deliver_trap() to bounce it back into the Guest. */ | |
d7e28ffe RR |
414 | static void default_idt_entry(struct desc_struct *idt, |
415 | int trap, | |
0c12091d RR |
416 | const unsigned long handler, |
417 | const struct desc_struct *base) | |
d7e28ffe | 418 | { |
bff672e6 | 419 | /* A present interrupt gate. */ |
d7e28ffe RR |
420 | u32 flags = 0x8e00; |
421 | ||
bff672e6 RR |
422 | /* Set the privilege level on the entry for the hypercall: this allows |
423 | * the Guest to use the "int" instruction to trigger it. */ | |
d7e28ffe RR |
424 | if (trap == LGUEST_TRAP_ENTRY) |
425 | flags |= (GUEST_PL << 13); | |
0c12091d RR |
426 | else if (base) |
427 | /* Copy priv. level from what Guest asked for. This allows | |
428 | * debug (int 3) traps from Guest userspace, for example. */ | |
429 | flags |= (base->b & 0x6000); | |
d7e28ffe | 430 | |
bff672e6 | 431 | /* Now pack it into the IDT entry in its weird format. */ |
d7e28ffe RR |
432 | idt->a = (LGUEST_CS<<16) | (handler&0x0000FFFF); |
433 | idt->b = (handler&0xFFFF0000) | flags; | |
434 | } | |
435 | ||
bff672e6 | 436 | /* When the Guest first starts, we put default entries into the IDT. */ |
d7e28ffe RR |
437 | void setup_default_idt_entries(struct lguest_ro_state *state, |
438 | const unsigned long *def) | |
439 | { | |
440 | unsigned int i; | |
441 | ||
442 | for (i = 0; i < ARRAY_SIZE(state->guest_idt); i++) | |
0c12091d | 443 | default_idt_entry(&state->guest_idt[i], i, def[i], NULL); |
d7e28ffe RR |
444 | } |
445 | ||
bff672e6 RR |
446 | /*H:240 We don't use the IDT entries in the "struct lguest" directly, instead |
447 | * we copy them into the IDT which we've set up for Guests on this CPU, just | |
448 | * before we run the Guest. This routine does that copy. */ | |
fc708b3e | 449 | void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt, |
d7e28ffe RR |
450 | const unsigned long *def) |
451 | { | |
452 | unsigned int i; | |
453 | ||
bff672e6 RR |
454 | /* We can simply copy the direct traps, otherwise we use the default |
455 | * ones in the Switcher: they will return to the Host. */ | |
fc708b3e | 456 | for (i = 0; i < ARRAY_SIZE(cpu->arch.idt); i++) { |
0c12091d RR |
457 | const struct desc_struct *gidt = &cpu->arch.idt[i]; |
458 | ||
56adbe9d RR |
459 | /* If no Guest can ever override this trap, leave it alone. */ |
460 | if (!direct_trap(i)) | |
461 | continue; | |
462 | ||
463 | /* Only trap gates (type 15) can go direct to the Guest. | |
464 | * Interrupt gates (type 14) disable interrupts as they are | |
465 | * entered, which we never let the Guest do. Not present | |
0c12091d RR |
466 | * entries (type 0x0) also can't go direct, of course. |
467 | * | |
468 | * If it can't go direct, we still need to copy the priv. level: | |
469 | * they might want to give userspace access to a software | |
470 | * interrupt. */ | |
471 | if (idt_type(gidt->a, gidt->b) == 0xF) | |
472 | idt[i] = *gidt; | |
d7e28ffe | 473 | else |
0c12091d | 474 | default_idt_entry(&idt[i], i, def[i], gidt); |
d7e28ffe | 475 | } |
d7e28ffe RR |
476 | } |
477 | ||
e1e72965 RR |
478 | /*H:200 |
479 | * The Guest Clock. | |
480 | * | |
481 | * There are two sources of virtual interrupts. We saw one in lguest_user.c: | |
482 | * the Launcher sending interrupts for virtual devices. The other is the Guest | |
483 | * timer interrupt. | |
484 | * | |
485 | * The Guest uses the LHCALL_SET_CLOCKEVENT hypercall to tell us how long to | |
486 | * the next timer interrupt (in nanoseconds). We use the high-resolution timer | |
487 | * infrastructure to set a callback at that time. | |
488 | * | |
489 | * 0 means "turn off the clock". */ | |
ad8d8f3b | 490 | void guest_set_clockevent(struct lg_cpu *cpu, unsigned long delta) |
d7e28ffe RR |
491 | { |
492 | ktime_t expires; | |
493 | ||
494 | if (unlikely(delta == 0)) { | |
495 | /* Clock event device is shutting down. */ | |
ad8d8f3b | 496 | hrtimer_cancel(&cpu->hrt); |
d7e28ffe RR |
497 | return; |
498 | } | |
499 | ||
e1e72965 RR |
500 | /* We use wallclock time here, so the Guest might not be running for |
501 | * all the time between now and the timer interrupt it asked for. This | |
502 | * is almost always the right thing to do. */ | |
d7e28ffe | 503 | expires = ktime_add_ns(ktime_get_real(), delta); |
ad8d8f3b | 504 | hrtimer_start(&cpu->hrt, expires, HRTIMER_MODE_ABS); |
d7e28ffe RR |
505 | } |
506 | ||
e1e72965 | 507 | /* This is the function called when the Guest's timer expires. */ |
d7e28ffe RR |
508 | static enum hrtimer_restart clockdev_fn(struct hrtimer *timer) |
509 | { | |
ad8d8f3b | 510 | struct lg_cpu *cpu = container_of(timer, struct lg_cpu, hrt); |
d7e28ffe | 511 | |
e1e72965 | 512 | /* Remember the first interrupt is the timer interrupt. */ |
177e449d | 513 | set_bit(0, cpu->irqs_pending); |
e1e72965 | 514 | /* If the Guest is actually stopped, we need to wake it up. */ |
66686c2a GOC |
515 | if (cpu->halted) |
516 | wake_up_process(cpu->tsk); | |
d7e28ffe RR |
517 | return HRTIMER_NORESTART; |
518 | } | |
519 | ||
e1e72965 | 520 | /* This sets up the timer for this Guest. */ |
ad8d8f3b | 521 | void init_clockdev(struct lg_cpu *cpu) |
d7e28ffe | 522 | { |
ad8d8f3b GOC |
523 | hrtimer_init(&cpu->hrt, CLOCK_REALTIME, HRTIMER_MODE_ABS); |
524 | cpu->hrt.function = clockdev_fn; | |
d7e28ffe | 525 | } |