Commit | Line | Data |
---|---|---|
2e04ef76 RR |
1 | /*P:800 |
2 | * Interrupts (traps) are complicated enough to earn their own file. | |
f938d2c8 RR |
3 | * There are three classes of interrupts: |
4 | * | |
5 | * 1) Real hardware interrupts which occur while we're running the Guest, | |
6 | * 2) Interrupts for virtual devices attached to the Guest, and | |
7 | * 3) Traps and faults from the Guest. | |
8 | * | |
9 | * Real hardware interrupts must be delivered to the Host, not the Guest. | |
10 | * Virtual interrupts must be delivered to the Guest, but we make them look | |
11 | * just like real hardware would deliver them. Traps from the Guest can be set | |
12 | * up to go directly back into the Guest, but sometimes the Host wants to see | |
13 | * them first, so we also have a way of "reflecting" them into the Guest as if | |
2e04ef76 RR |
14 | * they had been delivered to it directly. |
15 | :*/ | |
d7e28ffe | 16 | #include <linux/uaccess.h> |
c18acd73 RR |
17 | #include <linux/interrupt.h> |
18 | #include <linux/module.h> | |
d43c36dc | 19 | #include <linux/sched.h> |
d7e28ffe RR |
20 | #include "lg.h" |
21 | ||
c18acd73 RR |
22 | /* Allow Guests to use a non-128 (ie. non-Linux) syscall trap. */ |
23 | static unsigned int syscall_vector = SYSCALL_VECTOR; | |
24 | module_param(syscall_vector, uint, 0444); | |
25 | ||
bff672e6 | 26 | /* The address of the interrupt handler is split into two bits: */ |
d7e28ffe RR |
27 | static unsigned long idt_address(u32 lo, u32 hi) |
28 | { | |
29 | return (lo & 0x0000FFFF) | (hi & 0xFFFF0000); | |
30 | } | |
31 | ||
2e04ef76 RR |
32 | /* |
33 | * The "type" of the interrupt handler is a 4 bit field: we only support a | |
34 | * couple of types. | |
35 | */ | |
d7e28ffe RR |
36 | static int idt_type(u32 lo, u32 hi) |
37 | { | |
38 | return (hi >> 8) & 0xF; | |
39 | } | |
40 | ||
bff672e6 | 41 | /* An IDT entry can't be used unless the "present" bit is set. */ |
df1693ab | 42 | static bool idt_present(u32 lo, u32 hi) |
d7e28ffe RR |
43 | { |
44 | return (hi & 0x8000); | |
45 | } | |
46 | ||
2e04ef76 RR |
47 | /* |
48 | * We need a helper to "push" a value onto the Guest's stack, since that's a | |
49 | * big part of what delivering an interrupt does. | |
50 | */ | |
382ac6b3 | 51 | static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val) |
d7e28ffe | 52 | { |
bff672e6 | 53 | /* Stack grows upwards: move stack then write value. */ |
d7e28ffe | 54 | *gstack -= 4; |
382ac6b3 | 55 | lgwrite(cpu, *gstack, u32, val); |
d7e28ffe RR |
56 | } |
57 | ||
2e04ef76 RR |
58 | /*H:210 |
59 | * The set_guest_interrupt() routine actually delivers the interrupt or | |
bff672e6 RR |
60 | * trap. The mechanics of delivering traps and interrupts to the Guest are the |
61 | * same, except some traps have an "error code" which gets pushed onto the | |
62 | * stack as well: the caller tells us if this is one. | |
63 | * | |
64 | * "lo" and "hi" are the two parts of the Interrupt Descriptor Table for this | |
65 | * interrupt or trap. It's split into two parts for traditional reasons: gcc | |
66 | * on i386 used to be frightened by 64 bit numbers. | |
67 | * | |
68 | * We set up the stack just like the CPU does for a real interrupt, so it's | |
69 | * identical for the Guest (and the standard "iret" instruction will undo | |
2e04ef76 RR |
70 | * it). |
71 | */ | |
df1693ab MZ |
72 | static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi, |
73 | bool has_err) | |
d7e28ffe | 74 | { |
47436aa4 | 75 | unsigned long gstack, origstack; |
d7e28ffe | 76 | u32 eflags, ss, irq_enable; |
47436aa4 | 77 | unsigned long virtstack; |
d7e28ffe | 78 | |
2e04ef76 RR |
79 | /* |
80 | * There are two cases for interrupts: one where the Guest is already | |
bff672e6 | 81 | * in the kernel, and a more complex one where the Guest is in |
2e04ef76 RR |
82 | * userspace. We check the privilege level to find out. |
83 | */ | |
a53a35a8 | 84 | if ((cpu->regs->ss&0x3) != GUEST_PL) { |
2e04ef76 RR |
85 | /* |
86 | * The Guest told us their kernel stack with the SET_STACK | |
87 | * hypercall: both the virtual address and the segment. | |
88 | */ | |
4665ac8e GOC |
89 | virtstack = cpu->esp1; |
90 | ss = cpu->ss1; | |
47436aa4 | 91 | |
1713608f | 92 | origstack = gstack = guest_pa(cpu, virtstack); |
2e04ef76 RR |
93 | /* |
94 | * We push the old stack segment and pointer onto the new | |
bff672e6 RR |
95 | * stack: when the Guest does an "iret" back from the interrupt |
96 | * handler the CPU will notice they're dropping privilege | |
2e04ef76 RR |
97 | * levels and expect these here. |
98 | */ | |
382ac6b3 GOC |
99 | push_guest_stack(cpu, &gstack, cpu->regs->ss); |
100 | push_guest_stack(cpu, &gstack, cpu->regs->esp); | |
d7e28ffe | 101 | } else { |
bff672e6 | 102 | /* We're staying on the same Guest (kernel) stack. */ |
a53a35a8 GOC |
103 | virtstack = cpu->regs->esp; |
104 | ss = cpu->regs->ss; | |
47436aa4 | 105 | |
1713608f | 106 | origstack = gstack = guest_pa(cpu, virtstack); |
d7e28ffe RR |
107 | } |
108 | ||
2e04ef76 RR |
109 | /* |
110 | * Remember that we never let the Guest actually disable interrupts, so | |
bff672e6 | 111 | * the "Interrupt Flag" bit is always set. We copy that bit from the |
e1e72965 | 112 | * Guest's "irq_enabled" field into the eflags word: we saw the Guest |
2e04ef76 RR |
113 | * copy it back in "lguest_iret". |
114 | */ | |
a53a35a8 | 115 | eflags = cpu->regs->eflags; |
382ac6b3 | 116 | if (get_user(irq_enable, &cpu->lg->lguest_data->irq_enabled) == 0 |
e5faff45 RR |
117 | && !(irq_enable & X86_EFLAGS_IF)) |
118 | eflags &= ~X86_EFLAGS_IF; | |
d7e28ffe | 119 | |
2e04ef76 RR |
120 | /* |
121 | * An interrupt is expected to push three things on the stack: the old | |
bff672e6 | 122 | * "eflags" word, the old code segment, and the old instruction |
2e04ef76 RR |
123 | * pointer. |
124 | */ | |
382ac6b3 GOC |
125 | push_guest_stack(cpu, &gstack, eflags); |
126 | push_guest_stack(cpu, &gstack, cpu->regs->cs); | |
127 | push_guest_stack(cpu, &gstack, cpu->regs->eip); | |
d7e28ffe | 128 | |
bff672e6 | 129 | /* For the six traps which supply an error code, we push that, too. */ |
d7e28ffe | 130 | if (has_err) |
382ac6b3 | 131 | push_guest_stack(cpu, &gstack, cpu->regs->errcode); |
d7e28ffe | 132 | |
2e04ef76 RR |
133 | /* |
134 | * Now we've pushed all the old state, we change the stack, the code | |
135 | * segment and the address to execute. | |
136 | */ | |
a53a35a8 GOC |
137 | cpu->regs->ss = ss; |
138 | cpu->regs->esp = virtstack + (gstack - origstack); | |
139 | cpu->regs->cs = (__KERNEL_CS|GUEST_PL); | |
140 | cpu->regs->eip = idt_address(lo, hi); | |
d7e28ffe | 141 | |
2e04ef76 RR |
142 | /* |
143 | * There are two kinds of interrupt handlers: 0xE is an "interrupt | |
144 | * gate" which expects interrupts to be disabled on entry. | |
145 | */ | |
d7e28ffe | 146 | if (idt_type(lo, hi) == 0xE) |
382ac6b3 GOC |
147 | if (put_user(0, &cpu->lg->lguest_data->irq_enabled)) |
148 | kill_guest(cpu, "Disabling interrupts"); | |
d7e28ffe RR |
149 | } |
150 | ||
e1e72965 | 151 | /*H:205 |
bff672e6 RR |
152 | * Virtual Interrupts. |
153 | * | |
abd41f03 RR |
154 | * interrupt_pending() returns the first pending interrupt which isn't blocked |
155 | * by the Guest. It is called before every entry to the Guest, and just before | |
2e04ef76 RR |
156 | * we go to sleep when the Guest has halted itself. |
157 | */ | |
a32a8813 | 158 | unsigned int interrupt_pending(struct lg_cpu *cpu, bool *more) |
d7e28ffe RR |
159 | { |
160 | unsigned int irq; | |
161 | DECLARE_BITMAP(blk, LGUEST_IRQS); | |
d7e28ffe | 162 | |
bff672e6 | 163 | /* If the Guest hasn't even initialized yet, we can do nothing. */ |
382ac6b3 | 164 | if (!cpu->lg->lguest_data) |
abd41f03 | 165 | return LGUEST_IRQS; |
d7e28ffe | 166 | |
2e04ef76 RR |
167 | /* |
168 | * Take our "irqs_pending" array and remove any interrupts the Guest | |
169 | * wants blocked: the result ends up in "blk". | |
170 | */ | |
382ac6b3 | 171 | if (copy_from_user(&blk, cpu->lg->lguest_data->blocked_interrupts, |
d7e28ffe | 172 | sizeof(blk))) |
abd41f03 | 173 | return LGUEST_IRQS; |
177e449d | 174 | bitmap_andnot(blk, cpu->irqs_pending, blk, LGUEST_IRQS); |
d7e28ffe | 175 | |
bff672e6 | 176 | /* Find the first interrupt. */ |
d7e28ffe | 177 | irq = find_first_bit(blk, LGUEST_IRQS); |
a32a8813 | 178 | *more = find_next_bit(blk, LGUEST_IRQS, irq+1); |
abd41f03 RR |
179 | |
180 | return irq; | |
181 | } | |
182 | ||
2e04ef76 RR |
183 | /* |
184 | * This actually diverts the Guest to running an interrupt handler, once an | |
185 | * interrupt has been identified by interrupt_pending(). | |
186 | */ | |
a32a8813 | 187 | void try_deliver_interrupt(struct lg_cpu *cpu, unsigned int irq, bool more) |
abd41f03 RR |
188 | { |
189 | struct desc_struct *idt; | |
190 | ||
191 | BUG_ON(irq >= LGUEST_IRQS); | |
d7e28ffe | 192 | |
2e04ef76 RR |
193 | /* |
194 | * They may be in the middle of an iret, where they asked us never to | |
195 | * deliver interrupts. | |
196 | */ | |
382ac6b3 GOC |
197 | if (cpu->regs->eip >= cpu->lg->noirq_start && |
198 | (cpu->regs->eip < cpu->lg->noirq_end)) | |
d7e28ffe RR |
199 | return; |
200 | ||
bff672e6 | 201 | /* If they're halted, interrupts restart them. */ |
66686c2a | 202 | if (cpu->halted) { |
d7e28ffe | 203 | /* Re-enable interrupts. */ |
382ac6b3 GOC |
204 | if (put_user(X86_EFLAGS_IF, &cpu->lg->lguest_data->irq_enabled)) |
205 | kill_guest(cpu, "Re-enabling interrupts"); | |
66686c2a | 206 | cpu->halted = 0; |
d7e28ffe | 207 | } else { |
bff672e6 | 208 | /* Otherwise we check if they have interrupts disabled. */ |
d7e28ffe | 209 | u32 irq_enabled; |
382ac6b3 | 210 | if (get_user(irq_enabled, &cpu->lg->lguest_data->irq_enabled)) |
d7e28ffe | 211 | irq_enabled = 0; |
a32a8813 RR |
212 | if (!irq_enabled) { |
213 | /* Make sure they know an IRQ is pending. */ | |
214 | put_user(X86_EFLAGS_IF, | |
215 | &cpu->lg->lguest_data->irq_pending); | |
d7e28ffe | 216 | return; |
a32a8813 | 217 | } |
d7e28ffe RR |
218 | } |
219 | ||
2e04ef76 RR |
220 | /* |
221 | * Look at the IDT entry the Guest gave us for this interrupt. The | |
bff672e6 | 222 | * first 32 (FIRST_EXTERNAL_VECTOR) entries are for traps, so we skip |
2e04ef76 RR |
223 | * over them. |
224 | */ | |
fc708b3e | 225 | idt = &cpu->arch.idt[FIRST_EXTERNAL_VECTOR+irq]; |
bff672e6 | 226 | /* If they don't have a handler (yet?), we just ignore it */ |
d7e28ffe | 227 | if (idt_present(idt->a, idt->b)) { |
bff672e6 | 228 | /* OK, mark it no longer pending and deliver it. */ |
177e449d | 229 | clear_bit(irq, cpu->irqs_pending); |
2e04ef76 RR |
230 | /* |
231 | * set_guest_interrupt() takes the interrupt descriptor and a | |
bff672e6 | 232 | * flag to say whether this interrupt pushes an error code onto |
2e04ef76 RR |
233 | * the stack as well: virtual interrupts never do. |
234 | */ | |
df1693ab | 235 | set_guest_interrupt(cpu, idt->a, idt->b, false); |
d7e28ffe | 236 | } |
6c8dca5d | 237 | |
2e04ef76 RR |
238 | /* |
239 | * Every time we deliver an interrupt, we update the timestamp in the | |
6c8dca5d RR |
240 | * Guest's lguest_data struct. It would be better for the Guest if we |
241 | * did this more often, but it can actually be quite slow: doing it | |
242 | * here is a compromise which means at least it gets updated every | |
2e04ef76 RR |
243 | * timer interrupt. |
244 | */ | |
382ac6b3 | 245 | write_timestamp(cpu); |
a32a8813 | 246 | |
2e04ef76 RR |
247 | /* |
248 | * If there are no other interrupts we want to deliver, clear | |
249 | * the pending flag. | |
250 | */ | |
a32a8813 RR |
251 | if (!more) |
252 | put_user(0, &cpu->lg->lguest_data->irq_pending); | |
d7e28ffe | 253 | } |
9f155a9b RR |
254 | |
255 | /* And this is the routine when we want to set an interrupt for the Guest. */ | |
256 | void set_interrupt(struct lg_cpu *cpu, unsigned int irq) | |
257 | { | |
2e04ef76 RR |
258 | /* |
259 | * Next time the Guest runs, the core code will see if it can deliver | |
260 | * this interrupt. | |
261 | */ | |
9f155a9b RR |
262 | set_bit(irq, cpu->irqs_pending); |
263 | ||
2e04ef76 RR |
264 | /* |
265 | * Make sure it sees it; it might be asleep (eg. halted), or running | |
266 | * the Guest right now, in which case kick_process() will knock it out. | |
267 | */ | |
9f155a9b RR |
268 | if (!wake_up_process(cpu->tsk)) |
269 | kick_process(cpu->tsk); | |
270 | } | |
c18acd73 RR |
271 | /*:*/ |
272 | ||
2e04ef76 RR |
273 | /* |
274 | * Linux uses trap 128 for system calls. Plan9 uses 64, and Ron Minnich sent | |
c18acd73 RR |
275 | * me a patch, so we support that too. It'd be a big step for lguest if half |
276 | * the Plan 9 user base were to start using it. | |
277 | * | |
278 | * Actually now I think of it, it's possible that Ron *is* half the Plan 9 | |
2e04ef76 RR |
279 | * userbase. Oh well. |
280 | */ | |
c18acd73 RR |
281 | static bool could_be_syscall(unsigned int num) |
282 | { | |
283 | /* Normal Linux SYSCALL_VECTOR or reserved vector? */ | |
284 | return num == SYSCALL_VECTOR || num == syscall_vector; | |
285 | } | |
286 | ||
287 | /* The syscall vector it wants must be unused by Host. */ | |
288 | bool check_syscall_vector(struct lguest *lg) | |
289 | { | |
290 | u32 vector; | |
291 | ||
292 | if (get_user(vector, &lg->lguest_data->syscall_vec)) | |
293 | return false; | |
294 | ||
295 | return could_be_syscall(vector); | |
296 | } | |
297 | ||
298 | int init_interrupts(void) | |
299 | { | |
300 | /* If they want some strange system call vector, reserve it now */ | |
b77b881f YL |
301 | if (syscall_vector != SYSCALL_VECTOR) { |
302 | if (test_bit(syscall_vector, used_vectors) || | |
303 | vector_used_by_percpu_irq(syscall_vector)) { | |
304 | printk(KERN_ERR "lg: couldn't reserve syscall %u\n", | |
305 | syscall_vector); | |
306 | return -EBUSY; | |
307 | } | |
308 | set_bit(syscall_vector, used_vectors); | |
c18acd73 | 309 | } |
b77b881f | 310 | |
c18acd73 RR |
311 | return 0; |
312 | } | |
313 | ||
314 | void free_interrupts(void) | |
315 | { | |
316 | if (syscall_vector != SYSCALL_VECTOR) | |
317 | clear_bit(syscall_vector, used_vectors); | |
318 | } | |
d7e28ffe | 319 | |
2e04ef76 RR |
320 | /*H:220 |
321 | * Now we've got the routines to deliver interrupts, delivering traps like | |
a6bd8e13 | 322 | * page fault is easy. The only trick is that Intel decided that some traps |
2e04ef76 RR |
323 | * should have error codes: |
324 | */ | |
df1693ab | 325 | static bool has_err(unsigned int trap) |
d7e28ffe RR |
326 | { |
327 | return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17); | |
328 | } | |
329 | ||
bff672e6 | 330 | /* deliver_trap() returns true if it could deliver the trap. */ |
df1693ab | 331 | bool deliver_trap(struct lg_cpu *cpu, unsigned int num) |
d7e28ffe | 332 | { |
2e04ef76 RR |
333 | /* |
334 | * Trap numbers are always 8 bit, but we set an impossible trap number | |
335 | * for traps inside the Switcher, so check that here. | |
336 | */ | |
fc708b3e | 337 | if (num >= ARRAY_SIZE(cpu->arch.idt)) |
df1693ab | 338 | return false; |
d7e28ffe | 339 | |
2e04ef76 RR |
340 | /* |
341 | * Early on the Guest hasn't set the IDT entries (or maybe it put a | |
342 | * bogus one in): if we fail here, the Guest will be killed. | |
343 | */ | |
fc708b3e | 344 | if (!idt_present(cpu->arch.idt[num].a, cpu->arch.idt[num].b)) |
df1693ab | 345 | return false; |
fc708b3e GOC |
346 | set_guest_interrupt(cpu, cpu->arch.idt[num].a, |
347 | cpu->arch.idt[num].b, has_err(num)); | |
df1693ab | 348 | return true; |
d7e28ffe RR |
349 | } |
350 | ||
2e04ef76 RR |
351 | /*H:250 |
352 | * Here's the hard part: returning to the Host every time a trap happens | |
bff672e6 | 353 | * and then calling deliver_trap() and re-entering the Guest is slow. |
e1e72965 RR |
354 | * Particularly because Guest userspace system calls are traps (usually trap |
355 | * 128). | |
bff672e6 RR |
356 | * |
357 | * So we'd like to set up the IDT to tell the CPU to deliver traps directly | |
358 | * into the Guest. This is possible, but the complexities cause the size of | |
359 | * this file to double! However, 150 lines of code is worth writing for taking | |
360 | * system calls down from 1750ns to 270ns. Plus, if lguest didn't do it, all | |
e1e72965 | 361 | * the other hypervisors would beat it up at lunchtime. |
bff672e6 | 362 | * |
56adbe9d | 363 | * This routine indicates if a particular trap number could be delivered |
2e04ef76 RR |
364 | * directly. |
365 | */ | |
df1693ab | 366 | static bool direct_trap(unsigned int num) |
d7e28ffe | 367 | { |
2e04ef76 RR |
368 | /* |
369 | * Hardware interrupts don't go to the Guest at all (except system | |
370 | * call). | |
371 | */ | |
c18acd73 | 372 | if (num >= FIRST_EXTERNAL_VECTOR && !could_be_syscall(num)) |
df1693ab | 373 | return false; |
d7e28ffe | 374 | |
2e04ef76 RR |
375 | /* |
376 | * The Host needs to see page faults (for shadow paging and to save the | |
bff672e6 | 377 | * fault address), general protection faults (in/out emulation) and |
6d7a5d1e | 378 | * device not available (TS handling) and of course, the hypercall trap. |
2e04ef76 | 379 | */ |
6d7a5d1e | 380 | return num != 14 && num != 13 && num != 7 && num != LGUEST_TRAP_ENTRY; |
d7e28ffe | 381 | } |
f56a384e RR |
382 | /*:*/ |
383 | ||
2e04ef76 RR |
384 | /*M:005 |
385 | * The Guest has the ability to turn its interrupt gates into trap gates, | |
f56a384e RR |
386 | * if it is careful. The Host will let trap gates can go directly to the |
387 | * Guest, but the Guest needs the interrupts atomically disabled for an | |
388 | * interrupt gate. It can do this by pointing the trap gate at instructions | |
2e04ef76 RR |
389 | * within noirq_start and noirq_end, where it can safely disable interrupts. |
390 | */ | |
f56a384e | 391 | |
2e04ef76 RR |
392 | /*M:006 |
393 | * The Guests do not use the sysenter (fast system call) instruction, | |
f56a384e RR |
394 | * because it's hardcoded to enter privilege level 0 and so can't go direct. |
395 | * It's about twice as fast as the older "int 0x80" system call, so it might | |
396 | * still be worthwhile to handle it in the Switcher and lcall down to the | |
397 | * Guest. The sysenter semantics are hairy tho: search for that keyword in | |
2e04ef76 RR |
398 | * entry.S |
399 | :*/ | |
d7e28ffe | 400 | |
2e04ef76 RR |
401 | /*H:260 |
402 | * When we make traps go directly into the Guest, we need to make sure | |
bff672e6 RR |
403 | * the kernel stack is valid (ie. mapped in the page tables). Otherwise, the |
404 | * CPU trying to deliver the trap will fault while trying to push the interrupt | |
405 | * words on the stack: this is called a double fault, and it forces us to kill | |
406 | * the Guest. | |
407 | * | |
2e04ef76 RR |
408 | * Which is deeply unfair, because (literally!) it wasn't the Guests' fault. |
409 | */ | |
4665ac8e | 410 | void pin_stack_pages(struct lg_cpu *cpu) |
d7e28ffe RR |
411 | { |
412 | unsigned int i; | |
413 | ||
2e04ef76 RR |
414 | /* |
415 | * Depending on the CONFIG_4KSTACKS option, the Guest can have one or | |
416 | * two pages of stack space. | |
417 | */ | |
382ac6b3 | 418 | for (i = 0; i < cpu->lg->stack_pages; i++) |
2e04ef76 RR |
419 | /* |
420 | * The stack grows *upwards*, so the address we're given is the | |
8057d763 RR |
421 | * start of the page after the kernel stack. Subtract one to |
422 | * get back onto the first stack page, and keep subtracting to | |
2e04ef76 RR |
423 | * get to the rest of the stack pages. |
424 | */ | |
1713608f | 425 | pin_page(cpu, cpu->esp1 - 1 - i * PAGE_SIZE); |
d7e28ffe RR |
426 | } |
427 | ||
2e04ef76 RR |
428 | /* |
429 | * Direct traps also mean that we need to know whenever the Guest wants to use | |
9f54288d RR |
430 | * a different kernel stack, so we can change the guest TSS to use that |
431 | * stack. The TSS entries expect a virtual address, so unlike most addresses | |
bff672e6 RR |
432 | * the Guest gives us, the "esp" (stack pointer) value here is virtual, not |
433 | * physical. | |
434 | * | |
435 | * In Linux each process has its own kernel stack, so this happens a lot: we | |
2e04ef76 RR |
436 | * change stacks on each context switch. |
437 | */ | |
4665ac8e | 438 | void guest_set_stack(struct lg_cpu *cpu, u32 seg, u32 esp, unsigned int pages) |
d7e28ffe | 439 | { |
2e04ef76 RR |
440 | /* |
441 | * You're not allowed a stack segment with privilege level 0: bad Guest! | |
442 | */ | |
d7e28ffe | 443 | if ((seg & 0x3) != GUEST_PL) |
382ac6b3 | 444 | kill_guest(cpu, "bad stack segment %i", seg); |
bff672e6 | 445 | /* We only expect one or two stack pages. */ |
d7e28ffe | 446 | if (pages > 2) |
382ac6b3 | 447 | kill_guest(cpu, "bad stack pages %u", pages); |
bff672e6 | 448 | /* Save where the stack is, and how many pages */ |
4665ac8e GOC |
449 | cpu->ss1 = seg; |
450 | cpu->esp1 = esp; | |
451 | cpu->lg->stack_pages = pages; | |
bff672e6 | 452 | /* Make sure the new stack pages are mapped */ |
4665ac8e | 453 | pin_stack_pages(cpu); |
d7e28ffe RR |
454 | } |
455 | ||
2e04ef76 RR |
456 | /* |
457 | * All this reference to mapping stacks leads us neatly into the other complex | |
458 | * part of the Host: page table handling. | |
459 | */ | |
bff672e6 | 460 | |
2e04ef76 RR |
461 | /*H:235 |
462 | * This is the routine which actually checks the Guest's IDT entry and | |
463 | * transfers it into the entry in "struct lguest": | |
464 | */ | |
382ac6b3 | 465 | static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap, |
d7e28ffe RR |
466 | unsigned int num, u32 lo, u32 hi) |
467 | { | |
468 | u8 type = idt_type(lo, hi); | |
469 | ||
bff672e6 | 470 | /* We zero-out a not-present entry */ |
d7e28ffe RR |
471 | if (!idt_present(lo, hi)) { |
472 | trap->a = trap->b = 0; | |
473 | return; | |
474 | } | |
475 | ||
bff672e6 | 476 | /* We only support interrupt and trap gates. */ |
d7e28ffe | 477 | if (type != 0xE && type != 0xF) |
382ac6b3 | 478 | kill_guest(cpu, "bad IDT type %i", type); |
d7e28ffe | 479 | |
2e04ef76 RR |
480 | /* |
481 | * We only copy the handler address, present bit, privilege level and | |
bff672e6 RR |
482 | * type. The privilege level controls where the trap can be triggered |
483 | * manually with an "int" instruction. This is usually GUEST_PL, | |
2e04ef76 RR |
484 | * except for system calls which userspace can use. |
485 | */ | |
d7e28ffe RR |
486 | trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF); |
487 | trap->b = (hi&0xFFFFEF00); | |
488 | } | |
489 | ||
2e04ef76 RR |
490 | /*H:230 |
491 | * While we're here, dealing with delivering traps and interrupts to the | |
bff672e6 RR |
492 | * Guest, we might as well complete the picture: how the Guest tells us where |
493 | * it wants them to go. This would be simple, except making traps fast | |
494 | * requires some tricks. | |
495 | * | |
496 | * We saw the Guest setting Interrupt Descriptor Table (IDT) entries with the | |
2e04ef76 RR |
497 | * LHCALL_LOAD_IDT_ENTRY hypercall before: that comes here. |
498 | */ | |
fc708b3e | 499 | void load_guest_idt_entry(struct lg_cpu *cpu, unsigned int num, u32 lo, u32 hi) |
d7e28ffe | 500 | { |
2e04ef76 RR |
501 | /* |
502 | * Guest never handles: NMI, doublefault, spurious interrupt or | |
503 | * hypercall. We ignore when it tries to set them. | |
504 | */ | |
d7e28ffe RR |
505 | if (num == 2 || num == 8 || num == 15 || num == LGUEST_TRAP_ENTRY) |
506 | return; | |
507 | ||
2e04ef76 RR |
508 | /* |
509 | * Mark the IDT as changed: next time the Guest runs we'll know we have | |
510 | * to copy this again. | |
511 | */ | |
ae3749dc | 512 | cpu->changed |= CHANGED_IDT; |
bff672e6 | 513 | |
56adbe9d | 514 | /* Check that the Guest doesn't try to step outside the bounds. */ |
fc708b3e | 515 | if (num >= ARRAY_SIZE(cpu->arch.idt)) |
382ac6b3 | 516 | kill_guest(cpu, "Setting idt entry %u", num); |
56adbe9d | 517 | else |
382ac6b3 | 518 | set_trap(cpu, &cpu->arch.idt[num], num, lo, hi); |
d7e28ffe RR |
519 | } |
520 | ||
2e04ef76 RR |
521 | /* |
522 | * The default entry for each interrupt points into the Switcher routines which | |
bff672e6 | 523 | * simply return to the Host. The run_guest() loop will then call |
2e04ef76 RR |
524 | * deliver_trap() to bounce it back into the Guest. |
525 | */ | |
d7e28ffe RR |
526 | static void default_idt_entry(struct desc_struct *idt, |
527 | int trap, | |
0c12091d RR |
528 | const unsigned long handler, |
529 | const struct desc_struct *base) | |
d7e28ffe | 530 | { |
bff672e6 | 531 | /* A present interrupt gate. */ |
d7e28ffe RR |
532 | u32 flags = 0x8e00; |
533 | ||
2e04ef76 RR |
534 | /* |
535 | * Set the privilege level on the entry for the hypercall: this allows | |
536 | * the Guest to use the "int" instruction to trigger it. | |
537 | */ | |
d7e28ffe RR |
538 | if (trap == LGUEST_TRAP_ENTRY) |
539 | flags |= (GUEST_PL << 13); | |
0c12091d | 540 | else if (base) |
2e04ef76 RR |
541 | /* |
542 | * Copy privilege level from what Guest asked for. This allows | |
543 | * debug (int 3) traps from Guest userspace, for example. | |
544 | */ | |
0c12091d | 545 | flags |= (base->b & 0x6000); |
d7e28ffe | 546 | |
bff672e6 | 547 | /* Now pack it into the IDT entry in its weird format. */ |
d7e28ffe RR |
548 | idt->a = (LGUEST_CS<<16) | (handler&0x0000FFFF); |
549 | idt->b = (handler&0xFFFF0000) | flags; | |
550 | } | |
551 | ||
bff672e6 | 552 | /* When the Guest first starts, we put default entries into the IDT. */ |
d7e28ffe RR |
553 | void setup_default_idt_entries(struct lguest_ro_state *state, |
554 | const unsigned long *def) | |
555 | { | |
556 | unsigned int i; | |
557 | ||
558 | for (i = 0; i < ARRAY_SIZE(state->guest_idt); i++) | |
0c12091d | 559 | default_idt_entry(&state->guest_idt[i], i, def[i], NULL); |
d7e28ffe RR |
560 | } |
561 | ||
2e04ef76 RR |
562 | /*H:240 |
563 | * We don't use the IDT entries in the "struct lguest" directly, instead | |
bff672e6 | 564 | * we copy them into the IDT which we've set up for Guests on this CPU, just |
2e04ef76 RR |
565 | * before we run the Guest. This routine does that copy. |
566 | */ | |
fc708b3e | 567 | void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt, |
d7e28ffe RR |
568 | const unsigned long *def) |
569 | { | |
570 | unsigned int i; | |
571 | ||
2e04ef76 RR |
572 | /* |
573 | * We can simply copy the direct traps, otherwise we use the default | |
574 | * ones in the Switcher: they will return to the Host. | |
575 | */ | |
fc708b3e | 576 | for (i = 0; i < ARRAY_SIZE(cpu->arch.idt); i++) { |
0c12091d RR |
577 | const struct desc_struct *gidt = &cpu->arch.idt[i]; |
578 | ||
56adbe9d RR |
579 | /* If no Guest can ever override this trap, leave it alone. */ |
580 | if (!direct_trap(i)) | |
581 | continue; | |
582 | ||
2e04ef76 RR |
583 | /* |
584 | * Only trap gates (type 15) can go direct to the Guest. | |
56adbe9d RR |
585 | * Interrupt gates (type 14) disable interrupts as they are |
586 | * entered, which we never let the Guest do. Not present | |
0c12091d RR |
587 | * entries (type 0x0) also can't go direct, of course. |
588 | * | |
589 | * If it can't go direct, we still need to copy the priv. level: | |
590 | * they might want to give userspace access to a software | |
2e04ef76 RR |
591 | * interrupt. |
592 | */ | |
0c12091d RR |
593 | if (idt_type(gidt->a, gidt->b) == 0xF) |
594 | idt[i] = *gidt; | |
d7e28ffe | 595 | else |
0c12091d | 596 | default_idt_entry(&idt[i], i, def[i], gidt); |
d7e28ffe | 597 | } |
d7e28ffe RR |
598 | } |
599 | ||
e1e72965 RR |
600 | /*H:200 |
601 | * The Guest Clock. | |
602 | * | |
603 | * There are two sources of virtual interrupts. We saw one in lguest_user.c: | |
604 | * the Launcher sending interrupts for virtual devices. The other is the Guest | |
605 | * timer interrupt. | |
606 | * | |
607 | * The Guest uses the LHCALL_SET_CLOCKEVENT hypercall to tell us how long to | |
608 | * the next timer interrupt (in nanoseconds). We use the high-resolution timer | |
609 | * infrastructure to set a callback at that time. | |
610 | * | |
2e04ef76 RR |
611 | * 0 means "turn off the clock". |
612 | */ | |
ad8d8f3b | 613 | void guest_set_clockevent(struct lg_cpu *cpu, unsigned long delta) |
d7e28ffe RR |
614 | { |
615 | ktime_t expires; | |
616 | ||
617 | if (unlikely(delta == 0)) { | |
618 | /* Clock event device is shutting down. */ | |
ad8d8f3b | 619 | hrtimer_cancel(&cpu->hrt); |
d7e28ffe RR |
620 | return; |
621 | } | |
622 | ||
2e04ef76 RR |
623 | /* |
624 | * We use wallclock time here, so the Guest might not be running for | |
e1e72965 | 625 | * all the time between now and the timer interrupt it asked for. This |
2e04ef76 RR |
626 | * is almost always the right thing to do. |
627 | */ | |
d7e28ffe | 628 | expires = ktime_add_ns(ktime_get_real(), delta); |
ad8d8f3b | 629 | hrtimer_start(&cpu->hrt, expires, HRTIMER_MODE_ABS); |
d7e28ffe RR |
630 | } |
631 | ||
e1e72965 | 632 | /* This is the function called when the Guest's timer expires. */ |
d7e28ffe RR |
633 | static enum hrtimer_restart clockdev_fn(struct hrtimer *timer) |
634 | { | |
ad8d8f3b | 635 | struct lg_cpu *cpu = container_of(timer, struct lg_cpu, hrt); |
d7e28ffe | 636 | |
e1e72965 | 637 | /* Remember the first interrupt is the timer interrupt. */ |
9f155a9b | 638 | set_interrupt(cpu, 0); |
d7e28ffe RR |
639 | return HRTIMER_NORESTART; |
640 | } | |
641 | ||
e1e72965 | 642 | /* This sets up the timer for this Guest. */ |
ad8d8f3b | 643 | void init_clockdev(struct lg_cpu *cpu) |
d7e28ffe | 644 | { |
ad8d8f3b GOC |
645 | hrtimer_init(&cpu->hrt, CLOCK_REALTIME, HRTIMER_MODE_ABS); |
646 | cpu->hrt.function = clockdev_fn; | |
d7e28ffe | 647 | } |