[linux-block.git] / drivers / leds / leds-is31fl32xx.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Driver for ISSI IS31FL32xx family of I2C LED controllers
 *
 * Copyright 2015 Allworx Corp.
 *
 * Datasheets:
 *   http://www.issi.com/US/product-analog-fxled-driver.shtml
 *   http://www.si-en.com/product.asp?parentid=890
 */

#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>

/* Used to indicate a device has no such register */
#define IS31FL32XX_REG_NONE 0xFF

/* Software Shutdown bit in Shutdown Register */
#define IS31FL32XX_SHUTDOWN_SSD_ENABLE  0
#define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)

/* IS31FL3216 has a number of unique registers */
#define IS31FL3216_CONFIG_REG 0x00
#define IS31FL3216_LIGHTING_EFFECT_REG 0x03
#define IS31FL3216_CHANNEL_CONFIG_REG 0x04

/* Software Shutdown bit in 3216 Config Register */
#define IS31FL3216_CONFIG_SSD_ENABLE  BIT(7)
#define IS31FL3216_CONFIG_SSD_DISABLE 0

struct is31fl32xx_priv;
struct is31fl32xx_led_data {
	struct led_classdev cdev;
	u8 channel; /* 1-based, max priv->cdef->channels */
	struct is31fl32xx_priv *priv;
};

struct is31fl32xx_priv {
	const struct is31fl32xx_chipdef *cdef;
	struct i2c_client *client;
	unsigned int num_leds;
	struct is31fl32xx_led_data leds[];
};

/**
 * struct is31fl32xx_chipdef - chip-specific attributes
 * @channels            : Number of LED channels
 * @shutdown_reg        : address of Shutdown register (optional)
 * @pwm_update_reg      : address of PWM Update register
 * @global_control_reg  : address of Global Control register (optional)
 * @reset_reg           : address of Reset register (optional)
 * @pwm_register_base   : address of first PWM register
 * @pwm_registers_reversed: : true if PWM registers count down instead of up
 * @led_control_register_base : address of first LED control register (optional)
 * @enable_bits_per_led_control_register: number of LEDs enable bits in each
 * @reset_func          : pointer to reset function
 * @sw_shutdown_func    : pointer to software shutdown function
 *
 * For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
 * indicates that this chip has no such register.
 *
 * If non-NULL, @reset_func will be called during probing to set all
 * necessary registers to a known initialization state. This is needed
 * for chips that do not have a @reset_reg.
 *
 * @enable_bits_per_led_control_register must be >=1 if
 * @led_control_register_base != %IS31FL32XX_REG_NONE.
 */
struct is31fl32xx_chipdef {
	u8	channels;
	u8	shutdown_reg;
	u8	pwm_update_reg;
	u8	global_control_reg;
	u8	reset_reg;
	u8	pwm_register_base;
	bool	pwm_registers_reversed;
	u8	led_control_register_base;
	u8	enable_bits_per_led_control_register;
	int (*reset_func)(struct is31fl32xx_priv *priv);
	int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable);
};

static const struct is31fl32xx_chipdef is31fl3236_cdef = {
	.channels				= 36,
	.shutdown_reg				= 0x00,
	.pwm_update_reg				= 0x25,
	.global_control_reg			= 0x4a,
	.reset_reg				= 0x4f,
	.pwm_register_base			= 0x01,
	.led_control_register_base		= 0x26,
	.enable_bits_per_led_control_register	= 1,
};

static const struct is31fl32xx_chipdef is31fl3235_cdef = {
	.channels				= 28,
	.shutdown_reg				= 0x00,
	.pwm_update_reg				= 0x25,
	.global_control_reg			= 0x4a,
	.reset_reg				= 0x4f,
	.pwm_register_base			= 0x05,
	.led_control_register_base		= 0x2a,
	.enable_bits_per_led_control_register	= 1,
};

static const struct is31fl32xx_chipdef is31fl3218_cdef = {
	.channels				= 18,
	.shutdown_reg				= 0x00,
	.pwm_update_reg				= 0x16,
	.global_control_reg			= IS31FL32XX_REG_NONE,
	.reset_reg				= 0x17,
	.pwm_register_base			= 0x01,
	.led_control_register_base		= 0x13,
	.enable_bits_per_led_control_register	= 6,
};

static int is31fl3216_reset(struct is31fl32xx_priv *priv);
static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
					bool enable);
static const struct is31fl32xx_chipdef is31fl3216_cdef = {
	.channels				= 16,
	.shutdown_reg				= IS31FL32XX_REG_NONE,
	.pwm_update_reg				= 0xB0,
	.global_control_reg			= IS31FL32XX_REG_NONE,
	.reset_reg				= IS31FL32XX_REG_NONE,
	.pwm_register_base			= 0x10,
	.pwm_registers_reversed			= true,
	.led_control_register_base		= 0x01,
	.enable_bits_per_led_control_register	= 8,
	.reset_func				= is31fl3216_reset,
	.sw_shutdown_func			= is31fl3216_software_shutdown,
};

static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
{
	int ret;

	dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);

	ret =  i2c_smbus_write_byte_data(priv->client, reg, val);
	if (ret) {
		dev_err(&priv->client->dev,
			"register write to 0x%02X failed (error %d)",
			reg, ret);
	}
	return ret;
}

/*
 * Custom reset function for IS31FL3216 because it does not have a RESET
 * register the way that the other IS31FL32xx chips do. We don't bother
 * writing the GPIO and animation registers, because the registers we
 * do write ensure those will have no effect.
 */
static int is31fl3216_reset(struct is31fl32xx_priv *priv)
{
	unsigned int i;
	int ret;

	ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
			       IS31FL3216_CONFIG_SSD_ENABLE);
	if (ret)
		return ret;
	for (i = 0; i < priv->cdef->channels; i++) {
		ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
				       0x00);
		if (ret)
			return ret;
	}
	ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
	if (ret)
		return ret;
	ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
	if (ret)
		return ret;
	ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
	if (ret)
		return ret;

	return 0;
}

/*
 * Custom Software-Shutdown function for IS31FL3216 because it does not have
 * a SHUTDOWN register the way that the other IS31FL32xx chips do.
 * We don't bother doing a read/modify/write on the CONFIG register because
 * we only ever use a value of '0' for the other fields in that register.
 */
static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
					bool enable)
{
	u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
			    IS31FL3216_CONFIG_SSD_DISABLE;

	return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
}

/*
 * NOTE: A mutex is not needed in this function because:
 * - All referenced data is read-only after probe()
 * - The I2C core has a mutex on to protect the bus
 * - There are no read/modify/write operations
 * - Intervening operations between the write of the PWM register
 *   and the Update register are harmless.
 *
 * Example:
 *	PWM_REG_1 write 16
 *	UPDATE_REG write 0
 *	PWM_REG_2 write 128
 *	UPDATE_REG write 0
 *   vs:
 *	PWM_REG_1 write 16
 *	PWM_REG_2 write 128
 *	UPDATE_REG write 0
 *	UPDATE_REG write 0
 * are equivalent. Poking the Update register merely applies all PWM
 * register writes up to that point.
 */
static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
				     enum led_brightness brightness)
{
	const struct is31fl32xx_led_data *led_data =
		container_of(led_cdev, struct is31fl32xx_led_data, cdev);
	const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
	u8 pwm_register_offset;
	int ret;

	dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);

	/* NOTE: led_data->channel is 1-based */
	if (cdef->pwm_registers_reversed)
		pwm_register_offset = cdef->channels - led_data->channel;
	else
		pwm_register_offset = led_data->channel - 1;

	ret = is31fl32xx_write(led_data->priv,
			       cdef->pwm_register_base + pwm_register_offset,
			       brightness);
	if (ret)
		return ret;

	return is31fl32xx_write(led_data->priv, cdef->pwm_update_reg, 0);
}

static int is31fl32xx_reset_regs(struct is31fl32xx_priv *priv)
{
	const struct is31fl32xx_chipdef *cdef = priv->cdef;
	int ret;

	if (cdef->reset_reg != IS31FL32XX_REG_NONE) {
		ret = is31fl32xx_write(priv, cdef->reset_reg, 0);
		if (ret)
			return ret;
	}

	if (cdef->reset_func)
		return cdef->reset_func(priv);

	return 0;
}

static int is31fl32xx_software_shutdown(struct is31fl32xx_priv *priv,
					bool enable)
{
	const struct is31fl32xx_chipdef *cdef = priv->cdef;
	int ret;

	if (cdef->shutdown_reg != IS31FL32XX_REG_NONE) {
		u8 value = enable ? IS31FL32XX_SHUTDOWN_SSD_ENABLE :
				    IS31FL32XX_SHUTDOWN_SSD_DISABLE;
		ret = is31fl32xx_write(priv, cdef->shutdown_reg, value);
		if (ret)
			return ret;
	}

	if (cdef->sw_shutdown_func)
		return cdef->sw_shutdown_func(priv, enable);

	return 0;
}

static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv)
{
	const struct is31fl32xx_chipdef *cdef = priv->cdef;
	int ret;

	ret = is31fl32xx_reset_regs(priv);
	if (ret)
		return ret;

	/*
	 * Set enable bit for all channels.
	 * We will control state with PWM registers alone.
	 */
	if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) {
		u8 value =
		    GENMASK(cdef->enable_bits_per_led_control_register-1, 0);
		u8 num_regs = cdef->channels /
				cdef->enable_bits_per_led_control_register;
		int i;

		for (i = 0; i < num_regs; i++) {
			ret = is31fl32xx_write(priv,
					       cdef->led_control_register_base+i,
					       value);
			if (ret)
				return ret;
		}
	}

	ret = is31fl32xx_software_shutdown(priv, false);
	if (ret)
		return ret;

	if (cdef->global_control_reg != IS31FL32XX_REG_NONE) {
		ret = is31fl32xx_write(priv, cdef->global_control_reg, 0x00);
		if (ret)
			return ret;
	}

	return 0;
}

static int is31fl32xx_parse_child_dt(const struct device *dev,
				     const struct device_node *child,
				     struct is31fl32xx_led_data *led_data)
{
	struct led_classdev *cdev = &led_data->cdev;
	int ret = 0;
	u32 reg;

	ret = of_property_read_u32(child, "reg", &reg);
	if (ret || reg < 1 || reg > led_data->priv->cdef->channels) {
		dev_err(dev,
			"Child node %pOF does not have a valid reg property\n",
			child);
		return -EINVAL;
	}
	led_data->channel = reg;

	cdev->brightness_set_blocking = is31fl32xx_brightness_set;

	return 0;
}

static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
					struct is31fl32xx_priv *priv,
					u8 channel)
{
	size_t i;

	for (i = 0; i < priv->num_leds; i++) {
		if (priv->leds[i].channel == channel)
			return &priv->leds[i];
	}

	return NULL;
}

static int is31fl32xx_parse_dt(struct device *dev,
			       struct is31fl32xx_priv *priv)
{
	struct device_node *child;
	int ret = 0;

	for_each_available_child_of_node(dev_of_node(dev), child) {
		struct led_init_data init_data = {};
		struct is31fl32xx_led_data *led_data =
			&priv->leds[priv->num_leds];
		const struct is31fl32xx_led_data *other_led_data;

		led_data->priv = priv;

		ret = is31fl32xx_parse_child_dt(dev, child, led_data);
		if (ret)
			goto err;

		/* Detect if channel is already in use by another child */
		other_led_data = is31fl32xx_find_led_data(priv,
							  led_data->channel);
		if (other_led_data) {
			dev_err(dev,
				"Node %pOF 'reg' conflicts with another LED\n",
				child);
			ret = -EINVAL;
			goto err;
		}

		init_data.fwnode = of_fwnode_handle(child);

		ret = devm_led_classdev_register_ext(dev, &led_data->cdev,
						     &init_data);
		if (ret) {
			dev_err(dev, "Failed to register LED for %pOF: %d\n",
				child, ret);
			goto err;
		}

		priv->num_leds++;
	}

	return 0;

err:
	of_node_put(child);
	return ret;
}

static const struct of_device_id of_is31fl32xx_match[] = {
	{ .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
	{ .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
	{ .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
	{ .compatible = "si-en,sn3218",    .data = &is31fl3218_cdef, },
	{ .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
	{ .compatible = "si-en,sn3216",    .data = &is31fl3216_cdef, },
	{},
};

MODULE_DEVICE_TABLE(of, of_is31fl32xx_match);

static int is31fl32xx_probe(struct i2c_client *client)
{
	const struct is31fl32xx_chipdef *cdef;
	struct device *dev = &client->dev;
	struct is31fl32xx_priv *priv;
	int count;
	int ret = 0;

	cdef = device_get_match_data(dev);

	count = of_get_available_child_count(dev_of_node(dev));
	if (!count)
		return -EINVAL;

	priv = devm_kzalloc(dev, struct_size(priv, leds, count),
			    GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->client = client;
	priv->cdef = cdef;
	i2c_set_clientdata(client, priv);

	ret = is31fl32xx_init_regs(priv);
	if (ret)
		return ret;

	ret = is31fl32xx_parse_dt(dev, priv);
	if (ret)
		return ret;

	return 0;
}

static void is31fl32xx_remove(struct i2c_client *client)
{
	struct is31fl32xx_priv *priv = i2c_get_clientdata(client);
	int ret;

	ret = is31fl32xx_reset_regs(priv);
	if (ret)
		dev_err(&client->dev, "Failed to reset registers on removal (%pe)\n",
			ERR_PTR(ret));
}

/*
 * i2c-core (and modalias) requires that id_table be properly filled,
 * even though it is not used for DeviceTree based instantiation.
 */
static const struct i2c_device_id is31fl32xx_id[] = {
	{ "is31fl3236" },
	{ "is31fl3235" },
	{ "is31fl3218" },
	{ "sn3218" },
	{ "is31fl3216" },
	{ "sn3216" },
	{},
};

MODULE_DEVICE_TABLE(i2c, is31fl32xx_id);

static struct i2c_driver is31fl32xx_driver = {
	.driver = {
		.name	= "is31fl32xx",
		.of_match_table = of_is31fl32xx_match,
	},
	.probe_new	= is31fl32xx_probe,
	.remove		= is31fl32xx_remove,
	.id_table	= is31fl32xx_id,
};

module_i2c_driver(is31fl32xx_driver);

MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
9d7cffaf DR	2	/*
	3	* Driver for ISSI IS31FL32xx family of I2C LED controllers
	4	*
	5	* Copyright 2015 Allworx Corp.
	6	*
e0442d7d DR	7	* Datasheets:
	8	* http://www.issi.com/US/product-analog-fxled-driver.shtml
	9	* http://www.si-en.com/product.asp?parentid=890
9d7cffaf DR	10	*/
	11
	12	#include <linux/device.h>
	13	#include <linux/i2c.h>
	14	#include <linux/kernel.h>
	15	#include <linux/leds.h>
	16	#include <linux/module.h>
	17	#include <linux/of.h>
	18	#include <linux/of_device.h>
	19
	20	/* Used to indicate a device has no such register */
	21	#define IS31FL32XX_REG_NONE 0xFF
	22
	23	/* Software Shutdown bit in Shutdown Register */
	24	#define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
	25	#define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
	26
	27	/* IS31FL3216 has a number of unique registers */
	28	#define IS31FL3216_CONFIG_REG 0x00
	29	#define IS31FL3216_LIGHTING_EFFECT_REG 0x03
	30	#define IS31FL3216_CHANNEL_CONFIG_REG 0x04
	31
	32	/* Software Shutdown bit in 3216 Config Register */
	33	#define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
	34	#define IS31FL3216_CONFIG_SSD_DISABLE 0
	35
	36	struct is31fl32xx_priv;
	37	struct is31fl32xx_led_data {
	38	struct led_classdev cdev;
	39	u8 channel; /* 1-based, max priv->cdef->channels */
	40	struct is31fl32xx_priv *priv;
	41	};
	42
	43	struct is31fl32xx_priv {
	44	const struct is31fl32xx_chipdef *cdef;
	45	struct i2c_client *client;
	46	unsigned int num_leds;
7a630367	47	struct is31fl32xx_led_data leds[];
9d7cffaf DR	48	};
	49
	50	/**
	51	* struct is31fl32xx_chipdef - chip-specific attributes
	52	* @channels : Number of LED channels
	53	* @shutdown_reg : address of Shutdown register (optional)
	54	* @pwm_update_reg : address of PWM Update register
	55	* @global_control_reg : address of Global Control register (optional)
	56	* @reset_reg : address of Reset register (optional)
	57	* @pwm_register_base : address of first PWM register
	58	* @pwm_registers_reversed: : true if PWM registers count down instead of up
	59	* @led_control_register_base : address of first LED control register (optional)
	60	* @enable_bits_per_led_control_register: number of LEDs enable bits in each
bf588389 LJ	61	* @reset_func : pointer to reset function
bf588389 LJ	62	* @sw_shutdown_func : pointer to software shutdown function
9d7cffaf DR	63	*
	64	* For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
	65	* indicates that this chip has no such register.
	66	*
	67	* If non-NULL, @reset_func will be called during probing to set all
	68	* necessary registers to a known initialization state. This is needed
	69	* for chips that do not have a @reset_reg.
	70	*
	71	* @enable_bits_per_led_control_register must be >=1 if
	72	* @led_control_register_base != %IS31FL32XX_REG_NONE.
	73	*/
	74	struct is31fl32xx_chipdef {
	75	u8 channels;
	76	u8 shutdown_reg;
	77	u8 pwm_update_reg;
	78	u8 global_control_reg;
	79	u8 reset_reg;
	80	u8 pwm_register_base;
	81	bool pwm_registers_reversed;
	82	u8 led_control_register_base;
	83	u8 enable_bits_per_led_control_register;
	84	int (reset_func)(struct is31fl32xx_priv priv);
	85	int (sw_shutdown_func)(struct is31fl32xx_priv priv, bool enable);
	86	};
	87
	88	static const struct is31fl32xx_chipdef is31fl3236_cdef = {
	89	.channels = 36,
	90	.shutdown_reg = 0x00,
	91	.pwm_update_reg = 0x25,
	92	.global_control_reg = 0x4a,
	93	.reset_reg = 0x4f,
	94	.pwm_register_base = 0x01,
	95	.led_control_register_base = 0x26,
	96	.enable_bits_per_led_control_register = 1,
	97	};
	98
	99	static const struct is31fl32xx_chipdef is31fl3235_cdef = {
	100	.channels = 28,
	101	.shutdown_reg = 0x00,
	102	.pwm_update_reg = 0x25,
	103	.global_control_reg = 0x4a,
	104	.reset_reg = 0x4f,
	105	.pwm_register_base = 0x05,
	106	.led_control_register_base = 0x2a,
	107	.enable_bits_per_led_control_register = 1,
	108	};
	109
	110	static const struct is31fl32xx_chipdef is31fl3218_cdef = {
	111	.channels = 18,
	112	.shutdown_reg = 0x00,
	113	.pwm_update_reg = 0x16,
	114	.global_control_reg = IS31FL32XX_REG_NONE,
	115	.reset_reg = 0x17,
	116	.pwm_register_base = 0x01,
	117	.led_control_register_base = 0x13,
	118	.enable_bits_per_led_control_register = 6,
	119	};
	120
	121	static int is31fl3216_reset(struct is31fl32xx_priv *priv);
	122	static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
	123	bool enable);
	124	static const struct is31fl32xx_chipdef is31fl3216_cdef = {
	125	.channels = 16,
	126	.shutdown_reg = IS31FL32XX_REG_NONE,
127	.pwm_update_reg = 0xB0,
128	.global_control_reg = IS31FL32XX_REG_NONE,
129	.reset_reg = IS31FL32XX_REG_NONE,
130	.pwm_register_base = 0x10,
131	.pwm_registers_reversed = true,
132	.led_control_register_base = 0x01,
133	.enable_bits_per_led_control_register = 8,
134	.reset_func = is31fl3216_reset,
135	.sw_shutdown_func = is31fl3216_software_shutdown,
136	};
137
138	static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
139	{
140	int ret;
141
142	dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
143
144	ret = i2c_smbus_write_byte_data(priv->client, reg, val);
145	if (ret) {
146	dev_err(&priv->client->dev,
147	"register write to 0x%02X failed (error %d)",
148	reg, ret);
149	}
150	return ret;
151	}
152
153	/*
154	* Custom reset function for IS31FL3216 because it does not have a RESET
155	* register the way that the other IS31FL32xx chips do. We don't bother
156	* writing the GPIO and animation registers, because the registers we
157	* do write ensure those will have no effect.
158	*/
159	static int is31fl3216_reset(struct is31fl32xx_priv *priv)
160	{
161	unsigned int i;
162	int ret;
163
164	ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
165	IS31FL3216_CONFIG_SSD_ENABLE);
166	if (ret)
167	return ret;
168	for (i = 0; i < priv->cdef->channels; i++) {
169	ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
170	0x00);
171	if (ret)
172	return ret;
173	}
174	ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
175	if (ret)
176	return ret;
177	ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
178	if (ret)
179	return ret;
180	ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
181	if (ret)
182	return ret;
183
184	return 0;
185	}
186
187	/*
188	* Custom Software-Shutdown function for IS31FL3216 because it does not have
189	* a SHUTDOWN register the way that the other IS31FL32xx chips do.
190	* We don't bother doing a read/modify/write on the CONFIG register because
191	* we only ever use a value of '0' for the other fields in that register.
192	*/
193	static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
194	bool enable)
195	{
196	u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
197	IS31FL3216_CONFIG_SSD_DISABLE;
198
199	return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
200	}
201
202	/*
203	* NOTE: A mutex is not needed in this function because:
204	* - All referenced data is read-only after probe()
205	* - The I2C core has a mutex on to protect the bus
206	* - There are no read/modify/write operations
207	* - Intervening operations between the write of the PWM register
208	* and the Update register are harmless.
209	*
210	* Example:
211	* PWM_REG_1 write 16
212	* UPDATE_REG write 0
213	* PWM_REG_2 write 128
214	* UPDATE_REG write 0
215	* vs:
216	* PWM_REG_1 write 16
217	* PWM_REG_2 write 128
218	* UPDATE_REG write 0
219	* UPDATE_REG write 0
220	* are equivalent. Poking the Update register merely applies all PWM
221	* register writes up to that point.
222	*/
223	static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
224	enum led_brightness brightness)
225	{
226	const struct is31fl32xx_led_data *led_data =
227	container_of(led_cdev, struct is31fl32xx_led_data, cdev);
228	const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
229	u8 pwm_register_offset;
230	int ret;
231
232	dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);
233
234	/* NOTE: led_data->channel is 1-based */
235	if (cdef->pwm_registers_reversed)
236	pwm_register_offset = cdef->channels - led_data->channel;
237	else
238	pwm_register_offset = led_data->channel - 1;
239
240	ret = is31fl32xx_write(led_data->priv,
241	cdef->pwm_register_base + pwm_register_offset,
242	brightness);
243	if (ret)
244	return ret;
245
246	return is31fl32xx_write(led_data->priv, cdef->pwm_update_reg, 0);
247	}
248
249	static int is31fl32xx_reset_regs(struct is31fl32xx_priv *priv)
250	{
251	const struct is31fl32xx_chipdef *cdef = priv->cdef;
252	int ret;
253
254	if (cdef->reset_reg != IS31FL32XX_REG_NONE) {
255	ret = is31fl32xx_write(priv, cdef->reset_reg, 0);
256	if (ret)
257	return ret;
258	}
259
260	if (cdef->reset_func)
261	return cdef->reset_func(priv);
262
263	return 0;
264	}
265
266	static int is31fl32xx_software_shutdown(struct is31fl32xx_priv *priv,
267	bool enable)
268	{
269	const struct is31fl32xx_chipdef *cdef = priv->cdef;
270	int ret;
271
272	if (cdef->shutdown_reg != IS31FL32XX_REG_NONE) {
273	u8 value = enable ? IS31FL32XX_SHUTDOWN_SSD_ENABLE :
274	IS31FL32XX_SHUTDOWN_SSD_DISABLE;
275	ret = is31fl32xx_write(priv, cdef->shutdown_reg, value);
276	if (ret)
277	return ret;
278	}
279
280	if (cdef->sw_shutdown_func)
281	return cdef->sw_shutdown_func(priv, enable);
282
283	return 0;
284	}
285
286	static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv)
287	{
288	const struct is31fl32xx_chipdef *cdef = priv->cdef;
289	int ret;
290
291	ret = is31fl32xx_reset_regs(priv);
292	if (ret)
293	return ret;
294
295	/*
296	* Set enable bit for all channels.
297	* We will control state with PWM registers alone.
298	*/
299	if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) {
300	u8 value =
301	GENMASK(cdef->enable_bits_per_led_control_register-1, 0);
302	u8 num_regs = cdef->channels /
303	cdef->enable_bits_per_led_control_register;
304	int i;
305
306	for (i = 0; i < num_regs; i++) {
307	ret = is31fl32xx_write(priv,
308	cdef->led_control_register_base+i,
309	value);
310	if (ret)
311	return ret;
312	}
313	}
314
315	ret = is31fl32xx_software_shutdown(priv, false);
316	if (ret)
317	return ret;
318
319	if (cdef->global_control_reg != IS31FL32XX_REG_NONE) {
320	ret = is31fl32xx_write(priv, cdef->global_control_reg, 0x00);
321	if (ret)
322	return ret;
323	}
324
325	return 0;
326	}
327
9d7cffaf DR	328	static int is31fl32xx_parse_child_dt(const struct device *dev,
	329	const struct device_node *child,
	330	struct is31fl32xx_led_data *led_data)
	331	{
	332	struct led_classdev *cdev = &led_data->cdev;
	333	int ret = 0;
	334	u32 reg;
	335
9d7cffaf DR	336	ret = of_property_read_u32(child, "reg", &reg);
	337	if (ret \|\| reg < 1 \|\| reg > led_data->priv->cdef->channels) {
	338	dev_err(dev,
0571753e RH	339	"Child node %pOF does not have a valid reg property\n",
0571753e RH	340	child);
9d7cffaf DR	341	return -EINVAL;
	342	}
	343	led_data->channel = reg;
	344
9d7cffaf DR	345	cdev->brightness_set_blocking = is31fl32xx_brightness_set;
	346
	347	return 0;
	348	}
	349
	350	static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
	351	struct is31fl32xx_priv *priv,
	352	u8 channel)
	353	{
	354	size_t i;
	355
	356	for (i = 0; i < priv->num_leds; i++) {
	357	if (priv->leds[i].channel == channel)
	358	return &priv->leds[i];
	359	}
	360
	361	return NULL;
	362	}
	363
	364	static int is31fl32xx_parse_dt(struct device *dev,
	365	struct is31fl32xx_priv *priv)
	366	{
	367	struct device_node *child;
	368	int ret = 0;
	369
99a013c8	370	for_each_available_child_of_node(dev_of_node(dev), child) {
6be2030d	371	struct led_init_data init_data = {};
9d7cffaf DR	372	struct is31fl32xx_led_data *led_data =
	373	&priv->leds[priv->num_leds];
	374	const struct is31fl32xx_led_data *other_led_data;
	375
	376	led_data->priv = priv;
	377
	378	ret = is31fl32xx_parse_child_dt(dev, child, led_data);
	379	if (ret)
	380	goto err;
	381
	382	/* Detect if channel is already in use by another child */
	383	other_led_data = is31fl32xx_find_led_data(priv,
	384	led_data->channel);
	385	if (other_led_data) {
	386	dev_err(dev,
6be2030d MB	387	"Node %pOF 'reg' conflicts with another LED\n",
6be2030d MB	388	child);
e6421975	389	ret = -EINVAL;
9d7cffaf DR	390	goto err;
	391	}
	392
6be2030d MB	393	init_data.fwnode = of_fwnode_handle(child);
	394
	395	ret = devm_led_classdev_register_ext(dev, &led_data->cdev,
	396	&init_data);
9d7cffaf	397	if (ret) {
6be2030d MB	398	dev_err(dev, "Failed to register LED for %pOF: %d\n",
6be2030d MB	399	child, ret);
9d7cffaf DR	400	goto err;
	401	}
	402
	403	priv->num_leds++;
	404	}
	405
	406	return 0;
	407
	408	err:
	409	of_node_put(child);
	410	return ret;
	411	}
	412
1d991b71	413	static const struct of_device_id of_is31fl32xx_match[] = {
9d7cffaf DR	414	{ .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
	415	{ .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
	416	{ .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
e0442d7d	417	{ .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
9d7cffaf	418	{ .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
e0442d7d	419	{ .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
9d7cffaf DR	420	{},
	421	};
	422
1d991b71	423	MODULE_DEVICE_TABLE(of, of_is31fl32xx_match);
9d7cffaf	424
7d24e11b	425	static int is31fl32xx_probe(struct i2c_client *client)
9d7cffaf DR	426	{
9d7cffaf DR	427	const struct is31fl32xx_chipdef *cdef;
9d7cffaf DR	428	struct device *dev = &client->dev;
	429	struct is31fl32xx_priv *priv;
	430	int count;
	431	int ret = 0;
	432
2779f472	433	cdef = device_get_match_data(dev);
9d7cffaf	434
99a013c8	435	count = of_get_available_child_count(dev_of_node(dev));
9d7cffaf DR	436	if (!count)
	437	return -EINVAL;
	438
1669ec78	439	priv = devm_kzalloc(dev, struct_size(priv, leds, count),
9d7cffaf DR	440	GFP_KERNEL);
	441	if (!priv)
	442	return -ENOMEM;
	443
	444	priv->client = client;
	445	priv->cdef = cdef;
	446	i2c_set_clientdata(client, priv);
	447
	448	ret = is31fl32xx_init_regs(priv);
	449	if (ret)
	450	return ret;
	451
	452	ret = is31fl32xx_parse_dt(dev, priv);
	453	if (ret)
	454	return ret;
	455
	456	return 0;
	457	}
	458
ed5c2f5f	459	static void is31fl32xx_remove(struct i2c_client *client)
9d7cffaf DR	460	{
9d7cffaf DR	461	struct is31fl32xx_priv *priv = i2c_get_clientdata(client);
e1347bd4	462	int ret;
9d7cffaf	463
e1347bd4 UKK	464	ret = is31fl32xx_reset_regs(priv);
	465	if (ret)
	466	dev_err(&client->dev, "Failed to reset registers on removal (%pe)\n",
	467	ERR_PTR(ret));
9d7cffaf DR	468	}
	469
	470	/*
5706c01f NS	471	* i2c-core (and modalias) requires that id_table be properly filled,
5706c01f NS	472	* even though it is not used for DeviceTree based instantiation.
9d7cffaf	473	*/
1d991b71	474	static const struct i2c_device_id is31fl32xx_id[] = {
5706c01f NS	475	{ "is31fl3236" },
	476	{ "is31fl3235" },
	477	{ "is31fl3218" },
	478	{ "sn3218" },
	479	{ "is31fl3216" },
	480	{ "sn3216" },
9d7cffaf DR	481	{},
	482	};
	483
1d991b71	484	MODULE_DEVICE_TABLE(i2c, is31fl32xx_id);
9d7cffaf DR	485
	486	static struct i2c_driver is31fl32xx_driver = {
	487	.driver = {
	488	.name = "is31fl32xx",
1d991b71	489	.of_match_table = of_is31fl32xx_match,
9d7cffaf	490	},
7d24e11b	491	.probe_new = is31fl32xx_probe,
9d7cffaf	492	.remove = is31fl32xx_remove,
1d991b71	493	.id_table = is31fl32xx_id,
9d7cffaf DR	494	};
	495
	496	module_i2c_driver(is31fl32xx_driver);
	497
	498	MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
	499	MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
	500	MODULE_LICENSE("GPL v2");