[linux-2.6-block.git] / drivers / leds / leds-is31fl319x.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2015-16 Golden Delicious Computers
 *
 * Author: Nikolaus Schaller <hns@goldelico.com>
 *
 * LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
 * effect LEDs.
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>

/* register numbers */
#define IS31FL319X_SHUTDOWN		0x00

/* registers for 3190, 3191 and 3193 */
#define IS31FL3190_BREATHING		0x01
#define IS31FL3190_LEDMODE		0x02
#define IS31FL3190_CURRENT		0x03
#define IS31FL3190_PWM(channel)		(0x04 + channel)
#define IS31FL3190_DATA_UPDATE		0x07
#define IS31FL3190_T0(channel)		(0x0a + channel)
#define IS31FL3190_T1T2(channel)	(0x10 + channel)
#define IS31FL3190_T3T4(channel)	(0x16 + channel)
#define IS31FL3190_TIME_UPDATE		0x1c
#define IS31FL3190_LEDCONTROL		0x1d
#define IS31FL3190_RESET		0x2f

#define IS31FL3190_CURRENT_uA_MIN	5000
#define IS31FL3190_CURRENT_uA_DEFAULT	42000
#define IS31FL3190_CURRENT_uA_MAX	42000
#define IS31FL3190_CURRENT_MASK		GENMASK(4, 2)
#define IS31FL3190_CURRENT_5_mA		0x02
#define IS31FL3190_CURRENT_10_mA	0x01
#define IS31FL3190_CURRENT_17dot5_mA	0x04
#define IS31FL3190_CURRENT_30_mA	0x03
#define IS31FL3190_CURRENT_42_mA	0x00

/* registers for 3196 and 3199 */
#define IS31FL3196_CTRL1		0x01
#define IS31FL3196_CTRL2		0x02
#define IS31FL3196_CONFIG1		0x03
#define IS31FL3196_CONFIG2		0x04
#define IS31FL3196_RAMP_MODE		0x05
#define IS31FL3196_BREATH_MARK		0x06
#define IS31FL3196_PWM(channel)		(0x07 + channel)
#define IS31FL3196_DATA_UPDATE		0x10
#define IS31FL3196_T0(channel)		(0x11 + channel)
#define IS31FL3196_T123_1		0x1a
#define IS31FL3196_T123_2		0x1b
#define IS31FL3196_T123_3		0x1c
#define IS31FL3196_T4(channel)		(0x1d + channel)
#define IS31FL3196_TIME_UPDATE		0x26
#define IS31FL3196_RESET		0xff

#define IS31FL3196_REG_CNT		(IS31FL3196_RESET + 1)

#define IS31FL319X_MAX_LEDS		9

/* CS (Current Setting) in CONFIG2 register */
#define IS31FL3196_CONFIG2_CS_SHIFT	4
#define IS31FL3196_CONFIG2_CS_MASK	GENMASK(2, 0)
#define IS31FL3196_CONFIG2_CS_STEP_REF	12

#define IS31FL3196_CURRENT_uA_MIN	5000
#define IS31FL3196_CURRENT_uA_MAX	40000
#define IS31FL3196_CURRENT_uA_STEP	5000
#define IS31FL3196_CURRENT_uA_DEFAULT	20000

/* Audio gain in CONFIG2 register */
#define IS31FL3196_AUDIO_GAIN_DB_MAX	((u32)21)
#define IS31FL3196_AUDIO_GAIN_DB_STEP	3

/*
 * regmap is used as a cache of chip's register space,
 * to avoid reading back brightness values from chip,
 * which is known to hang.
 */
struct is31fl319x_chip {
	const struct is31fl319x_chipdef *cdef;
	struct i2c_client               *client;
	struct gpio_desc		*shutdown_gpio;
	struct regmap                   *regmap;
	struct mutex                    lock;
	u32                             audio_gain_db;

	struct is31fl319x_led {
		struct is31fl319x_chip  *chip;
		struct led_classdev     cdev;
		u32                     max_microamp;
		bool                    configured;
	} leds[IS31FL319X_MAX_LEDS];
};

struct is31fl319x_chipdef {
	int num_leds;
	u8 reset_reg;
	const struct regmap_config *is31fl319x_regmap_config;
	int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brightness);
	u32 current_default;
	u32 current_min;
	u32 current_max;
	bool is_3196or3199;
};

static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
{
	/* we have no readable registers */
	return false;
}

static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg)
{
	/* volatile registers are not cached */
	switch (reg) {
	case IS31FL3190_DATA_UPDATE:
	case IS31FL3190_TIME_UPDATE:
	case IS31FL3190_RESET:
		return true; /* always write-through */
	default:
		return false;
	}
}

static const struct reg_default is31fl3190_reg_defaults[] = {
	{ IS31FL3190_LEDMODE, 0x00 },
	{ IS31FL3190_CURRENT, 0x00 },
	{ IS31FL3190_PWM(0), 0x00 },
	{ IS31FL3190_PWM(1), 0x00 },
	{ IS31FL3190_PWM(2), 0x00 },
};

static struct regmap_config is31fl3190_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.max_register = IS31FL3190_RESET,
	.cache_type = REGCACHE_FLAT,
	.readable_reg = is31fl319x_readable_reg,
	.volatile_reg = is31fl3190_volatile_reg,
	.reg_defaults = is31fl3190_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults),
};

static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg)
{
	/* volatile registers are not cached */
	switch (reg) {
	case IS31FL3196_DATA_UPDATE:
	case IS31FL3196_TIME_UPDATE:
	case IS31FL3196_RESET:
		return true; /* always write-through */
	default:
		return false;
	}
}

static const struct reg_default is31fl3196_reg_defaults[] = {
	{ IS31FL3196_CONFIG1, 0x00 },
	{ IS31FL3196_CONFIG2, 0x00 },
	{ IS31FL3196_PWM(0), 0x00 },
	{ IS31FL3196_PWM(1), 0x00 },
	{ IS31FL3196_PWM(2), 0x00 },
	{ IS31FL3196_PWM(3), 0x00 },
	{ IS31FL3196_PWM(4), 0x00 },
	{ IS31FL3196_PWM(5), 0x00 },
	{ IS31FL3196_PWM(6), 0x00 },
	{ IS31FL3196_PWM(7), 0x00 },
	{ IS31FL3196_PWM(8), 0x00 },
};

static struct regmap_config is31fl3196_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.max_register = IS31FL3196_REG_CNT,
	.cache_type = REGCACHE_FLAT,
	.readable_reg = is31fl319x_readable_reg,
	.volatile_reg = is31fl3196_volatile_reg,
	.reg_defaults = is31fl3196_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults),
};

static int is31fl3190_brightness_set(struct led_classdev *cdev,
				     enum led_brightness brightness)
{
	struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
	struct is31fl319x_chip *is31 = led->chip;
	int chan = led - is31->leds;
	int ret;
	int i;
	u8 ctrl = 0;

	dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);

	mutex_lock(&is31->lock);

	/* update PWM register */
	ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness);
	if (ret < 0)
		goto out;

	/* read current brightness of all PWM channels */
	for (i = 0; i < is31->cdef->num_leds; i++) {
		unsigned int pwm_value;
		bool on;

		/*
		 * since neither cdev nor the chip can provide
		 * the current setting, we read from the regmap cache
		 */

		ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value);
		on = ret >= 0 && pwm_value > LED_OFF;

		ctrl |= on << i;
	}

	if (ctrl > 0) {
		dev_dbg(&is31->client->dev, "power up %02x\n", ctrl);
		regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl);
		/* update PWMs */
		regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00);
		/* enable chip from shut down and enable all channels */
		ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20);
	} else {
		dev_dbg(&is31->client->dev, "power down\n");
		/* shut down (no need to clear LEDCONTROL) */
		ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
	}

out:
	mutex_unlock(&is31->lock);

	return ret;
}

static int is31fl3196_brightness_set(struct led_classdev *cdev,
				     enum led_brightness brightness)
{
	struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
	struct is31fl319x_chip *is31 = led->chip;
	int chan = led - is31->leds;
	int ret;
	int i;
	u8 ctrl1 = 0, ctrl2 = 0;

	dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);

	mutex_lock(&is31->lock);

	/* update PWM register */
	ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness);
	if (ret < 0)
		goto out;

	/* read current brightness of all PWM channels */
	for (i = 0; i < is31->cdef->num_leds; i++) {
		unsigned int pwm_value;
		bool on;

		/*
		 * since neither cdev nor the chip can provide
		 * the current setting, we read from the regmap cache
		 */

		ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value);
		on = ret >= 0 && pwm_value > LED_OFF;

		if (i < 3)
			ctrl1 |= on << i;       /* 0..2 => bit 0..2 */
		else if (i < 6)
			ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */
		else
			ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
	}

	if (ctrl1 > 0 || ctrl2 > 0) {
		dev_dbg(&is31->client->dev, "power up %02x %02x\n",
			ctrl1, ctrl2);
		regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1);
		regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2);
		/* update PWMs */
		regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00);
		/* enable chip from shut down */
		ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
	} else {
		dev_dbg(&is31->client->dev, "power down\n");
		/* shut down (no need to clear CTRL1/2) */
		ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
	}

out:
	mutex_unlock(&is31->lock);

	return ret;
}

static const struct is31fl319x_chipdef is31fl3190_cdef = {
	.num_leds = 1,
	.reset_reg = IS31FL3190_RESET,
	.is31fl319x_regmap_config = &is31fl3190_regmap_config,
	.brightness_set = is31fl3190_brightness_set,
	.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
	.current_min = IS31FL3190_CURRENT_uA_MIN,
	.current_max = IS31FL3190_CURRENT_uA_MAX,
	.is_3196or3199 = false,
};

static const struct is31fl319x_chipdef is31fl3193_cdef = {
	.num_leds = 3,
	.reset_reg = IS31FL3190_RESET,
	.is31fl319x_regmap_config = &is31fl3190_regmap_config,
	.brightness_set = is31fl3190_brightness_set,
	.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
	.current_min = IS31FL3190_CURRENT_uA_MIN,
	.current_max = IS31FL3190_CURRENT_uA_MAX,
	.is_3196or3199 = false,
};

static const struct is31fl319x_chipdef is31fl3196_cdef = {
	.num_leds = 6,
	.reset_reg = IS31FL3196_RESET,
	.is31fl319x_regmap_config = &is31fl3196_regmap_config,
	.brightness_set = is31fl3196_brightness_set,
	.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
	.current_min = IS31FL3196_CURRENT_uA_MIN,
	.current_max = IS31FL3196_CURRENT_uA_MAX,
	.is_3196or3199 = true,
};

static const struct is31fl319x_chipdef is31fl3199_cdef = {
	.num_leds = 9,
	.reset_reg = IS31FL3196_RESET,
	.is31fl319x_regmap_config = &is31fl3196_regmap_config,
	.brightness_set = is31fl3196_brightness_set,
	.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
	.current_min = IS31FL3196_CURRENT_uA_MIN,
	.current_max = IS31FL3196_CURRENT_uA_MAX,
	.is_3196or3199 = true,
};

static const struct of_device_id of_is31fl319x_match[] = {
	{ .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
	{ .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
	{ .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
	{ .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
	{ .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
	{ .compatible = "si-en,sn3190",    .data = &is31fl3190_cdef, },
	{ .compatible = "si-en,sn3191",    .data = &is31fl3190_cdef, },
	{ .compatible = "si-en,sn3193",    .data = &is31fl3193_cdef, },
	{ .compatible = "si-en,sn3196",    .data = &is31fl3196_cdef, },
	{ .compatible = "si-en,sn3199",    .data = &is31fl3199_cdef, },
	{ }
};
MODULE_DEVICE_TABLE(of, of_is31fl319x_match);

static int is31fl319x_parse_child_fw(const struct device *dev,
				     const struct fwnode_handle *child,
				     struct is31fl319x_led *led,
				     struct is31fl319x_chip *is31)
{
	struct led_classdev *cdev = &led->cdev;
	int ret;

	if (fwnode_property_read_string(child, "label", &cdev->name))
		cdev->name = fwnode_get_name(child);

	ret = fwnode_property_read_string(child, "linux,default-trigger", &cdev->default_trigger);
	if (ret < 0 && ret != -EINVAL) /* is optional */
		return ret;

	led->max_microamp = is31->cdef->current_default;
	ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp);
	if (!ret) {
		if (led->max_microamp < is31->cdef->current_min)
			return -EINVAL;	/* not supported */
		led->max_microamp = min(led->max_microamp,
					is31->cdef->current_max);
	}

	return 0;
}

static int is31fl319x_parse_fw(struct device *dev, struct is31fl319x_chip *is31)
{
	struct fwnode_handle *fwnode = dev_fwnode(dev), *child;
	int count;
	int ret;

	is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
	if (IS_ERR(is31->shutdown_gpio))
		return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio),
				     "Failed to get shutdown gpio\n");

	is31->cdef = device_get_match_data(dev);

	count = 0;
	fwnode_for_each_available_child_node(fwnode, child)
		count++;

	dev_dbg(dev, "probing with %d leds defined in DT\n", count);

	if (!count || count > is31->cdef->num_leds)
		return dev_err_probe(dev, -ENODEV,
				     "Number of leds defined must be between 1 and %u\n",
				     is31->cdef->num_leds);

	fwnode_for_each_available_child_node(fwnode, child) {
		struct is31fl319x_led *led;
		u32 reg;

		ret = fwnode_property_read_u32(child, "reg", &reg);
		if (ret) {
			ret = dev_err_probe(dev, ret, "Failed to read led 'reg' property\n");
			goto put_child_node;
		}

		if (reg < 1 || reg > is31->cdef->num_leds) {
			ret = dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg);
			goto put_child_node;
		}

		led = &is31->leds[reg - 1];

		if (led->configured) {
			ret = dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg);
			goto put_child_node;
		}

		ret = is31fl319x_parse_child_fw(dev, child, led, is31);
		if (ret) {
			ret = dev_err_probe(dev, ret, "led %u DT parsing failed\n", reg);
			goto put_child_node;
		}

		led->configured = true;
	}

	is31->audio_gain_db = 0;
	if (is31->cdef->is_3196or3199) {
		ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db);
		if (!ret)
			is31->audio_gain_db = min(is31->audio_gain_db,
						  IS31FL3196_AUDIO_GAIN_DB_MAX);
	}

	return 0;

put_child_node:
	fwnode_handle_put(child);
	return ret;
}

static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp)
{
	switch (microamp) {
	case 5000:
		return IS31FL3190_CURRENT_5_mA;
	case 10000:
		return IS31FL3190_CURRENT_10_mA;
	case 17500:
		return IS31FL3190_CURRENT_17dot5_mA;
	case 30000:
		return IS31FL3190_CURRENT_30_mA;
	case 42000:
		return IS31FL3190_CURRENT_42_mA;
	default:
		dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp);
		return IS31FL3190_CURRENT_5_mA;
	}
}

static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp)
{
	/* round down to nearest supported value (range check done by caller) */
	u32 step = microamp / IS31FL3196_CURRENT_uA_STEP;

	return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) &
		IS31FL3196_CONFIG2_CS_MASK) <<
		IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */
}

static inline int is31fl3196_db_to_gain(u32 dezibel)
{
	/* round down to nearest supported value (range check done by caller) */
	return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP;
}

static int is31fl319x_probe(struct i2c_client *client)
{
	struct is31fl319x_chip *is31;
	struct device *dev = &client->dev;
	int err;
	int i = 0;
	u32 aggregated_led_microamp;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
		return -EIO;

	is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
	if (!is31)
		return -ENOMEM;

	mutex_init(&is31->lock);
	err = devm_add_action(dev, (void (*)(void *))mutex_destroy, &is31->lock);
	if (err)
		return err;

	err = is31fl319x_parse_fw(&client->dev, is31);
	if (err)
		return err;

	if (is31->shutdown_gpio) {
		gpiod_direction_output(is31->shutdown_gpio, 0);
		mdelay(5);
		gpiod_direction_output(is31->shutdown_gpio, 1);
	}

	is31->client = client;
	is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config);
	if (IS_ERR(is31->regmap))
		return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n");

	i2c_set_clientdata(client, is31);

	/* check for write-reply from chip (we can't read any registers) */
	err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00);
	if (err < 0)
		return dev_err_probe(dev, err, "no response from chip write\n");

	/*
	 * Kernel conventions require per-LED led-max-microamp property.
	 * But the chip does not allow to limit individual LEDs.
	 * So we take minimum from all subnodes for safety of hardware.
	 */
	aggregated_led_microamp = is31->cdef->current_max;
	for (i = 0; i < is31->cdef->num_leds; i++)
		if (is31->leds[i].configured &&
		    is31->leds[i].max_microamp < aggregated_led_microamp)
			aggregated_led_microamp = is31->leds[i].max_microamp;

	if (is31->cdef->is_3196or3199)
		regmap_write(is31->regmap, IS31FL3196_CONFIG2,
			     is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) |
			     is31fl3196_db_to_gain(is31->audio_gain_db));
	else
		regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK,
				   is31fl3190_microamp_to_cs(dev, aggregated_led_microamp));

	for (i = 0; i < is31->cdef->num_leds; i++) {
		struct is31fl319x_led *led = &is31->leds[i];

		if (!led->configured)
			continue;

		led->chip = is31;
		led->cdev.brightness_set_blocking = is31->cdef->brightness_set;

		err = devm_led_classdev_register(&client->dev, &led->cdev);
		if (err < 0)
			return err;
	}

	return 0;
}

/*
 * i2c-core (and modalias) requires that id_table be properly filled,
 * even though it is not used for DeviceTree based instantiation.
 */
static const struct i2c_device_id is31fl319x_id[] = {
	{ "is31fl3190" },
	{ "is31fl3191" },
	{ "is31fl3193" },
	{ "is31fl3196" },
	{ "is31fl3199" },
	{ "sn3190" },
	{ "sn3191" },
	{ "sn3193" },
	{ "sn3196" },
	{ "sn3199" },
	{},
};
MODULE_DEVICE_TABLE(i2c, is31fl319x_id);

static struct i2c_driver is31fl319x_driver = {
	.driver   = {
		.name           = "leds-is31fl319x",
		.of_match_table = of_is31fl319x_match,
	},
	.probe_new = is31fl319x_probe,
	.id_table = is31fl319x_id,
};

module_i2c_driver(is31fl319x_driver);

MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
MODULE_DESCRIPTION("IS31FL319X LED driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
36edc939	1	// SPDX-License-Identifier: GPL-2.0-only
8c40b7d0 NS	2	/*
	3	* Copyright 2015-16 Golden Delicious Computers
	4	*
	5	* Author: Nikolaus Schaller <hns@goldelico.com>
	6	*
8c40b7d0 NS	7	* LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
8c40b7d0 NS	8	* effect LEDs.
8c40b7d0 NS	9	*/
	10
	11	#include <linux/err.h>
	12	#include <linux/i2c.h>
	13	#include <linux/leds.h>
69a9b172	14	#include <linux/mod_devicetable.h>
8c40b7d0	15	#include <linux/module.h>
69a9b172	16	#include <linux/property.h>
8c40b7d0 NS	17	#include <linux/regmap.h>
8c40b7d0 NS	18	#include <linux/slab.h>
dddb4e38 GF	19	#include <linux/delay.h>
dddb4e38 GF	20	#include <linux/gpio/consumer.h>
8c40b7d0 NS	21
	22	/* register numbers */
	23	#define IS31FL319X_SHUTDOWN 0x00
fa877cf1 VK	24
	25	/* registers for 3190, 3191 and 3193 */
	26	#define IS31FL3190_BREATHING 0x01
	27	#define IS31FL3190_LEDMODE 0x02
	28	#define IS31FL3190_CURRENT 0x03
	29	#define IS31FL3190_PWM(channel) (0x04 + channel)
	30	#define IS31FL3190_DATA_UPDATE 0x07
	31	#define IS31FL3190_T0(channel) (0x0a + channel)
	32	#define IS31FL3190_T1T2(channel) (0x10 + channel)
	33	#define IS31FL3190_T3T4(channel) (0x16 + channel)
	34	#define IS31FL3190_TIME_UPDATE 0x1c
	35	#define IS31FL3190_LEDCONTROL 0x1d
	36	#define IS31FL3190_RESET 0x2f
	37
	38	#define IS31FL3190_CURRENT_uA_MIN 5000
	39	#define IS31FL3190_CURRENT_uA_DEFAULT 42000
	40	#define IS31FL3190_CURRENT_uA_MAX 42000
	41	#define IS31FL3190_CURRENT_MASK GENMASK(4, 2)
	42	#define IS31FL3190_CURRENT_5_mA 0x02
	43	#define IS31FL3190_CURRENT_10_mA 0x01
	44	#define IS31FL3190_CURRENT_17dot5_mA 0x04
	45	#define IS31FL3190_CURRENT_30_mA 0x03
	46	#define IS31FL3190_CURRENT_42_mA 0x00
	47
	48	/* registers for 3196 and 3199 */
8e6dde1b VK	49	#define IS31FL3196_CTRL1 0x01
	50	#define IS31FL3196_CTRL2 0x02
	51	#define IS31FL3196_CONFIG1 0x03
	52	#define IS31FL3196_CONFIG2 0x04
	53	#define IS31FL3196_RAMP_MODE 0x05
	54	#define IS31FL3196_BREATH_MARK 0x06
	55	#define IS31FL3196_PWM(channel) (0x07 + channel)
	56	#define IS31FL3196_DATA_UPDATE 0x10
	57	#define IS31FL3196_T0(channel) (0x11 + channel)
	58	#define IS31FL3196_T123_1 0x1a
	59	#define IS31FL3196_T123_2 0x1b
	60	#define IS31FL3196_T123_3 0x1c
	61	#define IS31FL3196_T4(channel) (0x1d + channel)
	62	#define IS31FL3196_TIME_UPDATE 0x26
	63	#define IS31FL3196_RESET 0xff
	64
	65	#define IS31FL3196_REG_CNT (IS31FL3196_RESET + 1)
8c40b7d0 NS	66
	67	#define IS31FL319X_MAX_LEDS 9
	68
	69	/* CS (Current Setting) in CONFIG2 register */
8e6dde1b VK	70	#define IS31FL3196_CONFIG2_CS_SHIFT 4
	71	#define IS31FL3196_CONFIG2_CS_MASK GENMASK(2, 0)
	72	#define IS31FL3196_CONFIG2_CS_STEP_REF 12
8c40b7d0	73
8e6dde1b VK	74	#define IS31FL3196_CURRENT_uA_MIN 5000
	75	#define IS31FL3196_CURRENT_uA_MAX 40000
	76	#define IS31FL3196_CURRENT_uA_STEP 5000
	77	#define IS31FL3196_CURRENT_uA_DEFAULT 20000
8c40b7d0 NS	78
8c40b7d0 NS	79	/* Audio gain in CONFIG2 register */
8e6dde1b VK	80	#define IS31FL3196_AUDIO_GAIN_DB_MAX ((u32)21)
8e6dde1b VK	81	#define IS31FL3196_AUDIO_GAIN_DB_STEP 3
8c40b7d0 NS	82
	83	/*
	84	* regmap is used as a cache of chip's register space,
	85	* to avoid reading back brightness values from chip,
	86	* which is known to hang.
	87	*/
	88	struct is31fl319x_chip {
	89	const struct is31fl319x_chipdef *cdef;
	90	struct i2c_client *client;
dddb4e38	91	struct gpio_desc *shutdown_gpio;
8c40b7d0 NS	92	struct regmap *regmap;
	93	struct mutex lock;
	94	u32 audio_gain_db;
	95
	96	struct is31fl319x_led {
	97	struct is31fl319x_chip *chip;
	98	struct led_classdev cdev;
	99	u32 max_microamp;
	100	bool configured;
	101	} leds[IS31FL319X_MAX_LEDS];
	102	};
	103
	104	struct is31fl319x_chipdef {
	105	int num_leds;
bd34266f VK	106	u8 reset_reg;
	107	const struct regmap_config *is31fl319x_regmap_config;
	108	int (brightness_set)(struct led_classdev cdev, enum led_brightness brightness);
	109	u32 current_default;
	110	u32 current_min;
	111	u32 current_max;
	112	bool is_3196or3199;
8c40b7d0 NS	113	};
8c40b7d0 NS	114
bd34266f VK	115	static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
	116	{
	117	/* we have no readable registers */
	118	return false;
	119	}
8c40b7d0	120
fa877cf1 VK	121	static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg)
	122	{
	123	/* volatile registers are not cached */
	124	switch (reg) {
	125	case IS31FL3190_DATA_UPDATE:
	126	case IS31FL3190_TIME_UPDATE:
	127	case IS31FL3190_RESET:
	128	return true; /* always write-through */
	129	default:
	130	return false;
	131	}
	132	}
	133
	134	static const struct reg_default is31fl3190_reg_defaults[] = {
	135	{ IS31FL3190_LEDMODE, 0x00 },
	136	{ IS31FL3190_CURRENT, 0x00 },
	137	{ IS31FL3190_PWM(0), 0x00 },
	138	{ IS31FL3190_PWM(1), 0x00 },
	139	{ IS31FL3190_PWM(2), 0x00 },
	140	};
	141
	142	static struct regmap_config is31fl3190_regmap_config = {
	143	.reg_bits = 8,
	144	.val_bits = 8,
	145	.max_register = IS31FL3190_RESET,
	146	.cache_type = REGCACHE_FLAT,
	147	.readable_reg = is31fl319x_readable_reg,
	148	.volatile_reg = is31fl3190_volatile_reg,
	149	.reg_defaults = is31fl3190_reg_defaults,
	150	.num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults),
	151	};
	152
bd34266f VK	153	static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg)
	154	{
	155	/* volatile registers are not cached */
	156	switch (reg) {
	157	case IS31FL3196_DATA_UPDATE:
	158	case IS31FL3196_TIME_UPDATE:
	159	case IS31FL3196_RESET:
	160	return true; /* always write-through */
	161	default:
	162	return false;
	163	}
	164	}
8c40b7d0	165
bd34266f VK	166	static const struct reg_default is31fl3196_reg_defaults[] = {
	167	{ IS31FL3196_CONFIG1, 0x00 },
	168	{ IS31FL3196_CONFIG2, 0x00 },
	169	{ IS31FL3196_PWM(0), 0x00 },
	170	{ IS31FL3196_PWM(1), 0x00 },
	171	{ IS31FL3196_PWM(2), 0x00 },
	172	{ IS31FL3196_PWM(3), 0x00 },
	173	{ IS31FL3196_PWM(4), 0x00 },
	174	{ IS31FL3196_PWM(5), 0x00 },
	175	{ IS31FL3196_PWM(6), 0x00 },
	176	{ IS31FL3196_PWM(7), 0x00 },
	177	{ IS31FL3196_PWM(8), 0x00 },
8c40b7d0 NS	178	};
8c40b7d0 NS	179
bd34266f VK	180	static struct regmap_config is31fl3196_regmap_config = {
	181	.reg_bits = 8,
	182	.val_bits = 8,
	183	.max_register = IS31FL3196_REG_CNT,
	184	.cache_type = REGCACHE_FLAT,
	185	.readable_reg = is31fl319x_readable_reg,
	186	.volatile_reg = is31fl3196_volatile_reg,
	187	.reg_defaults = is31fl3196_reg_defaults,
	188	.num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults),
8c40b7d0	189	};
8c40b7d0	190
fa877cf1 VK	191	static int is31fl3190_brightness_set(struct led_classdev *cdev,
	192	enum led_brightness brightness)
	193	{
	194	struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
	195	struct is31fl319x_chip *is31 = led->chip;
	196	int chan = led - is31->leds;
	197	int ret;
	198	int i;
	199	u8 ctrl = 0;
	200
77426834	201	dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
fa877cf1 VK	202
	203	mutex_lock(&is31->lock);
	204
	205	/* update PWM register */
	206	ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness);
	207	if (ret < 0)
	208	goto out;
	209
	210	/* read current brightness of all PWM channels */
	211	for (i = 0; i < is31->cdef->num_leds; i++) {
	212	unsigned int pwm_value;
	213	bool on;
	214
	215	/*
	216	* since neither cdev nor the chip can provide
	217	* the current setting, we read from the regmap cache
	218	*/
	219
	220	ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value);
	221	on = ret >= 0 && pwm_value > LED_OFF;
	222
	223	ctrl \|= on << i;
	224	}
	225
	226	if (ctrl > 0) {
	227	dev_dbg(&is31->client->dev, "power up %02x\n", ctrl);
	228	regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl);
	229	/* update PWMs */
	230	regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00);
	231	/* enable chip from shut down and enable all channels */
	232	ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20);
	233	} else {
	234	dev_dbg(&is31->client->dev, "power down\n");
	235	/* shut down (no need to clear LEDCONTROL) */
	236	ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
	237	}
	238
	239	out:
	240	mutex_unlock(&is31->lock);
	241
	242	return ret;
	243	}
	244
8e6dde1b	245	static int is31fl3196_brightness_set(struct led_classdev *cdev,
8c40b7d0 NS	246	enum led_brightness brightness)
8c40b7d0 NS	247	{
77426834	248	struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
8c40b7d0 NS	249	struct is31fl319x_chip *is31 = led->chip;
	250	int chan = led - is31->leds;
	251	int ret;
	252	int i;
	253	u8 ctrl1 = 0, ctrl2 = 0;
	254
77426834	255	dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
8c40b7d0 NS	256
	257	mutex_lock(&is31->lock);
	258
	259	/* update PWM register */
8e6dde1b	260	ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness);
8c40b7d0 NS	261	if (ret < 0)
	262	goto out;
	263
	264	/* read current brightness of all PWM channels */
	265	for (i = 0; i < is31->cdef->num_leds; i++) {
	266	unsigned int pwm_value;
	267	bool on;
	268
	269	/*
	270	* since neither cdev nor the chip can provide
	271	* the current setting, we read from the regmap cache
	272	*/
	273
8e6dde1b	274	ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value);
8c40b7d0 NS	275	on = ret >= 0 && pwm_value > LED_OFF;
	276
	277	if (i < 3)
	278	ctrl1 \|= on << i; /* 0..2 => bit 0..2 */
	279	else if (i < 6)
	280	ctrl1 \|= on << (i + 1); /* 3..5 => bit 4..6 */
	281	else
	282	ctrl2 \|= on << (i - 6); /* 6..8 => bit 0..2 */
	283	}
	284
	285	if (ctrl1 > 0 \|\| ctrl2 > 0) {
	286	dev_dbg(&is31->client->dev, "power up %02x %02x\n",
	287	ctrl1, ctrl2);
8e6dde1b VK	288	regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1);
8e6dde1b VK	289	regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2);
8c40b7d0	290	/* update PWMs */
8e6dde1b	291	regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00);
8c40b7d0 NS	292	/* enable chip from shut down */
	293	ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
	294	} else {
	295	dev_dbg(&is31->client->dev, "power down\n");
	296	/* shut down (no need to clear CTRL1/2) */
	297	ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
	298	}
	299
	300	out:
	301	mutex_unlock(&is31->lock);
	302
	303	return ret;
	304	}
	305
bd34266f VK	306	static const struct is31fl319x_chipdef is31fl3190_cdef = {
bd34266f VK	307	.num_leds = 1,
fa877cf1 VK	308	.reset_reg = IS31FL3190_RESET,
	309	.is31fl319x_regmap_config = &is31fl3190_regmap_config,
	310	.brightness_set = is31fl3190_brightness_set,
	311	.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
	312	.current_min = IS31FL3190_CURRENT_uA_MIN,
	313	.current_max = IS31FL3190_CURRENT_uA_MAX,
	314	.is_3196or3199 = false,
bd34266f VK	315	};
	316
	317	static const struct is31fl319x_chipdef is31fl3193_cdef = {
	318	.num_leds = 3,
fa877cf1 VK	319	.reset_reg = IS31FL3190_RESET,
	320	.is31fl319x_regmap_config = &is31fl3190_regmap_config,
	321	.brightness_set = is31fl3190_brightness_set,
	322	.current_default = IS31FL3190_CURRENT_uA_DEFAULT,
	323	.current_min = IS31FL3190_CURRENT_uA_MIN,
	324	.current_max = IS31FL3190_CURRENT_uA_MAX,
	325	.is_3196or3199 = false,
bd34266f VK	326	};
	327
	328	static const struct is31fl319x_chipdef is31fl3196_cdef = {
	329	.num_leds = 6,
	330	.reset_reg = IS31FL3196_RESET,
	331	.is31fl319x_regmap_config = &is31fl3196_regmap_config,
	332	.brightness_set = is31fl3196_brightness_set,
	333	.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
	334	.current_min = IS31FL3196_CURRENT_uA_MIN,
	335	.current_max = IS31FL3196_CURRENT_uA_MAX,
	336	.is_3196or3199 = true,
	337	};
	338
	339	static const struct is31fl319x_chipdef is31fl3199_cdef = {
	340	.num_leds = 9,
	341	.reset_reg = IS31FL3196_RESET,
	342	.is31fl319x_regmap_config = &is31fl3196_regmap_config,
	343	.brightness_set = is31fl3196_brightness_set,
	344	.current_default = IS31FL3196_CURRENT_uA_DEFAULT,
	345	.current_min = IS31FL3196_CURRENT_uA_MIN,
	346	.current_max = IS31FL3196_CURRENT_uA_MAX,
	347	.is_3196or3199 = true,
	348	};
	349
	350	static const struct of_device_id of_is31fl319x_match[] = {
	351	{ .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
	352	{ .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
	353	{ .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
	354	{ .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
	355	{ .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
	356	{ .compatible = "si-en,sn3190", .data = &is31fl3190_cdef, },
	357	{ .compatible = "si-en,sn3191", .data = &is31fl3190_cdef, },
	358	{ .compatible = "si-en,sn3193", .data = &is31fl3193_cdef, },
	359	{ .compatible = "si-en,sn3196", .data = &is31fl3196_cdef, },
	360	{ .compatible = "si-en,sn3199", .data = &is31fl3199_cdef, },
	361	{ }
	362	};
	363	MODULE_DEVICE_TABLE(of, of_is31fl319x_match);
	364
69a9b172 AS	365	static int is31fl319x_parse_child_fw(const struct device *dev,
69a9b172 AS	366	const struct fwnode_handle *child,
bd34266f VK	367	struct is31fl319x_led *led,
bd34266f VK	368	struct is31fl319x_chip *is31)
8c40b7d0 NS	369	{
	370	struct led_classdev *cdev = &led->cdev;
	371	int ret;
	372
69a9b172 AS	373	if (fwnode_property_read_string(child, "label", &cdev->name))
69a9b172 AS	374	cdev->name = fwnode_get_name(child);
8c40b7d0	375
69a9b172	376	ret = fwnode_property_read_string(child, "linux,default-trigger", &cdev->default_trigger);
8c40b7d0 NS	377	if (ret < 0 && ret != -EINVAL) /* is optional */
	378	return ret;
	379
bd34266f	380	led->max_microamp = is31->cdef->current_default;
69a9b172	381	ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp);
8c40b7d0	382	if (!ret) {
bd34266f	383	if (led->max_microamp < is31->cdef->current_min)
8c40b7d0 NS	384	return -EINVAL; /* not supported */
8c40b7d0 NS	385	led->max_microamp = min(led->max_microamp,
bd34266f	386	is31->cdef->current_max);
8c40b7d0 NS	387	}
	388
	389	return 0;
	390	}
	391
69a9b172	392	static int is31fl319x_parse_fw(struct device dev, struct is31fl319x_chip is31)
8c40b7d0	393	{
69a9b172	394	struct fwnode_handle fwnode = dev_fwnode(dev), child;
8c40b7d0 NS	395	int count;
	396	int ret;
	397
77426834	398	is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
0d77252b AS	399	if (IS_ERR(is31->shutdown_gpio))
	400	return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio),
	401	"Failed to get shutdown gpio\n");
dddb4e38	402
2779f472	403	is31->cdef = device_get_match_data(dev);
8c40b7d0	404
69a9b172 AS	405	count = 0;
	406	fwnode_for_each_available_child_node(fwnode, child)
	407	count++;
8c40b7d0	408
2779f472	409	dev_dbg(dev, "probing with %d leds defined in DT\n", count);
8c40b7d0	410
0d77252b AS	411	if (!count \|\| count > is31->cdef->num_leds)
	412	return dev_err_probe(dev, -ENODEV,
	413	"Number of leds defined must be between 1 and %u\n",
	414	is31->cdef->num_leds);
8c40b7d0	415
69a9b172	416	fwnode_for_each_available_child_node(fwnode, child) {
8c40b7d0 NS	417	struct is31fl319x_led *led;
	418	u32 reg;
	419
69a9b172	420	ret = fwnode_property_read_u32(child, "reg", &reg);
8c40b7d0	421	if (ret) {
0d77252b	422	ret = dev_err_probe(dev, ret, "Failed to read led 'reg' property\n");
8c40b7d0 NS	423	goto put_child_node;
	424	}
	425
	426	if (reg < 1 \|\| reg > is31->cdef->num_leds) {
0d77252b	427	ret = dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg);
8c40b7d0 NS	428	goto put_child_node;
	429	}
	430
	431	led = &is31->leds[reg - 1];
	432
	433	if (led->configured) {
0d77252b	434	ret = dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg);
8c40b7d0 NS	435	goto put_child_node;
	436	}
	437
69a9b172	438	ret = is31fl319x_parse_child_fw(dev, child, led, is31);
8c40b7d0	439	if (ret) {
0d77252b	440	ret = dev_err_probe(dev, ret, "led %u DT parsing failed\n", reg);
8c40b7d0 NS	441	goto put_child_node;
	442	}
	443
	444	led->configured = true;
	445	}
	446
	447	is31->audio_gain_db = 0;
bd34266f	448	if (is31->cdef->is_3196or3199) {
69a9b172	449	ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db);
bd34266f VK	450	if (!ret)
	451	is31->audio_gain_db = min(is31->audio_gain_db,
	452	IS31FL3196_AUDIO_GAIN_DB_MAX);
	453	}
8c40b7d0 NS	454
	455	return 0;
	456
	457	put_child_node:
69a9b172	458	fwnode_handle_put(child);
8c40b7d0 NS	459	return ret;
	460	}
	461
fa877cf1 VK	462	static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp)
	463	{
	464	switch (microamp) {
	465	case 5000:
	466	return IS31FL3190_CURRENT_5_mA;
	467	case 10000:
	468	return IS31FL3190_CURRENT_10_mA;
	469	case 17500:
	470	return IS31FL3190_CURRENT_17dot5_mA;
	471	case 30000:
	472	return IS31FL3190_CURRENT_30_mA;
	473	case 42000:
	474	return IS31FL3190_CURRENT_42_mA;
	475	default:
	476	dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp);
	477	return IS31FL3190_CURRENT_5_mA;
	478	}
	479	}
	480
8e6dde1b	481	static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp)
77426834 VK	482	{
77426834 VK	483	/* round down to nearest supported value (range check done by caller) */
8e6dde1b	484	u32 step = microamp / IS31FL3196_CURRENT_uA_STEP;
8c40b7d0	485
8e6dde1b VK	486	return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) &
	487	IS31FL3196_CONFIG2_CS_MASK) <<
	488	IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */
8c40b7d0 NS	489	}
8c40b7d0 NS	490
8e6dde1b	491	static inline int is31fl3196_db_to_gain(u32 dezibel)
77426834 VK	492	{
77426834 VK	493	/* round down to nearest supported value (range check done by caller) */
8e6dde1b	494	return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP;
8c40b7d0 NS	495	}
8c40b7d0 NS	496
38ba0bb2	497	static int is31fl319x_probe(struct i2c_client *client)
8c40b7d0 NS	498	{
	499	struct is31fl319x_chip *is31;
	500	struct device *dev = &client->dev;
8c40b7d0 NS	501	int err;
8c40b7d0 NS	502	int i = 0;
bd34266f	503	u32 aggregated_led_microamp;
8c40b7d0	504
7d9d60bd	505	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
8c40b7d0 NS	506	return -EIO;
	507
	508	is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
	509	if (!is31)
	510	return -ENOMEM;
	511
	512	mutex_init(&is31->lock);
e1af5c81 AS	513	err = devm_add_action(dev, (void ()(void ))mutex_destroy, &is31->lock);
	514	if (err)
	515	return err;
8c40b7d0	516
69a9b172	517	err = is31fl319x_parse_fw(&client->dev, is31);
8c40b7d0	518	if (err)
e1af5c81	519	return err;
8c40b7d0	520
dddb4e38 GF	521	if (is31->shutdown_gpio) {
	522	gpiod_direction_output(is31->shutdown_gpio, 0);
	523	mdelay(5);
	524	gpiod_direction_output(is31->shutdown_gpio, 1);
	525	}
	526
8c40b7d0	527	is31->client = client;
bd34266f	528	is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config);
e1af5c81 AS	529	if (IS_ERR(is31->regmap))
e1af5c81 AS	530	return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n");
8c40b7d0 NS	531
	532	i2c_set_clientdata(client, is31);
	533
	534	/* check for write-reply from chip (we can't read any registers) */
bd34266f	535	err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00);
e1af5c81 AS	536	if (err < 0)
e1af5c81 AS	537	return dev_err_probe(dev, err, "no response from chip write\n");
8c40b7d0 NS	538
	539	/*
	540	* Kernel conventions require per-LED led-max-microamp property.
	541	* But the chip does not allow to limit individual LEDs.
	542	* So we take minimum from all subnodes for safety of hardware.
	543	*/
bd34266f	544	aggregated_led_microamp = is31->cdef->current_max;
8c40b7d0 NS	545	for (i = 0; i < is31->cdef->num_leds; i++)
	546	if (is31->leds[i].configured &&
	547	is31->leds[i].max_microamp < aggregated_led_microamp)
	548	aggregated_led_microamp = is31->leds[i].max_microamp;
	549
bd34266f VK	550	if (is31->cdef->is_3196or3199)
	551	regmap_write(is31->regmap, IS31FL3196_CONFIG2,
	552	is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) \|
	553	is31fl3196_db_to_gain(is31->audio_gain_db));
fa877cf1 VK	554	else
	555	regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK,
	556	is31fl3190_microamp_to_cs(dev, aggregated_led_microamp));
8c40b7d0 NS	557
	558	for (i = 0; i < is31->cdef->num_leds; i++) {
	559	struct is31fl319x_led *led = &is31->leds[i];
	560
	561	if (!led->configured)
	562	continue;
	563
	564	led->chip = is31;
bd34266f	565	led->cdev.brightness_set_blocking = is31->cdef->brightness_set;
8c40b7d0 NS	566
	567	err = devm_led_classdev_register(&client->dev, &led->cdev);
	568	if (err < 0)
e1af5c81	569	return err;
8c40b7d0 NS	570	}
	571
	572	return 0;
8c40b7d0 NS	573	}
	574
	575	/*
	576	* i2c-core (and modalias) requires that id_table be properly filled,
	577	* even though it is not used for DeviceTree based instantiation.
	578	*/
	579	static const struct i2c_device_id is31fl319x_id[] = {
	580	{ "is31fl3190" },
	581	{ "is31fl3191" },
	582	{ "is31fl3193" },
	583	{ "is31fl3196" },
	584	{ "is31fl3199" },
dc6d28f4 VK	585	{ "sn3190" },
	586	{ "sn3191" },
	587	{ "sn3193" },
	588	{ "sn3196" },
8c40b7d0 NS	589	{ "sn3199" },
	590	{},
	591	};
	592	MODULE_DEVICE_TABLE(i2c, is31fl319x_id);
	593
	594	static struct i2c_driver is31fl319x_driver = {
	595	.driver = {
	596	.name = "leds-is31fl319x",
69a9b172	597	.of_match_table = of_is31fl319x_match,
8c40b7d0	598	},
38ba0bb2	599	.probe_new = is31fl319x_probe,
8c40b7d0 NS	600	.id_table = is31fl319x_id,
	601	};
	602
	603	module_i2c_driver(is31fl319x_driver);
	604
	605	MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
	606	MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
	607	MODULE_DESCRIPTION("IS31FL319X LED driver");
	608	MODULE_LICENSE("GPL v2");