[linux-2.6-block.git] / drivers / kvm / x86.h

#/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This header defines architecture specific interfaces, x86 version
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

#ifndef KVM_X86_H
#define KVM_X86_H

#include <linux/types.h>
#include <linux/mm.h>

#include <linux/kvm.h>
#include <linux/kvm_para.h>

#include <asm/desc.h>

#include "types.h"

#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL)

#define KVM_GUEST_CR0_MASK \
	(X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
	 | X86_CR0_NW | X86_CR0_CD)
#define KVM_VM_CR0_ALWAYS_ON \
	(X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
	 | X86_CR0_MP)
#define KVM_GUEST_CR4_MASK \
	(X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)

#define INVALID_PAGE (~(hpa_t)0)
#define UNMAPPED_GVA (~(gpa_t)0)

#define DE_VECTOR 0
#define UD_VECTOR 6
#define NM_VECTOR 7
#define DF_VECTOR 8
#define TS_VECTOR 10
#define NP_VECTOR 11
#define SS_VECTOR 12
#define GP_VECTOR 13
#define PF_VECTOR 14

#define SELECTOR_TI_MASK (1 << 2)
#define SELECTOR_RPL_MASK 0x03

#define IOPL_SHIFT 12

#define KVM_ALIAS_SLOTS 4

#define KVM_PERMILLE_MMU_PAGES 20
#define KVM_MIN_ALLOC_MMU_PAGES 64
#define KVM_NUM_MMU_PAGES 1024
#define KVM_MIN_FREE_MMU_PAGES 5
#define KVM_REFILL_PAGES 25
#define KVM_MAX_CPUID_ENTRIES 40

extern spinlock_t kvm_lock;
extern struct list_head vm_list;

struct kvm_vcpu;
struct kvm;

enum {
	VCPU_REGS_RAX = 0,
	VCPU_REGS_RCX = 1,
	VCPU_REGS_RDX = 2,
	VCPU_REGS_RBX = 3,
	VCPU_REGS_RSP = 4,
	VCPU_REGS_RBP = 5,
	VCPU_REGS_RSI = 6,
	VCPU_REGS_RDI = 7,
#ifdef CONFIG_X86_64
	VCPU_REGS_R8 = 8,
	VCPU_REGS_R9 = 9,
	VCPU_REGS_R10 = 10,
	VCPU_REGS_R11 = 11,
	VCPU_REGS_R12 = 12,
	VCPU_REGS_R13 = 13,
	VCPU_REGS_R14 = 14,
	VCPU_REGS_R15 = 15,
#endif
	NR_VCPU_REGS
};

enum {
	VCPU_SREG_CS,
	VCPU_SREG_DS,
	VCPU_SREG_ES,
	VCPU_SREG_FS,
	VCPU_SREG_GS,
	VCPU_SREG_SS,
	VCPU_SREG_TR,
	VCPU_SREG_LDTR,
};

#include "x86_emulate.h"

#define KVM_NR_MEM_OBJS 40

/*
 * We don't want allocation failures within the mmu code, so we preallocate
 * enough memory for a single page fault in a cache.
 */
struct kvm_mmu_memory_cache {
	int nobjs;
	void *objects[KVM_NR_MEM_OBJS];
};

#define NR_PTE_CHAIN_ENTRIES 5

struct kvm_pte_chain {
	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	struct hlist_node link;
};

/*
 * kvm_mmu_page_role, below, is defined as:
 *
 *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 *   bits 4:7 - page table level for this shadow (1-4)
 *   bits 8:9 - page table quadrant for 2-level guests
 *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
 *   bits 17:19 - common access permissions for all ptes in this shadow page
 */
union kvm_mmu_page_role {
	unsigned word;
	struct {
		unsigned glevels : 4;
		unsigned level : 4;
		unsigned quadrant : 2;
		unsigned pad_for_nice_hex_output : 6;
		unsigned metaphysical : 1;
		unsigned access : 3;
	};
};

struct kvm_mmu_page {
	struct list_head link;
	struct hlist_node hash_link;

	/*
	 * The following two entries are used to key the shadow page in the
	 * hash table.
	 */
	gfn_t gfn;
	union kvm_mmu_page_role role;

	u64 *spt;
	/* hold the gfn of each spte inside spt */
	gfn_t *gfns;
	unsigned long slot_bitmap; /* One bit set per slot which has memory
				    * in this shadow page.
				    */
	int multimapped;         /* More than one parent_pte? */
	int root_count;          /* Currently serving as active root */
	union {
		u64 *parent_pte;               /* !multimapped */
		struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	};
};

/*
 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 * mode.
 */
struct kvm_mmu {
	void (*new_cr3)(struct kvm_vcpu *vcpu);
	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
	void (*free)(struct kvm_vcpu *vcpu);
	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
	void (*prefetch_page)(struct kvm_vcpu *vcpu,
			      struct kvm_mmu_page *page);
	hpa_t root_hpa;
	int root_level;
	int shadow_root_level;

	u64 *pae_root;
};

struct kvm_vcpu_arch {
	u64 host_tsc;
	int interrupt_window_open;
	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	unsigned long rip;      /* needs vcpu_load_rsp_rip() */

	unsigned long cr0;
	unsigned long cr2;
	unsigned long cr3;
	unsigned long cr4;
	unsigned long cr8;
	u64 pdptrs[4]; /* pae */
	u64 shadow_efer;
	u64 apic_base;
	struct kvm_lapic *apic;    /* kernel irqchip context */
#define VCPU_MP_STATE_RUNNABLE          0
#define VCPU_MP_STATE_UNINITIALIZED     1
#define VCPU_MP_STATE_INIT_RECEIVED     2
#define VCPU_MP_STATE_SIPI_RECEIVED     3
#define VCPU_MP_STATE_HALTED            4
	int mp_state;
	int sipi_vector;
	u64 ia32_misc_enable_msr;

	struct kvm_mmu mmu;

	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	struct kvm_mmu_memory_cache mmu_page_cache;
	struct kvm_mmu_memory_cache mmu_page_header_cache;

	gfn_t last_pt_write_gfn;
	int   last_pt_write_count;
	u64  *last_pte_updated;

	struct i387_fxsave_struct host_fx_image;
	struct i387_fxsave_struct guest_fx_image;

	gva_t mmio_fault_cr2;
	struct kvm_pio_request pio;
	void *pio_data;

	struct kvm_queued_exception {
		bool pending;
		bool has_error_code;
		u8 nr;
		u32 error_code;
	} exception;

	struct {
		int active;
		u8 save_iopl;
		struct kvm_save_segment {
			u16 selector;
			unsigned long base;
			u32 limit;
			u32 ar;
		} tr, es, ds, fs, gs;
	} rmode;
	int halt_request; /* real mode on Intel only */

	int cpuid_nent;
	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
	/* emulate context */

	struct x86_emulate_ctxt emulate_ctxt;
};

struct kvm_mem_alias {
	gfn_t base_gfn;
	unsigned long npages;
	gfn_t target_gfn;
};

struct kvm_arch{
	int naliases;
	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];

	unsigned int n_free_mmu_pages;
	unsigned int n_requested_mmu_pages;
	unsigned int n_alloc_mmu_pages;
	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	/*
	 * Hash table of struct kvm_mmu_page.
	 */
	struct list_head active_mmu_pages;
	struct kvm_pic *vpic;
	struct kvm_ioapic *vioapic;
};

struct kvm_vcpu_stat {
	u32 pf_fixed;
	u32 pf_guest;
	u32 tlb_flush;
	u32 invlpg;

	u32 exits;
	u32 io_exits;
	u32 mmio_exits;
	u32 signal_exits;
	u32 irq_window_exits;
	u32 halt_exits;
	u32 halt_wakeup;
	u32 request_irq_exits;
	u32 irq_exits;
	u32 host_state_reload;
	u32 efer_reload;
	u32 fpu_reload;
	u32 insn_emulation;
	u32 insn_emulation_fail;
};

struct descriptor_table {
	u16 limit;
	unsigned long base;
} __attribute__((packed));

struct kvm_x86_ops {
	int (*cpu_has_kvm_support)(void);          /* __init */
	int (*disabled_by_bios)(void);             /* __init */
	void (*hardware_enable)(void *dummy);      /* __init */
	void (*hardware_disable)(void *dummy);
	void (*check_processor_compatibility)(void *rtn);
	int (*hardware_setup)(void);               /* __init */
	void (*hardware_unsetup)(void);            /* __exit */

	/* Create, but do not attach this VCPU */
	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
	void (*vcpu_free)(struct kvm_vcpu *vcpu);
	int (*vcpu_reset)(struct kvm_vcpu *vcpu);

	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
	void (*vcpu_put)(struct kvm_vcpu *vcpu);
	void (*vcpu_decache)(struct kvm_vcpu *vcpu);

	int (*set_guest_debug)(struct kvm_vcpu *vcpu,
			       struct kvm_debug_guest *dbg);
	void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
	int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
	void (*get_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*set_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
	void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
	void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
	void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
		       int *exception);
	void (*cache_regs)(struct kvm_vcpu *vcpu);
	void (*decache_regs)(struct kvm_vcpu *vcpu);
	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);

	void (*tlb_flush)(struct kvm_vcpu *vcpu);

	void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
	int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
				unsigned char *hypercall_addr);
	int (*get_irq)(struct kvm_vcpu *vcpu);
	void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
				bool has_error_code, u32 error_code);
	bool (*exception_injected)(struct kvm_vcpu *vcpu);
	void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
	void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
				       struct kvm_run *run);

	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
};

extern struct kvm_x86_ops *kvm_x86_ops;

int kvm_mmu_module_init(void);
void kvm_mmu_module_exit(void);

void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
int kvm_mmu_create(struct kvm_vcpu *vcpu);
int kvm_mmu_setup(struct kvm_vcpu *vcpu);
void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);

int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
void kvm_mmu_zap_all(struct kvm *kvm);
unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);

enum emulation_result {
	EMULATE_DONE,       /* no further processing */
	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
	EMULATE_FAIL,         /* can't emulate this instruction */
};

int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
			unsigned long cr2, u16 error_code, int no_decode);
void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
		   unsigned long *rflags);

unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
		     unsigned long *rflags);
int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);

struct x86_emulate_ctxt;

int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
		     int size, unsigned port);
int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
			   int size, unsigned long count, int down,
			    gva_t address, int rep, unsigned port);
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
int emulate_clts(struct kvm_vcpu *vcpu);
int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long *dest);
int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long value);

void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
unsigned long get_cr8(struct kvm_vcpu *vcpu);
void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);

int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);

void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
			   u32 error_code);

void fx_init(struct kvm_vcpu *vcpu);

int emulator_read_std(unsigned long addr,
		      void *val,
		      unsigned int bytes,
		      struct kvm_vcpu *vcpu);
int emulator_write_emulated(unsigned long addr,
			    const void *val,
			    unsigned int bytes,
			    struct kvm_vcpu *vcpu);

unsigned long segment_base(u16 selector);

void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
		       const u8 *new, int bytes);
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
int kvm_mmu_load(struct kvm_vcpu *vcpu);
void kvm_mmu_unload(struct kvm_vcpu *vcpu);

int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);

int kvm_fix_hypercall(struct kvm_vcpu *vcpu);

int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);

int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
int complete_pio(struct kvm_vcpu *vcpu);

static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
{
	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);

	return (struct kvm_mmu_page *)page_private(page);
}

static inline u16 read_fs(void)
{
	u16 seg;
	asm("mov %%fs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_gs(void)
{
	u16 seg;
	asm("mov %%gs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_ldt(void)
{
	u16 ldt;
	asm("sldt %0" : "=g"(ldt));
	return ldt;
}

static inline void load_fs(u16 sel)
{
	asm("mov %0, %%fs" : : "rm"(sel));
}

static inline void load_gs(u16 sel)
{
	asm("mov %0, %%gs" : : "rm"(sel));
}

#ifndef load_ldt
static inline void load_ldt(u16 sel)
{
	asm("lldt %0" : : "rm"(sel));
}
#endif

static inline void get_idt(struct descriptor_table *table)
{
	asm("sidt %0" : "=m"(*table));
}

static inline void get_gdt(struct descriptor_table *table)
{
	asm("sgdt %0" : "=m"(*table));
}

static inline unsigned long read_tr_base(void)
{
	u16 tr;
	asm("str %0" : "=g"(tr));
	return segment_base(tr);
}

#ifdef CONFIG_X86_64
static inline unsigned long read_msr(unsigned long msr)
{
	u64 value;

	rdmsrl(msr, value);
	return value;
}
#endif

static inline void fx_save(struct i387_fxsave_struct *image)
{
	asm("fxsave (%0)":: "r" (image));
}

static inline void fx_restore(struct i387_fxsave_struct *image)
{
	asm("fxrstor (%0)":: "r" (image));
}

static inline void fpu_init(void)
{
	asm("finit");
}

static inline u32 get_rdx_init_val(void)
{
	return 0x600; /* P6 family */
}

static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
{
	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
}

#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"

#define MSR_IA32_TIME_STAMP_COUNTER		0x010

#define TSS_IOPB_BASE_OFFSET 0x66
#define TSS_BASE_SIZE 0x68
#define TSS_IOPB_SIZE (65536 / 8)
#define TSS_REDIRECTION_SIZE (256 / 8)
#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)

#endif
Commit	Line	Data
043405e1 CO	1	#/*
	2	* Kernel-based Virtual Machine driver for Linux
	3	*
	4	* This header defines architecture specific interfaces, x86 version
	5	*
	6	* This work is licensed under the terms of the GNU GPL, version 2. See
	7	* the COPYING file in the top-level directory.
	8	*
	9	*/
	10
	11	#ifndef KVM_X86_H
	12	#define KVM_X86_H
	13
34c16eec ZX	14	#include <linux/types.h>
	15	#include <linux/mm.h>
	16
	17	#include <linux/kvm.h>
	18	#include <linux/kvm_para.h>
	19
e01a1b57 HB	20	#include <asm/desc.h>
e01a1b57 HB	21
d657a98e ZX	22	#include "types.h"
d657a98e ZX	23
cd6e8f87 ZX	24	#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT \| X86_CR3_PCD) - 1)
	25	#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT \| X86_CR3_PCD))
	26	#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS\|0xFFFFFF0000000000ULL)
	27
	28	#define KVM_GUEST_CR0_MASK \
	29	(X86_CR0_PG \| X86_CR0_PE \| X86_CR0_WP \| X86_CR0_NE \
	30	\| X86_CR0_NW \| X86_CR0_CD)
	31	#define KVM_VM_CR0_ALWAYS_ON \
	32	(X86_CR0_PG \| X86_CR0_PE \| X86_CR0_WP \| X86_CR0_NE \| X86_CR0_TS \
	33	\| X86_CR0_MP)
	34	#define KVM_GUEST_CR4_MASK \
	35	(X86_CR4_VME \| X86_CR4_PSE \| X86_CR4_PAE \| X86_CR4_PGE \| X86_CR4_VMXE)
	36	#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE \| X86_CR4_VMXE)
	37	#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME \| X86_CR4_PAE \| X86_CR4_VMXE)
	38
	39	#define INVALID_PAGE (~(hpa_t)0)
	40	#define UNMAPPED_GVA (~(gpa_t)0)
	41
	42	#define DE_VECTOR 0
	43	#define UD_VECTOR 6
	44	#define NM_VECTOR 7
	45	#define DF_VECTOR 8
	46	#define TS_VECTOR 10
	47	#define NP_VECTOR 11
	48	#define SS_VECTOR 12
	49	#define GP_VECTOR 13
	50	#define PF_VECTOR 14
	51
	52	#define SELECTOR_TI_MASK (1 << 2)
	53	#define SELECTOR_RPL_MASK 0x03
	54
	55	#define IOPL_SHIFT 12
	56
d69fb81f ZX	57	#define KVM_ALIAS_SLOTS 4
d69fb81f ZX	58
d657a98e ZX	59	#define KVM_PERMILLE_MMU_PAGES 20
	60	#define KVM_MIN_ALLOC_MMU_PAGES 64
	61	#define KVM_NUM_MMU_PAGES 1024
	62	#define KVM_MIN_FREE_MMU_PAGES 5
	63	#define KVM_REFILL_PAGES 25
	64	#define KVM_MAX_CPUID_ENTRIES 40
	65
e9b11c17 ZX	66	extern spinlock_t kvm_lock;
	67	extern struct list_head vm_list;
	68
d657a98e ZX	69	struct kvm_vcpu;
	70	struct kvm;
	71
2b3ccfa0 ZX	72	enum {
	73	VCPU_REGS_RAX = 0,
	74	VCPU_REGS_RCX = 1,
	75	VCPU_REGS_RDX = 2,
	76	VCPU_REGS_RBX = 3,
	77	VCPU_REGS_RSP = 4,
	78	VCPU_REGS_RBP = 5,
	79	VCPU_REGS_RSI = 6,
	80	VCPU_REGS_RDI = 7,
	81	#ifdef CONFIG_X86_64
	82	VCPU_REGS_R8 = 8,
	83	VCPU_REGS_R9 = 9,
	84	VCPU_REGS_R10 = 10,
	85	VCPU_REGS_R11 = 11,
	86	VCPU_REGS_R12 = 12,
	87	VCPU_REGS_R13 = 13,
	88	VCPU_REGS_R14 = 14,
	89	VCPU_REGS_R15 = 15,
	90	#endif
	91	NR_VCPU_REGS
	92	};
	93
	94	enum {
	95	VCPU_SREG_CS,
	96	VCPU_SREG_DS,
	97	VCPU_SREG_ES,
	98	VCPU_SREG_FS,
	99	VCPU_SREG_GS,
	100	VCPU_SREG_SS,
	101	VCPU_SREG_TR,
	102	VCPU_SREG_LDTR,
	103	};
	104
	105	#include "x86_emulate.h"
	106
d657a98e ZX	107	#define KVM_NR_MEM_OBJS 40
	108
	109	/*
	110	* We don't want allocation failures within the mmu code, so we preallocate
	111	* enough memory for a single page fault in a cache.
	112	*/
	113	struct kvm_mmu_memory_cache {
	114	int nobjs;
	115	void *objects[KVM_NR_MEM_OBJS];
	116	};
	117
	118	#define NR_PTE_CHAIN_ENTRIES 5
	119
	120	struct kvm_pte_chain {
	121	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	122	struct hlist_node link;
	123	};
	124
	125	/*
	126	* kvm_mmu_page_role, below, is defined as:
	127	*
	128	* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
	129	* bits 4:7 - page table level for this shadow (1-4)
	130	* bits 8:9 - page table quadrant for 2-level guests
	131	* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
	132	* bits 17:19 - common access permissions for all ptes in this shadow page
	133	*/
	134	union kvm_mmu_page_role {
	135	unsigned word;
	136	struct {
	137	unsigned glevels : 4;
	138	unsigned level : 4;
	139	unsigned quadrant : 2;
	140	unsigned pad_for_nice_hex_output : 6;
	141	unsigned metaphysical : 1;
	142	unsigned access : 3;
	143	};
	144	};
	145
	146	struct kvm_mmu_page {
	147	struct list_head link;
	148	struct hlist_node hash_link;
	149
	150	/*
	151	* The following two entries are used to key the shadow page in the
	152	* hash table.
	153	*/
	154	gfn_t gfn;
	155	union kvm_mmu_page_role role;
	156
	157	u64 *spt;
	158	/* hold the gfn of each spte inside spt */
	159	gfn_t *gfns;
	160	unsigned long slot_bitmap; /* One bit set per slot which has memory
	161	* in this shadow page.
	162	*/
	163	int multimapped; /* More than one parent_pte? */
	164	int root_count; /* Currently serving as active root */
	165	union {
	166	u64 parent_pte; / !multimapped */
	167	struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	168	};
	169	};
	170
171	/*
172	* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
173	* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
174	* mode.
175	*/
176	struct kvm_mmu {
177	void (new_cr3)(struct kvm_vcpu vcpu);
178	int (page_fault)(struct kvm_vcpu vcpu, gva_t gva, u32 err);
179	void (free)(struct kvm_vcpu vcpu);
180	gpa_t (gva_to_gpa)(struct kvm_vcpu vcpu, gva_t gva);
181	void (prefetch_page)(struct kvm_vcpu vcpu,
182	struct kvm_mmu_page *page);
183	hpa_t root_hpa;
184	int root_level;
185	int shadow_root_level;
186
187	u64 *pae_root;
188	};
189
ad312c7c	190	struct kvm_vcpu_arch {
34c16eec ZX	191	u64 host_tsc;
	192	int interrupt_window_open;
	193	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	194	DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
	195	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	196	unsigned long rip; /* needs vcpu_load_rsp_rip() */
	197
	198	unsigned long cr0;
	199	unsigned long cr2;
	200	unsigned long cr3;
	201	unsigned long cr4;
	202	unsigned long cr8;
	203	u64 pdptrs[4]; /* pae */
	204	u64 shadow_efer;
	205	u64 apic_base;
	206	struct kvm_lapic apic; / kernel irqchip context */
	207	#define VCPU_MP_STATE_RUNNABLE 0
	208	#define VCPU_MP_STATE_UNINITIALIZED 1
	209	#define VCPU_MP_STATE_INIT_RECEIVED 2
	210	#define VCPU_MP_STATE_SIPI_RECEIVED 3
	211	#define VCPU_MP_STATE_HALTED 4
	212	int mp_state;
	213	int sipi_vector;
	214	u64 ia32_misc_enable_msr;
	215
	216	struct kvm_mmu mmu;
	217
	218	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	219	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	220	struct kvm_mmu_memory_cache mmu_page_cache;
	221	struct kvm_mmu_memory_cache mmu_page_header_cache;
	222
	223	gfn_t last_pt_write_gfn;
	224	int last_pt_write_count;
	225	u64 *last_pte_updated;
	226
34c16eec ZX	227	struct i387_fxsave_struct host_fx_image;
	228	struct i387_fxsave_struct guest_fx_image;
	229
	230	gva_t mmio_fault_cr2;
	231	struct kvm_pio_request pio;
	232	void *pio_data;
	233
298101da AK	234	struct kvm_queued_exception {
	235	bool pending;
	236	bool has_error_code;
	237	u8 nr;
	238	u32 error_code;
	239	} exception;
	240
34c16eec ZX	241	struct {
	242	int active;
	243	u8 save_iopl;
	244	struct kvm_save_segment {
	245	u16 selector;
	246	unsigned long base;
	247	u32 limit;
	248	u32 ar;
	249	} tr, es, ds, fs, gs;
	250	} rmode;
	251	int halt_request; /* real mode on Intel only */
	252
	253	int cpuid_nent;
07716717	254	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec ZX	255	/* emulate context */
	256
	257	struct x86_emulate_ctxt emulate_ctxt;
	258	};
	259
d69fb81f ZX	260	struct kvm_mem_alias {
	261	gfn_t base_gfn;
	262	unsigned long npages;
	263	gfn_t target_gfn;
	264	};
	265
	266	struct kvm_arch{
	267	int naliases;
	268	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac ZX	269
	270	unsigned int n_free_mmu_pages;
	271	unsigned int n_requested_mmu_pages;
	272	unsigned int n_alloc_mmu_pages;
	273	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	274	/*
	275	* Hash table of struct kvm_mmu_page.
	276	*/
	277	struct list_head active_mmu_pages;
d7deeeb0 ZX	278	struct kvm_pic *vpic;
d7deeeb0 ZX	279	struct kvm_ioapic *vioapic;
d69fb81f ZX	280	};
d69fb81f ZX	281
77b4c255 ZX	282	struct kvm_vcpu_stat {
	283	u32 pf_fixed;
	284	u32 pf_guest;
	285	u32 tlb_flush;
	286	u32 invlpg;
	287
	288	u32 exits;
	289	u32 io_exits;
	290	u32 mmio_exits;
	291	u32 signal_exits;
	292	u32 irq_window_exits;
	293	u32 halt_exits;
	294	u32 halt_wakeup;
	295	u32 request_irq_exits;
	296	u32 irq_exits;
	297	u32 host_state_reload;
	298	u32 efer_reload;
	299	u32 fpu_reload;
	300	u32 insn_emulation;
	301	u32 insn_emulation_fail;
	302	};
ad312c7c	303
e01a1b57 HB	304	struct descriptor_table {
	305	u16 limit;
	306	unsigned long base;
	307	} __attribute__((packed));
	308
ea4a5ff8 ZX	309	struct kvm_x86_ops {
	310	int (cpu_has_kvm_support)(void); / __init */
	311	int (disabled_by_bios)(void); / __init */
	312	void (hardware_enable)(void dummy); /* __init */
	313	void (hardware_disable)(void dummy);
	314	void (check_processor_compatibility)(void rtn);
	315	int (hardware_setup)(void); / __init */
	316	void (hardware_unsetup)(void); / __exit */
	317
	318	/* Create, but do not attach this VCPU */
	319	struct kvm_vcpu (vcpu_create)(struct kvm *kvm, unsigned id);
	320	void (vcpu_free)(struct kvm_vcpu vcpu);
	321	int (vcpu_reset)(struct kvm_vcpu vcpu);
	322
	323	void (prepare_guest_switch)(struct kvm_vcpu vcpu);
	324	void (vcpu_load)(struct kvm_vcpu vcpu, int cpu);
	325	void (vcpu_put)(struct kvm_vcpu vcpu);
	326	void (vcpu_decache)(struct kvm_vcpu vcpu);
	327
	328	int (set_guest_debug)(struct kvm_vcpu vcpu,
	329	struct kvm_debug_guest *dbg);
	330	void (guest_debug_pre)(struct kvm_vcpu vcpu);
	331	int (get_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 *pdata);
	332	int (set_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	333	u64 (get_segment_base)(struct kvm_vcpu vcpu, int seg);
	334	void (get_segment)(struct kvm_vcpu vcpu,
	335	struct kvm_segment *var, int seg);
	336	void (set_segment)(struct kvm_vcpu vcpu,
	337	struct kvm_segment *var, int seg);
	338	void (get_cs_db_l_bits)(struct kvm_vcpu vcpu, int db, int l);
	339	void (decache_cr4_guest_bits)(struct kvm_vcpu vcpu);
	340	void (set_cr0)(struct kvm_vcpu vcpu, unsigned long cr0);
	341	void (set_cr3)(struct kvm_vcpu vcpu, unsigned long cr3);
	342	void (set_cr4)(struct kvm_vcpu vcpu, unsigned long cr4);
	343	void (set_efer)(struct kvm_vcpu vcpu, u64 efer);
	344	void (get_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	345	void (set_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	346	void (get_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	347	void (set_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	348	unsigned long (get_dr)(struct kvm_vcpu vcpu, int dr);
	349	void (set_dr)(struct kvm_vcpu vcpu, int dr, unsigned long value,
	350	int *exception);
	351	void (cache_regs)(struct kvm_vcpu vcpu);
	352	void (decache_regs)(struct kvm_vcpu vcpu);
	353	unsigned long (get_rflags)(struct kvm_vcpu vcpu);
	354	void (set_rflags)(struct kvm_vcpu vcpu, unsigned long rflags);
	355
	356	void (tlb_flush)(struct kvm_vcpu vcpu);
ea4a5ff8	357
ea4a5ff8 ZX	358	void (run)(struct kvm_vcpu vcpu, struct kvm_run *run);
	359	int (handle_exit)(struct kvm_run run, struct kvm_vcpu *vcpu);
	360	void (skip_emulated_instruction)(struct kvm_vcpu vcpu);
	361	void (patch_hypercall)(struct kvm_vcpu vcpu,
	362	unsigned char *hypercall_addr);
	363	int (get_irq)(struct kvm_vcpu vcpu);
	364	void (set_irq)(struct kvm_vcpu vcpu, int vec);
298101da AK	365	void (queue_exception)(struct kvm_vcpu vcpu, unsigned nr,
	366	bool has_error_code, u32 error_code);
	367	bool (exception_injected)(struct kvm_vcpu vcpu);
ea4a5ff8 ZX	368	void (inject_pending_irq)(struct kvm_vcpu vcpu);
	369	void (inject_pending_vectors)(struct kvm_vcpu vcpu,
	370	struct kvm_run *run);
	371
	372	int (set_tss_addr)(struct kvm kvm, unsigned int addr);
	373	};
	374
97896d04 ZX	375	extern struct kvm_x86_ops *kvm_x86_ops;
97896d04 ZX	376
54f1585a ZX	377	int kvm_mmu_module_init(void);
	378	void kvm_mmu_module_exit(void);
	379
	380	void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
	381	int kvm_mmu_create(struct kvm_vcpu *vcpu);
	382	int kvm_mmu_setup(struct kvm_vcpu *vcpu);
	383	void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
	384
	385	int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
	386	void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
	387	void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e	388	unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a ZX	389	void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
	390
	391	enum emulation_result {
	392	EMULATE_DONE, /* no further processing */
	393	EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
	394	EMULATE_FAIL, /* can't emulate this instruction */
	395	};
	396
	397	int emulate_instruction(struct kvm_vcpu vcpu, struct kvm_run run,
	398	unsigned long cr2, u16 error_code, int no_decode);
	399	void kvm_report_emulation_failure(struct kvm_vcpu cvpu, const char context);
	400	void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	401	void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	402	void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
	403	unsigned long *rflags);
	404
	405	unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
	406	void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
	407	unsigned long *rflags);
	408	int kvm_get_msr(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	409	int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	410
	411	struct x86_emulate_ctxt;
	412
	413	int kvm_emulate_pio(struct kvm_vcpu vcpu, struct kvm_run run, int in,
	414	int size, unsigned port);
	415	int kvm_emulate_pio_string(struct kvm_vcpu vcpu, struct kvm_run run, int in,
	416	int size, unsigned long count, int down,
	417	gva_t address, int rep, unsigned port);
	418	void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
	419	int kvm_emulate_halt(struct kvm_vcpu *vcpu);
	420	int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
	421	int emulate_clts(struct kvm_vcpu *vcpu);
	422	int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
	423	unsigned long *dest);
	424	int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
	425	unsigned long value);
	426
	427	void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
	428	void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
	429	void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
	430	void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
	431	unsigned long get_cr8(struct kvm_vcpu *vcpu);
	432	void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
	433	void kvm_get_cs_db_l_bits(struct kvm_vcpu vcpu, int db, int *l);
	434
	435	int kvm_get_msr_common(struct kvm_vcpu vcpu, u32 msr, u64 pdata);
	436	int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
	437
298101da AK	438	void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
298101da AK	439	void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee AK	440	void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
c3c91fee AK	441	u32 error_code);
298101da	442
54f1585a ZX	443	void fx_init(struct kvm_vcpu *vcpu);
	444
	445	int emulator_read_std(unsigned long addr,
	446	void *val,
	447	unsigned int bytes,
	448	struct kvm_vcpu *vcpu);
	449	int emulator_write_emulated(unsigned long addr,
	450	const void *val,
	451	unsigned int bytes,
	452	struct kvm_vcpu *vcpu);
	453
	454	unsigned long segment_base(u16 selector);
	455
d835dfec	456	void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a ZX	457	void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
	458	const u8 *new, int bytes);
	459	int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
	460	void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
	461	int kvm_mmu_load(struct kvm_vcpu *vcpu);
	462	void kvm_mmu_unload(struct kvm_vcpu *vcpu);
	463
	464	int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
	465
	466	int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
	467
3067714c	468	int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec	469
a03490ed	470	int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a	471	int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d ZX	472
	473	static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
	474	{
	475	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
	476
	477	return (struct kvm_mmu_page *)page_private(page);
	478	}
	479
	480	static inline u16 read_fs(void)
	481	{
	482	u16 seg;
	483	asm("mov %%fs, %0" : "=g"(seg));
	484	return seg;
	485	}
	486
	487	static inline u16 read_gs(void)
	488	{
	489	u16 seg;
	490	asm("mov %%gs, %0" : "=g"(seg));
	491	return seg;
	492	}
	493
	494	static inline u16 read_ldt(void)
	495	{
	496	u16 ldt;
	497	asm("sldt %0" : "=g"(ldt));
	498	return ldt;
	499	}
	500
	501	static inline void load_fs(u16 sel)
	502	{
	503	asm("mov %0, %%fs" : : "rm"(sel));
	504	}
	505
	506	static inline void load_gs(u16 sel)
	507	{
	508	asm("mov %0, %%gs" : : "rm"(sel));
	509	}
	510
	511	#ifndef load_ldt
	512	static inline void load_ldt(u16 sel)
	513	{
	514	asm("lldt %0" : : "rm"(sel));
	515	}
	516	#endif
	517
	518	static inline void get_idt(struct descriptor_table *table)
	519	{
	520	asm("sidt %0" : "=m"(*table));
	521	}
	522
	523	static inline void get_gdt(struct descriptor_table *table)
	524	{
	525	asm("sgdt %0" : "=m"(*table));
	526	}
	527
	528	static inline unsigned long read_tr_base(void)
	529	{
	530	u16 tr;
	531	asm("str %0" : "=g"(tr));
	532	return segment_base(tr);
	533	}
	534
	535	#ifdef CONFIG_X86_64
536	static inline unsigned long read_msr(unsigned long msr)
537	{
538	u64 value;
539
540	rdmsrl(msr, value);
541	return value;
542	}
543	#endif
544
545	static inline void fx_save(struct i387_fxsave_struct *image)
546	{
547	asm("fxsave (%0)":: "r" (image));
548	}
549
550	static inline void fx_restore(struct i387_fxsave_struct *image)
551	{
552	asm("fxrstor (%0)":: "r" (image));
553	}
554
555	static inline void fpu_init(void)
556	{
557	asm("finit");
558	}
559
560	static inline u32 get_rdx_init_val(void)
561	{
562	return 0x600; /* P6 family */
563	}
564
c1a5d4f9 AK	565	static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
	566	{
	567	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
	568	}
	569
ec6d273d ZX	570	#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
	571	#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
	572	#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
	573	#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
	574	#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
	575	#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
	576	#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
	577	#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
	578	#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
	579
	580	#define MSR_IA32_TIME_STAMP_COUNTER 0x010
	581
	582	#define TSS_IOPB_BASE_OFFSET 0x66
	583	#define TSS_BASE_SIZE 0x68
	584	#define TSS_IOPB_SIZE (65536 / 8)
	585	#define TSS_REDIRECTION_SIZE (256 / 8)
	586	#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b	587
043405e1	588	#endif