KVM: MMU: Implement guest page fault bypass for nonpae
[linux-2.6-block.git] / drivers / kvm / x86.c
CommitLineData
043405e1
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
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21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
0de10343 27#include <linux/mman.h>
043405e1
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28
29#include <asm/uaccess.h>
d825ed0a 30#include <asm/msr.h>
043405e1 31
313a3dc7 32#define MAX_IO_MSRS 256
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33#define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37#define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 44#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 45
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46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 48
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49struct kvm_x86_ops *kvm_x86_ops;
50
417bc304 51struct kvm_stats_debugfs_item debugfs_entries[] = {
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52 { "pf_fixed", VCPU_STAT(pf_fixed) },
53 { "pf_guest", VCPU_STAT(pf_guest) },
54 { "tlb_flush", VCPU_STAT(tlb_flush) },
55 { "invlpg", VCPU_STAT(invlpg) },
56 { "exits", VCPU_STAT(exits) },
57 { "io_exits", VCPU_STAT(io_exits) },
58 { "mmio_exits", VCPU_STAT(mmio_exits) },
59 { "signal_exits", VCPU_STAT(signal_exits) },
60 { "irq_window", VCPU_STAT(irq_window_exits) },
61 { "halt_exits", VCPU_STAT(halt_exits) },
62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
63 { "request_irq", VCPU_STAT(request_irq_exits) },
64 { "irq_exits", VCPU_STAT(irq_exits) },
65 { "host_state_reload", VCPU_STAT(host_state_reload) },
66 { "efer_reload", VCPU_STAT(efer_reload) },
67 { "fpu_reload", VCPU_STAT(fpu_reload) },
68 { "insn_emulation", VCPU_STAT(insn_emulation) },
69 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
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70 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
71 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
72 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
73 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
74 { "mmu_flooded", VM_STAT(mmu_flooded) },
75 { "mmu_recycled", VM_STAT(mmu_recycled) },
417bc304
HB
76 { NULL }
77};
78
79
5fb76f9b
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80unsigned long segment_base(u16 selector)
81{
82 struct descriptor_table gdt;
83 struct segment_descriptor *d;
84 unsigned long table_base;
85 unsigned long v;
86
87 if (selector == 0)
88 return 0;
89
90 asm("sgdt %0" : "=m"(gdt));
91 table_base = gdt.base;
92
93 if (selector & 4) { /* from ldt */
94 u16 ldt_selector;
95
96 asm("sldt %0" : "=g"(ldt_selector));
97 table_base = segment_base(ldt_selector);
98 }
99 d = (struct segment_descriptor *)(table_base + (selector & ~7));
100 v = d->base_low | ((unsigned long)d->base_mid << 16) |
101 ((unsigned long)d->base_high << 24);
102#ifdef CONFIG_X86_64
103 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
104 v |= ((unsigned long) \
105 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
106#endif
107 return v;
108}
109EXPORT_SYMBOL_GPL(segment_base);
110
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111u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
112{
113 if (irqchip_in_kernel(vcpu->kvm))
114 return vcpu->apic_base;
115 else
116 return vcpu->apic_base;
117}
118EXPORT_SYMBOL_GPL(kvm_get_apic_base);
119
120void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
121{
122 /* TODO: reserve bits check */
123 if (irqchip_in_kernel(vcpu->kvm))
124 kvm_lapic_set_base(vcpu, data);
125 else
126 vcpu->apic_base = data;
127}
128EXPORT_SYMBOL_GPL(kvm_set_apic_base);
129
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130static void inject_gp(struct kvm_vcpu *vcpu)
131{
132 kvm_x86_ops->inject_gp(vcpu, 0);
133}
134
135/*
136 * Load the pae pdptrs. Return true is they are all valid.
137 */
138int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
139{
140 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
141 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
142 int i;
143 int ret;
144 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
145
146 mutex_lock(&vcpu->kvm->lock);
147 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
148 offset * sizeof(u64), sizeof(pdpte));
149 if (ret < 0) {
150 ret = 0;
151 goto out;
152 }
153 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
154 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
155 ret = 0;
156 goto out;
157 }
158 }
159 ret = 1;
160
161 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
162out:
163 mutex_unlock(&vcpu->kvm->lock);
164
165 return ret;
166}
167
168void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
169{
170 if (cr0 & CR0_RESERVED_BITS) {
171 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
172 cr0, vcpu->cr0);
173 inject_gp(vcpu);
174 return;
175 }
176
177 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
178 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
179 inject_gp(vcpu);
180 return;
181 }
182
183 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
184 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
185 "and a clear PE flag\n");
186 inject_gp(vcpu);
187 return;
188 }
189
190 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
191#ifdef CONFIG_X86_64
192 if ((vcpu->shadow_efer & EFER_LME)) {
193 int cs_db, cs_l;
194
195 if (!is_pae(vcpu)) {
196 printk(KERN_DEBUG "set_cr0: #GP, start paging "
197 "in long mode while PAE is disabled\n");
198 inject_gp(vcpu);
199 return;
200 }
201 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
202 if (cs_l) {
203 printk(KERN_DEBUG "set_cr0: #GP, start paging "
204 "in long mode while CS.L == 1\n");
205 inject_gp(vcpu);
206 return;
207
208 }
209 } else
210#endif
211 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
212 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
213 "reserved bits\n");
214 inject_gp(vcpu);
215 return;
216 }
217
218 }
219
220 kvm_x86_ops->set_cr0(vcpu, cr0);
221 vcpu->cr0 = cr0;
222
223 mutex_lock(&vcpu->kvm->lock);
224 kvm_mmu_reset_context(vcpu);
225 mutex_unlock(&vcpu->kvm->lock);
226 return;
227}
228EXPORT_SYMBOL_GPL(set_cr0);
229
230void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
231{
232 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
233}
234EXPORT_SYMBOL_GPL(lmsw);
235
236void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
237{
238 if (cr4 & CR4_RESERVED_BITS) {
239 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
240 inject_gp(vcpu);
241 return;
242 }
243
244 if (is_long_mode(vcpu)) {
245 if (!(cr4 & X86_CR4_PAE)) {
246 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
247 "in long mode\n");
248 inject_gp(vcpu);
249 return;
250 }
251 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
252 && !load_pdptrs(vcpu, vcpu->cr3)) {
253 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
254 inject_gp(vcpu);
255 return;
256 }
257
258 if (cr4 & X86_CR4_VMXE) {
259 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
260 inject_gp(vcpu);
261 return;
262 }
263 kvm_x86_ops->set_cr4(vcpu, cr4);
264 vcpu->cr4 = cr4;
265 mutex_lock(&vcpu->kvm->lock);
266 kvm_mmu_reset_context(vcpu);
267 mutex_unlock(&vcpu->kvm->lock);
268}
269EXPORT_SYMBOL_GPL(set_cr4);
270
271void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
272{
273 if (is_long_mode(vcpu)) {
274 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
275 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
276 inject_gp(vcpu);
277 return;
278 }
279 } else {
280 if (is_pae(vcpu)) {
281 if (cr3 & CR3_PAE_RESERVED_BITS) {
282 printk(KERN_DEBUG
283 "set_cr3: #GP, reserved bits\n");
284 inject_gp(vcpu);
285 return;
286 }
287 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
288 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
289 "reserved bits\n");
290 inject_gp(vcpu);
291 return;
292 }
293 }
294 /*
295 * We don't check reserved bits in nonpae mode, because
296 * this isn't enforced, and VMware depends on this.
297 */
298 }
299
300 mutex_lock(&vcpu->kvm->lock);
301 /*
302 * Does the new cr3 value map to physical memory? (Note, we
303 * catch an invalid cr3 even in real-mode, because it would
304 * cause trouble later on when we turn on paging anyway.)
305 *
306 * A real CPU would silently accept an invalid cr3 and would
307 * attempt to use it - with largely undefined (and often hard
308 * to debug) behavior on the guest side.
309 */
310 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
311 inject_gp(vcpu);
312 else {
313 vcpu->cr3 = cr3;
314 vcpu->mmu.new_cr3(vcpu);
315 }
316 mutex_unlock(&vcpu->kvm->lock);
317}
318EXPORT_SYMBOL_GPL(set_cr3);
319
320void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
321{
322 if (cr8 & CR8_RESERVED_BITS) {
323 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
324 inject_gp(vcpu);
325 return;
326 }
327 if (irqchip_in_kernel(vcpu->kvm))
328 kvm_lapic_set_tpr(vcpu, cr8);
329 else
330 vcpu->cr8 = cr8;
331}
332EXPORT_SYMBOL_GPL(set_cr8);
333
334unsigned long get_cr8(struct kvm_vcpu *vcpu)
335{
336 if (irqchip_in_kernel(vcpu->kvm))
337 return kvm_lapic_get_cr8(vcpu);
338 else
339 return vcpu->cr8;
340}
341EXPORT_SYMBOL_GPL(get_cr8);
342
043405e1
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343/*
344 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
345 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
346 *
347 * This list is modified at module load time to reflect the
348 * capabilities of the host cpu.
349 */
350static u32 msrs_to_save[] = {
351 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
352 MSR_K6_STAR,
353#ifdef CONFIG_X86_64
354 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
355#endif
356 MSR_IA32_TIME_STAMP_COUNTER,
357};
358
359static unsigned num_msrs_to_save;
360
361static u32 emulated_msrs[] = {
362 MSR_IA32_MISC_ENABLE,
363};
364
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365#ifdef CONFIG_X86_64
366
367static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
368{
369 if (efer & EFER_RESERVED_BITS) {
370 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
371 efer);
372 inject_gp(vcpu);
373 return;
374 }
375
376 if (is_paging(vcpu)
377 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
378 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
379 inject_gp(vcpu);
380 return;
381 }
382
383 kvm_x86_ops->set_efer(vcpu, efer);
384
385 efer &= ~EFER_LMA;
386 efer |= vcpu->shadow_efer & EFER_LMA;
387
388 vcpu->shadow_efer = efer;
389}
390
391#endif
392
393/*
394 * Writes msr value into into the appropriate "register".
395 * Returns 0 on success, non-0 otherwise.
396 * Assumes vcpu_load() was already called.
397 */
398int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
399{
400 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
401}
402
313a3dc7
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403/*
404 * Adapt set_msr() to msr_io()'s calling convention
405 */
406static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
407{
408 return kvm_set_msr(vcpu, index, *data);
409}
410
15c4a640
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411
412int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
413{
414 switch (msr) {
415#ifdef CONFIG_X86_64
416 case MSR_EFER:
417 set_efer(vcpu, data);
418 break;
419#endif
420 case MSR_IA32_MC0_STATUS:
421 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
422 __FUNCTION__, data);
423 break;
424 case MSR_IA32_MCG_STATUS:
425 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
426 __FUNCTION__, data);
427 break;
428 case MSR_IA32_UCODE_REV:
429 case MSR_IA32_UCODE_WRITE:
430 case 0x200 ... 0x2ff: /* MTRRs */
431 break;
432 case MSR_IA32_APICBASE:
433 kvm_set_apic_base(vcpu, data);
434 break;
435 case MSR_IA32_MISC_ENABLE:
436 vcpu->ia32_misc_enable_msr = data;
437 break;
438 default:
439 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
440 return 1;
441 }
442 return 0;
443}
444EXPORT_SYMBOL_GPL(kvm_set_msr_common);
445
446
447/*
448 * Reads an msr value (of 'msr_index') into 'pdata'.
449 * Returns 0 on success, non-0 otherwise.
450 * Assumes vcpu_load() was already called.
451 */
452int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
453{
454 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
455}
456
457int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
458{
459 u64 data;
460
461 switch (msr) {
462 case 0xc0010010: /* SYSCFG */
463 case 0xc0010015: /* HWCR */
464 case MSR_IA32_PLATFORM_ID:
465 case MSR_IA32_P5_MC_ADDR:
466 case MSR_IA32_P5_MC_TYPE:
467 case MSR_IA32_MC0_CTL:
468 case MSR_IA32_MCG_STATUS:
469 case MSR_IA32_MCG_CAP:
470 case MSR_IA32_MC0_MISC:
471 case MSR_IA32_MC0_MISC+4:
472 case MSR_IA32_MC0_MISC+8:
473 case MSR_IA32_MC0_MISC+12:
474 case MSR_IA32_MC0_MISC+16:
475 case MSR_IA32_UCODE_REV:
476 case MSR_IA32_PERF_STATUS:
477 case MSR_IA32_EBL_CR_POWERON:
478 /* MTRR registers */
479 case 0xfe:
480 case 0x200 ... 0x2ff:
481 data = 0;
482 break;
483 case 0xcd: /* fsb frequency */
484 data = 3;
485 break;
486 case MSR_IA32_APICBASE:
487 data = kvm_get_apic_base(vcpu);
488 break;
489 case MSR_IA32_MISC_ENABLE:
490 data = vcpu->ia32_misc_enable_msr;
491 break;
492#ifdef CONFIG_X86_64
493 case MSR_EFER:
494 data = vcpu->shadow_efer;
495 break;
496#endif
497 default:
498 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
499 return 1;
500 }
501 *pdata = data;
502 return 0;
503}
504EXPORT_SYMBOL_GPL(kvm_get_msr_common);
505
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506/*
507 * Read or write a bunch of msrs. All parameters are kernel addresses.
508 *
509 * @return number of msrs set successfully.
510 */
511static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
512 struct kvm_msr_entry *entries,
513 int (*do_msr)(struct kvm_vcpu *vcpu,
514 unsigned index, u64 *data))
515{
516 int i;
517
518 vcpu_load(vcpu);
519
520 for (i = 0; i < msrs->nmsrs; ++i)
521 if (do_msr(vcpu, entries[i].index, &entries[i].data))
522 break;
523
524 vcpu_put(vcpu);
525
526 return i;
527}
528
529/*
530 * Read or write a bunch of msrs. Parameters are user addresses.
531 *
532 * @return number of msrs set successfully.
533 */
534static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
535 int (*do_msr)(struct kvm_vcpu *vcpu,
536 unsigned index, u64 *data),
537 int writeback)
538{
539 struct kvm_msrs msrs;
540 struct kvm_msr_entry *entries;
541 int r, n;
542 unsigned size;
543
544 r = -EFAULT;
545 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
546 goto out;
547
548 r = -E2BIG;
549 if (msrs.nmsrs >= MAX_IO_MSRS)
550 goto out;
551
552 r = -ENOMEM;
553 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
554 entries = vmalloc(size);
555 if (!entries)
556 goto out;
557
558 r = -EFAULT;
559 if (copy_from_user(entries, user_msrs->entries, size))
560 goto out_free;
561
562 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
563 if (r < 0)
564 goto out_free;
565
566 r = -EFAULT;
567 if (writeback && copy_to_user(user_msrs->entries, entries, size))
568 goto out_free;
569
570 r = n;
571
572out_free:
573 vfree(entries);
574out:
575 return r;
576}
577
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578/*
579 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
580 * cached on it.
581 */
582void decache_vcpus_on_cpu(int cpu)
583{
584 struct kvm *vm;
585 struct kvm_vcpu *vcpu;
586 int i;
587
588 spin_lock(&kvm_lock);
589 list_for_each_entry(vm, &vm_list, vm_list)
590 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
591 vcpu = vm->vcpus[i];
592 if (!vcpu)
593 continue;
594 /*
595 * If the vcpu is locked, then it is running on some
596 * other cpu and therefore it is not cached on the
597 * cpu in question.
598 *
599 * If it's not locked, check the last cpu it executed
600 * on.
601 */
602 if (mutex_trylock(&vcpu->mutex)) {
603 if (vcpu->cpu == cpu) {
604 kvm_x86_ops->vcpu_decache(vcpu);
605 vcpu->cpu = -1;
606 }
607 mutex_unlock(&vcpu->mutex);
608 }
609 }
610 spin_unlock(&kvm_lock);
611}
612
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613int kvm_dev_ioctl_check_extension(long ext)
614{
615 int r;
616
617 switch (ext) {
618 case KVM_CAP_IRQCHIP:
619 case KVM_CAP_HLT:
620 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
621 case KVM_CAP_USER_MEMORY:
622 case KVM_CAP_SET_TSS_ADDR:
623 r = 1;
624 break;
625 default:
626 r = 0;
627 break;
628 }
629 return r;
630
631}
632
043405e1
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633long kvm_arch_dev_ioctl(struct file *filp,
634 unsigned int ioctl, unsigned long arg)
635{
636 void __user *argp = (void __user *)arg;
637 long r;
638
639 switch (ioctl) {
640 case KVM_GET_MSR_INDEX_LIST: {
641 struct kvm_msr_list __user *user_msr_list = argp;
642 struct kvm_msr_list msr_list;
643 unsigned n;
644
645 r = -EFAULT;
646 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
647 goto out;
648 n = msr_list.nmsrs;
649 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
650 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
651 goto out;
652 r = -E2BIG;
653 if (n < num_msrs_to_save)
654 goto out;
655 r = -EFAULT;
656 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
657 num_msrs_to_save * sizeof(u32)))
658 goto out;
659 if (copy_to_user(user_msr_list->indices
660 + num_msrs_to_save * sizeof(u32),
661 &emulated_msrs,
662 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
663 goto out;
664 r = 0;
665 break;
666 }
667 default:
668 r = -EINVAL;
669 }
670out:
671 return r;
672}
673
313a3dc7
CO
674void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
675{
676 kvm_x86_ops->vcpu_load(vcpu, cpu);
677}
678
679void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
680{
681 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 682 kvm_put_guest_fpu(vcpu);
313a3dc7
CO
683}
684
685static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
686{
687 u64 efer;
688 int i;
689 struct kvm_cpuid_entry *e, *entry;
690
691 rdmsrl(MSR_EFER, efer);
692 entry = NULL;
693 for (i = 0; i < vcpu->cpuid_nent; ++i) {
694 e = &vcpu->cpuid_entries[i];
695 if (e->function == 0x80000001) {
696 entry = e;
697 break;
698 }
699 }
700 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
701 entry->edx &= ~(1 << 20);
702 printk(KERN_INFO "kvm: guest NX capability removed\n");
703 }
704}
705
706static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
707 struct kvm_cpuid *cpuid,
708 struct kvm_cpuid_entry __user *entries)
709{
710 int r;
711
712 r = -E2BIG;
713 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
714 goto out;
715 r = -EFAULT;
716 if (copy_from_user(&vcpu->cpuid_entries, entries,
717 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
718 goto out;
719 vcpu->cpuid_nent = cpuid->nent;
720 cpuid_fix_nx_cap(vcpu);
721 return 0;
722
723out:
724 return r;
725}
726
727static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
728 struct kvm_lapic_state *s)
729{
730 vcpu_load(vcpu);
731 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
732 vcpu_put(vcpu);
733
734 return 0;
735}
736
737static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
738 struct kvm_lapic_state *s)
739{
740 vcpu_load(vcpu);
741 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
742 kvm_apic_post_state_restore(vcpu);
743 vcpu_put(vcpu);
744
745 return 0;
746}
747
748long kvm_arch_vcpu_ioctl(struct file *filp,
749 unsigned int ioctl, unsigned long arg)
750{
751 struct kvm_vcpu *vcpu = filp->private_data;
752 void __user *argp = (void __user *)arg;
753 int r;
754
755 switch (ioctl) {
756 case KVM_GET_LAPIC: {
757 struct kvm_lapic_state lapic;
758
759 memset(&lapic, 0, sizeof lapic);
760 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
761 if (r)
762 goto out;
763 r = -EFAULT;
764 if (copy_to_user(argp, &lapic, sizeof lapic))
765 goto out;
766 r = 0;
767 break;
768 }
769 case KVM_SET_LAPIC: {
770 struct kvm_lapic_state lapic;
771
772 r = -EFAULT;
773 if (copy_from_user(&lapic, argp, sizeof lapic))
774 goto out;
775 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
776 if (r)
777 goto out;
778 r = 0;
779 break;
780 }
781 case KVM_SET_CPUID: {
782 struct kvm_cpuid __user *cpuid_arg = argp;
783 struct kvm_cpuid cpuid;
784
785 r = -EFAULT;
786 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
787 goto out;
788 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
789 if (r)
790 goto out;
791 break;
792 }
793 case KVM_GET_MSRS:
794 r = msr_io(vcpu, argp, kvm_get_msr, 1);
795 break;
796 case KVM_SET_MSRS:
797 r = msr_io(vcpu, argp, do_set_msr, 0);
798 break;
799 default:
800 r = -EINVAL;
801 }
802out:
803 return r;
804}
805
1fe779f8
CO
806static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
807{
808 int ret;
809
810 if (addr > (unsigned int)(-3 * PAGE_SIZE))
811 return -1;
812 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
813 return ret;
814}
815
816static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
817 u32 kvm_nr_mmu_pages)
818{
819 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
820 return -EINVAL;
821
822 mutex_lock(&kvm->lock);
823
824 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
825 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
826
827 mutex_unlock(&kvm->lock);
828 return 0;
829}
830
831static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
832{
833 return kvm->n_alloc_mmu_pages;
834}
835
836/*
837 * Set a new alias region. Aliases map a portion of physical memory into
838 * another portion. This is useful for memory windows, for example the PC
839 * VGA region.
840 */
841static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
842 struct kvm_memory_alias *alias)
843{
844 int r, n;
845 struct kvm_mem_alias *p;
846
847 r = -EINVAL;
848 /* General sanity checks */
849 if (alias->memory_size & (PAGE_SIZE - 1))
850 goto out;
851 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
852 goto out;
853 if (alias->slot >= KVM_ALIAS_SLOTS)
854 goto out;
855 if (alias->guest_phys_addr + alias->memory_size
856 < alias->guest_phys_addr)
857 goto out;
858 if (alias->target_phys_addr + alias->memory_size
859 < alias->target_phys_addr)
860 goto out;
861
862 mutex_lock(&kvm->lock);
863
864 p = &kvm->aliases[alias->slot];
865 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
866 p->npages = alias->memory_size >> PAGE_SHIFT;
867 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
868
869 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
870 if (kvm->aliases[n - 1].npages)
871 break;
872 kvm->naliases = n;
873
874 kvm_mmu_zap_all(kvm);
875
876 mutex_unlock(&kvm->lock);
877
878 return 0;
879
880out:
881 return r;
882}
883
884static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
885{
886 int r;
887
888 r = 0;
889 switch (chip->chip_id) {
890 case KVM_IRQCHIP_PIC_MASTER:
891 memcpy(&chip->chip.pic,
892 &pic_irqchip(kvm)->pics[0],
893 sizeof(struct kvm_pic_state));
894 break;
895 case KVM_IRQCHIP_PIC_SLAVE:
896 memcpy(&chip->chip.pic,
897 &pic_irqchip(kvm)->pics[1],
898 sizeof(struct kvm_pic_state));
899 break;
900 case KVM_IRQCHIP_IOAPIC:
901 memcpy(&chip->chip.ioapic,
902 ioapic_irqchip(kvm),
903 sizeof(struct kvm_ioapic_state));
904 break;
905 default:
906 r = -EINVAL;
907 break;
908 }
909 return r;
910}
911
912static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
913{
914 int r;
915
916 r = 0;
917 switch (chip->chip_id) {
918 case KVM_IRQCHIP_PIC_MASTER:
919 memcpy(&pic_irqchip(kvm)->pics[0],
920 &chip->chip.pic,
921 sizeof(struct kvm_pic_state));
922 break;
923 case KVM_IRQCHIP_PIC_SLAVE:
924 memcpy(&pic_irqchip(kvm)->pics[1],
925 &chip->chip.pic,
926 sizeof(struct kvm_pic_state));
927 break;
928 case KVM_IRQCHIP_IOAPIC:
929 memcpy(ioapic_irqchip(kvm),
930 &chip->chip.ioapic,
931 sizeof(struct kvm_ioapic_state));
932 break;
933 default:
934 r = -EINVAL;
935 break;
936 }
937 kvm_pic_update_irq(pic_irqchip(kvm));
938 return r;
939}
940
5bb064dc
ZX
941/*
942 * Get (and clear) the dirty memory log for a memory slot.
943 */
944int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
945 struct kvm_dirty_log *log)
946{
947 int r;
948 int n;
949 struct kvm_memory_slot *memslot;
950 int is_dirty = 0;
951
952 mutex_lock(&kvm->lock);
953
954 r = kvm_get_dirty_log(kvm, log, &is_dirty);
955 if (r)
956 goto out;
957
958 /* If nothing is dirty, don't bother messing with page tables. */
959 if (is_dirty) {
960 kvm_mmu_slot_remove_write_access(kvm, log->slot);
961 kvm_flush_remote_tlbs(kvm);
962 memslot = &kvm->memslots[log->slot];
963 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
964 memset(memslot->dirty_bitmap, 0, n);
965 }
966 r = 0;
967out:
968 mutex_unlock(&kvm->lock);
969 return r;
970}
971
1fe779f8
CO
972long kvm_arch_vm_ioctl(struct file *filp,
973 unsigned int ioctl, unsigned long arg)
974{
975 struct kvm *kvm = filp->private_data;
976 void __user *argp = (void __user *)arg;
977 int r = -EINVAL;
978
979 switch (ioctl) {
980 case KVM_SET_TSS_ADDR:
981 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
982 if (r < 0)
983 goto out;
984 break;
985 case KVM_SET_MEMORY_REGION: {
986 struct kvm_memory_region kvm_mem;
987 struct kvm_userspace_memory_region kvm_userspace_mem;
988
989 r = -EFAULT;
990 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
991 goto out;
992 kvm_userspace_mem.slot = kvm_mem.slot;
993 kvm_userspace_mem.flags = kvm_mem.flags;
994 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
995 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
996 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
997 if (r)
998 goto out;
999 break;
1000 }
1001 case KVM_SET_NR_MMU_PAGES:
1002 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1003 if (r)
1004 goto out;
1005 break;
1006 case KVM_GET_NR_MMU_PAGES:
1007 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1008 break;
1009 case KVM_SET_MEMORY_ALIAS: {
1010 struct kvm_memory_alias alias;
1011
1012 r = -EFAULT;
1013 if (copy_from_user(&alias, argp, sizeof alias))
1014 goto out;
1015 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1016 if (r)
1017 goto out;
1018 break;
1019 }
1020 case KVM_CREATE_IRQCHIP:
1021 r = -ENOMEM;
1022 kvm->vpic = kvm_create_pic(kvm);
1023 if (kvm->vpic) {
1024 r = kvm_ioapic_init(kvm);
1025 if (r) {
1026 kfree(kvm->vpic);
1027 kvm->vpic = NULL;
1028 goto out;
1029 }
1030 } else
1031 goto out;
1032 break;
1033 case KVM_IRQ_LINE: {
1034 struct kvm_irq_level irq_event;
1035
1036 r = -EFAULT;
1037 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1038 goto out;
1039 if (irqchip_in_kernel(kvm)) {
1040 mutex_lock(&kvm->lock);
1041 if (irq_event.irq < 16)
1042 kvm_pic_set_irq(pic_irqchip(kvm),
1043 irq_event.irq,
1044 irq_event.level);
1045 kvm_ioapic_set_irq(kvm->vioapic,
1046 irq_event.irq,
1047 irq_event.level);
1048 mutex_unlock(&kvm->lock);
1049 r = 0;
1050 }
1051 break;
1052 }
1053 case KVM_GET_IRQCHIP: {
1054 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1055 struct kvm_irqchip chip;
1056
1057 r = -EFAULT;
1058 if (copy_from_user(&chip, argp, sizeof chip))
1059 goto out;
1060 r = -ENXIO;
1061 if (!irqchip_in_kernel(kvm))
1062 goto out;
1063 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1064 if (r)
1065 goto out;
1066 r = -EFAULT;
1067 if (copy_to_user(argp, &chip, sizeof chip))
1068 goto out;
1069 r = 0;
1070 break;
1071 }
1072 case KVM_SET_IRQCHIP: {
1073 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1074 struct kvm_irqchip chip;
1075
1076 r = -EFAULT;
1077 if (copy_from_user(&chip, argp, sizeof chip))
1078 goto out;
1079 r = -ENXIO;
1080 if (!irqchip_in_kernel(kvm))
1081 goto out;
1082 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1083 if (r)
1084 goto out;
1085 r = 0;
1086 break;
1087 }
1088 default:
1089 ;
1090 }
1091out:
1092 return r;
1093}
1094
a16b043c 1095static void kvm_init_msr_list(void)
043405e1
CO
1096{
1097 u32 dummy[2];
1098 unsigned i, j;
1099
1100 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1101 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1102 continue;
1103 if (j < i)
1104 msrs_to_save[j] = msrs_to_save[i];
1105 j++;
1106 }
1107 num_msrs_to_save = j;
1108}
1109
bbd9b64e
CO
1110/*
1111 * Only apic need an MMIO device hook, so shortcut now..
1112 */
1113static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1114 gpa_t addr)
1115{
1116 struct kvm_io_device *dev;
1117
1118 if (vcpu->apic) {
1119 dev = &vcpu->apic->dev;
1120 if (dev->in_range(dev, addr))
1121 return dev;
1122 }
1123 return NULL;
1124}
1125
1126
1127static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1128 gpa_t addr)
1129{
1130 struct kvm_io_device *dev;
1131
1132 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1133 if (dev == NULL)
1134 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1135 return dev;
1136}
1137
1138int emulator_read_std(unsigned long addr,
1139 void *val,
1140 unsigned int bytes,
1141 struct kvm_vcpu *vcpu)
1142{
1143 void *data = val;
1144
1145 while (bytes) {
1146 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1147 unsigned offset = addr & (PAGE_SIZE-1);
1148 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1149 int ret;
1150
1151 if (gpa == UNMAPPED_GVA)
1152 return X86EMUL_PROPAGATE_FAULT;
1153 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1154 if (ret < 0)
1155 return X86EMUL_UNHANDLEABLE;
1156
1157 bytes -= tocopy;
1158 data += tocopy;
1159 addr += tocopy;
1160 }
1161
1162 return X86EMUL_CONTINUE;
1163}
1164EXPORT_SYMBOL_GPL(emulator_read_std);
1165
bbd9b64e
CO
1166static int emulator_read_emulated(unsigned long addr,
1167 void *val,
1168 unsigned int bytes,
1169 struct kvm_vcpu *vcpu)
1170{
1171 struct kvm_io_device *mmio_dev;
1172 gpa_t gpa;
1173
1174 if (vcpu->mmio_read_completed) {
1175 memcpy(val, vcpu->mmio_data, bytes);
1176 vcpu->mmio_read_completed = 0;
1177 return X86EMUL_CONTINUE;
1178 }
1179
1180 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1181
1182 /* For APIC access vmexit */
1183 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1184 goto mmio;
1185
1186 if (emulator_read_std(addr, val, bytes, vcpu)
1187 == X86EMUL_CONTINUE)
1188 return X86EMUL_CONTINUE;
1189 if (gpa == UNMAPPED_GVA)
1190 return X86EMUL_PROPAGATE_FAULT;
1191
1192mmio:
1193 /*
1194 * Is this MMIO handled locally?
1195 */
1196 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1197 if (mmio_dev) {
1198 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1199 return X86EMUL_CONTINUE;
1200 }
1201
1202 vcpu->mmio_needed = 1;
1203 vcpu->mmio_phys_addr = gpa;
1204 vcpu->mmio_size = bytes;
1205 vcpu->mmio_is_write = 0;
1206
1207 return X86EMUL_UNHANDLEABLE;
1208}
1209
1210static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1211 const void *val, int bytes)
1212{
1213 int ret;
1214
1215 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1216 if (ret < 0)
1217 return 0;
1218 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1219 return 1;
1220}
1221
1222static int emulator_write_emulated_onepage(unsigned long addr,
1223 const void *val,
1224 unsigned int bytes,
1225 struct kvm_vcpu *vcpu)
1226{
1227 struct kvm_io_device *mmio_dev;
1228 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1229
1230 if (gpa == UNMAPPED_GVA) {
1231 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1232 return X86EMUL_PROPAGATE_FAULT;
1233 }
1234
1235 /* For APIC access vmexit */
1236 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1237 goto mmio;
1238
1239 if (emulator_write_phys(vcpu, gpa, val, bytes))
1240 return X86EMUL_CONTINUE;
1241
1242mmio:
1243 /*
1244 * Is this MMIO handled locally?
1245 */
1246 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1247 if (mmio_dev) {
1248 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1249 return X86EMUL_CONTINUE;
1250 }
1251
1252 vcpu->mmio_needed = 1;
1253 vcpu->mmio_phys_addr = gpa;
1254 vcpu->mmio_size = bytes;
1255 vcpu->mmio_is_write = 1;
1256 memcpy(vcpu->mmio_data, val, bytes);
1257
1258 return X86EMUL_CONTINUE;
1259}
1260
1261int emulator_write_emulated(unsigned long addr,
1262 const void *val,
1263 unsigned int bytes,
1264 struct kvm_vcpu *vcpu)
1265{
1266 /* Crossing a page boundary? */
1267 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1268 int rc, now;
1269
1270 now = -addr & ~PAGE_MASK;
1271 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1272 if (rc != X86EMUL_CONTINUE)
1273 return rc;
1274 addr += now;
1275 val += now;
1276 bytes -= now;
1277 }
1278 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1279}
1280EXPORT_SYMBOL_GPL(emulator_write_emulated);
1281
1282static int emulator_cmpxchg_emulated(unsigned long addr,
1283 const void *old,
1284 const void *new,
1285 unsigned int bytes,
1286 struct kvm_vcpu *vcpu)
1287{
1288 static int reported;
1289
1290 if (!reported) {
1291 reported = 1;
1292 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1293 }
1294 return emulator_write_emulated(addr, new, bytes, vcpu);
1295}
1296
1297static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1298{
1299 return kvm_x86_ops->get_segment_base(vcpu, seg);
1300}
1301
1302int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1303{
1304 return X86EMUL_CONTINUE;
1305}
1306
1307int emulate_clts(struct kvm_vcpu *vcpu)
1308{
1309 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1310 return X86EMUL_CONTINUE;
1311}
1312
1313int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1314{
1315 struct kvm_vcpu *vcpu = ctxt->vcpu;
1316
1317 switch (dr) {
1318 case 0 ... 3:
1319 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1320 return X86EMUL_CONTINUE;
1321 default:
1322 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1323 return X86EMUL_UNHANDLEABLE;
1324 }
1325}
1326
1327int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1328{
1329 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1330 int exception;
1331
1332 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1333 if (exception) {
1334 /* FIXME: better handling */
1335 return X86EMUL_UNHANDLEABLE;
1336 }
1337 return X86EMUL_CONTINUE;
1338}
1339
1340void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1341{
1342 static int reported;
1343 u8 opcodes[4];
1344 unsigned long rip = vcpu->rip;
1345 unsigned long rip_linear;
1346
1347 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1348
1349 if (reported)
1350 return;
1351
1352 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1353
1354 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1355 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1356 reported = 1;
1357}
1358EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1359
1360struct x86_emulate_ops emulate_ops = {
1361 .read_std = emulator_read_std,
bbd9b64e
CO
1362 .read_emulated = emulator_read_emulated,
1363 .write_emulated = emulator_write_emulated,
1364 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1365};
1366
1367int emulate_instruction(struct kvm_vcpu *vcpu,
1368 struct kvm_run *run,
1369 unsigned long cr2,
1370 u16 error_code,
1371 int no_decode)
1372{
1373 int r;
1374
1375 vcpu->mmio_fault_cr2 = cr2;
1376 kvm_x86_ops->cache_regs(vcpu);
1377
1378 vcpu->mmio_is_write = 0;
1379 vcpu->pio.string = 0;
1380
1381 if (!no_decode) {
1382 int cs_db, cs_l;
1383 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1384
1385 vcpu->emulate_ctxt.vcpu = vcpu;
1386 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1387 vcpu->emulate_ctxt.cr2 = cr2;
1388 vcpu->emulate_ctxt.mode =
1389 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1390 ? X86EMUL_MODE_REAL : cs_l
1391 ? X86EMUL_MODE_PROT64 : cs_db
1392 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1393
1394 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1395 vcpu->emulate_ctxt.cs_base = 0;
1396 vcpu->emulate_ctxt.ds_base = 0;
1397 vcpu->emulate_ctxt.es_base = 0;
1398 vcpu->emulate_ctxt.ss_base = 0;
1399 } else {
1400 vcpu->emulate_ctxt.cs_base =
1401 get_segment_base(vcpu, VCPU_SREG_CS);
1402 vcpu->emulate_ctxt.ds_base =
1403 get_segment_base(vcpu, VCPU_SREG_DS);
1404 vcpu->emulate_ctxt.es_base =
1405 get_segment_base(vcpu, VCPU_SREG_ES);
1406 vcpu->emulate_ctxt.ss_base =
1407 get_segment_base(vcpu, VCPU_SREG_SS);
1408 }
1409
1410 vcpu->emulate_ctxt.gs_base =
1411 get_segment_base(vcpu, VCPU_SREG_GS);
1412 vcpu->emulate_ctxt.fs_base =
1413 get_segment_base(vcpu, VCPU_SREG_FS);
1414
1415 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
f2b5756b 1416 ++vcpu->stat.insn_emulation;
bbd9b64e 1417 if (r) {
f2b5756b 1418 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO
1419 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1420 return EMULATE_DONE;
1421 return EMULATE_FAIL;
1422 }
1423 }
1424
1425 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1426
1427 if (vcpu->pio.string)
1428 return EMULATE_DO_MMIO;
1429
1430 if ((r || vcpu->mmio_is_write) && run) {
1431 run->exit_reason = KVM_EXIT_MMIO;
1432 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1433 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1434 run->mmio.len = vcpu->mmio_size;
1435 run->mmio.is_write = vcpu->mmio_is_write;
1436 }
1437
1438 if (r) {
1439 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1440 return EMULATE_DONE;
1441 if (!vcpu->mmio_needed) {
1442 kvm_report_emulation_failure(vcpu, "mmio");
1443 return EMULATE_FAIL;
1444 }
1445 return EMULATE_DO_MMIO;
1446 }
1447
1448 kvm_x86_ops->decache_regs(vcpu);
1449 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1450
1451 if (vcpu->mmio_is_write) {
1452 vcpu->mmio_needed = 0;
1453 return EMULATE_DO_MMIO;
1454 }
1455
1456 return EMULATE_DONE;
1457}
1458EXPORT_SYMBOL_GPL(emulate_instruction);
1459
de7d789a
CO
1460static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1461{
1462 int i;
1463
1464 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1465 if (vcpu->pio.guest_pages[i]) {
b4231d61 1466 kvm_release_page_dirty(vcpu->pio.guest_pages[i]);
de7d789a
CO
1467 vcpu->pio.guest_pages[i] = NULL;
1468 }
1469}
1470
1471static int pio_copy_data(struct kvm_vcpu *vcpu)
1472{
1473 void *p = vcpu->pio_data;
1474 void *q;
1475 unsigned bytes;
1476 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1477
1478 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1479 PAGE_KERNEL);
1480 if (!q) {
1481 free_pio_guest_pages(vcpu);
1482 return -ENOMEM;
1483 }
1484 q += vcpu->pio.guest_page_offset;
1485 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1486 if (vcpu->pio.in)
1487 memcpy(q, p, bytes);
1488 else
1489 memcpy(p, q, bytes);
1490 q -= vcpu->pio.guest_page_offset;
1491 vunmap(q);
1492 free_pio_guest_pages(vcpu);
1493 return 0;
1494}
1495
1496int complete_pio(struct kvm_vcpu *vcpu)
1497{
1498 struct kvm_pio_request *io = &vcpu->pio;
1499 long delta;
1500 int r;
1501
1502 kvm_x86_ops->cache_regs(vcpu);
1503
1504 if (!io->string) {
1505 if (io->in)
1506 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1507 io->size);
1508 } else {
1509 if (io->in) {
1510 r = pio_copy_data(vcpu);
1511 if (r) {
1512 kvm_x86_ops->cache_regs(vcpu);
1513 return r;
1514 }
1515 }
1516
1517 delta = 1;
1518 if (io->rep) {
1519 delta *= io->cur_count;
1520 /*
1521 * The size of the register should really depend on
1522 * current address size.
1523 */
1524 vcpu->regs[VCPU_REGS_RCX] -= delta;
1525 }
1526 if (io->down)
1527 delta = -delta;
1528 delta *= io->size;
1529 if (io->in)
1530 vcpu->regs[VCPU_REGS_RDI] += delta;
1531 else
1532 vcpu->regs[VCPU_REGS_RSI] += delta;
1533 }
1534
1535 kvm_x86_ops->decache_regs(vcpu);
1536
1537 io->count -= io->cur_count;
1538 io->cur_count = 0;
1539
1540 return 0;
1541}
1542
1543static void kernel_pio(struct kvm_io_device *pio_dev,
1544 struct kvm_vcpu *vcpu,
1545 void *pd)
1546{
1547 /* TODO: String I/O for in kernel device */
1548
1549 mutex_lock(&vcpu->kvm->lock);
1550 if (vcpu->pio.in)
1551 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1552 vcpu->pio.size,
1553 pd);
1554 else
1555 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1556 vcpu->pio.size,
1557 pd);
1558 mutex_unlock(&vcpu->kvm->lock);
1559}
1560
1561static void pio_string_write(struct kvm_io_device *pio_dev,
1562 struct kvm_vcpu *vcpu)
1563{
1564 struct kvm_pio_request *io = &vcpu->pio;
1565 void *pd = vcpu->pio_data;
1566 int i;
1567
1568 mutex_lock(&vcpu->kvm->lock);
1569 for (i = 0; i < io->cur_count; i++) {
1570 kvm_iodevice_write(pio_dev, io->port,
1571 io->size,
1572 pd);
1573 pd += io->size;
1574 }
1575 mutex_unlock(&vcpu->kvm->lock);
1576}
1577
1578static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1579 gpa_t addr)
1580{
1581 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1582}
1583
1584int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1585 int size, unsigned port)
1586{
1587 struct kvm_io_device *pio_dev;
1588
1589 vcpu->run->exit_reason = KVM_EXIT_IO;
1590 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1591 vcpu->run->io.size = vcpu->pio.size = size;
1592 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1593 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1594 vcpu->run->io.port = vcpu->pio.port = port;
1595 vcpu->pio.in = in;
1596 vcpu->pio.string = 0;
1597 vcpu->pio.down = 0;
1598 vcpu->pio.guest_page_offset = 0;
1599 vcpu->pio.rep = 0;
1600
1601 kvm_x86_ops->cache_regs(vcpu);
1602 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1603 kvm_x86_ops->decache_regs(vcpu);
1604
1605 kvm_x86_ops->skip_emulated_instruction(vcpu);
1606
1607 pio_dev = vcpu_find_pio_dev(vcpu, port);
1608 if (pio_dev) {
1609 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1610 complete_pio(vcpu);
1611 return 1;
1612 }
1613 return 0;
1614}
1615EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1616
1617int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1618 int size, unsigned long count, int down,
1619 gva_t address, int rep, unsigned port)
1620{
1621 unsigned now, in_page;
1622 int i, ret = 0;
1623 int nr_pages = 1;
1624 struct page *page;
1625 struct kvm_io_device *pio_dev;
1626
1627 vcpu->run->exit_reason = KVM_EXIT_IO;
1628 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1629 vcpu->run->io.size = vcpu->pio.size = size;
1630 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1631 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1632 vcpu->run->io.port = vcpu->pio.port = port;
1633 vcpu->pio.in = in;
1634 vcpu->pio.string = 1;
1635 vcpu->pio.down = down;
1636 vcpu->pio.guest_page_offset = offset_in_page(address);
1637 vcpu->pio.rep = rep;
1638
1639 if (!count) {
1640 kvm_x86_ops->skip_emulated_instruction(vcpu);
1641 return 1;
1642 }
1643
1644 if (!down)
1645 in_page = PAGE_SIZE - offset_in_page(address);
1646 else
1647 in_page = offset_in_page(address) + size;
1648 now = min(count, (unsigned long)in_page / size);
1649 if (!now) {
1650 /*
1651 * String I/O straddles page boundary. Pin two guest pages
1652 * so that we satisfy atomicity constraints. Do just one
1653 * transaction to avoid complexity.
1654 */
1655 nr_pages = 2;
1656 now = 1;
1657 }
1658 if (down) {
1659 /*
1660 * String I/O in reverse. Yuck. Kill the guest, fix later.
1661 */
1662 pr_unimpl(vcpu, "guest string pio down\n");
1663 inject_gp(vcpu);
1664 return 1;
1665 }
1666 vcpu->run->io.count = now;
1667 vcpu->pio.cur_count = now;
1668
1669 if (vcpu->pio.cur_count == vcpu->pio.count)
1670 kvm_x86_ops->skip_emulated_instruction(vcpu);
1671
1672 for (i = 0; i < nr_pages; ++i) {
1673 mutex_lock(&vcpu->kvm->lock);
1674 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1675 vcpu->pio.guest_pages[i] = page;
1676 mutex_unlock(&vcpu->kvm->lock);
1677 if (!page) {
1678 inject_gp(vcpu);
1679 free_pio_guest_pages(vcpu);
1680 return 1;
1681 }
1682 }
1683
1684 pio_dev = vcpu_find_pio_dev(vcpu, port);
1685 if (!vcpu->pio.in) {
1686 /* string PIO write */
1687 ret = pio_copy_data(vcpu);
1688 if (ret >= 0 && pio_dev) {
1689 pio_string_write(pio_dev, vcpu);
1690 complete_pio(vcpu);
1691 if (vcpu->pio.count == 0)
1692 ret = 1;
1693 }
1694 } else if (pio_dev)
1695 pr_unimpl(vcpu, "no string pio read support yet, "
1696 "port %x size %d count %ld\n",
1697 port, size, count);
1698
1699 return ret;
1700}
1701EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1702
f8c16bba 1703int kvm_arch_init(void *opaque)
043405e1 1704{
56c6d28a 1705 int r;
f8c16bba
ZX
1706 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
1707
56c6d28a
ZX
1708 r = kvm_mmu_module_init();
1709 if (r)
1710 goto out_fail;
1711
043405e1 1712 kvm_init_msr_list();
f8c16bba
ZX
1713
1714 if (kvm_x86_ops) {
1715 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX
1716 r = -EEXIST;
1717 goto out;
f8c16bba
ZX
1718 }
1719
1720 if (!ops->cpu_has_kvm_support()) {
1721 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX
1722 r = -EOPNOTSUPP;
1723 goto out;
f8c16bba
ZX
1724 }
1725 if (ops->disabled_by_bios()) {
1726 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX
1727 r = -EOPNOTSUPP;
1728 goto out;
f8c16bba
ZX
1729 }
1730
1731 kvm_x86_ops = ops;
56c6d28a 1732 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 1733 return 0;
56c6d28a
ZX
1734
1735out:
1736 kvm_mmu_module_exit();
1737out_fail:
1738 return r;
043405e1 1739}
8776e519 1740
f8c16bba
ZX
1741void kvm_arch_exit(void)
1742{
1743 kvm_x86_ops = NULL;
56c6d28a
ZX
1744 kvm_mmu_module_exit();
1745}
f8c16bba 1746
8776e519
HB
1747int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1748{
1749 ++vcpu->stat.halt_exits;
1750 if (irqchip_in_kernel(vcpu->kvm)) {
1751 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1752 kvm_vcpu_block(vcpu);
1753 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1754 return -EINTR;
1755 return 1;
1756 } else {
1757 vcpu->run->exit_reason = KVM_EXIT_HLT;
1758 return 0;
1759 }
1760}
1761EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1762
1763int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1764{
1765 unsigned long nr, a0, a1, a2, a3, ret;
1766
1767 kvm_x86_ops->cache_regs(vcpu);
1768
1769 nr = vcpu->regs[VCPU_REGS_RAX];
1770 a0 = vcpu->regs[VCPU_REGS_RBX];
1771 a1 = vcpu->regs[VCPU_REGS_RCX];
1772 a2 = vcpu->regs[VCPU_REGS_RDX];
1773 a3 = vcpu->regs[VCPU_REGS_RSI];
1774
1775 if (!is_long_mode(vcpu)) {
1776 nr &= 0xFFFFFFFF;
1777 a0 &= 0xFFFFFFFF;
1778 a1 &= 0xFFFFFFFF;
1779 a2 &= 0xFFFFFFFF;
1780 a3 &= 0xFFFFFFFF;
1781 }
1782
1783 switch (nr) {
1784 default:
1785 ret = -KVM_ENOSYS;
1786 break;
1787 }
1788 vcpu->regs[VCPU_REGS_RAX] = ret;
1789 kvm_x86_ops->decache_regs(vcpu);
1790 return 0;
1791}
1792EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1793
1794int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1795{
1796 char instruction[3];
1797 int ret = 0;
1798
1799 mutex_lock(&vcpu->kvm->lock);
1800
1801 /*
1802 * Blow out the MMU to ensure that no other VCPU has an active mapping
1803 * to ensure that the updated hypercall appears atomically across all
1804 * VCPUs.
1805 */
1806 kvm_mmu_zap_all(vcpu->kvm);
1807
1808 kvm_x86_ops->cache_regs(vcpu);
1809 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1810 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1811 != X86EMUL_CONTINUE)
1812 ret = -EFAULT;
1813
1814 mutex_unlock(&vcpu->kvm->lock);
1815
1816 return ret;
1817}
1818
1819static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1820{
1821 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1822}
1823
1824void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1825{
1826 struct descriptor_table dt = { limit, base };
1827
1828 kvm_x86_ops->set_gdt(vcpu, &dt);
1829}
1830
1831void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1832{
1833 struct descriptor_table dt = { limit, base };
1834
1835 kvm_x86_ops->set_idt(vcpu, &dt);
1836}
1837
1838void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1839 unsigned long *rflags)
1840{
1841 lmsw(vcpu, msw);
1842 *rflags = kvm_x86_ops->get_rflags(vcpu);
1843}
1844
1845unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1846{
1847 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1848 switch (cr) {
1849 case 0:
1850 return vcpu->cr0;
1851 case 2:
1852 return vcpu->cr2;
1853 case 3:
1854 return vcpu->cr3;
1855 case 4:
1856 return vcpu->cr4;
1857 default:
1858 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1859 return 0;
1860 }
1861}
1862
1863void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1864 unsigned long *rflags)
1865{
1866 switch (cr) {
1867 case 0:
1868 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1869 *rflags = kvm_x86_ops->get_rflags(vcpu);
1870 break;
1871 case 2:
1872 vcpu->cr2 = val;
1873 break;
1874 case 3:
1875 set_cr3(vcpu, val);
1876 break;
1877 case 4:
1878 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1879 break;
1880 default:
1881 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1882 }
1883}
1884
1885void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1886{
1887 int i;
1888 u32 function;
1889 struct kvm_cpuid_entry *e, *best;
1890
1891 kvm_x86_ops->cache_regs(vcpu);
1892 function = vcpu->regs[VCPU_REGS_RAX];
1893 vcpu->regs[VCPU_REGS_RAX] = 0;
1894 vcpu->regs[VCPU_REGS_RBX] = 0;
1895 vcpu->regs[VCPU_REGS_RCX] = 0;
1896 vcpu->regs[VCPU_REGS_RDX] = 0;
1897 best = NULL;
1898 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1899 e = &vcpu->cpuid_entries[i];
1900 if (e->function == function) {
1901 best = e;
1902 break;
1903 }
1904 /*
1905 * Both basic or both extended?
1906 */
1907 if (((e->function ^ function) & 0x80000000) == 0)
1908 if (!best || e->function > best->function)
1909 best = e;
1910 }
1911 if (best) {
1912 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1913 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1914 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1915 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1916 }
1917 kvm_x86_ops->decache_regs(vcpu);
1918 kvm_x86_ops->skip_emulated_instruction(vcpu);
1919}
1920EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1921
b6c7a5dc
HB
1922/*
1923 * Check if userspace requested an interrupt window, and that the
1924 * interrupt window is open.
1925 *
1926 * No need to exit to userspace if we already have an interrupt queued.
1927 */
1928static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1929 struct kvm_run *kvm_run)
1930{
1931 return (!vcpu->irq_summary &&
1932 kvm_run->request_interrupt_window &&
1933 vcpu->interrupt_window_open &&
1934 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1935}
1936
1937static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1938 struct kvm_run *kvm_run)
1939{
1940 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1941 kvm_run->cr8 = get_cr8(vcpu);
1942 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1943 if (irqchip_in_kernel(vcpu->kvm))
1944 kvm_run->ready_for_interrupt_injection = 1;
1945 else
1946 kvm_run->ready_for_interrupt_injection =
1947 (vcpu->interrupt_window_open &&
1948 vcpu->irq_summary == 0);
1949}
1950
1951static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1952{
1953 int r;
1954
1955 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1956 pr_debug("vcpu %d received sipi with vector # %x\n",
1957 vcpu->vcpu_id, vcpu->sipi_vector);
1958 kvm_lapic_reset(vcpu);
1959 r = kvm_x86_ops->vcpu_reset(vcpu);
1960 if (r)
1961 return r;
1962 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1963 }
1964
1965preempted:
1966 if (vcpu->guest_debug.enabled)
1967 kvm_x86_ops->guest_debug_pre(vcpu);
1968
1969again:
1970 r = kvm_mmu_reload(vcpu);
1971 if (unlikely(r))
1972 goto out;
1973
1974 kvm_inject_pending_timer_irqs(vcpu);
1975
1976 preempt_disable();
1977
1978 kvm_x86_ops->prepare_guest_switch(vcpu);
1979 kvm_load_guest_fpu(vcpu);
1980
1981 local_irq_disable();
1982
1983 if (signal_pending(current)) {
1984 local_irq_enable();
1985 preempt_enable();
1986 r = -EINTR;
1987 kvm_run->exit_reason = KVM_EXIT_INTR;
1988 ++vcpu->stat.signal_exits;
1989 goto out;
1990 }
1991
1992 if (irqchip_in_kernel(vcpu->kvm))
1993 kvm_x86_ops->inject_pending_irq(vcpu);
1994 else if (!vcpu->mmio_read_completed)
1995 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
1996
1997 vcpu->guest_mode = 1;
1998 kvm_guest_enter();
1999
2000 if (vcpu->requests)
2001 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2002 kvm_x86_ops->tlb_flush(vcpu);
2003
2004 kvm_x86_ops->run(vcpu, kvm_run);
2005
2006 vcpu->guest_mode = 0;
2007 local_irq_enable();
2008
2009 ++vcpu->stat.exits;
2010
2011 /*
2012 * We must have an instruction between local_irq_enable() and
2013 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2014 * the interrupt shadow. The stat.exits increment will do nicely.
2015 * But we need to prevent reordering, hence this barrier():
2016 */
2017 barrier();
2018
2019 kvm_guest_exit();
2020
2021 preempt_enable();
2022
2023 /*
2024 * Profile KVM exit RIPs:
2025 */
2026 if (unlikely(prof_on == KVM_PROFILING)) {
2027 kvm_x86_ops->cache_regs(vcpu);
2028 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
2029 }
2030
2031 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2032
2033 if (r > 0) {
2034 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2035 r = -EINTR;
2036 kvm_run->exit_reason = KVM_EXIT_INTR;
2037 ++vcpu->stat.request_irq_exits;
2038 goto out;
2039 }
e1beb1d3 2040 if (!need_resched())
b6c7a5dc 2041 goto again;
b6c7a5dc
HB
2042 }
2043
2044out:
2045 if (r > 0) {
2046 kvm_resched(vcpu);
2047 goto preempted;
2048 }
2049
2050 post_kvm_run_save(vcpu, kvm_run);
2051
2052 return r;
2053}
2054
2055int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2056{
2057 int r;
2058 sigset_t sigsaved;
2059
2060 vcpu_load(vcpu);
2061
2062 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2063 kvm_vcpu_block(vcpu);
2064 vcpu_put(vcpu);
2065 return -EAGAIN;
2066 }
2067
2068 if (vcpu->sigset_active)
2069 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2070
2071 /* re-sync apic's tpr */
2072 if (!irqchip_in_kernel(vcpu->kvm))
2073 set_cr8(vcpu, kvm_run->cr8);
2074
2075 if (vcpu->pio.cur_count) {
2076 r = complete_pio(vcpu);
2077 if (r)
2078 goto out;
2079 }
2080#if CONFIG_HAS_IOMEM
2081 if (vcpu->mmio_needed) {
2082 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2083 vcpu->mmio_read_completed = 1;
2084 vcpu->mmio_needed = 0;
2085 r = emulate_instruction(vcpu, kvm_run,
2086 vcpu->mmio_fault_cr2, 0, 1);
2087 if (r == EMULATE_DO_MMIO) {
2088 /*
2089 * Read-modify-write. Back to userspace.
2090 */
2091 r = 0;
2092 goto out;
2093 }
2094 }
2095#endif
2096 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2097 kvm_x86_ops->cache_regs(vcpu);
2098 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2099 kvm_x86_ops->decache_regs(vcpu);
2100 }
2101
2102 r = __vcpu_run(vcpu, kvm_run);
2103
2104out:
2105 if (vcpu->sigset_active)
2106 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2107
2108 vcpu_put(vcpu);
2109 return r;
2110}
2111
2112int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2113{
2114 vcpu_load(vcpu);
2115
2116 kvm_x86_ops->cache_regs(vcpu);
2117
2118 regs->rax = vcpu->regs[VCPU_REGS_RAX];
2119 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
2120 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
2121 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
2122 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
2123 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
2124 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
2125 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
2126#ifdef CONFIG_X86_64
2127 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2128 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2129 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2130 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2131 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2132 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2133 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2134 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2135#endif
2136
2137 regs->rip = vcpu->rip;
2138 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2139
2140 /*
2141 * Don't leak debug flags in case they were set for guest debugging
2142 */
2143 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2144 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2145
2146 vcpu_put(vcpu);
2147
2148 return 0;
2149}
2150
2151int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2152{
2153 vcpu_load(vcpu);
2154
2155 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2156 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2157 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2158 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2159 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2160 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2161 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2162 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2163#ifdef CONFIG_X86_64
2164 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2165 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2166 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2167 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2168 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2169 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2170 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2171 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2172#endif
2173
2174 vcpu->rip = regs->rip;
2175 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2176
2177 kvm_x86_ops->decache_regs(vcpu);
2178
2179 vcpu_put(vcpu);
2180
2181 return 0;
2182}
2183
2184static void get_segment(struct kvm_vcpu *vcpu,
2185 struct kvm_segment *var, int seg)
2186{
2187 return kvm_x86_ops->get_segment(vcpu, var, seg);
2188}
2189
2190void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2191{
2192 struct kvm_segment cs;
2193
2194 get_segment(vcpu, &cs, VCPU_SREG_CS);
2195 *db = cs.db;
2196 *l = cs.l;
2197}
2198EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2199
2200int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2201 struct kvm_sregs *sregs)
2202{
2203 struct descriptor_table dt;
2204 int pending_vec;
2205
2206 vcpu_load(vcpu);
2207
2208 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2209 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2210 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2211 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2212 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2213 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2214
2215 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2216 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2217
2218 kvm_x86_ops->get_idt(vcpu, &dt);
2219 sregs->idt.limit = dt.limit;
2220 sregs->idt.base = dt.base;
2221 kvm_x86_ops->get_gdt(vcpu, &dt);
2222 sregs->gdt.limit = dt.limit;
2223 sregs->gdt.base = dt.base;
2224
2225 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2226 sregs->cr0 = vcpu->cr0;
2227 sregs->cr2 = vcpu->cr2;
2228 sregs->cr3 = vcpu->cr3;
2229 sregs->cr4 = vcpu->cr4;
2230 sregs->cr8 = get_cr8(vcpu);
2231 sregs->efer = vcpu->shadow_efer;
2232 sregs->apic_base = kvm_get_apic_base(vcpu);
2233
2234 if (irqchip_in_kernel(vcpu->kvm)) {
2235 memset(sregs->interrupt_bitmap, 0,
2236 sizeof sregs->interrupt_bitmap);
2237 pending_vec = kvm_x86_ops->get_irq(vcpu);
2238 if (pending_vec >= 0)
2239 set_bit(pending_vec,
2240 (unsigned long *)sregs->interrupt_bitmap);
2241 } else
2242 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2243 sizeof sregs->interrupt_bitmap);
2244
2245 vcpu_put(vcpu);
2246
2247 return 0;
2248}
2249
2250static void set_segment(struct kvm_vcpu *vcpu,
2251 struct kvm_segment *var, int seg)
2252{
2253 return kvm_x86_ops->set_segment(vcpu, var, seg);
2254}
2255
2256int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2257 struct kvm_sregs *sregs)
2258{
2259 int mmu_reset_needed = 0;
2260 int i, pending_vec, max_bits;
2261 struct descriptor_table dt;
2262
2263 vcpu_load(vcpu);
2264
2265 dt.limit = sregs->idt.limit;
2266 dt.base = sregs->idt.base;
2267 kvm_x86_ops->set_idt(vcpu, &dt);
2268 dt.limit = sregs->gdt.limit;
2269 dt.base = sregs->gdt.base;
2270 kvm_x86_ops->set_gdt(vcpu, &dt);
2271
2272 vcpu->cr2 = sregs->cr2;
2273 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2274 vcpu->cr3 = sregs->cr3;
2275
2276 set_cr8(vcpu, sregs->cr8);
2277
2278 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2279#ifdef CONFIG_X86_64
2280 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2281#endif
2282 kvm_set_apic_base(vcpu, sregs->apic_base);
2283
2284 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2285
2286 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2287 vcpu->cr0 = sregs->cr0;
2288 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2289
2290 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2291 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2292 if (!is_long_mode(vcpu) && is_pae(vcpu))
2293 load_pdptrs(vcpu, vcpu->cr3);
2294
2295 if (mmu_reset_needed)
2296 kvm_mmu_reset_context(vcpu);
2297
2298 if (!irqchip_in_kernel(vcpu->kvm)) {
2299 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2300 sizeof vcpu->irq_pending);
2301 vcpu->irq_summary = 0;
2302 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2303 if (vcpu->irq_pending[i])
2304 __set_bit(i, &vcpu->irq_summary);
2305 } else {
2306 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2307 pending_vec = find_first_bit(
2308 (const unsigned long *)sregs->interrupt_bitmap,
2309 max_bits);
2310 /* Only pending external irq is handled here */
2311 if (pending_vec < max_bits) {
2312 kvm_x86_ops->set_irq(vcpu, pending_vec);
2313 pr_debug("Set back pending irq %d\n",
2314 pending_vec);
2315 }
2316 }
2317
2318 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2319 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2320 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2321 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2322 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2323 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2324
2325 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2326 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2327
2328 vcpu_put(vcpu);
2329
2330 return 0;
2331}
2332
2333int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2334 struct kvm_debug_guest *dbg)
2335{
2336 int r;
2337
2338 vcpu_load(vcpu);
2339
2340 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2341
2342 vcpu_put(vcpu);
2343
2344 return r;
2345}
2346
d0752060
HB
2347/*
2348 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2349 * we have asm/x86/processor.h
2350 */
2351struct fxsave {
2352 u16 cwd;
2353 u16 swd;
2354 u16 twd;
2355 u16 fop;
2356 u64 rip;
2357 u64 rdp;
2358 u32 mxcsr;
2359 u32 mxcsr_mask;
2360 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2361#ifdef CONFIG_X86_64
2362 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2363#else
2364 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2365#endif
2366};
2367
8b006791
ZX
2368/*
2369 * Translate a guest virtual address to a guest physical address.
2370 */
2371int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2372 struct kvm_translation *tr)
2373{
2374 unsigned long vaddr = tr->linear_address;
2375 gpa_t gpa;
2376
2377 vcpu_load(vcpu);
2378 mutex_lock(&vcpu->kvm->lock);
2379 gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
2380 tr->physical_address = gpa;
2381 tr->valid = gpa != UNMAPPED_GVA;
2382 tr->writeable = 1;
2383 tr->usermode = 0;
2384 mutex_unlock(&vcpu->kvm->lock);
2385 vcpu_put(vcpu);
2386
2387 return 0;
2388}
2389
d0752060
HB
2390int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2391{
2392 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2393
2394 vcpu_load(vcpu);
2395
2396 memcpy(fpu->fpr, fxsave->st_space, 128);
2397 fpu->fcw = fxsave->cwd;
2398 fpu->fsw = fxsave->swd;
2399 fpu->ftwx = fxsave->twd;
2400 fpu->last_opcode = fxsave->fop;
2401 fpu->last_ip = fxsave->rip;
2402 fpu->last_dp = fxsave->rdp;
2403 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2404
2405 vcpu_put(vcpu);
2406
2407 return 0;
2408}
2409
2410int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2411{
2412 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2413
2414 vcpu_load(vcpu);
2415
2416 memcpy(fxsave->st_space, fpu->fpr, 128);
2417 fxsave->cwd = fpu->fcw;
2418 fxsave->swd = fpu->fsw;
2419 fxsave->twd = fpu->ftwx;
2420 fxsave->fop = fpu->last_opcode;
2421 fxsave->rip = fpu->last_ip;
2422 fxsave->rdp = fpu->last_dp;
2423 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2424
2425 vcpu_put(vcpu);
2426
2427 return 0;
2428}
2429
2430void fx_init(struct kvm_vcpu *vcpu)
2431{
2432 unsigned after_mxcsr_mask;
2433
2434 /* Initialize guest FPU by resetting ours and saving into guest's */
2435 preempt_disable();
2436 fx_save(&vcpu->host_fx_image);
2437 fpu_init();
2438 fx_save(&vcpu->guest_fx_image);
2439 fx_restore(&vcpu->host_fx_image);
2440 preempt_enable();
2441
2442 vcpu->cr0 |= X86_CR0_ET;
2443 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2444 vcpu->guest_fx_image.mxcsr = 0x1f80;
2445 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2446 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2447}
2448EXPORT_SYMBOL_GPL(fx_init);
2449
2450void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2451{
2452 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2453 return;
2454
2455 vcpu->guest_fpu_loaded = 1;
2456 fx_save(&vcpu->host_fx_image);
2457 fx_restore(&vcpu->guest_fx_image);
2458}
2459EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2460
2461void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2462{
2463 if (!vcpu->guest_fpu_loaded)
2464 return;
2465
2466 vcpu->guest_fpu_loaded = 0;
2467 fx_save(&vcpu->guest_fx_image);
2468 fx_restore(&vcpu->host_fx_image);
f096ed85 2469 ++vcpu->stat.fpu_reload;
d0752060
HB
2470}
2471EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX
2472
2473void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
2474{
2475 kvm_x86_ops->vcpu_free(vcpu);
2476}
2477
2478struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
2479 unsigned int id)
2480{
26e5215f
AK
2481 return kvm_x86_ops->vcpu_create(kvm, id);
2482}
e9b11c17 2483
26e5215f
AK
2484int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
2485{
2486 int r;
e9b11c17
ZX
2487
2488 /* We do fxsave: this must be aligned. */
2489 BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
2490
2491 vcpu_load(vcpu);
2492 r = kvm_arch_vcpu_reset(vcpu);
2493 if (r == 0)
2494 r = kvm_mmu_setup(vcpu);
2495 vcpu_put(vcpu);
2496 if (r < 0)
2497 goto free_vcpu;
2498
26e5215f 2499 return 0;
e9b11c17
ZX
2500free_vcpu:
2501 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 2502 return r;
e9b11c17
ZX
2503}
2504
d40ccc62 2505void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX
2506{
2507 vcpu_load(vcpu);
2508 kvm_mmu_unload(vcpu);
2509 vcpu_put(vcpu);
2510
2511 kvm_x86_ops->vcpu_free(vcpu);
2512}
2513
2514int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
2515{
2516 return kvm_x86_ops->vcpu_reset(vcpu);
2517}
2518
2519void kvm_arch_hardware_enable(void *garbage)
2520{
2521 kvm_x86_ops->hardware_enable(garbage);
2522}
2523
2524void kvm_arch_hardware_disable(void *garbage)
2525{
2526 kvm_x86_ops->hardware_disable(garbage);
2527}
2528
2529int kvm_arch_hardware_setup(void)
2530{
2531 return kvm_x86_ops->hardware_setup();
2532}
2533
2534void kvm_arch_hardware_unsetup(void)
2535{
2536 kvm_x86_ops->hardware_unsetup();
2537}
2538
2539void kvm_arch_check_processor_compat(void *rtn)
2540{
2541 kvm_x86_ops->check_processor_compatibility(rtn);
2542}
2543
2544int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
2545{
2546 struct page *page;
2547 struct kvm *kvm;
2548 int r;
2549
2550 BUG_ON(vcpu->kvm == NULL);
2551 kvm = vcpu->kvm;
2552
2553 vcpu->mmu.root_hpa = INVALID_PAGE;
2554 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
2555 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
2556 else
2557 vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
2558
2559 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
2560 if (!page) {
2561 r = -ENOMEM;
2562 goto fail;
2563 }
2564 vcpu->pio_data = page_address(page);
2565
2566 r = kvm_mmu_create(vcpu);
2567 if (r < 0)
2568 goto fail_free_pio_data;
2569
2570 if (irqchip_in_kernel(kvm)) {
2571 r = kvm_create_lapic(vcpu);
2572 if (r < 0)
2573 goto fail_mmu_destroy;
2574 }
2575
2576 return 0;
2577
2578fail_mmu_destroy:
2579 kvm_mmu_destroy(vcpu);
2580fail_free_pio_data:
2581 free_page((unsigned long)vcpu->pio_data);
2582fail:
2583 return r;
2584}
2585
2586void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
2587{
2588 kvm_free_lapic(vcpu);
2589 kvm_mmu_destroy(vcpu);
2590 free_page((unsigned long)vcpu->pio_data);
2591}
d19a9cd2
ZX
2592
2593struct kvm *kvm_arch_create_vm(void)
2594{
2595 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
2596
2597 if (!kvm)
2598 return ERR_PTR(-ENOMEM);
2599
2600 INIT_LIST_HEAD(&kvm->active_mmu_pages);
2601
2602 return kvm;
2603}
2604
2605static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
2606{
2607 vcpu_load(vcpu);
2608 kvm_mmu_unload(vcpu);
2609 vcpu_put(vcpu);
2610}
2611
2612static void kvm_free_vcpus(struct kvm *kvm)
2613{
2614 unsigned int i;
2615
2616 /*
2617 * Unpin any mmu pages first.
2618 */
2619 for (i = 0; i < KVM_MAX_VCPUS; ++i)
2620 if (kvm->vcpus[i])
2621 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
2622 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2623 if (kvm->vcpus[i]) {
2624 kvm_arch_vcpu_free(kvm->vcpus[i]);
2625 kvm->vcpus[i] = NULL;
2626 }
2627 }
2628
2629}
2630
2631void kvm_arch_destroy_vm(struct kvm *kvm)
2632{
2633 kfree(kvm->vpic);
2634 kfree(kvm->vioapic);
2635 kvm_free_vcpus(kvm);
2636 kvm_free_physmem(kvm);
2637 kfree(kvm);
2638}
0de10343
ZX
2639
2640int kvm_arch_set_memory_region(struct kvm *kvm,
2641 struct kvm_userspace_memory_region *mem,
2642 struct kvm_memory_slot old,
2643 int user_alloc)
2644{
2645 int npages = mem->memory_size >> PAGE_SHIFT;
2646 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
2647
2648 /*To keep backward compatibility with older userspace,
2649 *x86 needs to hanlde !user_alloc case.
2650 */
2651 if (!user_alloc) {
2652 if (npages && !old.rmap) {
2653 down_write(&current->mm->mmap_sem);
2654 memslot->userspace_addr = do_mmap(NULL, 0,
2655 npages * PAGE_SIZE,
2656 PROT_READ | PROT_WRITE,
2657 MAP_SHARED | MAP_ANONYMOUS,
2658 0);
2659 up_write(&current->mm->mmap_sem);
2660
2661 if (IS_ERR((void *)memslot->userspace_addr))
2662 return PTR_ERR((void *)memslot->userspace_addr);
2663 } else {
2664 if (!old.user_alloc && old.rmap) {
2665 int ret;
2666
2667 down_write(&current->mm->mmap_sem);
2668 ret = do_munmap(current->mm, old.userspace_addr,
2669 old.npages * PAGE_SIZE);
2670 up_write(&current->mm->mmap_sem);
2671 if (ret < 0)
2672 printk(KERN_WARNING
2673 "kvm_vm_ioctl_set_memory_region: "
2674 "failed to munmap memory\n");
2675 }
2676 }
2677 }
2678
2679 if (!kvm->n_requested_mmu_pages) {
2680 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
2681 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
2682 }
2683
2684 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
2685 kvm_flush_remote_tlbs(kvm);
2686
2687 return 0;
2688}