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KVM: Extend stats support for VM stats
[linux-2.6-block.git] / drivers / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
313a3dc7
CO		 21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
043405e1
CO		 27
28#include <asm/uaccess.h>
d825ed0a 29#include <asm/msr.h>
043405e1 30
313a3dc7 31#define MAX_IO_MSRS 256
a03490ed
CO		 32#define CR0_RESERVED_BITS \
33 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
34 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
35 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
36#define CR4_RESERVED_BITS \
37 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
38 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
39 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
40 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
41
42#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 43#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 44
ba1389b7
AK		 45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 47
97896d04
ZX		 48struct kvm_x86_ops *kvm_x86_ops;
49
417bc304 50struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 51 { "pf_fixed", VCPU_STAT(pf_fixed) },
52 { "pf_guest", VCPU_STAT(pf_guest) },
53 { "tlb_flush", VCPU_STAT(tlb_flush) },
54 { "invlpg", VCPU_STAT(invlpg) },
55 { "exits", VCPU_STAT(exits) },
56 { "io_exits", VCPU_STAT(io_exits) },
57 { "mmio_exits", VCPU_STAT(mmio_exits) },
58 { "signal_exits", VCPU_STAT(signal_exits) },
59 { "irq_window", VCPU_STAT(irq_window_exits) },
60 { "halt_exits", VCPU_STAT(halt_exits) },
61 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
62 { "request_irq", VCPU_STAT(request_irq_exits) },
63 { "irq_exits", VCPU_STAT(irq_exits) },
64 { "host_state_reload", VCPU_STAT(host_state_reload) },
65 { "efer_reload", VCPU_STAT(efer_reload) },
66 { "fpu_reload", VCPU_STAT(fpu_reload) },
67 { "insn_emulation", VCPU_STAT(insn_emulation) },
68 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
417bc304
HB		 69 { NULL }
70};
71
72
5fb76f9b
CO		 73unsigned long segment_base(u16 selector)
74{
75 struct descriptor_table gdt;
76 struct segment_descriptor *d;
77 unsigned long table_base;
78 unsigned long v;
79
80 if (selector == 0)
81 return 0;
82
83 asm("sgdt %0" : "=m"(gdt));
84 table_base = gdt.base;
85
86 if (selector & 4) { /* from ldt */
87 u16 ldt_selector;
88
89 asm("sldt %0" : "=g"(ldt_selector));
90 table_base = segment_base(ldt_selector);
91 }
92 d = (struct segment_descriptor *)(table_base + (selector & ~7));
93 v = d->base_low | ((unsigned long)d->base_mid << 16) |
94 ((unsigned long)d->base_high << 24);
95#ifdef CONFIG_X86_64
96 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
97 v |= ((unsigned long) \
98 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
99#endif
100 return v;
101}
102EXPORT_SYMBOL_GPL(segment_base);
103
6866b83e
CO		 104u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
105{
106 if (irqchip_in_kernel(vcpu->kvm))
107 return vcpu->apic_base;
108 else
109 return vcpu->apic_base;
110}
111EXPORT_SYMBOL_GPL(kvm_get_apic_base);
112
113void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
114{
115 /* TODO: reserve bits check */
116 if (irqchip_in_kernel(vcpu->kvm))
117 kvm_lapic_set_base(vcpu, data);
118 else
119 vcpu->apic_base = data;
120}
121EXPORT_SYMBOL_GPL(kvm_set_apic_base);
122
a03490ed
CO		 123static void inject_gp(struct kvm_vcpu *vcpu)
124{
125 kvm_x86_ops->inject_gp(vcpu, 0);
126}
127
128/*
129 * Load the pae pdptrs. Return true is they are all valid.
130 */
131int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
132{
133 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
134 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
135 int i;
136 int ret;
137 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
138
139 mutex_lock(&vcpu->kvm->lock);
140 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
141 offset * sizeof(u64), sizeof(pdpte));
142 if (ret < 0) {
143 ret = 0;
144 goto out;
145 }
146 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
147 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
148 ret = 0;
149 goto out;
150 }
151 }
152 ret = 1;
153
154 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
155out:
156 mutex_unlock(&vcpu->kvm->lock);
157
158 return ret;
159}
160
161void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
162{
163 if (cr0 & CR0_RESERVED_BITS) {
164 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
165 cr0, vcpu->cr0);
166 inject_gp(vcpu);
167 return;
168 }
169
170 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
171 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
172 inject_gp(vcpu);
173 return;
174 }
175
176 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
177 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
178 "and a clear PE flag\n");
179 inject_gp(vcpu);
180 return;
181 }
182
183 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
184#ifdef CONFIG_X86_64
185 if ((vcpu->shadow_efer & EFER_LME)) {
186 int cs_db, cs_l;
187
188 if (!is_pae(vcpu)) {
189 printk(KERN_DEBUG "set_cr0: #GP, start paging "
190 "in long mode while PAE is disabled\n");
191 inject_gp(vcpu);
192 return;
193 }
194 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
195 if (cs_l) {
196 printk(KERN_DEBUG "set_cr0: #GP, start paging "
197 "in long mode while CS.L == 1\n");
198 inject_gp(vcpu);
199 return;
200
201 }
202 } else
203#endif
204 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
205 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
206 "reserved bits\n");
207 inject_gp(vcpu);
208 return;
209 }
210
211 }
212
213 kvm_x86_ops->set_cr0(vcpu, cr0);
214 vcpu->cr0 = cr0;
215
216 mutex_lock(&vcpu->kvm->lock);
217 kvm_mmu_reset_context(vcpu);
218 mutex_unlock(&vcpu->kvm->lock);
219 return;
220}
221EXPORT_SYMBOL_GPL(set_cr0);
222
223void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
224{
225 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
226}
227EXPORT_SYMBOL_GPL(lmsw);
228
229void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
230{
231 if (cr4 & CR4_RESERVED_BITS) {
232 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
233 inject_gp(vcpu);
234 return;
235 }
236
237 if (is_long_mode(vcpu)) {
238 if (!(cr4 & X86_CR4_PAE)) {
239 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
240 "in long mode\n");
241 inject_gp(vcpu);
242 return;
243 }
244 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
245 && !load_pdptrs(vcpu, vcpu->cr3)) {
246 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
247 inject_gp(vcpu);
248 return;
249 }
250
251 if (cr4 & X86_CR4_VMXE) {
252 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
253 inject_gp(vcpu);
254 return;
255 }
256 kvm_x86_ops->set_cr4(vcpu, cr4);
257 vcpu->cr4 = cr4;
258 mutex_lock(&vcpu->kvm->lock);
259 kvm_mmu_reset_context(vcpu);
260 mutex_unlock(&vcpu->kvm->lock);
261}
262EXPORT_SYMBOL_GPL(set_cr4);
263
264void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
265{
266 if (is_long_mode(vcpu)) {
267 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
268 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
269 inject_gp(vcpu);
270 return;
271 }
272 } else {
273 if (is_pae(vcpu)) {
274 if (cr3 & CR3_PAE_RESERVED_BITS) {
275 printk(KERN_DEBUG
276 "set_cr3: #GP, reserved bits\n");
277 inject_gp(vcpu);
278 return;
279 }
280 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
281 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
282 "reserved bits\n");
283 inject_gp(vcpu);
284 return;
285 }
286 }
287 /*
288 * We don't check reserved bits in nonpae mode, because
289 * this isn't enforced, and VMware depends on this.
290 */
291 }
292
293 mutex_lock(&vcpu->kvm->lock);
294 /*
295 * Does the new cr3 value map to physical memory? (Note, we
296 * catch an invalid cr3 even in real-mode, because it would
297 * cause trouble later on when we turn on paging anyway.)
298 *
299 * A real CPU would silently accept an invalid cr3 and would
300 * attempt to use it - with largely undefined (and often hard
301 * to debug) behavior on the guest side.
302 */
303 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
304 inject_gp(vcpu);
305 else {
306 vcpu->cr3 = cr3;
307 vcpu->mmu.new_cr3(vcpu);
308 }
309 mutex_unlock(&vcpu->kvm->lock);
310}
311EXPORT_SYMBOL_GPL(set_cr3);
312
313void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
314{
315 if (cr8 & CR8_RESERVED_BITS) {
316 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
317 inject_gp(vcpu);
318 return;
319 }
320 if (irqchip_in_kernel(vcpu->kvm))
321 kvm_lapic_set_tpr(vcpu, cr8);
322 else
323 vcpu->cr8 = cr8;
324}
325EXPORT_SYMBOL_GPL(set_cr8);
326
327unsigned long get_cr8(struct kvm_vcpu *vcpu)
328{
329 if (irqchip_in_kernel(vcpu->kvm))
330 return kvm_lapic_get_cr8(vcpu);
331 else
332 return vcpu->cr8;
333}
334EXPORT_SYMBOL_GPL(get_cr8);
335
043405e1
CO		 336/*
337 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
338 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
339 *
340 * This list is modified at module load time to reflect the
341 * capabilities of the host cpu.
342 */
343static u32 msrs_to_save[] = {
344 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
345 MSR_K6_STAR,
346#ifdef CONFIG_X86_64
347 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
348#endif
349 MSR_IA32_TIME_STAMP_COUNTER,
350};
351
352static unsigned num_msrs_to_save;
353
354static u32 emulated_msrs[] = {
355 MSR_IA32_MISC_ENABLE,
356};
357
15c4a640
CO		 358#ifdef CONFIG_X86_64
359
360static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
361{
362 if (efer & EFER_RESERVED_BITS) {
363 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
364 efer);
365 inject_gp(vcpu);
366 return;
367 }
368
369 if (is_paging(vcpu)
370 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
371 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
372 inject_gp(vcpu);
373 return;
374 }
375
376 kvm_x86_ops->set_efer(vcpu, efer);
377
378 efer &= ~EFER_LMA;
379 efer |= vcpu->shadow_efer & EFER_LMA;
380
381 vcpu->shadow_efer = efer;
382}
383
384#endif
385
386/*
387 * Writes msr value into into the appropriate "register".
388 * Returns 0 on success, non-0 otherwise.
389 * Assumes vcpu_load() was already called.
390 */
391int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
392{
393 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
394}
395
313a3dc7
CO		 396/*
397 * Adapt set_msr() to msr_io()'s calling convention
398 */
399static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
400{
401 return kvm_set_msr(vcpu, index, *data);
402}
403
15c4a640
CO		 404
405int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
406{
407 switch (msr) {
408#ifdef CONFIG_X86_64
409 case MSR_EFER:
410 set_efer(vcpu, data);
411 break;
412#endif
413 case MSR_IA32_MC0_STATUS:
414 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
415 __FUNCTION__, data);
416 break;
417 case MSR_IA32_MCG_STATUS:
418 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
419 __FUNCTION__, data);
420 break;
421 case MSR_IA32_UCODE_REV:
422 case MSR_IA32_UCODE_WRITE:
423 case 0x200 ... 0x2ff: /* MTRRs */
424 break;
425 case MSR_IA32_APICBASE:
426 kvm_set_apic_base(vcpu, data);
427 break;
428 case MSR_IA32_MISC_ENABLE:
429 vcpu->ia32_misc_enable_msr = data;
430 break;
431 default:
432 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
433 return 1;
434 }
435 return 0;
436}
437EXPORT_SYMBOL_GPL(kvm_set_msr_common);
438
439
440/*
441 * Reads an msr value (of 'msr_index') into 'pdata'.
442 * Returns 0 on success, non-0 otherwise.
443 * Assumes vcpu_load() was already called.
444 */
445int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
446{
447 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
448}
449
450int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
451{
452 u64 data;
453
454 switch (msr) {
455 case 0xc0010010: /* SYSCFG */
456 case 0xc0010015: /* HWCR */
457 case MSR_IA32_PLATFORM_ID:
458 case MSR_IA32_P5_MC_ADDR:
459 case MSR_IA32_P5_MC_TYPE:
460 case MSR_IA32_MC0_CTL:
461 case MSR_IA32_MCG_STATUS:
462 case MSR_IA32_MCG_CAP:
463 case MSR_IA32_MC0_MISC:
464 case MSR_IA32_MC0_MISC+4:
465 case MSR_IA32_MC0_MISC+8:
466 case MSR_IA32_MC0_MISC+12:
467 case MSR_IA32_MC0_MISC+16:
468 case MSR_IA32_UCODE_REV:
469 case MSR_IA32_PERF_STATUS:
470 case MSR_IA32_EBL_CR_POWERON:
471 /* MTRR registers */
472 case 0xfe:
473 case 0x200 ... 0x2ff:
474 data = 0;
475 break;
476 case 0xcd: /* fsb frequency */
477 data = 3;
478 break;
479 case MSR_IA32_APICBASE:
480 data = kvm_get_apic_base(vcpu);
481 break;
482 case MSR_IA32_MISC_ENABLE:
483 data = vcpu->ia32_misc_enable_msr;
484 break;
485#ifdef CONFIG_X86_64
486 case MSR_EFER:
487 data = vcpu->shadow_efer;
488 break;
489#endif
490 default:
491 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
492 return 1;
493 }
494 *pdata = data;
495 return 0;
496}
497EXPORT_SYMBOL_GPL(kvm_get_msr_common);
498
313a3dc7
CO		 499/*
500 * Read or write a bunch of msrs. All parameters are kernel addresses.
501 *
502 * @return number of msrs set successfully.
503 */
504static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
505 struct kvm_msr_entry *entries,
506 int (*do_msr)(struct kvm_vcpu *vcpu,
507 unsigned index, u64 *data))
508{
509 int i;
510
511 vcpu_load(vcpu);
512
513 for (i = 0; i < msrs->nmsrs; ++i)
514 if (do_msr(vcpu, entries[i].index, &entries[i].data))
515 break;
516
517 vcpu_put(vcpu);
518
519 return i;
520}
521
522/*
523 * Read or write a bunch of msrs. Parameters are user addresses.
524 *
525 * @return number of msrs set successfully.
526 */
527static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
528 int (*do_msr)(struct kvm_vcpu *vcpu,
529 unsigned index, u64 *data),
530 int writeback)
531{
532 struct kvm_msrs msrs;
533 struct kvm_msr_entry *entries;
534 int r, n;
535 unsigned size;
536
537 r = -EFAULT;
538 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
539 goto out;
540
541 r = -E2BIG;
542 if (msrs.nmsrs >= MAX_IO_MSRS)
543 goto out;
544
545 r = -ENOMEM;
546 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
547 entries = vmalloc(size);
548 if (!entries)
549 goto out;
550
551 r = -EFAULT;
552 if (copy_from_user(entries, user_msrs->entries, size))
553 goto out_free;
554
555 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
556 if (r < 0)
557 goto out_free;
558
559 r = -EFAULT;
560 if (writeback && copy_to_user(user_msrs->entries, entries, size))
561 goto out_free;
562
563 r = n;
564
565out_free:
566 vfree(entries);
567out:
568 return r;
569}
570
e9b11c17
ZX		 571/*
572 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
573 * cached on it.
574 */
575void decache_vcpus_on_cpu(int cpu)
576{
577 struct kvm *vm;
578 struct kvm_vcpu *vcpu;
579 int i;
580
581 spin_lock(&kvm_lock);
582 list_for_each_entry(vm, &vm_list, vm_list)
583 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
584 vcpu = vm->vcpus[i];
585 if (!vcpu)
586 continue;
587 /*
588 * If the vcpu is locked, then it is running on some
589 * other cpu and therefore it is not cached on the
590 * cpu in question.
591 *
592 * If it's not locked, check the last cpu it executed
593 * on.
594 */
595 if (mutex_trylock(&vcpu->mutex)) {
596 if (vcpu->cpu == cpu) {
597 kvm_x86_ops->vcpu_decache(vcpu);
598 vcpu->cpu = -1;
599 }
600 mutex_unlock(&vcpu->mutex);
601 }
602 }
603 spin_unlock(&kvm_lock);
604}
605
018d00d2
ZX		 606int kvm_dev_ioctl_check_extension(long ext)
607{
608 int r;
609
610 switch (ext) {
611 case KVM_CAP_IRQCHIP:
612 case KVM_CAP_HLT:
613 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
614 case KVM_CAP_USER_MEMORY:
615 case KVM_CAP_SET_TSS_ADDR:
616 r = 1;
617 break;
618 default:
619 r = 0;
620 break;
621 }
622 return r;
623
624}
625
043405e1
CO		 626long kvm_arch_dev_ioctl(struct file *filp,
627 unsigned int ioctl, unsigned long arg)
628{
629 void __user *argp = (void __user *)arg;
630 long r;
631
632 switch (ioctl) {
633 case KVM_GET_MSR_INDEX_LIST: {
634 struct kvm_msr_list __user *user_msr_list = argp;
635 struct kvm_msr_list msr_list;
636 unsigned n;
637
638 r = -EFAULT;
639 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
640 goto out;
641 n = msr_list.nmsrs;
642 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
643 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
644 goto out;
645 r = -E2BIG;
646 if (n < num_msrs_to_save)
647 goto out;
648 r = -EFAULT;
649 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
650 num_msrs_to_save * sizeof(u32)))
651 goto out;
652 if (copy_to_user(user_msr_list->indices
653 + num_msrs_to_save * sizeof(u32),
654 &emulated_msrs,
655 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
656 goto out;
657 r = 0;
658 break;
659 }
660 default:
661 r = -EINVAL;
662 }
663out:
664 return r;
665}
666
313a3dc7
CO		 667void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
668{
669 kvm_x86_ops->vcpu_load(vcpu, cpu);
670}
671
672void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
673{
674 kvm_x86_ops->vcpu_put(vcpu);
675}
676
677static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
678{
679 u64 efer;
680 int i;
681 struct kvm_cpuid_entry *e, *entry;
682
683 rdmsrl(MSR_EFER, efer);
684 entry = NULL;
685 for (i = 0; i < vcpu->cpuid_nent; ++i) {
686 e = &vcpu->cpuid_entries[i];
687 if (e->function == 0x80000001) {
688 entry = e;
689 break;
690 }
691 }
692 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
693 entry->edx &= ~(1 << 20);
694 printk(KERN_INFO "kvm: guest NX capability removed\n");
695 }
696}
697
698static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
699 struct kvm_cpuid *cpuid,
700 struct kvm_cpuid_entry __user *entries)
701{
702 int r;
703
704 r = -E2BIG;
705 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
706 goto out;
707 r = -EFAULT;
708 if (copy_from_user(&vcpu->cpuid_entries, entries,
709 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
710 goto out;
711 vcpu->cpuid_nent = cpuid->nent;
712 cpuid_fix_nx_cap(vcpu);
713 return 0;
714
715out:
716 return r;
717}
718
719static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
720 struct kvm_lapic_state *s)
721{
722 vcpu_load(vcpu);
723 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
724 vcpu_put(vcpu);
725
726 return 0;
727}
728
729static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
730 struct kvm_lapic_state *s)
731{
732 vcpu_load(vcpu);
733 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
734 kvm_apic_post_state_restore(vcpu);
735 vcpu_put(vcpu);
736
737 return 0;
738}
739
740long kvm_arch_vcpu_ioctl(struct file *filp,
741 unsigned int ioctl, unsigned long arg)
742{
743 struct kvm_vcpu *vcpu = filp->private_data;
744 void __user *argp = (void __user *)arg;
745 int r;
746
747 switch (ioctl) {
748 case KVM_GET_LAPIC: {
749 struct kvm_lapic_state lapic;
750
751 memset(&lapic, 0, sizeof lapic);
752 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
753 if (r)
754 goto out;
755 r = -EFAULT;
756 if (copy_to_user(argp, &lapic, sizeof lapic))
757 goto out;
758 r = 0;
759 break;
760 }
761 case KVM_SET_LAPIC: {
762 struct kvm_lapic_state lapic;
763
764 r = -EFAULT;
765 if (copy_from_user(&lapic, argp, sizeof lapic))
766 goto out;
767 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
768 if (r)
769 goto out;
770 r = 0;
771 break;
772 }
773 case KVM_SET_CPUID: {
774 struct kvm_cpuid __user *cpuid_arg = argp;
775 struct kvm_cpuid cpuid;
776
777 r = -EFAULT;
778 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
779 goto out;
780 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
781 if (r)
782 goto out;
783 break;
784 }
785 case KVM_GET_MSRS:
786 r = msr_io(vcpu, argp, kvm_get_msr, 1);
787 break;
788 case KVM_SET_MSRS:
789 r = msr_io(vcpu, argp, do_set_msr, 0);
790 break;
791 default:
792 r = -EINVAL;
793 }
794out:
795 return r;
796}
797
1fe779f8
CO		 798static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
799{
800 int ret;
801
802 if (addr > (unsigned int)(-3 * PAGE_SIZE))
803 return -1;
804 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
805 return ret;
806}
807
808static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
809 u32 kvm_nr_mmu_pages)
810{
811 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
812 return -EINVAL;
813
814 mutex_lock(&kvm->lock);
815
816 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
817 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
818
819 mutex_unlock(&kvm->lock);
820 return 0;
821}
822
823static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
824{
825 return kvm->n_alloc_mmu_pages;
826}
827
828/*
829 * Set a new alias region. Aliases map a portion of physical memory into
830 * another portion. This is useful for memory windows, for example the PC
831 * VGA region.
832 */
833static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
834 struct kvm_memory_alias *alias)
835{
836 int r, n;
837 struct kvm_mem_alias *p;
838
839 r = -EINVAL;
840 /* General sanity checks */
841 if (alias->memory_size & (PAGE_SIZE - 1))
842 goto out;
843 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
844 goto out;
845 if (alias->slot >= KVM_ALIAS_SLOTS)
846 goto out;
847 if (alias->guest_phys_addr + alias->memory_size
848 < alias->guest_phys_addr)
849 goto out;
850 if (alias->target_phys_addr + alias->memory_size
851 < alias->target_phys_addr)
852 goto out;
853
854 mutex_lock(&kvm->lock);
855
856 p = &kvm->aliases[alias->slot];
857 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
858 p->npages = alias->memory_size >> PAGE_SHIFT;
859 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
860
861 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
862 if (kvm->aliases[n - 1].npages)
863 break;
864 kvm->naliases = n;
865
866 kvm_mmu_zap_all(kvm);
867
868 mutex_unlock(&kvm->lock);
869
870 return 0;
871
872out:
873 return r;
874}
875
876static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
877{
878 int r;
879
880 r = 0;
881 switch (chip->chip_id) {
882 case KVM_IRQCHIP_PIC_MASTER:
883 memcpy(&chip->chip.pic,
884 &pic_irqchip(kvm)->pics[0],
885 sizeof(struct kvm_pic_state));
886 break;
887 case KVM_IRQCHIP_PIC_SLAVE:
888 memcpy(&chip->chip.pic,
889 &pic_irqchip(kvm)->pics[1],
890 sizeof(struct kvm_pic_state));
891 break;
892 case KVM_IRQCHIP_IOAPIC:
893 memcpy(&chip->chip.ioapic,
894 ioapic_irqchip(kvm),
895 sizeof(struct kvm_ioapic_state));
896 break;
897 default:
898 r = -EINVAL;
899 break;
900 }
901 return r;
902}
903
904static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
905{
906 int r;
907
908 r = 0;
909 switch (chip->chip_id) {
910 case KVM_IRQCHIP_PIC_MASTER:
911 memcpy(&pic_irqchip(kvm)->pics[0],
912 &chip->chip.pic,
913 sizeof(struct kvm_pic_state));
914 break;
915 case KVM_IRQCHIP_PIC_SLAVE:
916 memcpy(&pic_irqchip(kvm)->pics[1],
917 &chip->chip.pic,
918 sizeof(struct kvm_pic_state));
919 break;
920 case KVM_IRQCHIP_IOAPIC:
921 memcpy(ioapic_irqchip(kvm),
922 &chip->chip.ioapic,
923 sizeof(struct kvm_ioapic_state));
924 break;
925 default:
926 r = -EINVAL;
927 break;
928 }
929 kvm_pic_update_irq(pic_irqchip(kvm));
930 return r;
931}
932
933long kvm_arch_vm_ioctl(struct file *filp,
934 unsigned int ioctl, unsigned long arg)
935{
936 struct kvm *kvm = filp->private_data;
937 void __user *argp = (void __user *)arg;
938 int r = -EINVAL;
939
940 switch (ioctl) {
941 case KVM_SET_TSS_ADDR:
942 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
943 if (r < 0)
944 goto out;
945 break;
946 case KVM_SET_MEMORY_REGION: {
947 struct kvm_memory_region kvm_mem;
948 struct kvm_userspace_memory_region kvm_userspace_mem;
949
950 r = -EFAULT;
951 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
952 goto out;
953 kvm_userspace_mem.slot = kvm_mem.slot;
954 kvm_userspace_mem.flags = kvm_mem.flags;
955 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
956 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
957 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
958 if (r)
959 goto out;
960 break;
961 }
962 case KVM_SET_NR_MMU_PAGES:
963 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
964 if (r)
965 goto out;
966 break;
967 case KVM_GET_NR_MMU_PAGES:
968 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
969 break;
970 case KVM_SET_MEMORY_ALIAS: {
971 struct kvm_memory_alias alias;
972
973 r = -EFAULT;
974 if (copy_from_user(&alias, argp, sizeof alias))
975 goto out;
976 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
977 if (r)
978 goto out;
979 break;
980 }
981 case KVM_CREATE_IRQCHIP:
982 r = -ENOMEM;
983 kvm->vpic = kvm_create_pic(kvm);
984 if (kvm->vpic) {
985 r = kvm_ioapic_init(kvm);
986 if (r) {
987 kfree(kvm->vpic);
988 kvm->vpic = NULL;
989 goto out;
990 }
991 } else
992 goto out;
993 break;
994 case KVM_IRQ_LINE: {
995 struct kvm_irq_level irq_event;
996
997 r = -EFAULT;
998 if (copy_from_user(&irq_event, argp, sizeof irq_event))
999 goto out;
1000 if (irqchip_in_kernel(kvm)) {
1001 mutex_lock(&kvm->lock);
1002 if (irq_event.irq < 16)
1003 kvm_pic_set_irq(pic_irqchip(kvm),
1004 irq_event.irq,
1005 irq_event.level);
1006 kvm_ioapic_set_irq(kvm->vioapic,
1007 irq_event.irq,
1008 irq_event.level);
1009 mutex_unlock(&kvm->lock);
1010 r = 0;
1011 }
1012 break;
1013 }
1014 case KVM_GET_IRQCHIP: {
1015 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1016 struct kvm_irqchip chip;
1017
1018 r = -EFAULT;
1019 if (copy_from_user(&chip, argp, sizeof chip))
1020 goto out;
1021 r = -ENXIO;
1022 if (!irqchip_in_kernel(kvm))
1023 goto out;
1024 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1025 if (r)
1026 goto out;
1027 r = -EFAULT;
1028 if (copy_to_user(argp, &chip, sizeof chip))
1029 goto out;
1030 r = 0;
1031 break;
1032 }
1033 case KVM_SET_IRQCHIP: {
1034 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1035 struct kvm_irqchip chip;
1036
1037 r = -EFAULT;
1038 if (copy_from_user(&chip, argp, sizeof chip))
1039 goto out;
1040 r = -ENXIO;
1041 if (!irqchip_in_kernel(kvm))
1042 goto out;
1043 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1044 if (r)
1045 goto out;
1046 r = 0;
1047 break;
1048 }
1049 default:
1050 ;
1051 }
1052out:
1053 return r;
1054}
1055
a16b043c 1056static void kvm_init_msr_list(void)
043405e1
CO		 1057{
1058 u32 dummy[2];
1059 unsigned i, j;
1060
1061 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1062 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1063 continue;
1064 if (j < i)
1065 msrs_to_save[j] = msrs_to_save[i];
1066 j++;
1067 }
1068 num_msrs_to_save = j;
1069}
1070
bbd9b64e
CO		 1071/*
1072 * Only apic need an MMIO device hook, so shortcut now..
1073 */
1074static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1075 gpa_t addr)
1076{
1077 struct kvm_io_device *dev;
1078
1079 if (vcpu->apic) {
1080 dev = &vcpu->apic->dev;
1081 if (dev->in_range(dev, addr))
1082 return dev;
1083 }
1084 return NULL;
1085}
1086
1087
1088static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1089 gpa_t addr)
1090{
1091 struct kvm_io_device *dev;
1092
1093 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1094 if (dev == NULL)
1095 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1096 return dev;
1097}
1098
1099int emulator_read_std(unsigned long addr,
1100 void *val,
1101 unsigned int bytes,
1102 struct kvm_vcpu *vcpu)
1103{
1104 void *data = val;
1105
1106 while (bytes) {
1107 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1108 unsigned offset = addr & (PAGE_SIZE-1);
1109 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1110 int ret;
1111
1112 if (gpa == UNMAPPED_GVA)
1113 return X86EMUL_PROPAGATE_FAULT;
1114 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1115 if (ret < 0)
1116 return X86EMUL_UNHANDLEABLE;
1117
1118 bytes -= tocopy;
1119 data += tocopy;
1120 addr += tocopy;
1121 }
1122
1123 return X86EMUL_CONTINUE;
1124}
1125EXPORT_SYMBOL_GPL(emulator_read_std);
1126
1127static int emulator_write_std(unsigned long addr,
1128 const void *val,
1129 unsigned int bytes,
1130 struct kvm_vcpu *vcpu)
1131{
1132 pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
1133 return X86EMUL_UNHANDLEABLE;
1134}
1135
1136static int emulator_read_emulated(unsigned long addr,
1137 void *val,
1138 unsigned int bytes,
1139 struct kvm_vcpu *vcpu)
1140{
1141 struct kvm_io_device *mmio_dev;
1142 gpa_t gpa;
1143
1144 if (vcpu->mmio_read_completed) {
1145 memcpy(val, vcpu->mmio_data, bytes);
1146 vcpu->mmio_read_completed = 0;
1147 return X86EMUL_CONTINUE;
1148 }
1149
1150 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1151
1152 /* For APIC access vmexit */
1153 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1154 goto mmio;
1155
1156 if (emulator_read_std(addr, val, bytes, vcpu)
1157 == X86EMUL_CONTINUE)
1158 return X86EMUL_CONTINUE;
1159 if (gpa == UNMAPPED_GVA)
1160 return X86EMUL_PROPAGATE_FAULT;
1161
1162mmio:
1163 /*
1164 * Is this MMIO handled locally?
1165 */
1166 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1167 if (mmio_dev) {
1168 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1169 return X86EMUL_CONTINUE;
1170 }
1171
1172 vcpu->mmio_needed = 1;
1173 vcpu->mmio_phys_addr = gpa;
1174 vcpu->mmio_size = bytes;
1175 vcpu->mmio_is_write = 0;
1176
1177 return X86EMUL_UNHANDLEABLE;
1178}
1179
1180static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1181 const void *val, int bytes)
1182{
1183 int ret;
1184
1185 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1186 if (ret < 0)
1187 return 0;
1188 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1189 return 1;
1190}
1191
1192static int emulator_write_emulated_onepage(unsigned long addr,
1193 const void *val,
1194 unsigned int bytes,
1195 struct kvm_vcpu *vcpu)
1196{
1197 struct kvm_io_device *mmio_dev;
1198 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1199
1200 if (gpa == UNMAPPED_GVA) {
1201 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1202 return X86EMUL_PROPAGATE_FAULT;
1203 }
1204
1205 /* For APIC access vmexit */
1206 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1207 goto mmio;
1208
1209 if (emulator_write_phys(vcpu, gpa, val, bytes))
1210 return X86EMUL_CONTINUE;
1211
1212mmio:
1213 /*
1214 * Is this MMIO handled locally?
1215 */
1216 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1217 if (mmio_dev) {
1218 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1219 return X86EMUL_CONTINUE;
1220 }
1221
1222 vcpu->mmio_needed = 1;
1223 vcpu->mmio_phys_addr = gpa;
1224 vcpu->mmio_size = bytes;
1225 vcpu->mmio_is_write = 1;
1226 memcpy(vcpu->mmio_data, val, bytes);
1227
1228 return X86EMUL_CONTINUE;
1229}
1230
1231int emulator_write_emulated(unsigned long addr,
1232 const void *val,
1233 unsigned int bytes,
1234 struct kvm_vcpu *vcpu)
1235{
1236 /* Crossing a page boundary? */
1237 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1238 int rc, now;
1239
1240 now = -addr & ~PAGE_MASK;
1241 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1242 if (rc != X86EMUL_CONTINUE)
1243 return rc;
1244 addr += now;
1245 val += now;
1246 bytes -= now;
1247 }
1248 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1249}
1250EXPORT_SYMBOL_GPL(emulator_write_emulated);
1251
1252static int emulator_cmpxchg_emulated(unsigned long addr,
1253 const void *old,
1254 const void *new,
1255 unsigned int bytes,
1256 struct kvm_vcpu *vcpu)
1257{
1258 static int reported;
1259
1260 if (!reported) {
1261 reported = 1;
1262 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1263 }
1264 return emulator_write_emulated(addr, new, bytes, vcpu);
1265}
1266
1267static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1268{
1269 return kvm_x86_ops->get_segment_base(vcpu, seg);
1270}
1271
1272int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1273{
1274 return X86EMUL_CONTINUE;
1275}
1276
1277int emulate_clts(struct kvm_vcpu *vcpu)
1278{
1279 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1280 return X86EMUL_CONTINUE;
1281}
1282
1283int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1284{
1285 struct kvm_vcpu *vcpu = ctxt->vcpu;
1286
1287 switch (dr) {
1288 case 0 ... 3:
1289 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1290 return X86EMUL_CONTINUE;
1291 default:
1292 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1293 return X86EMUL_UNHANDLEABLE;
1294 }
1295}
1296
1297int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1298{
1299 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1300 int exception;
1301
1302 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1303 if (exception) {
1304 /* FIXME: better handling */
1305 return X86EMUL_UNHANDLEABLE;
1306 }
1307 return X86EMUL_CONTINUE;
1308}
1309
1310void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1311{
1312 static int reported;
1313 u8 opcodes[4];
1314 unsigned long rip = vcpu->rip;
1315 unsigned long rip_linear;
1316
1317 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1318
1319 if (reported)
1320 return;
1321
1322 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1323
1324 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1325 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1326 reported = 1;
1327}
1328EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1329
1330struct x86_emulate_ops emulate_ops = {
1331 .read_std = emulator_read_std,
1332 .write_std = emulator_write_std,
1333 .read_emulated = emulator_read_emulated,
1334 .write_emulated = emulator_write_emulated,
1335 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1336};
1337
1338int emulate_instruction(struct kvm_vcpu *vcpu,
1339 struct kvm_run *run,
1340 unsigned long cr2,
1341 u16 error_code,
1342 int no_decode)
1343{
1344 int r;
1345
1346 vcpu->mmio_fault_cr2 = cr2;
1347 kvm_x86_ops->cache_regs(vcpu);
1348
1349 vcpu->mmio_is_write = 0;
1350 vcpu->pio.string = 0;
1351
1352 if (!no_decode) {
1353 int cs_db, cs_l;
1354 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1355
1356 vcpu->emulate_ctxt.vcpu = vcpu;
1357 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1358 vcpu->emulate_ctxt.cr2 = cr2;
1359 vcpu->emulate_ctxt.mode =
1360 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1361 ? X86EMUL_MODE_REAL : cs_l
1362 ? X86EMUL_MODE_PROT64 : cs_db
1363 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1364
1365 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1366 vcpu->emulate_ctxt.cs_base = 0;
1367 vcpu->emulate_ctxt.ds_base = 0;
1368 vcpu->emulate_ctxt.es_base = 0;
1369 vcpu->emulate_ctxt.ss_base = 0;
1370 } else {
1371 vcpu->emulate_ctxt.cs_base =
1372 get_segment_base(vcpu, VCPU_SREG_CS);
1373 vcpu->emulate_ctxt.ds_base =
1374 get_segment_base(vcpu, VCPU_SREG_DS);
1375 vcpu->emulate_ctxt.es_base =
1376 get_segment_base(vcpu, VCPU_SREG_ES);
1377 vcpu->emulate_ctxt.ss_base =
1378 get_segment_base(vcpu, VCPU_SREG_SS);
1379 }
1380
1381 vcpu->emulate_ctxt.gs_base =
1382 get_segment_base(vcpu, VCPU_SREG_GS);
1383 vcpu->emulate_ctxt.fs_base =
1384 get_segment_base(vcpu, VCPU_SREG_FS);
1385
1386 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
f2b5756b 1387 ++vcpu->stat.insn_emulation;
bbd9b64e 1388 if (r) {
f2b5756b 1389 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1390 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1391 return EMULATE_DONE;
1392 return EMULATE_FAIL;
1393 }
1394 }
1395
1396 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1397
1398 if (vcpu->pio.string)
1399 return EMULATE_DO_MMIO;
1400
1401 if ((r || vcpu->mmio_is_write) && run) {
1402 run->exit_reason = KVM_EXIT_MMIO;
1403 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1404 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1405 run->mmio.len = vcpu->mmio_size;
1406 run->mmio.is_write = vcpu->mmio_is_write;
1407 }
1408
1409 if (r) {
1410 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1411 return EMULATE_DONE;
1412 if (!vcpu->mmio_needed) {
1413 kvm_report_emulation_failure(vcpu, "mmio");
1414 return EMULATE_FAIL;
1415 }
1416 return EMULATE_DO_MMIO;
1417 }
1418
1419 kvm_x86_ops->decache_regs(vcpu);
1420 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1421
1422 if (vcpu->mmio_is_write) {
1423 vcpu->mmio_needed = 0;
1424 return EMULATE_DO_MMIO;
1425 }
1426
1427 return EMULATE_DONE;
1428}
1429EXPORT_SYMBOL_GPL(emulate_instruction);
1430
de7d789a
CO		 1431static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1432{
1433 int i;
1434
1435 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1436 if (vcpu->pio.guest_pages[i]) {
1437 kvm_release_page(vcpu->pio.guest_pages[i]);
1438 vcpu->pio.guest_pages[i] = NULL;
1439 }
1440}
1441
1442static int pio_copy_data(struct kvm_vcpu *vcpu)
1443{
1444 void *p = vcpu->pio_data;
1445 void *q;
1446 unsigned bytes;
1447 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1448
1449 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1450 PAGE_KERNEL);
1451 if (!q) {
1452 free_pio_guest_pages(vcpu);
1453 return -ENOMEM;
1454 }
1455 q += vcpu->pio.guest_page_offset;
1456 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1457 if (vcpu->pio.in)
1458 memcpy(q, p, bytes);
1459 else
1460 memcpy(p, q, bytes);
1461 q -= vcpu->pio.guest_page_offset;
1462 vunmap(q);
1463 free_pio_guest_pages(vcpu);
1464 return 0;
1465}
1466
1467int complete_pio(struct kvm_vcpu *vcpu)
1468{
1469 struct kvm_pio_request *io = &vcpu->pio;
1470 long delta;
1471 int r;
1472
1473 kvm_x86_ops->cache_regs(vcpu);
1474
1475 if (!io->string) {
1476 if (io->in)
1477 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1478 io->size);
1479 } else {
1480 if (io->in) {
1481 r = pio_copy_data(vcpu);
1482 if (r) {
1483 kvm_x86_ops->cache_regs(vcpu);
1484 return r;
1485 }
1486 }
1487
1488 delta = 1;
1489 if (io->rep) {
1490 delta *= io->cur_count;
1491 /*
1492 * The size of the register should really depend on
1493 * current address size.
1494 */
1495 vcpu->regs[VCPU_REGS_RCX] -= delta;
1496 }
1497 if (io->down)
1498 delta = -delta;
1499 delta *= io->size;
1500 if (io->in)
1501 vcpu->regs[VCPU_REGS_RDI] += delta;
1502 else
1503 vcpu->regs[VCPU_REGS_RSI] += delta;
1504 }
1505
1506 kvm_x86_ops->decache_regs(vcpu);
1507
1508 io->count -= io->cur_count;
1509 io->cur_count = 0;
1510
1511 return 0;
1512}
1513
1514static void kernel_pio(struct kvm_io_device *pio_dev,
1515 struct kvm_vcpu *vcpu,
1516 void *pd)
1517{
1518 /* TODO: String I/O for in kernel device */
1519
1520 mutex_lock(&vcpu->kvm->lock);
1521 if (vcpu->pio.in)
1522 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1523 vcpu->pio.size,
1524 pd);
1525 else
1526 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1527 vcpu->pio.size,
1528 pd);
1529 mutex_unlock(&vcpu->kvm->lock);
1530}
1531
1532static void pio_string_write(struct kvm_io_device *pio_dev,
1533 struct kvm_vcpu *vcpu)
1534{
1535 struct kvm_pio_request *io = &vcpu->pio;
1536 void *pd = vcpu->pio_data;
1537 int i;
1538
1539 mutex_lock(&vcpu->kvm->lock);
1540 for (i = 0; i < io->cur_count; i++) {
1541 kvm_iodevice_write(pio_dev, io->port,
1542 io->size,
1543 pd);
1544 pd += io->size;
1545 }
1546 mutex_unlock(&vcpu->kvm->lock);
1547}
1548
1549static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1550 gpa_t addr)
1551{
1552 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1553}
1554
1555int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1556 int size, unsigned port)
1557{
1558 struct kvm_io_device *pio_dev;
1559
1560 vcpu->run->exit_reason = KVM_EXIT_IO;
1561 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1562 vcpu->run->io.size = vcpu->pio.size = size;
1563 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1564 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1565 vcpu->run->io.port = vcpu->pio.port = port;
1566 vcpu->pio.in = in;
1567 vcpu->pio.string = 0;
1568 vcpu->pio.down = 0;
1569 vcpu->pio.guest_page_offset = 0;
1570 vcpu->pio.rep = 0;
1571
1572 kvm_x86_ops->cache_regs(vcpu);
1573 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1574 kvm_x86_ops->decache_regs(vcpu);
1575
1576 kvm_x86_ops->skip_emulated_instruction(vcpu);
1577
1578 pio_dev = vcpu_find_pio_dev(vcpu, port);
1579 if (pio_dev) {
1580 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1581 complete_pio(vcpu);
1582 return 1;
1583 }
1584 return 0;
1585}
1586EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1587
1588int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1589 int size, unsigned long count, int down,
1590 gva_t address, int rep, unsigned port)
1591{
1592 unsigned now, in_page;
1593 int i, ret = 0;
1594 int nr_pages = 1;
1595 struct page *page;
1596 struct kvm_io_device *pio_dev;
1597
1598 vcpu->run->exit_reason = KVM_EXIT_IO;
1599 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1600 vcpu->run->io.size = vcpu->pio.size = size;
1601 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1602 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1603 vcpu->run->io.port = vcpu->pio.port = port;
1604 vcpu->pio.in = in;
1605 vcpu->pio.string = 1;
1606 vcpu->pio.down = down;
1607 vcpu->pio.guest_page_offset = offset_in_page(address);
1608 vcpu->pio.rep = rep;
1609
1610 if (!count) {
1611 kvm_x86_ops->skip_emulated_instruction(vcpu);
1612 return 1;
1613 }
1614
1615 if (!down)
1616 in_page = PAGE_SIZE - offset_in_page(address);
1617 else
1618 in_page = offset_in_page(address) + size;
1619 now = min(count, (unsigned long)in_page / size);
1620 if (!now) {
1621 /*
1622 * String I/O straddles page boundary. Pin two guest pages
1623 * so that we satisfy atomicity constraints. Do just one
1624 * transaction to avoid complexity.
1625 */
1626 nr_pages = 2;
1627 now = 1;
1628 }
1629 if (down) {
1630 /*
1631 * String I/O in reverse. Yuck. Kill the guest, fix later.
1632 */
1633 pr_unimpl(vcpu, "guest string pio down\n");
1634 inject_gp(vcpu);
1635 return 1;
1636 }
1637 vcpu->run->io.count = now;
1638 vcpu->pio.cur_count = now;
1639
1640 if (vcpu->pio.cur_count == vcpu->pio.count)
1641 kvm_x86_ops->skip_emulated_instruction(vcpu);
1642
1643 for (i = 0; i < nr_pages; ++i) {
1644 mutex_lock(&vcpu->kvm->lock);
1645 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1646 vcpu->pio.guest_pages[i] = page;
1647 mutex_unlock(&vcpu->kvm->lock);
1648 if (!page) {
1649 inject_gp(vcpu);
1650 free_pio_guest_pages(vcpu);
1651 return 1;
1652 }
1653 }
1654
1655 pio_dev = vcpu_find_pio_dev(vcpu, port);
1656 if (!vcpu->pio.in) {
1657 /* string PIO write */
1658 ret = pio_copy_data(vcpu);
1659 if (ret >= 0 && pio_dev) {
1660 pio_string_write(pio_dev, vcpu);
1661 complete_pio(vcpu);
1662 if (vcpu->pio.count == 0)
1663 ret = 1;
1664 }
1665 } else if (pio_dev)
1666 pr_unimpl(vcpu, "no string pio read support yet, "
1667 "port %x size %d count %ld\n",
1668 port, size, count);
1669
1670 return ret;
1671}
1672EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1673
f8c16bba 1674int kvm_arch_init(void *opaque)
043405e1 1675{
f8c16bba
ZX		 1676 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
1677
043405e1 1678 kvm_init_msr_list();
f8c16bba
ZX		 1679
1680 if (kvm_x86_ops) {
1681 printk(KERN_ERR "kvm: already loaded the other module\n");
1682 return -EEXIST;
1683 }
1684
1685 if (!ops->cpu_has_kvm_support()) {
1686 printk(KERN_ERR "kvm: no hardware support\n");
1687 return -EOPNOTSUPP;
1688 }
1689 if (ops->disabled_by_bios()) {
1690 printk(KERN_ERR "kvm: disabled by bios\n");
1691 return -EOPNOTSUPP;
1692 }
1693
1694 kvm_x86_ops = ops;
1695
1696 return 0;
043405e1 1697}
8776e519 1698
f8c16bba
ZX		 1699void kvm_arch_exit(void)
1700{
1701 kvm_x86_ops = NULL;
1702 }
1703
8776e519
HB		 1704int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1705{
1706 ++vcpu->stat.halt_exits;
1707 if (irqchip_in_kernel(vcpu->kvm)) {
1708 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1709 kvm_vcpu_block(vcpu);
1710 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1711 return -EINTR;
1712 return 1;
1713 } else {
1714 vcpu->run->exit_reason = KVM_EXIT_HLT;
1715 return 0;
1716 }
1717}
1718EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1719
1720int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1721{
1722 unsigned long nr, a0, a1, a2, a3, ret;
1723
1724 kvm_x86_ops->cache_regs(vcpu);
1725
1726 nr = vcpu->regs[VCPU_REGS_RAX];
1727 a0 = vcpu->regs[VCPU_REGS_RBX];
1728 a1 = vcpu->regs[VCPU_REGS_RCX];
1729 a2 = vcpu->regs[VCPU_REGS_RDX];
1730 a3 = vcpu->regs[VCPU_REGS_RSI];
1731
1732 if (!is_long_mode(vcpu)) {
1733 nr &= 0xFFFFFFFF;
1734 a0 &= 0xFFFFFFFF;
1735 a1 &= 0xFFFFFFFF;
1736 a2 &= 0xFFFFFFFF;
1737 a3 &= 0xFFFFFFFF;
1738 }
1739
1740 switch (nr) {
1741 default:
1742 ret = -KVM_ENOSYS;
1743 break;
1744 }
1745 vcpu->regs[VCPU_REGS_RAX] = ret;
1746 kvm_x86_ops->decache_regs(vcpu);
1747 return 0;
1748}
1749EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1750
1751int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1752{
1753 char instruction[3];
1754 int ret = 0;
1755
1756 mutex_lock(&vcpu->kvm->lock);
1757
1758 /*
1759 * Blow out the MMU to ensure that no other VCPU has an active mapping
1760 * to ensure that the updated hypercall appears atomically across all
1761 * VCPUs.
1762 */
1763 kvm_mmu_zap_all(vcpu->kvm);
1764
1765 kvm_x86_ops->cache_regs(vcpu);
1766 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1767 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1768 != X86EMUL_CONTINUE)
1769 ret = -EFAULT;
1770
1771 mutex_unlock(&vcpu->kvm->lock);
1772
1773 return ret;
1774}
1775
1776static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1777{
1778 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1779}
1780
1781void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1782{
1783 struct descriptor_table dt = { limit, base };
1784
1785 kvm_x86_ops->set_gdt(vcpu, &dt);
1786}
1787
1788void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1789{
1790 struct descriptor_table dt = { limit, base };
1791
1792 kvm_x86_ops->set_idt(vcpu, &dt);
1793}
1794
1795void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1796 unsigned long *rflags)
1797{
1798 lmsw(vcpu, msw);
1799 *rflags = kvm_x86_ops->get_rflags(vcpu);
1800}
1801
1802unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1803{
1804 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1805 switch (cr) {
1806 case 0:
1807 return vcpu->cr0;
1808 case 2:
1809 return vcpu->cr2;
1810 case 3:
1811 return vcpu->cr3;
1812 case 4:
1813 return vcpu->cr4;
1814 default:
1815 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1816 return 0;
1817 }
1818}
1819
1820void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1821 unsigned long *rflags)
1822{
1823 switch (cr) {
1824 case 0:
1825 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1826 *rflags = kvm_x86_ops->get_rflags(vcpu);
1827 break;
1828 case 2:
1829 vcpu->cr2 = val;
1830 break;
1831 case 3:
1832 set_cr3(vcpu, val);
1833 break;
1834 case 4:
1835 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1836 break;
1837 default:
1838 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1839 }
1840}
1841
1842void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1843{
1844 int i;
1845 u32 function;
1846 struct kvm_cpuid_entry *e, *best;
1847
1848 kvm_x86_ops->cache_regs(vcpu);
1849 function = vcpu->regs[VCPU_REGS_RAX];
1850 vcpu->regs[VCPU_REGS_RAX] = 0;
1851 vcpu->regs[VCPU_REGS_RBX] = 0;
1852 vcpu->regs[VCPU_REGS_RCX] = 0;
1853 vcpu->regs[VCPU_REGS_RDX] = 0;
1854 best = NULL;
1855 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1856 e = &vcpu->cpuid_entries[i];
1857 if (e->function == function) {
1858 best = e;
1859 break;
1860 }
1861 /*
1862 * Both basic or both extended?
1863 */
1864 if (((e->function ^ function) & 0x80000000) == 0)
1865 if (!best || e->function > best->function)
1866 best = e;
1867 }
1868 if (best) {
1869 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1870 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1871 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1872 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1873 }
1874 kvm_x86_ops->decache_regs(vcpu);
1875 kvm_x86_ops->skip_emulated_instruction(vcpu);
1876}
1877EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1878
b6c7a5dc
HB		 1879/*
1880 * Check if userspace requested an interrupt window, and that the
1881 * interrupt window is open.
1882 *
1883 * No need to exit to userspace if we already have an interrupt queued.
1884 */
1885static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1886 struct kvm_run *kvm_run)
1887{
1888 return (!vcpu->irq_summary &&
1889 kvm_run->request_interrupt_window &&
1890 vcpu->interrupt_window_open &&
1891 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1892}
1893
1894static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1895 struct kvm_run *kvm_run)
1896{
1897 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1898 kvm_run->cr8 = get_cr8(vcpu);
1899 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1900 if (irqchip_in_kernel(vcpu->kvm))
1901 kvm_run->ready_for_interrupt_injection = 1;
1902 else
1903 kvm_run->ready_for_interrupt_injection =
1904 (vcpu->interrupt_window_open &&
1905 vcpu->irq_summary == 0);
1906}
1907
1908static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1909{
1910 int r;
1911
1912 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1913 pr_debug("vcpu %d received sipi with vector # %x\n",
1914 vcpu->vcpu_id, vcpu->sipi_vector);
1915 kvm_lapic_reset(vcpu);
1916 r = kvm_x86_ops->vcpu_reset(vcpu);
1917 if (r)
1918 return r;
1919 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1920 }
1921
1922preempted:
1923 if (vcpu->guest_debug.enabled)
1924 kvm_x86_ops->guest_debug_pre(vcpu);
1925
1926again:
1927 r = kvm_mmu_reload(vcpu);
1928 if (unlikely(r))
1929 goto out;
1930
1931 kvm_inject_pending_timer_irqs(vcpu);
1932
1933 preempt_disable();
1934
1935 kvm_x86_ops->prepare_guest_switch(vcpu);
1936 kvm_load_guest_fpu(vcpu);
1937
1938 local_irq_disable();
1939
1940 if (signal_pending(current)) {
1941 local_irq_enable();
1942 preempt_enable();
1943 r = -EINTR;
1944 kvm_run->exit_reason = KVM_EXIT_INTR;
1945 ++vcpu->stat.signal_exits;
1946 goto out;
1947 }
1948
1949 if (irqchip_in_kernel(vcpu->kvm))
1950 kvm_x86_ops->inject_pending_irq(vcpu);
1951 else if (!vcpu->mmio_read_completed)
1952 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
1953
1954 vcpu->guest_mode = 1;
1955 kvm_guest_enter();
1956
1957 if (vcpu->requests)
1958 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
1959 kvm_x86_ops->tlb_flush(vcpu);
1960
1961 kvm_x86_ops->run(vcpu, kvm_run);
1962
1963 vcpu->guest_mode = 0;
1964 local_irq_enable();
1965
1966 ++vcpu->stat.exits;
1967
1968 /*
1969 * We must have an instruction between local_irq_enable() and
1970 * kvm_guest_exit(), so the timer interrupt isn't delayed by
1971 * the interrupt shadow. The stat.exits increment will do nicely.
1972 * But we need to prevent reordering, hence this barrier():
1973 */
1974 barrier();
1975
1976 kvm_guest_exit();
1977
1978 preempt_enable();
1979
1980 /*
1981 * Profile KVM exit RIPs:
1982 */
1983 if (unlikely(prof_on == KVM_PROFILING)) {
1984 kvm_x86_ops->cache_regs(vcpu);
1985 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
1986 }
1987
1988 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
1989
1990 if (r > 0) {
1991 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1992 r = -EINTR;
1993 kvm_run->exit_reason = KVM_EXIT_INTR;
1994 ++vcpu->stat.request_irq_exits;
1995 goto out;
1996 }
e1beb1d3 1997 if (!need_resched())
b6c7a5dc 1998 goto again;
b6c7a5dc
HB		 1999 }
2000
2001out:
2002 if (r > 0) {
2003 kvm_resched(vcpu);
2004 goto preempted;
2005 }
2006
2007 post_kvm_run_save(vcpu, kvm_run);
2008
2009 return r;
2010}
2011
2012int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2013{
2014 int r;
2015 sigset_t sigsaved;
2016
2017 vcpu_load(vcpu);
2018
2019 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2020 kvm_vcpu_block(vcpu);
2021 vcpu_put(vcpu);
2022 return -EAGAIN;
2023 }
2024
2025 if (vcpu->sigset_active)
2026 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2027
2028 /* re-sync apic's tpr */
2029 if (!irqchip_in_kernel(vcpu->kvm))
2030 set_cr8(vcpu, kvm_run->cr8);
2031
2032 if (vcpu->pio.cur_count) {
2033 r = complete_pio(vcpu);
2034 if (r)
2035 goto out;
2036 }
2037#if CONFIG_HAS_IOMEM
2038 if (vcpu->mmio_needed) {
2039 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2040 vcpu->mmio_read_completed = 1;
2041 vcpu->mmio_needed = 0;
2042 r = emulate_instruction(vcpu, kvm_run,
2043 vcpu->mmio_fault_cr2, 0, 1);
2044 if (r == EMULATE_DO_MMIO) {
2045 /*
2046 * Read-modify-write. Back to userspace.
2047 */
2048 r = 0;
2049 goto out;
2050 }
2051 }
2052#endif
2053 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2054 kvm_x86_ops->cache_regs(vcpu);
2055 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2056 kvm_x86_ops->decache_regs(vcpu);
2057 }
2058
2059 r = __vcpu_run(vcpu, kvm_run);
2060
2061out:
2062 if (vcpu->sigset_active)
2063 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2064
2065 vcpu_put(vcpu);
2066 return r;
2067}
2068
2069int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2070{
2071 vcpu_load(vcpu);
2072
2073 kvm_x86_ops->cache_regs(vcpu);
2074
2075 regs->rax = vcpu->regs[VCPU_REGS_RAX];
2076 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
2077 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
2078 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
2079 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
2080 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
2081 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
2082 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
2083#ifdef CONFIG_X86_64
2084 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2085 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2086 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2087 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2088 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2089 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2090 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2091 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2092#endif
2093
2094 regs->rip = vcpu->rip;
2095 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2096
2097 /*
2098 * Don't leak debug flags in case they were set for guest debugging
2099 */
2100 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2101 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2102
2103 vcpu_put(vcpu);
2104
2105 return 0;
2106}
2107
2108int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2109{
2110 vcpu_load(vcpu);
2111
2112 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2113 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2114 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2115 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2116 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2117 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2118 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2119 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2120#ifdef CONFIG_X86_64
2121 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2122 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2123 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2124 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2125 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2126 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2127 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2128 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2129#endif
2130
2131 vcpu->rip = regs->rip;
2132 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2133
2134 kvm_x86_ops->decache_regs(vcpu);
2135
2136 vcpu_put(vcpu);
2137
2138 return 0;
2139}
2140
2141static void get_segment(struct kvm_vcpu *vcpu,
2142 struct kvm_segment *var, int seg)
2143{
2144 return kvm_x86_ops->get_segment(vcpu, var, seg);
2145}
2146
2147void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2148{
2149 struct kvm_segment cs;
2150
2151 get_segment(vcpu, &cs, VCPU_SREG_CS);
2152 *db = cs.db;
2153 *l = cs.l;
2154}
2155EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2156
2157int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2158 struct kvm_sregs *sregs)
2159{
2160 struct descriptor_table dt;
2161 int pending_vec;
2162
2163 vcpu_load(vcpu);
2164
2165 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2166 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2167 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2168 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2169 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2170 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2171
2172 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2173 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2174
2175 kvm_x86_ops->get_idt(vcpu, &dt);
2176 sregs->idt.limit = dt.limit;
2177 sregs->idt.base = dt.base;
2178 kvm_x86_ops->get_gdt(vcpu, &dt);
2179 sregs->gdt.limit = dt.limit;
2180 sregs->gdt.base = dt.base;
2181
2182 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2183 sregs->cr0 = vcpu->cr0;
2184 sregs->cr2 = vcpu->cr2;
2185 sregs->cr3 = vcpu->cr3;
2186 sregs->cr4 = vcpu->cr4;
2187 sregs->cr8 = get_cr8(vcpu);
2188 sregs->efer = vcpu->shadow_efer;
2189 sregs->apic_base = kvm_get_apic_base(vcpu);
2190
2191 if (irqchip_in_kernel(vcpu->kvm)) {
2192 memset(sregs->interrupt_bitmap, 0,
2193 sizeof sregs->interrupt_bitmap);
2194 pending_vec = kvm_x86_ops->get_irq(vcpu);
2195 if (pending_vec >= 0)
2196 set_bit(pending_vec,
2197 (unsigned long *)sregs->interrupt_bitmap);
2198 } else
2199 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2200 sizeof sregs->interrupt_bitmap);
2201
2202 vcpu_put(vcpu);
2203
2204 return 0;
2205}
2206
2207static void set_segment(struct kvm_vcpu *vcpu,
2208 struct kvm_segment *var, int seg)
2209{
2210 return kvm_x86_ops->set_segment(vcpu, var, seg);
2211}
2212
2213int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2214 struct kvm_sregs *sregs)
2215{
2216 int mmu_reset_needed = 0;
2217 int i, pending_vec, max_bits;
2218 struct descriptor_table dt;
2219
2220 vcpu_load(vcpu);
2221
2222 dt.limit = sregs->idt.limit;
2223 dt.base = sregs->idt.base;
2224 kvm_x86_ops->set_idt(vcpu, &dt);
2225 dt.limit = sregs->gdt.limit;
2226 dt.base = sregs->gdt.base;
2227 kvm_x86_ops->set_gdt(vcpu, &dt);
2228
2229 vcpu->cr2 = sregs->cr2;
2230 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2231 vcpu->cr3 = sregs->cr3;
2232
2233 set_cr8(vcpu, sregs->cr8);
2234
2235 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2236#ifdef CONFIG_X86_64
2237 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2238#endif
2239 kvm_set_apic_base(vcpu, sregs->apic_base);
2240
2241 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2242
2243 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2244 vcpu->cr0 = sregs->cr0;
2245 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2246
2247 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2248 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2249 if (!is_long_mode(vcpu) && is_pae(vcpu))
2250 load_pdptrs(vcpu, vcpu->cr3);
2251
2252 if (mmu_reset_needed)
2253 kvm_mmu_reset_context(vcpu);
2254
2255 if (!irqchip_in_kernel(vcpu->kvm)) {
2256 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2257 sizeof vcpu->irq_pending);
2258 vcpu->irq_summary = 0;
2259 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2260 if (vcpu->irq_pending[i])
2261 __set_bit(i, &vcpu->irq_summary);
2262 } else {
2263 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2264 pending_vec = find_first_bit(
2265 (const unsigned long *)sregs->interrupt_bitmap,
2266 max_bits);
2267 /* Only pending external irq is handled here */
2268 if (pending_vec < max_bits) {
2269 kvm_x86_ops->set_irq(vcpu, pending_vec);
2270 pr_debug("Set back pending irq %d\n",
2271 pending_vec);
2272 }
2273 }
2274
2275 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2276 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2277 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2278 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2279 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2280 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2281
2282 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2283 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2284
2285 vcpu_put(vcpu);
2286
2287 return 0;
2288}
2289
2290int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2291 struct kvm_debug_guest *dbg)
2292{
2293 int r;
2294
2295 vcpu_load(vcpu);
2296
2297 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2298
2299 vcpu_put(vcpu);
2300
2301 return r;
2302}
2303
d0752060
HB		 2304/*
2305 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2306 * we have asm/x86/processor.h
2307 */
2308struct fxsave {
2309 u16 cwd;
2310 u16 swd;
2311 u16 twd;
2312 u16 fop;
2313 u64 rip;
2314 u64 rdp;
2315 u32 mxcsr;
2316 u32 mxcsr_mask;
2317 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2318#ifdef CONFIG_X86_64
2319 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2320#else
2321 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2322#endif
2323};
2324
8b006791
ZX		 2325/*
2326 * Translate a guest virtual address to a guest physical address.
2327 */
2328int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2329 struct kvm_translation *tr)
2330{
2331 unsigned long vaddr = tr->linear_address;
2332 gpa_t gpa;
2333
2334 vcpu_load(vcpu);
2335 mutex_lock(&vcpu->kvm->lock);
2336 gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
2337 tr->physical_address = gpa;
2338 tr->valid = gpa != UNMAPPED_GVA;
2339 tr->writeable = 1;
2340 tr->usermode = 0;
2341 mutex_unlock(&vcpu->kvm->lock);
2342 vcpu_put(vcpu);
2343
2344 return 0;
2345}
2346
d0752060
HB		 2347int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2348{
2349 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2350
2351 vcpu_load(vcpu);
2352
2353 memcpy(fpu->fpr, fxsave->st_space, 128);
2354 fpu->fcw = fxsave->cwd;
2355 fpu->fsw = fxsave->swd;
2356 fpu->ftwx = fxsave->twd;
2357 fpu->last_opcode = fxsave->fop;
2358 fpu->last_ip = fxsave->rip;
2359 fpu->last_dp = fxsave->rdp;
2360 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2361
2362 vcpu_put(vcpu);
2363
2364 return 0;
2365}
2366
2367int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2368{
2369 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2370
2371 vcpu_load(vcpu);
2372
2373 memcpy(fxsave->st_space, fpu->fpr, 128);
2374 fxsave->cwd = fpu->fcw;
2375 fxsave->swd = fpu->fsw;
2376 fxsave->twd = fpu->ftwx;
2377 fxsave->fop = fpu->last_opcode;
2378 fxsave->rip = fpu->last_ip;
2379 fxsave->rdp = fpu->last_dp;
2380 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2381
2382 vcpu_put(vcpu);
2383
2384 return 0;
2385}
2386
2387void fx_init(struct kvm_vcpu *vcpu)
2388{
2389 unsigned after_mxcsr_mask;
2390
2391 /* Initialize guest FPU by resetting ours and saving into guest's */
2392 preempt_disable();
2393 fx_save(&vcpu->host_fx_image);
2394 fpu_init();
2395 fx_save(&vcpu->guest_fx_image);
2396 fx_restore(&vcpu->host_fx_image);
2397 preempt_enable();
2398
2399 vcpu->cr0 |= X86_CR0_ET;
2400 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2401 vcpu->guest_fx_image.mxcsr = 0x1f80;
2402 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2403 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2404}
2405EXPORT_SYMBOL_GPL(fx_init);
2406
2407void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2408{
2409 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2410 return;
2411
2412 vcpu->guest_fpu_loaded = 1;
2413 fx_save(&vcpu->host_fx_image);
2414 fx_restore(&vcpu->guest_fx_image);
2415}
2416EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2417
2418void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2419{
2420 if (!vcpu->guest_fpu_loaded)
2421 return;
2422
2423 vcpu->guest_fpu_loaded = 0;
2424 fx_save(&vcpu->guest_fx_image);
2425 fx_restore(&vcpu->host_fx_image);
f096ed85 2426 ++vcpu->stat.fpu_reload;
d0752060
HB		 2427}
2428EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 2429
2430void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
2431{
2432 kvm_x86_ops->vcpu_free(vcpu);
2433}
2434
2435struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
2436 unsigned int id)
2437{
2438 int r;
2439 struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
2440
2441 if (IS_ERR(vcpu)) {
2442 r = -ENOMEM;
2443 goto fail;
2444 }
2445
2446 /* We do fxsave: this must be aligned. */
2447 BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
2448
2449 vcpu_load(vcpu);
2450 r = kvm_arch_vcpu_reset(vcpu);
2451 if (r == 0)
2452 r = kvm_mmu_setup(vcpu);
2453 vcpu_put(vcpu);
2454 if (r < 0)
2455 goto free_vcpu;
2456
2457 return vcpu;
2458free_vcpu:
2459 kvm_x86_ops->vcpu_free(vcpu);
2460fail:
2461 return ERR_PTR(r);
2462}
2463
2464void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu)
2465{
2466 vcpu_load(vcpu);
2467 kvm_mmu_unload(vcpu);
2468 vcpu_put(vcpu);
2469
2470 kvm_x86_ops->vcpu_free(vcpu);
2471}
2472
2473int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
2474{
2475 return kvm_x86_ops->vcpu_reset(vcpu);
2476}
2477
2478void kvm_arch_hardware_enable(void *garbage)
2479{
2480 kvm_x86_ops->hardware_enable(garbage);
2481}
2482
2483void kvm_arch_hardware_disable(void *garbage)
2484{
2485 kvm_x86_ops->hardware_disable(garbage);
2486}
2487
2488int kvm_arch_hardware_setup(void)
2489{
2490 return kvm_x86_ops->hardware_setup();
2491}
2492
2493void kvm_arch_hardware_unsetup(void)
2494{
2495 kvm_x86_ops->hardware_unsetup();
2496}
2497
2498void kvm_arch_check_processor_compat(void *rtn)
2499{
2500 kvm_x86_ops->check_processor_compatibility(rtn);
2501}
2502
2503int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
2504{
2505 struct page *page;
2506 struct kvm *kvm;
2507 int r;
2508
2509 BUG_ON(vcpu->kvm == NULL);
2510 kvm = vcpu->kvm;
2511
2512 vcpu->mmu.root_hpa = INVALID_PAGE;
2513 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
2514 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
2515 else
2516 vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
2517
2518 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
2519 if (!page) {
2520 r = -ENOMEM;
2521 goto fail;
2522 }
2523 vcpu->pio_data = page_address(page);
2524
2525 r = kvm_mmu_create(vcpu);
2526 if (r < 0)
2527 goto fail_free_pio_data;
2528
2529 if (irqchip_in_kernel(kvm)) {
2530 r = kvm_create_lapic(vcpu);
2531 if (r < 0)
2532 goto fail_mmu_destroy;
2533 }
2534
2535 return 0;
2536
2537fail_mmu_destroy:
2538 kvm_mmu_destroy(vcpu);
2539fail_free_pio_data:
2540 free_page((unsigned long)vcpu->pio_data);
2541fail:
2542 return r;
2543}
2544
2545void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
2546{
2547 kvm_free_lapic(vcpu);
2548 kvm_mmu_destroy(vcpu);
2549 free_page((unsigned long)vcpu->pio_data);
2550}
d19a9cd2
ZX		 2551
2552struct kvm *kvm_arch_create_vm(void)
2553{
2554 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
2555
2556 if (!kvm)
2557 return ERR_PTR(-ENOMEM);
2558
2559 INIT_LIST_HEAD(&kvm->active_mmu_pages);
2560
2561 return kvm;
2562}
2563
2564static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
2565{
2566 vcpu_load(vcpu);
2567 kvm_mmu_unload(vcpu);
2568 vcpu_put(vcpu);
2569}
2570
2571static void kvm_free_vcpus(struct kvm *kvm)
2572{
2573 unsigned int i;
2574
2575 /*
2576 * Unpin any mmu pages first.
2577 */
2578 for (i = 0; i < KVM_MAX_VCPUS; ++i)
2579 if (kvm->vcpus[i])
2580 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
2581 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2582 if (kvm->vcpus[i]) {
2583 kvm_arch_vcpu_free(kvm->vcpus[i]);
2584 kvm->vcpus[i] = NULL;
2585 }
2586 }
2587
2588}
2589
2590void kvm_arch_destroy_vm(struct kvm *kvm)
2591{
2592 kfree(kvm->vpic);
2593 kfree(kvm->vioapic);
2594 kvm_free_vcpus(kvm);
2595 kvm_free_physmem(kvm);
2596 kfree(kvm);
2597}
Linux 6.x block layer and io_uring tree(s)