projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
KVM: Recalculate mmu pages needed for every memory region change
[linux-2.6-block.git] / drivers / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
313a3dc7
CO		 21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
043405e1
CO		 27
28#include <asm/uaccess.h>
d825ed0a 29#include <asm/msr.h>
043405e1 30
313a3dc7 31#define MAX_IO_MSRS 256
a03490ed
CO		 32#define CR0_RESERVED_BITS \
33 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
34 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
35 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
36#define CR4_RESERVED_BITS \
37 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
38 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
39 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
40 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
41
42#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 43#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 44
ba1389b7
AK		 45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 47
97896d04
ZX		 48struct kvm_x86_ops *kvm_x86_ops;
49
417bc304 50struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 51 { "pf_fixed", VCPU_STAT(pf_fixed) },
52 { "pf_guest", VCPU_STAT(pf_guest) },
53 { "tlb_flush", VCPU_STAT(tlb_flush) },
54 { "invlpg", VCPU_STAT(invlpg) },
55 { "exits", VCPU_STAT(exits) },
56 { "io_exits", VCPU_STAT(io_exits) },
57 { "mmio_exits", VCPU_STAT(mmio_exits) },
58 { "signal_exits", VCPU_STAT(signal_exits) },
59 { "irq_window", VCPU_STAT(irq_window_exits) },
60 { "halt_exits", VCPU_STAT(halt_exits) },
61 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
62 { "request_irq", VCPU_STAT(request_irq_exits) },
63 { "irq_exits", VCPU_STAT(irq_exits) },
64 { "host_state_reload", VCPU_STAT(host_state_reload) },
65 { "efer_reload", VCPU_STAT(efer_reload) },
66 { "fpu_reload", VCPU_STAT(fpu_reload) },
67 { "insn_emulation", VCPU_STAT(insn_emulation) },
68 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 69 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
70 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
71 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
72 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
73 { "mmu_flooded", VM_STAT(mmu_flooded) },
74 { "mmu_recycled", VM_STAT(mmu_recycled) },
417bc304
HB		 75 { NULL }
76};
77
78
5fb76f9b
CO		 79unsigned long segment_base(u16 selector)
80{
81 struct descriptor_table gdt;
82 struct segment_descriptor *d;
83 unsigned long table_base;
84 unsigned long v;
85
86 if (selector == 0)
87 return 0;
88
89 asm("sgdt %0" : "=m"(gdt));
90 table_base = gdt.base;
91
92 if (selector & 4) { /* from ldt */
93 u16 ldt_selector;
94
95 asm("sldt %0" : "=g"(ldt_selector));
96 table_base = segment_base(ldt_selector);
97 }
98 d = (struct segment_descriptor *)(table_base + (selector & ~7));
99 v = d->base_low | ((unsigned long)d->base_mid << 16) |
100 ((unsigned long)d->base_high << 24);
101#ifdef CONFIG_X86_64
102 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
103 v |= ((unsigned long) \
104 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
105#endif
106 return v;
107}
108EXPORT_SYMBOL_GPL(segment_base);
109
6866b83e
CO		 110u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
111{
112 if (irqchip_in_kernel(vcpu->kvm))
113 return vcpu->apic_base;
114 else
115 return vcpu->apic_base;
116}
117EXPORT_SYMBOL_GPL(kvm_get_apic_base);
118
119void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
120{
121 /* TODO: reserve bits check */
122 if (irqchip_in_kernel(vcpu->kvm))
123 kvm_lapic_set_base(vcpu, data);
124 else
125 vcpu->apic_base = data;
126}
127EXPORT_SYMBOL_GPL(kvm_set_apic_base);
128
a03490ed
CO		 129static void inject_gp(struct kvm_vcpu *vcpu)
130{
131 kvm_x86_ops->inject_gp(vcpu, 0);
132}
133
134/*
135 * Load the pae pdptrs. Return true is they are all valid.
136 */
137int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
138{
139 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
140 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
141 int i;
142 int ret;
143 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
144
145 mutex_lock(&vcpu->kvm->lock);
146 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
147 offset * sizeof(u64), sizeof(pdpte));
148 if (ret < 0) {
149 ret = 0;
150 goto out;
151 }
152 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
153 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
154 ret = 0;
155 goto out;
156 }
157 }
158 ret = 1;
159
160 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
161out:
162 mutex_unlock(&vcpu->kvm->lock);
163
164 return ret;
165}
166
167void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
168{
169 if (cr0 & CR0_RESERVED_BITS) {
170 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
171 cr0, vcpu->cr0);
172 inject_gp(vcpu);
173 return;
174 }
175
176 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
177 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
178 inject_gp(vcpu);
179 return;
180 }
181
182 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
183 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
184 "and a clear PE flag\n");
185 inject_gp(vcpu);
186 return;
187 }
188
189 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
190#ifdef CONFIG_X86_64
191 if ((vcpu->shadow_efer & EFER_LME)) {
192 int cs_db, cs_l;
193
194 if (!is_pae(vcpu)) {
195 printk(KERN_DEBUG "set_cr0: #GP, start paging "
196 "in long mode while PAE is disabled\n");
197 inject_gp(vcpu);
198 return;
199 }
200 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
201 if (cs_l) {
202 printk(KERN_DEBUG "set_cr0: #GP, start paging "
203 "in long mode while CS.L == 1\n");
204 inject_gp(vcpu);
205 return;
206
207 }
208 } else
209#endif
210 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
211 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
212 "reserved bits\n");
213 inject_gp(vcpu);
214 return;
215 }
216
217 }
218
219 kvm_x86_ops->set_cr0(vcpu, cr0);
220 vcpu->cr0 = cr0;
221
222 mutex_lock(&vcpu->kvm->lock);
223 kvm_mmu_reset_context(vcpu);
224 mutex_unlock(&vcpu->kvm->lock);
225 return;
226}
227EXPORT_SYMBOL_GPL(set_cr0);
228
229void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
230{
231 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
232}
233EXPORT_SYMBOL_GPL(lmsw);
234
235void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
236{
237 if (cr4 & CR4_RESERVED_BITS) {
238 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
239 inject_gp(vcpu);
240 return;
241 }
242
243 if (is_long_mode(vcpu)) {
244 if (!(cr4 & X86_CR4_PAE)) {
245 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
246 "in long mode\n");
247 inject_gp(vcpu);
248 return;
249 }
250 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
251 && !load_pdptrs(vcpu, vcpu->cr3)) {
252 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
253 inject_gp(vcpu);
254 return;
255 }
256
257 if (cr4 & X86_CR4_VMXE) {
258 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
259 inject_gp(vcpu);
260 return;
261 }
262 kvm_x86_ops->set_cr4(vcpu, cr4);
263 vcpu->cr4 = cr4;
264 mutex_lock(&vcpu->kvm->lock);
265 kvm_mmu_reset_context(vcpu);
266 mutex_unlock(&vcpu->kvm->lock);
267}
268EXPORT_SYMBOL_GPL(set_cr4);
269
270void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
271{
272 if (is_long_mode(vcpu)) {
273 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
274 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
275 inject_gp(vcpu);
276 return;
277 }
278 } else {
279 if (is_pae(vcpu)) {
280 if (cr3 & CR3_PAE_RESERVED_BITS) {
281 printk(KERN_DEBUG
282 "set_cr3: #GP, reserved bits\n");
283 inject_gp(vcpu);
284 return;
285 }
286 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
287 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
288 "reserved bits\n");
289 inject_gp(vcpu);
290 return;
291 }
292 }
293 /*
294 * We don't check reserved bits in nonpae mode, because
295 * this isn't enforced, and VMware depends on this.
296 */
297 }
298
299 mutex_lock(&vcpu->kvm->lock);
300 /*
301 * Does the new cr3 value map to physical memory? (Note, we
302 * catch an invalid cr3 even in real-mode, because it would
303 * cause trouble later on when we turn on paging anyway.)
304 *
305 * A real CPU would silently accept an invalid cr3 and would
306 * attempt to use it - with largely undefined (and often hard
307 * to debug) behavior on the guest side.
308 */
309 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
310 inject_gp(vcpu);
311 else {
312 vcpu->cr3 = cr3;
313 vcpu->mmu.new_cr3(vcpu);
314 }
315 mutex_unlock(&vcpu->kvm->lock);
316}
317EXPORT_SYMBOL_GPL(set_cr3);
318
319void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
320{
321 if (cr8 & CR8_RESERVED_BITS) {
322 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
323 inject_gp(vcpu);
324 return;
325 }
326 if (irqchip_in_kernel(vcpu->kvm))
327 kvm_lapic_set_tpr(vcpu, cr8);
328 else
329 vcpu->cr8 = cr8;
330}
331EXPORT_SYMBOL_GPL(set_cr8);
332
333unsigned long get_cr8(struct kvm_vcpu *vcpu)
334{
335 if (irqchip_in_kernel(vcpu->kvm))
336 return kvm_lapic_get_cr8(vcpu);
337 else
338 return vcpu->cr8;
339}
340EXPORT_SYMBOL_GPL(get_cr8);
341
043405e1
CO		 342/*
343 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
344 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
345 *
346 * This list is modified at module load time to reflect the
347 * capabilities of the host cpu.
348 */
349static u32 msrs_to_save[] = {
350 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
351 MSR_K6_STAR,
352#ifdef CONFIG_X86_64
353 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
354#endif
355 MSR_IA32_TIME_STAMP_COUNTER,
356};
357
358static unsigned num_msrs_to_save;
359
360static u32 emulated_msrs[] = {
361 MSR_IA32_MISC_ENABLE,
362};
363
15c4a640
CO		 364#ifdef CONFIG_X86_64
365
366static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
367{
368 if (efer & EFER_RESERVED_BITS) {
369 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
370 efer);
371 inject_gp(vcpu);
372 return;
373 }
374
375 if (is_paging(vcpu)
376 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
377 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
378 inject_gp(vcpu);
379 return;
380 }
381
382 kvm_x86_ops->set_efer(vcpu, efer);
383
384 efer &= ~EFER_LMA;
385 efer |= vcpu->shadow_efer & EFER_LMA;
386
387 vcpu->shadow_efer = efer;
388}
389
390#endif
391
392/*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398{
399 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
400}
401
313a3dc7
CO		 402/*
403 * Adapt set_msr() to msr_io()'s calling convention
404 */
405static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
406{
407 return kvm_set_msr(vcpu, index, *data);
408}
409
15c4a640
CO		 410
411int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
412{
413 switch (msr) {
414#ifdef CONFIG_X86_64
415 case MSR_EFER:
416 set_efer(vcpu, data);
417 break;
418#endif
419 case MSR_IA32_MC0_STATUS:
420 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
421 __FUNCTION__, data);
422 break;
423 case MSR_IA32_MCG_STATUS:
424 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
425 __FUNCTION__, data);
426 break;
427 case MSR_IA32_UCODE_REV:
428 case MSR_IA32_UCODE_WRITE:
429 case 0x200 ... 0x2ff: /* MTRRs */
430 break;
431 case MSR_IA32_APICBASE:
432 kvm_set_apic_base(vcpu, data);
433 break;
434 case MSR_IA32_MISC_ENABLE:
435 vcpu->ia32_misc_enable_msr = data;
436 break;
437 default:
438 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
439 return 1;
440 }
441 return 0;
442}
443EXPORT_SYMBOL_GPL(kvm_set_msr_common);
444
445
446/*
447 * Reads an msr value (of 'msr_index') into 'pdata'.
448 * Returns 0 on success, non-0 otherwise.
449 * Assumes vcpu_load() was already called.
450 */
451int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
452{
453 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
454}
455
456int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
457{
458 u64 data;
459
460 switch (msr) {
461 case 0xc0010010: /* SYSCFG */
462 case 0xc0010015: /* HWCR */
463 case MSR_IA32_PLATFORM_ID:
464 case MSR_IA32_P5_MC_ADDR:
465 case MSR_IA32_P5_MC_TYPE:
466 case MSR_IA32_MC0_CTL:
467 case MSR_IA32_MCG_STATUS:
468 case MSR_IA32_MCG_CAP:
469 case MSR_IA32_MC0_MISC:
470 case MSR_IA32_MC0_MISC+4:
471 case MSR_IA32_MC0_MISC+8:
472 case MSR_IA32_MC0_MISC+12:
473 case MSR_IA32_MC0_MISC+16:
474 case MSR_IA32_UCODE_REV:
475 case MSR_IA32_PERF_STATUS:
476 case MSR_IA32_EBL_CR_POWERON:
477 /* MTRR registers */
478 case 0xfe:
479 case 0x200 ... 0x2ff:
480 data = 0;
481 break;
482 case 0xcd: /* fsb frequency */
483 data = 3;
484 break;
485 case MSR_IA32_APICBASE:
486 data = kvm_get_apic_base(vcpu);
487 break;
488 case MSR_IA32_MISC_ENABLE:
489 data = vcpu->ia32_misc_enable_msr;
490 break;
491#ifdef CONFIG_X86_64
492 case MSR_EFER:
493 data = vcpu->shadow_efer;
494 break;
495#endif
496 default:
497 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
498 return 1;
499 }
500 *pdata = data;
501 return 0;
502}
503EXPORT_SYMBOL_GPL(kvm_get_msr_common);
504
313a3dc7
CO		 505/*
506 * Read or write a bunch of msrs. All parameters are kernel addresses.
507 *
508 * @return number of msrs set successfully.
509 */
510static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
511 struct kvm_msr_entry *entries,
512 int (*do_msr)(struct kvm_vcpu *vcpu,
513 unsigned index, u64 *data))
514{
515 int i;
516
517 vcpu_load(vcpu);
518
519 for (i = 0; i < msrs->nmsrs; ++i)
520 if (do_msr(vcpu, entries[i].index, &entries[i].data))
521 break;
522
523 vcpu_put(vcpu);
524
525 return i;
526}
527
528/*
529 * Read or write a bunch of msrs. Parameters are user addresses.
530 *
531 * @return number of msrs set successfully.
532 */
533static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
534 int (*do_msr)(struct kvm_vcpu *vcpu,
535 unsigned index, u64 *data),
536 int writeback)
537{
538 struct kvm_msrs msrs;
539 struct kvm_msr_entry *entries;
540 int r, n;
541 unsigned size;
542
543 r = -EFAULT;
544 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
545 goto out;
546
547 r = -E2BIG;
548 if (msrs.nmsrs >= MAX_IO_MSRS)
549 goto out;
550
551 r = -ENOMEM;
552 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
553 entries = vmalloc(size);
554 if (!entries)
555 goto out;
556
557 r = -EFAULT;
558 if (copy_from_user(entries, user_msrs->entries, size))
559 goto out_free;
560
561 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
562 if (r < 0)
563 goto out_free;
564
565 r = -EFAULT;
566 if (writeback && copy_to_user(user_msrs->entries, entries, size))
567 goto out_free;
568
569 r = n;
570
571out_free:
572 vfree(entries);
573out:
574 return r;
575}
576
e9b11c17
ZX		 577/*
578 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
579 * cached on it.
580 */
581void decache_vcpus_on_cpu(int cpu)
582{
583 struct kvm *vm;
584 struct kvm_vcpu *vcpu;
585 int i;
586
587 spin_lock(&kvm_lock);
588 list_for_each_entry(vm, &vm_list, vm_list)
589 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
590 vcpu = vm->vcpus[i];
591 if (!vcpu)
592 continue;
593 /*
594 * If the vcpu is locked, then it is running on some
595 * other cpu and therefore it is not cached on the
596 * cpu in question.
597 *
598 * If it's not locked, check the last cpu it executed
599 * on.
600 */
601 if (mutex_trylock(&vcpu->mutex)) {
602 if (vcpu->cpu == cpu) {
603 kvm_x86_ops->vcpu_decache(vcpu);
604 vcpu->cpu = -1;
605 }
606 mutex_unlock(&vcpu->mutex);
607 }
608 }
609 spin_unlock(&kvm_lock);
610}
611
018d00d2
ZX		 612int kvm_dev_ioctl_check_extension(long ext)
613{
614 int r;
615
616 switch (ext) {
617 case KVM_CAP_IRQCHIP:
618 case KVM_CAP_HLT:
619 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
620 case KVM_CAP_USER_MEMORY:
621 case KVM_CAP_SET_TSS_ADDR:
622 r = 1;
623 break;
624 default:
625 r = 0;
626 break;
627 }
628 return r;
629
630}
631
043405e1
CO		 632long kvm_arch_dev_ioctl(struct file *filp,
633 unsigned int ioctl, unsigned long arg)
634{
635 void __user *argp = (void __user *)arg;
636 long r;
637
638 switch (ioctl) {
639 case KVM_GET_MSR_INDEX_LIST: {
640 struct kvm_msr_list __user *user_msr_list = argp;
641 struct kvm_msr_list msr_list;
642 unsigned n;
643
644 r = -EFAULT;
645 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
646 goto out;
647 n = msr_list.nmsrs;
648 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
649 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
650 goto out;
651 r = -E2BIG;
652 if (n < num_msrs_to_save)
653 goto out;
654 r = -EFAULT;
655 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
656 num_msrs_to_save * sizeof(u32)))
657 goto out;
658 if (copy_to_user(user_msr_list->indices
659 + num_msrs_to_save * sizeof(u32),
660 &emulated_msrs,
661 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
662 goto out;
663 r = 0;
664 break;
665 }
666 default:
667 r = -EINVAL;
668 }
669out:
670 return r;
671}
672
313a3dc7
CO		 673void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
674{
675 kvm_x86_ops->vcpu_load(vcpu, cpu);
676}
677
678void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
679{
680 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 681 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 682}
683
684static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
685{
686 u64 efer;
687 int i;
688 struct kvm_cpuid_entry *e, *entry;
689
690 rdmsrl(MSR_EFER, efer);
691 entry = NULL;
692 for (i = 0; i < vcpu->cpuid_nent; ++i) {
693 e = &vcpu->cpuid_entries[i];
694 if (e->function == 0x80000001) {
695 entry = e;
696 break;
697 }
698 }
699 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
700 entry->edx &= ~(1 << 20);
701 printk(KERN_INFO "kvm: guest NX capability removed\n");
702 }
703}
704
705static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
706 struct kvm_cpuid *cpuid,
707 struct kvm_cpuid_entry __user *entries)
708{
709 int r;
710
711 r = -E2BIG;
712 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
713 goto out;
714 r = -EFAULT;
715 if (copy_from_user(&vcpu->cpuid_entries, entries,
716 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
717 goto out;
718 vcpu->cpuid_nent = cpuid->nent;
719 cpuid_fix_nx_cap(vcpu);
720 return 0;
721
722out:
723 return r;
724}
725
726static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
727 struct kvm_lapic_state *s)
728{
729 vcpu_load(vcpu);
730 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
731 vcpu_put(vcpu);
732
733 return 0;
734}
735
736static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
737 struct kvm_lapic_state *s)
738{
739 vcpu_load(vcpu);
740 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
741 kvm_apic_post_state_restore(vcpu);
742 vcpu_put(vcpu);
743
744 return 0;
745}
746
747long kvm_arch_vcpu_ioctl(struct file *filp,
748 unsigned int ioctl, unsigned long arg)
749{
750 struct kvm_vcpu *vcpu = filp->private_data;
751 void __user *argp = (void __user *)arg;
752 int r;
753
754 switch (ioctl) {
755 case KVM_GET_LAPIC: {
756 struct kvm_lapic_state lapic;
757
758 memset(&lapic, 0, sizeof lapic);
759 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
760 if (r)
761 goto out;
762 r = -EFAULT;
763 if (copy_to_user(argp, &lapic, sizeof lapic))
764 goto out;
765 r = 0;
766 break;
767 }
768 case KVM_SET_LAPIC: {
769 struct kvm_lapic_state lapic;
770
771 r = -EFAULT;
772 if (copy_from_user(&lapic, argp, sizeof lapic))
773 goto out;
774 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
775 if (r)
776 goto out;
777 r = 0;
778 break;
779 }
780 case KVM_SET_CPUID: {
781 struct kvm_cpuid __user *cpuid_arg = argp;
782 struct kvm_cpuid cpuid;
783
784 r = -EFAULT;
785 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
786 goto out;
787 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
788 if (r)
789 goto out;
790 break;
791 }
792 case KVM_GET_MSRS:
793 r = msr_io(vcpu, argp, kvm_get_msr, 1);
794 break;
795 case KVM_SET_MSRS:
796 r = msr_io(vcpu, argp, do_set_msr, 0);
797 break;
798 default:
799 r = -EINVAL;
800 }
801out:
802 return r;
803}
804
1fe779f8
CO		 805static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
806{
807 int ret;
808
809 if (addr > (unsigned int)(-3 * PAGE_SIZE))
810 return -1;
811 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
812 return ret;
813}
814
815static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
816 u32 kvm_nr_mmu_pages)
817{
818 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
819 return -EINVAL;
820
821 mutex_lock(&kvm->lock);
822
823 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
824 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
825
826 mutex_unlock(&kvm->lock);
827 return 0;
828}
829
830static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
831{
832 return kvm->n_alloc_mmu_pages;
833}
834
835/*
836 * Set a new alias region. Aliases map a portion of physical memory into
837 * another portion. This is useful for memory windows, for example the PC
838 * VGA region.
839 */
840static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
841 struct kvm_memory_alias *alias)
842{
843 int r, n;
844 struct kvm_mem_alias *p;
845
846 r = -EINVAL;
847 /* General sanity checks */
848 if (alias->memory_size & (PAGE_SIZE - 1))
849 goto out;
850 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
851 goto out;
852 if (alias->slot >= KVM_ALIAS_SLOTS)
853 goto out;
854 if (alias->guest_phys_addr + alias->memory_size
855 < alias->guest_phys_addr)
856 goto out;
857 if (alias->target_phys_addr + alias->memory_size
858 < alias->target_phys_addr)
859 goto out;
860
861 mutex_lock(&kvm->lock);
862
863 p = &kvm->aliases[alias->slot];
864 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
865 p->npages = alias->memory_size >> PAGE_SHIFT;
866 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
867
868 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
869 if (kvm->aliases[n - 1].npages)
870 break;
871 kvm->naliases = n;
872
873 kvm_mmu_zap_all(kvm);
874
875 mutex_unlock(&kvm->lock);
876
877 return 0;
878
879out:
880 return r;
881}
882
883static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
884{
885 int r;
886
887 r = 0;
888 switch (chip->chip_id) {
889 case KVM_IRQCHIP_PIC_MASTER:
890 memcpy(&chip->chip.pic,
891 &pic_irqchip(kvm)->pics[0],
892 sizeof(struct kvm_pic_state));
893 break;
894 case KVM_IRQCHIP_PIC_SLAVE:
895 memcpy(&chip->chip.pic,
896 &pic_irqchip(kvm)->pics[1],
897 sizeof(struct kvm_pic_state));
898 break;
899 case KVM_IRQCHIP_IOAPIC:
900 memcpy(&chip->chip.ioapic,
901 ioapic_irqchip(kvm),
902 sizeof(struct kvm_ioapic_state));
903 break;
904 default:
905 r = -EINVAL;
906 break;
907 }
908 return r;
909}
910
911static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
912{
913 int r;
914
915 r = 0;
916 switch (chip->chip_id) {
917 case KVM_IRQCHIP_PIC_MASTER:
918 memcpy(&pic_irqchip(kvm)->pics[0],
919 &chip->chip.pic,
920 sizeof(struct kvm_pic_state));
921 break;
922 case KVM_IRQCHIP_PIC_SLAVE:
923 memcpy(&pic_irqchip(kvm)->pics[1],
924 &chip->chip.pic,
925 sizeof(struct kvm_pic_state));
926 break;
927 case KVM_IRQCHIP_IOAPIC:
928 memcpy(ioapic_irqchip(kvm),
929 &chip->chip.ioapic,
930 sizeof(struct kvm_ioapic_state));
931 break;
932 default:
933 r = -EINVAL;
934 break;
935 }
936 kvm_pic_update_irq(pic_irqchip(kvm));
937 return r;
938}
939
5bb064dc
ZX		 940/*
941 * Get (and clear) the dirty memory log for a memory slot.
942 */
943int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
944 struct kvm_dirty_log *log)
945{
946 int r;
947 int n;
948 struct kvm_memory_slot *memslot;
949 int is_dirty = 0;
950
951 mutex_lock(&kvm->lock);
952
953 r = kvm_get_dirty_log(kvm, log, &is_dirty);
954 if (r)
955 goto out;
956
957 /* If nothing is dirty, don't bother messing with page tables. */
958 if (is_dirty) {
959 kvm_mmu_slot_remove_write_access(kvm, log->slot);
960 kvm_flush_remote_tlbs(kvm);
961 memslot = &kvm->memslots[log->slot];
962 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
963 memset(memslot->dirty_bitmap, 0, n);
964 }
965 r = 0;
966out:
967 mutex_unlock(&kvm->lock);
968 return r;
969}
970
1fe779f8
CO		 971long kvm_arch_vm_ioctl(struct file *filp,
972 unsigned int ioctl, unsigned long arg)
973{
974 struct kvm *kvm = filp->private_data;
975 void __user *argp = (void __user *)arg;
976 int r = -EINVAL;
977
978 switch (ioctl) {
979 case KVM_SET_TSS_ADDR:
980 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
981 if (r < 0)
982 goto out;
983 break;
984 case KVM_SET_MEMORY_REGION: {
985 struct kvm_memory_region kvm_mem;
986 struct kvm_userspace_memory_region kvm_userspace_mem;
987
988 r = -EFAULT;
989 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
990 goto out;
991 kvm_userspace_mem.slot = kvm_mem.slot;
992 kvm_userspace_mem.flags = kvm_mem.flags;
993 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
994 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
995 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
996 if (r)
997 goto out;
998 break;
999 }
1000 case KVM_SET_NR_MMU_PAGES:
1001 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1002 if (r)
1003 goto out;
1004 break;
1005 case KVM_GET_NR_MMU_PAGES:
1006 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1007 break;
1008 case KVM_SET_MEMORY_ALIAS: {
1009 struct kvm_memory_alias alias;
1010
1011 r = -EFAULT;
1012 if (copy_from_user(&alias, argp, sizeof alias))
1013 goto out;
1014 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1015 if (r)
1016 goto out;
1017 break;
1018 }
1019 case KVM_CREATE_IRQCHIP:
1020 r = -ENOMEM;
1021 kvm->vpic = kvm_create_pic(kvm);
1022 if (kvm->vpic) {
1023 r = kvm_ioapic_init(kvm);
1024 if (r) {
1025 kfree(kvm->vpic);
1026 kvm->vpic = NULL;
1027 goto out;
1028 }
1029 } else
1030 goto out;
1031 break;
1032 case KVM_IRQ_LINE: {
1033 struct kvm_irq_level irq_event;
1034
1035 r = -EFAULT;
1036 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1037 goto out;
1038 if (irqchip_in_kernel(kvm)) {
1039 mutex_lock(&kvm->lock);
1040 if (irq_event.irq < 16)
1041 kvm_pic_set_irq(pic_irqchip(kvm),
1042 irq_event.irq,
1043 irq_event.level);
1044 kvm_ioapic_set_irq(kvm->vioapic,
1045 irq_event.irq,
1046 irq_event.level);
1047 mutex_unlock(&kvm->lock);
1048 r = 0;
1049 }
1050 break;
1051 }
1052 case KVM_GET_IRQCHIP: {
1053 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1054 struct kvm_irqchip chip;
1055
1056 r = -EFAULT;
1057 if (copy_from_user(&chip, argp, sizeof chip))
1058 goto out;
1059 r = -ENXIO;
1060 if (!irqchip_in_kernel(kvm))
1061 goto out;
1062 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1063 if (r)
1064 goto out;
1065 r = -EFAULT;
1066 if (copy_to_user(argp, &chip, sizeof chip))
1067 goto out;
1068 r = 0;
1069 break;
1070 }
1071 case KVM_SET_IRQCHIP: {
1072 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1073 struct kvm_irqchip chip;
1074
1075 r = -EFAULT;
1076 if (copy_from_user(&chip, argp, sizeof chip))
1077 goto out;
1078 r = -ENXIO;
1079 if (!irqchip_in_kernel(kvm))
1080 goto out;
1081 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1082 if (r)
1083 goto out;
1084 r = 0;
1085 break;
1086 }
1087 default:
1088 ;
1089 }
1090out:
1091 return r;
1092}
1093
a16b043c 1094static void kvm_init_msr_list(void)
043405e1
CO		 1095{
1096 u32 dummy[2];
1097 unsigned i, j;
1098
1099 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1100 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1101 continue;
1102 if (j < i)
1103 msrs_to_save[j] = msrs_to_save[i];
1104 j++;
1105 }
1106 num_msrs_to_save = j;
1107}
1108
bbd9b64e
CO		 1109/*
1110 * Only apic need an MMIO device hook, so shortcut now..
1111 */
1112static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1113 gpa_t addr)
1114{
1115 struct kvm_io_device *dev;
1116
1117 if (vcpu->apic) {
1118 dev = &vcpu->apic->dev;
1119 if (dev->in_range(dev, addr))
1120 return dev;
1121 }
1122 return NULL;
1123}
1124
1125
1126static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1127 gpa_t addr)
1128{
1129 struct kvm_io_device *dev;
1130
1131 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1132 if (dev == NULL)
1133 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1134 return dev;
1135}
1136
1137int emulator_read_std(unsigned long addr,
1138 void *val,
1139 unsigned int bytes,
1140 struct kvm_vcpu *vcpu)
1141{
1142 void *data = val;
1143
1144 while (bytes) {
1145 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1146 unsigned offset = addr & (PAGE_SIZE-1);
1147 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1148 int ret;
1149
1150 if (gpa == UNMAPPED_GVA)
1151 return X86EMUL_PROPAGATE_FAULT;
1152 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1153 if (ret < 0)
1154 return X86EMUL_UNHANDLEABLE;
1155
1156 bytes -= tocopy;
1157 data += tocopy;
1158 addr += tocopy;
1159 }
1160
1161 return X86EMUL_CONTINUE;
1162}
1163EXPORT_SYMBOL_GPL(emulator_read_std);
1164
bbd9b64e
CO		 1165static int emulator_read_emulated(unsigned long addr,
1166 void *val,
1167 unsigned int bytes,
1168 struct kvm_vcpu *vcpu)
1169{
1170 struct kvm_io_device *mmio_dev;
1171 gpa_t gpa;
1172
1173 if (vcpu->mmio_read_completed) {
1174 memcpy(val, vcpu->mmio_data, bytes);
1175 vcpu->mmio_read_completed = 0;
1176 return X86EMUL_CONTINUE;
1177 }
1178
1179 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1180
1181 /* For APIC access vmexit */
1182 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1183 goto mmio;
1184
1185 if (emulator_read_std(addr, val, bytes, vcpu)
1186 == X86EMUL_CONTINUE)
1187 return X86EMUL_CONTINUE;
1188 if (gpa == UNMAPPED_GVA)
1189 return X86EMUL_PROPAGATE_FAULT;
1190
1191mmio:
1192 /*
1193 * Is this MMIO handled locally?
1194 */
1195 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1196 if (mmio_dev) {
1197 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1198 return X86EMUL_CONTINUE;
1199 }
1200
1201 vcpu->mmio_needed = 1;
1202 vcpu->mmio_phys_addr = gpa;
1203 vcpu->mmio_size = bytes;
1204 vcpu->mmio_is_write = 0;
1205
1206 return X86EMUL_UNHANDLEABLE;
1207}
1208
1209static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1210 const void *val, int bytes)
1211{
1212 int ret;
1213
1214 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1215 if (ret < 0)
1216 return 0;
1217 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1218 return 1;
1219}
1220
1221static int emulator_write_emulated_onepage(unsigned long addr,
1222 const void *val,
1223 unsigned int bytes,
1224 struct kvm_vcpu *vcpu)
1225{
1226 struct kvm_io_device *mmio_dev;
1227 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1228
1229 if (gpa == UNMAPPED_GVA) {
1230 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1231 return X86EMUL_PROPAGATE_FAULT;
1232 }
1233
1234 /* For APIC access vmexit */
1235 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1236 goto mmio;
1237
1238 if (emulator_write_phys(vcpu, gpa, val, bytes))
1239 return X86EMUL_CONTINUE;
1240
1241mmio:
1242 /*
1243 * Is this MMIO handled locally?
1244 */
1245 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1246 if (mmio_dev) {
1247 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1248 return X86EMUL_CONTINUE;
1249 }
1250
1251 vcpu->mmio_needed = 1;
1252 vcpu->mmio_phys_addr = gpa;
1253 vcpu->mmio_size = bytes;
1254 vcpu->mmio_is_write = 1;
1255 memcpy(vcpu->mmio_data, val, bytes);
1256
1257 return X86EMUL_CONTINUE;
1258}
1259
1260int emulator_write_emulated(unsigned long addr,
1261 const void *val,
1262 unsigned int bytes,
1263 struct kvm_vcpu *vcpu)
1264{
1265 /* Crossing a page boundary? */
1266 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1267 int rc, now;
1268
1269 now = -addr & ~PAGE_MASK;
1270 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1271 if (rc != X86EMUL_CONTINUE)
1272 return rc;
1273 addr += now;
1274 val += now;
1275 bytes -= now;
1276 }
1277 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1278}
1279EXPORT_SYMBOL_GPL(emulator_write_emulated);
1280
1281static int emulator_cmpxchg_emulated(unsigned long addr,
1282 const void *old,
1283 const void *new,
1284 unsigned int bytes,
1285 struct kvm_vcpu *vcpu)
1286{
1287 static int reported;
1288
1289 if (!reported) {
1290 reported = 1;
1291 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1292 }
1293 return emulator_write_emulated(addr, new, bytes, vcpu);
1294}
1295
1296static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1297{
1298 return kvm_x86_ops->get_segment_base(vcpu, seg);
1299}
1300
1301int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1302{
1303 return X86EMUL_CONTINUE;
1304}
1305
1306int emulate_clts(struct kvm_vcpu *vcpu)
1307{
1308 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1309 return X86EMUL_CONTINUE;
1310}
1311
1312int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1313{
1314 struct kvm_vcpu *vcpu = ctxt->vcpu;
1315
1316 switch (dr) {
1317 case 0 ... 3:
1318 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1319 return X86EMUL_CONTINUE;
1320 default:
1321 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1322 return X86EMUL_UNHANDLEABLE;
1323 }
1324}
1325
1326int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1327{
1328 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1329 int exception;
1330
1331 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1332 if (exception) {
1333 /* FIXME: better handling */
1334 return X86EMUL_UNHANDLEABLE;
1335 }
1336 return X86EMUL_CONTINUE;
1337}
1338
1339void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1340{
1341 static int reported;
1342 u8 opcodes[4];
1343 unsigned long rip = vcpu->rip;
1344 unsigned long rip_linear;
1345
1346 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1347
1348 if (reported)
1349 return;
1350
1351 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1352
1353 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1354 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1355 reported = 1;
1356}
1357EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1358
1359struct x86_emulate_ops emulate_ops = {
1360 .read_std = emulator_read_std,
bbd9b64e
CO		 1361 .read_emulated = emulator_read_emulated,
1362 .write_emulated = emulator_write_emulated,
1363 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1364};
1365
1366int emulate_instruction(struct kvm_vcpu *vcpu,
1367 struct kvm_run *run,
1368 unsigned long cr2,
1369 u16 error_code,
1370 int no_decode)
1371{
1372 int r;
1373
1374 vcpu->mmio_fault_cr2 = cr2;
1375 kvm_x86_ops->cache_regs(vcpu);
1376
1377 vcpu->mmio_is_write = 0;
1378 vcpu->pio.string = 0;
1379
1380 if (!no_decode) {
1381 int cs_db, cs_l;
1382 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1383
1384 vcpu->emulate_ctxt.vcpu = vcpu;
1385 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1386 vcpu->emulate_ctxt.cr2 = cr2;
1387 vcpu->emulate_ctxt.mode =
1388 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1389 ? X86EMUL_MODE_REAL : cs_l
1390 ? X86EMUL_MODE_PROT64 : cs_db
1391 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1392
1393 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1394 vcpu->emulate_ctxt.cs_base = 0;
1395 vcpu->emulate_ctxt.ds_base = 0;
1396 vcpu->emulate_ctxt.es_base = 0;
1397 vcpu->emulate_ctxt.ss_base = 0;
1398 } else {
1399 vcpu->emulate_ctxt.cs_base =
1400 get_segment_base(vcpu, VCPU_SREG_CS);
1401 vcpu->emulate_ctxt.ds_base =
1402 get_segment_base(vcpu, VCPU_SREG_DS);
1403 vcpu->emulate_ctxt.es_base =
1404 get_segment_base(vcpu, VCPU_SREG_ES);
1405 vcpu->emulate_ctxt.ss_base =
1406 get_segment_base(vcpu, VCPU_SREG_SS);
1407 }
1408
1409 vcpu->emulate_ctxt.gs_base =
1410 get_segment_base(vcpu, VCPU_SREG_GS);
1411 vcpu->emulate_ctxt.fs_base =
1412 get_segment_base(vcpu, VCPU_SREG_FS);
1413
1414 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
f2b5756b 1415 ++vcpu->stat.insn_emulation;
bbd9b64e 1416 if (r) {
f2b5756b 1417 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1418 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1419 return EMULATE_DONE;
1420 return EMULATE_FAIL;
1421 }
1422 }
1423
1424 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1425
1426 if (vcpu->pio.string)
1427 return EMULATE_DO_MMIO;
1428
1429 if ((r || vcpu->mmio_is_write) && run) {
1430 run->exit_reason = KVM_EXIT_MMIO;
1431 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1432 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1433 run->mmio.len = vcpu->mmio_size;
1434 run->mmio.is_write = vcpu->mmio_is_write;
1435 }
1436
1437 if (r) {
1438 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1439 return EMULATE_DONE;
1440 if (!vcpu->mmio_needed) {
1441 kvm_report_emulation_failure(vcpu, "mmio");
1442 return EMULATE_FAIL;
1443 }
1444 return EMULATE_DO_MMIO;
1445 }
1446
1447 kvm_x86_ops->decache_regs(vcpu);
1448 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1449
1450 if (vcpu->mmio_is_write) {
1451 vcpu->mmio_needed = 0;
1452 return EMULATE_DO_MMIO;
1453 }
1454
1455 return EMULATE_DONE;
1456}
1457EXPORT_SYMBOL_GPL(emulate_instruction);
1458
de7d789a
CO		 1459static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1460{
1461 int i;
1462
1463 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1464 if (vcpu->pio.guest_pages[i]) {
b4231d61 1465 kvm_release_page_dirty(vcpu->pio.guest_pages[i]);
de7d789a
CO		 1466 vcpu->pio.guest_pages[i] = NULL;
1467 }
1468}
1469
1470static int pio_copy_data(struct kvm_vcpu *vcpu)
1471{
1472 void *p = vcpu->pio_data;
1473 void *q;
1474 unsigned bytes;
1475 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1476
1477 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1478 PAGE_KERNEL);
1479 if (!q) {
1480 free_pio_guest_pages(vcpu);
1481 return -ENOMEM;
1482 }
1483 q += vcpu->pio.guest_page_offset;
1484 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1485 if (vcpu->pio.in)
1486 memcpy(q, p, bytes);
1487 else
1488 memcpy(p, q, bytes);
1489 q -= vcpu->pio.guest_page_offset;
1490 vunmap(q);
1491 free_pio_guest_pages(vcpu);
1492 return 0;
1493}
1494
1495int complete_pio(struct kvm_vcpu *vcpu)
1496{
1497 struct kvm_pio_request *io = &vcpu->pio;
1498 long delta;
1499 int r;
1500
1501 kvm_x86_ops->cache_regs(vcpu);
1502
1503 if (!io->string) {
1504 if (io->in)
1505 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1506 io->size);
1507 } else {
1508 if (io->in) {
1509 r = pio_copy_data(vcpu);
1510 if (r) {
1511 kvm_x86_ops->cache_regs(vcpu);
1512 return r;
1513 }
1514 }
1515
1516 delta = 1;
1517 if (io->rep) {
1518 delta *= io->cur_count;
1519 /*
1520 * The size of the register should really depend on
1521 * current address size.
1522 */
1523 vcpu->regs[VCPU_REGS_RCX] -= delta;
1524 }
1525 if (io->down)
1526 delta = -delta;
1527 delta *= io->size;
1528 if (io->in)
1529 vcpu->regs[VCPU_REGS_RDI] += delta;
1530 else
1531 vcpu->regs[VCPU_REGS_RSI] += delta;
1532 }
1533
1534 kvm_x86_ops->decache_regs(vcpu);
1535
1536 io->count -= io->cur_count;
1537 io->cur_count = 0;
1538
1539 return 0;
1540}
1541
1542static void kernel_pio(struct kvm_io_device *pio_dev,
1543 struct kvm_vcpu *vcpu,
1544 void *pd)
1545{
1546 /* TODO: String I/O for in kernel device */
1547
1548 mutex_lock(&vcpu->kvm->lock);
1549 if (vcpu->pio.in)
1550 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1551 vcpu->pio.size,
1552 pd);
1553 else
1554 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1555 vcpu->pio.size,
1556 pd);
1557 mutex_unlock(&vcpu->kvm->lock);
1558}
1559
1560static void pio_string_write(struct kvm_io_device *pio_dev,
1561 struct kvm_vcpu *vcpu)
1562{
1563 struct kvm_pio_request *io = &vcpu->pio;
1564 void *pd = vcpu->pio_data;
1565 int i;
1566
1567 mutex_lock(&vcpu->kvm->lock);
1568 for (i = 0; i < io->cur_count; i++) {
1569 kvm_iodevice_write(pio_dev, io->port,
1570 io->size,
1571 pd);
1572 pd += io->size;
1573 }
1574 mutex_unlock(&vcpu->kvm->lock);
1575}
1576
1577static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1578 gpa_t addr)
1579{
1580 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1581}
1582
1583int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1584 int size, unsigned port)
1585{
1586 struct kvm_io_device *pio_dev;
1587
1588 vcpu->run->exit_reason = KVM_EXIT_IO;
1589 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1590 vcpu->run->io.size = vcpu->pio.size = size;
1591 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1592 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1593 vcpu->run->io.port = vcpu->pio.port = port;
1594 vcpu->pio.in = in;
1595 vcpu->pio.string = 0;
1596 vcpu->pio.down = 0;
1597 vcpu->pio.guest_page_offset = 0;
1598 vcpu->pio.rep = 0;
1599
1600 kvm_x86_ops->cache_regs(vcpu);
1601 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1602 kvm_x86_ops->decache_regs(vcpu);
1603
1604 kvm_x86_ops->skip_emulated_instruction(vcpu);
1605
1606 pio_dev = vcpu_find_pio_dev(vcpu, port);
1607 if (pio_dev) {
1608 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1609 complete_pio(vcpu);
1610 return 1;
1611 }
1612 return 0;
1613}
1614EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1615
1616int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1617 int size, unsigned long count, int down,
1618 gva_t address, int rep, unsigned port)
1619{
1620 unsigned now, in_page;
1621 int i, ret = 0;
1622 int nr_pages = 1;
1623 struct page *page;
1624 struct kvm_io_device *pio_dev;
1625
1626 vcpu->run->exit_reason = KVM_EXIT_IO;
1627 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1628 vcpu->run->io.size = vcpu->pio.size = size;
1629 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1630 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1631 vcpu->run->io.port = vcpu->pio.port = port;
1632 vcpu->pio.in = in;
1633 vcpu->pio.string = 1;
1634 vcpu->pio.down = down;
1635 vcpu->pio.guest_page_offset = offset_in_page(address);
1636 vcpu->pio.rep = rep;
1637
1638 if (!count) {
1639 kvm_x86_ops->skip_emulated_instruction(vcpu);
1640 return 1;
1641 }
1642
1643 if (!down)
1644 in_page = PAGE_SIZE - offset_in_page(address);
1645 else
1646 in_page = offset_in_page(address) + size;
1647 now = min(count, (unsigned long)in_page / size);
1648 if (!now) {
1649 /*
1650 * String I/O straddles page boundary. Pin two guest pages
1651 * so that we satisfy atomicity constraints. Do just one
1652 * transaction to avoid complexity.
1653 */
1654 nr_pages = 2;
1655 now = 1;
1656 }
1657 if (down) {
1658 /*
1659 * String I/O in reverse. Yuck. Kill the guest, fix later.
1660 */
1661 pr_unimpl(vcpu, "guest string pio down\n");
1662 inject_gp(vcpu);
1663 return 1;
1664 }
1665 vcpu->run->io.count = now;
1666 vcpu->pio.cur_count = now;
1667
1668 if (vcpu->pio.cur_count == vcpu->pio.count)
1669 kvm_x86_ops->skip_emulated_instruction(vcpu);
1670
1671 for (i = 0; i < nr_pages; ++i) {
1672 mutex_lock(&vcpu->kvm->lock);
1673 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1674 vcpu->pio.guest_pages[i] = page;
1675 mutex_unlock(&vcpu->kvm->lock);
1676 if (!page) {
1677 inject_gp(vcpu);
1678 free_pio_guest_pages(vcpu);
1679 return 1;
1680 }
1681 }
1682
1683 pio_dev = vcpu_find_pio_dev(vcpu, port);
1684 if (!vcpu->pio.in) {
1685 /* string PIO write */
1686 ret = pio_copy_data(vcpu);
1687 if (ret >= 0 && pio_dev) {
1688 pio_string_write(pio_dev, vcpu);
1689 complete_pio(vcpu);
1690 if (vcpu->pio.count == 0)
1691 ret = 1;
1692 }
1693 } else if (pio_dev)
1694 pr_unimpl(vcpu, "no string pio read support yet, "
1695 "port %x size %d count %ld\n",
1696 port, size, count);
1697
1698 return ret;
1699}
1700EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1701
f8c16bba 1702int kvm_arch_init(void *opaque)
043405e1 1703{
56c6d28a 1704 int r;
f8c16bba
ZX		 1705 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
1706
56c6d28a
ZX		 1707 r = kvm_mmu_module_init();
1708 if (r)
1709 goto out_fail;
1710
043405e1 1711 kvm_init_msr_list();
f8c16bba
ZX		 1712
1713 if (kvm_x86_ops) {
1714 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 1715 r = -EEXIST;
1716 goto out;
f8c16bba
ZX		 1717 }
1718
1719 if (!ops->cpu_has_kvm_support()) {
1720 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 1721 r = -EOPNOTSUPP;
1722 goto out;
f8c16bba
ZX		 1723 }
1724 if (ops->disabled_by_bios()) {
1725 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 1726 r = -EOPNOTSUPP;
1727 goto out;
f8c16bba
ZX		 1728 }
1729
1730 kvm_x86_ops = ops;
56c6d28a 1731 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 1732 return 0;
56c6d28a
ZX		 1733
1734out:
1735 kvm_mmu_module_exit();
1736out_fail:
1737 return r;
043405e1 1738}
8776e519 1739
f8c16bba
ZX		 1740void kvm_arch_exit(void)
1741{
1742 kvm_x86_ops = NULL;
56c6d28a
ZX		 1743 kvm_mmu_module_exit();
1744}
f8c16bba 1745
8776e519
HB		 1746int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1747{
1748 ++vcpu->stat.halt_exits;
1749 if (irqchip_in_kernel(vcpu->kvm)) {
1750 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1751 kvm_vcpu_block(vcpu);
1752 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1753 return -EINTR;
1754 return 1;
1755 } else {
1756 vcpu->run->exit_reason = KVM_EXIT_HLT;
1757 return 0;
1758 }
1759}
1760EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1761
1762int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1763{
1764 unsigned long nr, a0, a1, a2, a3, ret;
1765
1766 kvm_x86_ops->cache_regs(vcpu);
1767
1768 nr = vcpu->regs[VCPU_REGS_RAX];
1769 a0 = vcpu->regs[VCPU_REGS_RBX];
1770 a1 = vcpu->regs[VCPU_REGS_RCX];
1771 a2 = vcpu->regs[VCPU_REGS_RDX];
1772 a3 = vcpu->regs[VCPU_REGS_RSI];
1773
1774 if (!is_long_mode(vcpu)) {
1775 nr &= 0xFFFFFFFF;
1776 a0 &= 0xFFFFFFFF;
1777 a1 &= 0xFFFFFFFF;
1778 a2 &= 0xFFFFFFFF;
1779 a3 &= 0xFFFFFFFF;
1780 }
1781
1782 switch (nr) {
1783 default:
1784 ret = -KVM_ENOSYS;
1785 break;
1786 }
1787 vcpu->regs[VCPU_REGS_RAX] = ret;
1788 kvm_x86_ops->decache_regs(vcpu);
1789 return 0;
1790}
1791EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1792
1793int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1794{
1795 char instruction[3];
1796 int ret = 0;
1797
1798 mutex_lock(&vcpu->kvm->lock);
1799
1800 /*
1801 * Blow out the MMU to ensure that no other VCPU has an active mapping
1802 * to ensure that the updated hypercall appears atomically across all
1803 * VCPUs.
1804 */
1805 kvm_mmu_zap_all(vcpu->kvm);
1806
1807 kvm_x86_ops->cache_regs(vcpu);
1808 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1809 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1810 != X86EMUL_CONTINUE)
1811 ret = -EFAULT;
1812
1813 mutex_unlock(&vcpu->kvm->lock);
1814
1815 return ret;
1816}
1817
1818static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1819{
1820 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1821}
1822
1823void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1824{
1825 struct descriptor_table dt = { limit, base };
1826
1827 kvm_x86_ops->set_gdt(vcpu, &dt);
1828}
1829
1830void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1831{
1832 struct descriptor_table dt = { limit, base };
1833
1834 kvm_x86_ops->set_idt(vcpu, &dt);
1835}
1836
1837void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1838 unsigned long *rflags)
1839{
1840 lmsw(vcpu, msw);
1841 *rflags = kvm_x86_ops->get_rflags(vcpu);
1842}
1843
1844unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1845{
1846 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1847 switch (cr) {
1848 case 0:
1849 return vcpu->cr0;
1850 case 2:
1851 return vcpu->cr2;
1852 case 3:
1853 return vcpu->cr3;
1854 case 4:
1855 return vcpu->cr4;
1856 default:
1857 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1858 return 0;
1859 }
1860}
1861
1862void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1863 unsigned long *rflags)
1864{
1865 switch (cr) {
1866 case 0:
1867 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1868 *rflags = kvm_x86_ops->get_rflags(vcpu);
1869 break;
1870 case 2:
1871 vcpu->cr2 = val;
1872 break;
1873 case 3:
1874 set_cr3(vcpu, val);
1875 break;
1876 case 4:
1877 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1878 break;
1879 default:
1880 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1881 }
1882}
1883
1884void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1885{
1886 int i;
1887 u32 function;
1888 struct kvm_cpuid_entry *e, *best;
1889
1890 kvm_x86_ops->cache_regs(vcpu);
1891 function = vcpu->regs[VCPU_REGS_RAX];
1892 vcpu->regs[VCPU_REGS_RAX] = 0;
1893 vcpu->regs[VCPU_REGS_RBX] = 0;
1894 vcpu->regs[VCPU_REGS_RCX] = 0;
1895 vcpu->regs[VCPU_REGS_RDX] = 0;
1896 best = NULL;
1897 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1898 e = &vcpu->cpuid_entries[i];
1899 if (e->function == function) {
1900 best = e;
1901 break;
1902 }
1903 /*
1904 * Both basic or both extended?
1905 */
1906 if (((e->function ^ function) & 0x80000000) == 0)
1907 if (!best || e->function > best->function)
1908 best = e;
1909 }
1910 if (best) {
1911 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1912 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1913 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1914 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1915 }
1916 kvm_x86_ops->decache_regs(vcpu);
1917 kvm_x86_ops->skip_emulated_instruction(vcpu);
1918}
1919EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1920
b6c7a5dc
HB		 1921/*
1922 * Check if userspace requested an interrupt window, and that the
1923 * interrupt window is open.
1924 *
1925 * No need to exit to userspace if we already have an interrupt queued.
1926 */
1927static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1928 struct kvm_run *kvm_run)
1929{
1930 return (!vcpu->irq_summary &&
1931 kvm_run->request_interrupt_window &&
1932 vcpu->interrupt_window_open &&
1933 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1934}
1935
1936static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1937 struct kvm_run *kvm_run)
1938{
1939 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1940 kvm_run->cr8 = get_cr8(vcpu);
1941 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1942 if (irqchip_in_kernel(vcpu->kvm))
1943 kvm_run->ready_for_interrupt_injection = 1;
1944 else
1945 kvm_run->ready_for_interrupt_injection =
1946 (vcpu->interrupt_window_open &&
1947 vcpu->irq_summary == 0);
1948}
1949
1950static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1951{
1952 int r;
1953
1954 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1955 pr_debug("vcpu %d received sipi with vector # %x\n",
1956 vcpu->vcpu_id, vcpu->sipi_vector);
1957 kvm_lapic_reset(vcpu);
1958 r = kvm_x86_ops->vcpu_reset(vcpu);
1959 if (r)
1960 return r;
1961 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1962 }
1963
1964preempted:
1965 if (vcpu->guest_debug.enabled)
1966 kvm_x86_ops->guest_debug_pre(vcpu);
1967
1968again:
1969 r = kvm_mmu_reload(vcpu);
1970 if (unlikely(r))
1971 goto out;
1972
1973 kvm_inject_pending_timer_irqs(vcpu);
1974
1975 preempt_disable();
1976
1977 kvm_x86_ops->prepare_guest_switch(vcpu);
1978 kvm_load_guest_fpu(vcpu);
1979
1980 local_irq_disable();
1981
1982 if (signal_pending(current)) {
1983 local_irq_enable();
1984 preempt_enable();
1985 r = -EINTR;
1986 kvm_run->exit_reason = KVM_EXIT_INTR;
1987 ++vcpu->stat.signal_exits;
1988 goto out;
1989 }
1990
1991 if (irqchip_in_kernel(vcpu->kvm))
1992 kvm_x86_ops->inject_pending_irq(vcpu);
1993 else if (!vcpu->mmio_read_completed)
1994 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
1995
1996 vcpu->guest_mode = 1;
1997 kvm_guest_enter();
1998
1999 if (vcpu->requests)
2000 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2001 kvm_x86_ops->tlb_flush(vcpu);
2002
2003 kvm_x86_ops->run(vcpu, kvm_run);
2004
2005 vcpu->guest_mode = 0;
2006 local_irq_enable();
2007
2008 ++vcpu->stat.exits;
2009
2010 /*
2011 * We must have an instruction between local_irq_enable() and
2012 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2013 * the interrupt shadow. The stat.exits increment will do nicely.
2014 * But we need to prevent reordering, hence this barrier():
2015 */
2016 barrier();
2017
2018 kvm_guest_exit();
2019
2020 preempt_enable();
2021
2022 /*
2023 * Profile KVM exit RIPs:
2024 */
2025 if (unlikely(prof_on == KVM_PROFILING)) {
2026 kvm_x86_ops->cache_regs(vcpu);
2027 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
2028 }
2029
2030 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2031
2032 if (r > 0) {
2033 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2034 r = -EINTR;
2035 kvm_run->exit_reason = KVM_EXIT_INTR;
2036 ++vcpu->stat.request_irq_exits;
2037 goto out;
2038 }
e1beb1d3 2039 if (!need_resched())
b6c7a5dc 2040 goto again;
b6c7a5dc
HB		 2041 }
2042
2043out:
2044 if (r > 0) {
2045 kvm_resched(vcpu);
2046 goto preempted;
2047 }
2048
2049 post_kvm_run_save(vcpu, kvm_run);
2050
2051 return r;
2052}
2053
2054int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2055{
2056 int r;
2057 sigset_t sigsaved;
2058
2059 vcpu_load(vcpu);
2060
2061 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2062 kvm_vcpu_block(vcpu);
2063 vcpu_put(vcpu);
2064 return -EAGAIN;
2065 }
2066
2067 if (vcpu->sigset_active)
2068 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2069
2070 /* re-sync apic's tpr */
2071 if (!irqchip_in_kernel(vcpu->kvm))
2072 set_cr8(vcpu, kvm_run->cr8);
2073
2074 if (vcpu->pio.cur_count) {
2075 r = complete_pio(vcpu);
2076 if (r)
2077 goto out;
2078 }
2079#if CONFIG_HAS_IOMEM
2080 if (vcpu->mmio_needed) {
2081 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2082 vcpu->mmio_read_completed = 1;
2083 vcpu->mmio_needed = 0;
2084 r = emulate_instruction(vcpu, kvm_run,
2085 vcpu->mmio_fault_cr2, 0, 1);
2086 if (r == EMULATE_DO_MMIO) {
2087 /*
2088 * Read-modify-write. Back to userspace.
2089 */
2090 r = 0;
2091 goto out;
2092 }
2093 }
2094#endif
2095 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2096 kvm_x86_ops->cache_regs(vcpu);
2097 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2098 kvm_x86_ops->decache_regs(vcpu);
2099 }
2100
2101 r = __vcpu_run(vcpu, kvm_run);
2102
2103out:
2104 if (vcpu->sigset_active)
2105 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2106
2107 vcpu_put(vcpu);
2108 return r;
2109}
2110
2111int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2112{
2113 vcpu_load(vcpu);
2114
2115 kvm_x86_ops->cache_regs(vcpu);
2116
2117 regs->rax = vcpu->regs[VCPU_REGS_RAX];
2118 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
2119 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
2120 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
2121 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
2122 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
2123 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
2124 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
2125#ifdef CONFIG_X86_64
2126 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2127 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2128 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2129 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2130 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2131 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2132 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2133 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2134#endif
2135
2136 regs->rip = vcpu->rip;
2137 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2138
2139 /*
2140 * Don't leak debug flags in case they were set for guest debugging
2141 */
2142 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2143 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2144
2145 vcpu_put(vcpu);
2146
2147 return 0;
2148}
2149
2150int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2151{
2152 vcpu_load(vcpu);
2153
2154 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2155 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2156 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2157 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2158 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2159 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2160 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2161 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2162#ifdef CONFIG_X86_64
2163 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2164 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2165 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2166 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2167 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2168 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2169 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2170 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2171#endif
2172
2173 vcpu->rip = regs->rip;
2174 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2175
2176 kvm_x86_ops->decache_regs(vcpu);
2177
2178 vcpu_put(vcpu);
2179
2180 return 0;
2181}
2182
2183static void get_segment(struct kvm_vcpu *vcpu,
2184 struct kvm_segment *var, int seg)
2185{
2186 return kvm_x86_ops->get_segment(vcpu, var, seg);
2187}
2188
2189void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2190{
2191 struct kvm_segment cs;
2192
2193 get_segment(vcpu, &cs, VCPU_SREG_CS);
2194 *db = cs.db;
2195 *l = cs.l;
2196}
2197EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2198
2199int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2200 struct kvm_sregs *sregs)
2201{
2202 struct descriptor_table dt;
2203 int pending_vec;
2204
2205 vcpu_load(vcpu);
2206
2207 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2208 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2209 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2210 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2211 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2212 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2213
2214 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2215 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2216
2217 kvm_x86_ops->get_idt(vcpu, &dt);
2218 sregs->idt.limit = dt.limit;
2219 sregs->idt.base = dt.base;
2220 kvm_x86_ops->get_gdt(vcpu, &dt);
2221 sregs->gdt.limit = dt.limit;
2222 sregs->gdt.base = dt.base;
2223
2224 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2225 sregs->cr0 = vcpu->cr0;
2226 sregs->cr2 = vcpu->cr2;
2227 sregs->cr3 = vcpu->cr3;
2228 sregs->cr4 = vcpu->cr4;
2229 sregs->cr8 = get_cr8(vcpu);
2230 sregs->efer = vcpu->shadow_efer;
2231 sregs->apic_base = kvm_get_apic_base(vcpu);
2232
2233 if (irqchip_in_kernel(vcpu->kvm)) {
2234 memset(sregs->interrupt_bitmap, 0,
2235 sizeof sregs->interrupt_bitmap);
2236 pending_vec = kvm_x86_ops->get_irq(vcpu);
2237 if (pending_vec >= 0)
2238 set_bit(pending_vec,
2239 (unsigned long *)sregs->interrupt_bitmap);
2240 } else
2241 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2242 sizeof sregs->interrupt_bitmap);
2243
2244 vcpu_put(vcpu);
2245
2246 return 0;
2247}
2248
2249static void set_segment(struct kvm_vcpu *vcpu,
2250 struct kvm_segment *var, int seg)
2251{
2252 return kvm_x86_ops->set_segment(vcpu, var, seg);
2253}
2254
2255int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2256 struct kvm_sregs *sregs)
2257{
2258 int mmu_reset_needed = 0;
2259 int i, pending_vec, max_bits;
2260 struct descriptor_table dt;
2261
2262 vcpu_load(vcpu);
2263
2264 dt.limit = sregs->idt.limit;
2265 dt.base = sregs->idt.base;
2266 kvm_x86_ops->set_idt(vcpu, &dt);
2267 dt.limit = sregs->gdt.limit;
2268 dt.base = sregs->gdt.base;
2269 kvm_x86_ops->set_gdt(vcpu, &dt);
2270
2271 vcpu->cr2 = sregs->cr2;
2272 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2273 vcpu->cr3 = sregs->cr3;
2274
2275 set_cr8(vcpu, sregs->cr8);
2276
2277 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2278#ifdef CONFIG_X86_64
2279 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2280#endif
2281 kvm_set_apic_base(vcpu, sregs->apic_base);
2282
2283 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2284
2285 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2286 vcpu->cr0 = sregs->cr0;
2287 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2288
2289 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2290 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2291 if (!is_long_mode(vcpu) && is_pae(vcpu))
2292 load_pdptrs(vcpu, vcpu->cr3);
2293
2294 if (mmu_reset_needed)
2295 kvm_mmu_reset_context(vcpu);
2296
2297 if (!irqchip_in_kernel(vcpu->kvm)) {
2298 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2299 sizeof vcpu->irq_pending);
2300 vcpu->irq_summary = 0;
2301 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2302 if (vcpu->irq_pending[i])
2303 __set_bit(i, &vcpu->irq_summary);
2304 } else {
2305 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2306 pending_vec = find_first_bit(
2307 (const unsigned long *)sregs->interrupt_bitmap,
2308 max_bits);
2309 /* Only pending external irq is handled here */
2310 if (pending_vec < max_bits) {
2311 kvm_x86_ops->set_irq(vcpu, pending_vec);
2312 pr_debug("Set back pending irq %d\n",
2313 pending_vec);
2314 }
2315 }
2316
2317 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2318 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2319 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2320 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2321 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2322 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2323
2324 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2325 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2326
2327 vcpu_put(vcpu);
2328
2329 return 0;
2330}
2331
2332int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2333 struct kvm_debug_guest *dbg)
2334{
2335 int r;
2336
2337 vcpu_load(vcpu);
2338
2339 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2340
2341 vcpu_put(vcpu);
2342
2343 return r;
2344}
2345
d0752060
HB		 2346/*
2347 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2348 * we have asm/x86/processor.h
2349 */
2350struct fxsave {
2351 u16 cwd;
2352 u16 swd;
2353 u16 twd;
2354 u16 fop;
2355 u64 rip;
2356 u64 rdp;
2357 u32 mxcsr;
2358 u32 mxcsr_mask;
2359 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2360#ifdef CONFIG_X86_64
2361 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2362#else
2363 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2364#endif
2365};
2366
8b006791
ZX		 2367/*
2368 * Translate a guest virtual address to a guest physical address.
2369 */
2370int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2371 struct kvm_translation *tr)
2372{
2373 unsigned long vaddr = tr->linear_address;
2374 gpa_t gpa;
2375
2376 vcpu_load(vcpu);
2377 mutex_lock(&vcpu->kvm->lock);
2378 gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
2379 tr->physical_address = gpa;
2380 tr->valid = gpa != UNMAPPED_GVA;
2381 tr->writeable = 1;
2382 tr->usermode = 0;
2383 mutex_unlock(&vcpu->kvm->lock);
2384 vcpu_put(vcpu);
2385
2386 return 0;
2387}
2388
d0752060
HB		 2389int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2390{
2391 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2392
2393 vcpu_load(vcpu);
2394
2395 memcpy(fpu->fpr, fxsave->st_space, 128);
2396 fpu->fcw = fxsave->cwd;
2397 fpu->fsw = fxsave->swd;
2398 fpu->ftwx = fxsave->twd;
2399 fpu->last_opcode = fxsave->fop;
2400 fpu->last_ip = fxsave->rip;
2401 fpu->last_dp = fxsave->rdp;
2402 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2403
2404 vcpu_put(vcpu);
2405
2406 return 0;
2407}
2408
2409int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2410{
2411 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2412
2413 vcpu_load(vcpu);
2414
2415 memcpy(fxsave->st_space, fpu->fpr, 128);
2416 fxsave->cwd = fpu->fcw;
2417 fxsave->swd = fpu->fsw;
2418 fxsave->twd = fpu->ftwx;
2419 fxsave->fop = fpu->last_opcode;
2420 fxsave->rip = fpu->last_ip;
2421 fxsave->rdp = fpu->last_dp;
2422 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2423
2424 vcpu_put(vcpu);
2425
2426 return 0;
2427}
2428
2429void fx_init(struct kvm_vcpu *vcpu)
2430{
2431 unsigned after_mxcsr_mask;
2432
2433 /* Initialize guest FPU by resetting ours and saving into guest's */
2434 preempt_disable();
2435 fx_save(&vcpu->host_fx_image);
2436 fpu_init();
2437 fx_save(&vcpu->guest_fx_image);
2438 fx_restore(&vcpu->host_fx_image);
2439 preempt_enable();
2440
2441 vcpu->cr0 |= X86_CR0_ET;
2442 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2443 vcpu->guest_fx_image.mxcsr = 0x1f80;
2444 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2445 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2446}
2447EXPORT_SYMBOL_GPL(fx_init);
2448
2449void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2450{
2451 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2452 return;
2453
2454 vcpu->guest_fpu_loaded = 1;
2455 fx_save(&vcpu->host_fx_image);
2456 fx_restore(&vcpu->guest_fx_image);
2457}
2458EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2459
2460void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2461{
2462 if (!vcpu->guest_fpu_loaded)
2463 return;
2464
2465 vcpu->guest_fpu_loaded = 0;
2466 fx_save(&vcpu->guest_fx_image);
2467 fx_restore(&vcpu->host_fx_image);
f096ed85 2468 ++vcpu->stat.fpu_reload;
d0752060
HB		 2469}
2470EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 2471
2472void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
2473{
2474 kvm_x86_ops->vcpu_free(vcpu);
2475}
2476
2477struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
2478 unsigned int id)
2479{
2480 int r;
2481 struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
2482
2483 if (IS_ERR(vcpu)) {
2484 r = -ENOMEM;
2485 goto fail;
2486 }
2487
2488 /* We do fxsave: this must be aligned. */
2489 BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
2490
2491 vcpu_load(vcpu);
2492 r = kvm_arch_vcpu_reset(vcpu);
2493 if (r == 0)
2494 r = kvm_mmu_setup(vcpu);
2495 vcpu_put(vcpu);
2496 if (r < 0)
2497 goto free_vcpu;
2498
2499 return vcpu;
2500free_vcpu:
2501 kvm_x86_ops->vcpu_free(vcpu);
2502fail:
2503 return ERR_PTR(r);
2504}
2505
d40ccc62 2506void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 2507{
2508 vcpu_load(vcpu);
2509 kvm_mmu_unload(vcpu);
2510 vcpu_put(vcpu);
2511
2512 kvm_x86_ops->vcpu_free(vcpu);
2513}
2514
2515int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
2516{
2517 return kvm_x86_ops->vcpu_reset(vcpu);
2518}
2519
2520void kvm_arch_hardware_enable(void *garbage)
2521{
2522 kvm_x86_ops->hardware_enable(garbage);
2523}
2524
2525void kvm_arch_hardware_disable(void *garbage)
2526{
2527 kvm_x86_ops->hardware_disable(garbage);
2528}
2529
2530int kvm_arch_hardware_setup(void)
2531{
2532 return kvm_x86_ops->hardware_setup();
2533}
2534
2535void kvm_arch_hardware_unsetup(void)
2536{
2537 kvm_x86_ops->hardware_unsetup();
2538}
2539
2540void kvm_arch_check_processor_compat(void *rtn)
2541{
2542 kvm_x86_ops->check_processor_compatibility(rtn);
2543}
2544
2545int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
2546{
2547 struct page *page;
2548 struct kvm *kvm;
2549 int r;
2550
2551 BUG_ON(vcpu->kvm == NULL);
2552 kvm = vcpu->kvm;
2553
2554 vcpu->mmu.root_hpa = INVALID_PAGE;
2555 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
2556 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
2557 else
2558 vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
2559
2560 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
2561 if (!page) {
2562 r = -ENOMEM;
2563 goto fail;
2564 }
2565 vcpu->pio_data = page_address(page);
2566
2567 r = kvm_mmu_create(vcpu);
2568 if (r < 0)
2569 goto fail_free_pio_data;
2570
2571 if (irqchip_in_kernel(kvm)) {
2572 r = kvm_create_lapic(vcpu);
2573 if (r < 0)
2574 goto fail_mmu_destroy;
2575 }
2576
2577 return 0;
2578
2579fail_mmu_destroy:
2580 kvm_mmu_destroy(vcpu);
2581fail_free_pio_data:
2582 free_page((unsigned long)vcpu->pio_data);
2583fail:
2584 return r;
2585}
2586
2587void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
2588{
2589 kvm_free_lapic(vcpu);
2590 kvm_mmu_destroy(vcpu);
2591 free_page((unsigned long)vcpu->pio_data);
2592}
d19a9cd2
ZX		 2593
2594struct kvm *kvm_arch_create_vm(void)
2595{
2596 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
2597
2598 if (!kvm)
2599 return ERR_PTR(-ENOMEM);
2600
2601 INIT_LIST_HEAD(&kvm->active_mmu_pages);
2602
2603 return kvm;
2604}
2605
2606static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
2607{
2608 vcpu_load(vcpu);
2609 kvm_mmu_unload(vcpu);
2610 vcpu_put(vcpu);
2611}
2612
2613static void kvm_free_vcpus(struct kvm *kvm)
2614{
2615 unsigned int i;
2616
2617 /*
2618 * Unpin any mmu pages first.
2619 */
2620 for (i = 0; i < KVM_MAX_VCPUS; ++i)
2621 if (kvm->vcpus[i])
2622 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
2623 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2624 if (kvm->vcpus[i]) {
2625 kvm_arch_vcpu_free(kvm->vcpus[i]);
2626 kvm->vcpus[i] = NULL;
2627 }
2628 }
2629
2630}
2631
2632void kvm_arch_destroy_vm(struct kvm *kvm)
2633{
2634 kfree(kvm->vpic);
2635 kfree(kvm->vioapic);
2636 kvm_free_vcpus(kvm);
2637 kvm_free_physmem(kvm);
2638 kfree(kvm);
2639}
Linux 6.x block layer and io_uring tree(s)