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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <asm/page.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/module.h> | |
25 | ||
26 | #include "vmx.h" | |
27 | #include "kvm.h" | |
28 | ||
37a7d8b0 AK |
29 | #undef MMU_DEBUG |
30 | ||
31 | #undef AUDIT | |
32 | ||
33 | #ifdef AUDIT | |
34 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
35 | #else | |
36 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
37 | #endif | |
38 | ||
39 | #ifdef MMU_DEBUG | |
40 | ||
41 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
42 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
43 | ||
44 | #else | |
45 | ||
46 | #define pgprintk(x...) do { } while (0) | |
47 | #define rmap_printk(x...) do { } while (0) | |
48 | ||
49 | #endif | |
50 | ||
51 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
52 | static int dbg = 1; | |
53 | #endif | |
6aa8b732 AK |
54 | |
55 | #define ASSERT(x) \ | |
56 | if (!(x)) { \ | |
57 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
58 | __FILE__, __LINE__, #x); \ | |
59 | } | |
60 | ||
cea0f0e7 AK |
61 | #define PT64_PT_BITS 9 |
62 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
63 | #define PT32_PT_BITS 10 | |
64 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
65 | |
66 | #define PT_WRITABLE_SHIFT 1 | |
67 | ||
68 | #define PT_PRESENT_MASK (1ULL << 0) | |
69 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
70 | #define PT_USER_MASK (1ULL << 2) | |
71 | #define PT_PWT_MASK (1ULL << 3) | |
72 | #define PT_PCD_MASK (1ULL << 4) | |
73 | #define PT_ACCESSED_MASK (1ULL << 5) | |
74 | #define PT_DIRTY_MASK (1ULL << 6) | |
75 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
76 | #define PT_PAT_MASK (1ULL << 7) | |
77 | #define PT_GLOBAL_MASK (1ULL << 8) | |
78 | #define PT64_NX_MASK (1ULL << 63) | |
79 | ||
80 | #define PT_PAT_SHIFT 7 | |
81 | #define PT_DIR_PAT_SHIFT 12 | |
82 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
83 | ||
84 | #define PT32_DIR_PSE36_SIZE 4 | |
85 | #define PT32_DIR_PSE36_SHIFT 13 | |
86 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
87 | ||
88 | ||
89 | #define PT32_PTE_COPY_MASK \ | |
8c7bb723 | 90 | (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK) |
6aa8b732 | 91 | |
8c7bb723 | 92 | #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK) |
6aa8b732 AK |
93 | |
94 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 | |
95 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
96 | ||
97 | #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
98 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
99 | ||
100 | #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1) | |
101 | #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT) | |
102 | ||
103 | #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1) | |
104 | #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT)) | |
105 | ||
106 | #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT) | |
107 | ||
108 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) | |
109 | ||
110 | #define PT64_LEVEL_BITS 9 | |
111 | ||
112 | #define PT64_LEVEL_SHIFT(level) \ | |
113 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
114 | ||
115 | #define PT64_LEVEL_MASK(level) \ | |
116 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
117 | ||
118 | #define PT64_INDEX(address, level)\ | |
119 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
120 | ||
121 | ||
122 | #define PT32_LEVEL_BITS 10 | |
123 | ||
124 | #define PT32_LEVEL_SHIFT(level) \ | |
125 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
126 | ||
127 | #define PT32_LEVEL_MASK(level) \ | |
128 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
129 | ||
130 | #define PT32_INDEX(address, level)\ | |
131 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
132 | ||
133 | ||
134 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK) | |
135 | #define PT64_DIR_BASE_ADDR_MASK \ | |
136 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
137 | ||
138 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
139 | #define PT32_DIR_BASE_ADDR_MASK \ | |
140 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
141 | ||
142 | ||
143 | #define PFERR_PRESENT_MASK (1U << 0) | |
144 | #define PFERR_WRITE_MASK (1U << 1) | |
145 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 146 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
147 | |
148 | #define PT64_ROOT_LEVEL 4 | |
149 | #define PT32_ROOT_LEVEL 2 | |
150 | #define PT32E_ROOT_LEVEL 3 | |
151 | ||
152 | #define PT_DIRECTORY_LEVEL 2 | |
153 | #define PT_PAGE_TABLE_LEVEL 1 | |
154 | ||
cd4a4e53 AK |
155 | #define RMAP_EXT 4 |
156 | ||
157 | struct kvm_rmap_desc { | |
158 | u64 *shadow_ptes[RMAP_EXT]; | |
159 | struct kvm_rmap_desc *more; | |
160 | }; | |
161 | ||
6aa8b732 AK |
162 | static int is_write_protection(struct kvm_vcpu *vcpu) |
163 | { | |
164 | return vcpu->cr0 & CR0_WP_MASK; | |
165 | } | |
166 | ||
167 | static int is_cpuid_PSE36(void) | |
168 | { | |
169 | return 1; | |
170 | } | |
171 | ||
73b1087e AK |
172 | static int is_nx(struct kvm_vcpu *vcpu) |
173 | { | |
174 | return vcpu->shadow_efer & EFER_NX; | |
175 | } | |
176 | ||
6aa8b732 AK |
177 | static int is_present_pte(unsigned long pte) |
178 | { | |
179 | return pte & PT_PRESENT_MASK; | |
180 | } | |
181 | ||
182 | static int is_writeble_pte(unsigned long pte) | |
183 | { | |
184 | return pte & PT_WRITABLE_MASK; | |
185 | } | |
186 | ||
187 | static int is_io_pte(unsigned long pte) | |
188 | { | |
189 | return pte & PT_SHADOW_IO_MARK; | |
190 | } | |
191 | ||
cd4a4e53 AK |
192 | static int is_rmap_pte(u64 pte) |
193 | { | |
194 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
195 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
196 | } | |
197 | ||
e2dec939 AK |
198 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
199 | size_t objsize, int min) | |
714b93da AK |
200 | { |
201 | void *obj; | |
202 | ||
203 | if (cache->nobjs >= min) | |
e2dec939 | 204 | return 0; |
714b93da AK |
205 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
206 | obj = kzalloc(objsize, GFP_NOWAIT); | |
207 | if (!obj) | |
e2dec939 | 208 | return -ENOMEM; |
714b93da AK |
209 | cache->objects[cache->nobjs++] = obj; |
210 | } | |
e2dec939 | 211 | return 0; |
714b93da AK |
212 | } |
213 | ||
214 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
215 | { | |
216 | while (mc->nobjs) | |
217 | kfree(mc->objects[--mc->nobjs]); | |
218 | } | |
219 | ||
e2dec939 | 220 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 221 | { |
e2dec939 AK |
222 | int r; |
223 | ||
224 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
225 | sizeof(struct kvm_pte_chain), 4); | |
226 | if (r) | |
227 | goto out; | |
228 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
229 | sizeof(struct kvm_rmap_desc), 1); | |
230 | out: | |
231 | return r; | |
714b93da AK |
232 | } |
233 | ||
234 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
235 | { | |
236 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
237 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
238 | } | |
239 | ||
240 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
241 | size_t size) | |
242 | { | |
243 | void *p; | |
244 | ||
245 | BUG_ON(!mc->nobjs); | |
246 | p = mc->objects[--mc->nobjs]; | |
247 | memset(p, 0, size); | |
248 | return p; | |
249 | } | |
250 | ||
251 | static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj) | |
252 | { | |
253 | if (mc->nobjs < KVM_NR_MEM_OBJS) | |
254 | mc->objects[mc->nobjs++] = obj; | |
255 | else | |
256 | kfree(obj); | |
257 | } | |
258 | ||
259 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) | |
260 | { | |
261 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
262 | sizeof(struct kvm_pte_chain)); | |
263 | } | |
264 | ||
265 | static void mmu_free_pte_chain(struct kvm_vcpu *vcpu, | |
266 | struct kvm_pte_chain *pc) | |
267 | { | |
268 | mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc); | |
269 | } | |
270 | ||
271 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
272 | { | |
273 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
274 | sizeof(struct kvm_rmap_desc)); | |
275 | } | |
276 | ||
277 | static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu, | |
278 | struct kvm_rmap_desc *rd) | |
279 | { | |
280 | mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd); | |
281 | } | |
282 | ||
cd4a4e53 AK |
283 | /* |
284 | * Reverse mapping data structures: | |
285 | * | |
286 | * If page->private bit zero is zero, then page->private points to the | |
287 | * shadow page table entry that points to page_address(page). | |
288 | * | |
289 | * If page->private bit zero is one, (then page->private & ~1) points | |
290 | * to a struct kvm_rmap_desc containing more mappings. | |
291 | */ | |
714b93da | 292 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
293 | { |
294 | struct page *page; | |
295 | struct kvm_rmap_desc *desc; | |
296 | int i; | |
297 | ||
298 | if (!is_rmap_pte(*spte)) | |
299 | return; | |
300 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 301 | if (!page_private(page)) { |
cd4a4e53 | 302 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
303 | set_page_private(page,(unsigned long)spte); |
304 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 305 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 306 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 307 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 308 | desc->shadow_ptes[1] = spte; |
5972e953 | 309 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
310 | } else { |
311 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 312 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
313 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
314 | desc = desc->more; | |
315 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 316 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
317 | desc = desc->more; |
318 | } | |
319 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
320 | ; | |
321 | desc->shadow_ptes[i] = spte; | |
322 | } | |
323 | } | |
324 | ||
714b93da AK |
325 | static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu, |
326 | struct page *page, | |
cd4a4e53 AK |
327 | struct kvm_rmap_desc *desc, |
328 | int i, | |
329 | struct kvm_rmap_desc *prev_desc) | |
330 | { | |
331 | int j; | |
332 | ||
333 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
334 | ; | |
335 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 336 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
337 | if (j != 0) |
338 | return; | |
339 | if (!prev_desc && !desc->more) | |
5972e953 | 340 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
341 | else |
342 | if (prev_desc) | |
343 | prev_desc->more = desc->more; | |
344 | else | |
5972e953 | 345 | set_page_private(page,(unsigned long)desc->more | 1); |
714b93da | 346 | mmu_free_rmap_desc(vcpu, desc); |
cd4a4e53 AK |
347 | } |
348 | ||
714b93da | 349 | static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
350 | { |
351 | struct page *page; | |
352 | struct kvm_rmap_desc *desc; | |
353 | struct kvm_rmap_desc *prev_desc; | |
354 | int i; | |
355 | ||
356 | if (!is_rmap_pte(*spte)) | |
357 | return; | |
358 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 359 | if (!page_private(page)) { |
cd4a4e53 AK |
360 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
361 | BUG(); | |
5972e953 | 362 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 363 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 364 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
365 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
366 | spte, *spte); | |
367 | BUG(); | |
368 | } | |
5972e953 | 369 | set_page_private(page,0); |
cd4a4e53 AK |
370 | } else { |
371 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 372 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
373 | prev_desc = NULL; |
374 | while (desc) { | |
375 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
376 | if (desc->shadow_ptes[i] == spte) { | |
714b93da AK |
377 | rmap_desc_remove_entry(vcpu, page, |
378 | desc, i, | |
cd4a4e53 AK |
379 | prev_desc); |
380 | return; | |
381 | } | |
382 | prev_desc = desc; | |
383 | desc = desc->more; | |
384 | } | |
385 | BUG(); | |
386 | } | |
387 | } | |
388 | ||
714b93da | 389 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 390 | { |
714b93da | 391 | struct kvm *kvm = vcpu->kvm; |
374cbac0 AK |
392 | struct page *page; |
393 | struct kvm_memory_slot *slot; | |
394 | struct kvm_rmap_desc *desc; | |
395 | u64 *spte; | |
396 | ||
397 | slot = gfn_to_memslot(kvm, gfn); | |
398 | BUG_ON(!slot); | |
399 | page = gfn_to_page(slot, gfn); | |
400 | ||
5972e953 MR |
401 | while (page_private(page)) { |
402 | if (!(page_private(page) & 1)) | |
403 | spte = (u64 *)page_private(page); | |
374cbac0 | 404 | else { |
5972e953 | 405 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
406 | spte = desc->shadow_ptes[0]; |
407 | } | |
408 | BUG_ON(!spte); | |
409 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) != | |
410 | page_to_pfn(page) << PAGE_SHIFT); | |
411 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
412 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
413 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
714b93da | 414 | rmap_remove(vcpu, spte); |
40907d57 | 415 | kvm_arch_ops->tlb_flush(vcpu); |
374cbac0 AK |
416 | *spte &= ~(u64)PT_WRITABLE_MASK; |
417 | } | |
418 | } | |
419 | ||
6aa8b732 AK |
420 | static int is_empty_shadow_page(hpa_t page_hpa) |
421 | { | |
139bdb2d AK |
422 | u64 *pos; |
423 | u64 *end; | |
424 | ||
425 | for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64); | |
6aa8b732 | 426 | pos != end; pos++) |
139bdb2d AK |
427 | if (*pos != 0) { |
428 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
429 | pos, *pos); | |
6aa8b732 | 430 | return 0; |
139bdb2d | 431 | } |
6aa8b732 AK |
432 | return 1; |
433 | } | |
434 | ||
260746c0 AK |
435 | static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa) |
436 | { | |
437 | struct kvm_mmu_page *page_head = page_header(page_hpa); | |
438 | ||
5f1e0b6a | 439 | ASSERT(is_empty_shadow_page(page_hpa)); |
260746c0 AK |
440 | list_del(&page_head->link); |
441 | page_head->page_hpa = page_hpa; | |
442 | list_add(&page_head->link, &vcpu->free_pages); | |
443 | ++vcpu->kvm->n_free_mmu_pages; | |
444 | } | |
445 | ||
cea0f0e7 AK |
446 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
447 | { | |
448 | return gfn; | |
449 | } | |
450 | ||
25c0de2c AK |
451 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
452 | u64 *parent_pte) | |
6aa8b732 AK |
453 | { |
454 | struct kvm_mmu_page *page; | |
455 | ||
456 | if (list_empty(&vcpu->free_pages)) | |
25c0de2c | 457 | return NULL; |
6aa8b732 AK |
458 | |
459 | page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link); | |
460 | list_del(&page->link); | |
461 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
462 | ASSERT(is_empty_shadow_page(page->page_hpa)); | |
463 | page->slot_bitmap = 0; | |
464 | page->global = 1; | |
cea0f0e7 | 465 | page->multimapped = 0; |
6aa8b732 | 466 | page->parent_pte = parent_pte; |
ebeace86 | 467 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 468 | return page; |
6aa8b732 AK |
469 | } |
470 | ||
714b93da AK |
471 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
472 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
473 | { |
474 | struct kvm_pte_chain *pte_chain; | |
475 | struct hlist_node *node; | |
476 | int i; | |
477 | ||
478 | if (!parent_pte) | |
479 | return; | |
480 | if (!page->multimapped) { | |
481 | u64 *old = page->parent_pte; | |
482 | ||
483 | if (!old) { | |
484 | page->parent_pte = parent_pte; | |
485 | return; | |
486 | } | |
487 | page->multimapped = 1; | |
714b93da | 488 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
489 | INIT_HLIST_HEAD(&page->parent_ptes); |
490 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
491 | pte_chain->parent_ptes[0] = old; | |
492 | } | |
493 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
494 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
495 | continue; | |
496 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
497 | if (!pte_chain->parent_ptes[i]) { | |
498 | pte_chain->parent_ptes[i] = parent_pte; | |
499 | return; | |
500 | } | |
501 | } | |
714b93da | 502 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
503 | BUG_ON(!pte_chain); |
504 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
505 | pte_chain->parent_ptes[0] = parent_pte; | |
506 | } | |
507 | ||
714b93da AK |
508 | static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu, |
509 | struct kvm_mmu_page *page, | |
cea0f0e7 AK |
510 | u64 *parent_pte) |
511 | { | |
512 | struct kvm_pte_chain *pte_chain; | |
513 | struct hlist_node *node; | |
514 | int i; | |
515 | ||
516 | if (!page->multimapped) { | |
517 | BUG_ON(page->parent_pte != parent_pte); | |
518 | page->parent_pte = NULL; | |
519 | return; | |
520 | } | |
521 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
522 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
523 | if (!pte_chain->parent_ptes[i]) | |
524 | break; | |
525 | if (pte_chain->parent_ptes[i] != parent_pte) | |
526 | continue; | |
697fe2e2 AK |
527 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
528 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
529 | pte_chain->parent_ptes[i] |
530 | = pte_chain->parent_ptes[i + 1]; | |
531 | ++i; | |
532 | } | |
533 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
534 | if (i == 0) { |
535 | hlist_del(&pte_chain->link); | |
714b93da | 536 | mmu_free_pte_chain(vcpu, pte_chain); |
697fe2e2 AK |
537 | if (hlist_empty(&page->parent_ptes)) { |
538 | page->multimapped = 0; | |
539 | page->parent_pte = NULL; | |
540 | } | |
541 | } | |
cea0f0e7 AK |
542 | return; |
543 | } | |
544 | BUG(); | |
545 | } | |
546 | ||
547 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
548 | gfn_t gfn) | |
549 | { | |
550 | unsigned index; | |
551 | struct hlist_head *bucket; | |
552 | struct kvm_mmu_page *page; | |
553 | struct hlist_node *node; | |
554 | ||
555 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
556 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
557 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
558 | hlist_for_each_entry(page, node, bucket, hash_link) | |
559 | if (page->gfn == gfn && !page->role.metaphysical) { | |
560 | pgprintk("%s: found role %x\n", | |
561 | __FUNCTION__, page->role.word); | |
562 | return page; | |
563 | } | |
564 | return NULL; | |
565 | } | |
566 | ||
567 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
568 | gfn_t gfn, | |
569 | gva_t gaddr, | |
570 | unsigned level, | |
571 | int metaphysical, | |
572 | u64 *parent_pte) | |
573 | { | |
574 | union kvm_mmu_page_role role; | |
575 | unsigned index; | |
576 | unsigned quadrant; | |
577 | struct hlist_head *bucket; | |
578 | struct kvm_mmu_page *page; | |
579 | struct hlist_node *node; | |
580 | ||
581 | role.word = 0; | |
582 | role.glevels = vcpu->mmu.root_level; | |
583 | role.level = level; | |
584 | role.metaphysical = metaphysical; | |
585 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { | |
586 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
587 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
588 | role.quadrant = quadrant; | |
589 | } | |
590 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
591 | gfn, role.word); | |
592 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
593 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
594 | hlist_for_each_entry(page, node, bucket, hash_link) | |
595 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 596 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
597 | pgprintk("%s: found\n", __FUNCTION__); |
598 | return page; | |
599 | } | |
600 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
601 | if (!page) | |
602 | return page; | |
603 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
604 | page->gfn = gfn; | |
605 | page->role = role; | |
606 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 607 | if (!metaphysical) |
714b93da | 608 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
609 | return page; |
610 | } | |
611 | ||
a436036b AK |
612 | static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu, |
613 | struct kvm_mmu_page *page) | |
614 | { | |
697fe2e2 AK |
615 | unsigned i; |
616 | u64 *pt; | |
617 | u64 ent; | |
618 | ||
619 | pt = __va(page->page_hpa); | |
620 | ||
621 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
622 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
623 | if (pt[i] & PT_PRESENT_MASK) | |
714b93da | 624 | rmap_remove(vcpu, &pt[i]); |
697fe2e2 AK |
625 | pt[i] = 0; |
626 | } | |
40907d57 | 627 | kvm_arch_ops->tlb_flush(vcpu); |
697fe2e2 AK |
628 | return; |
629 | } | |
630 | ||
631 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
632 | ent = pt[i]; | |
633 | ||
634 | pt[i] = 0; | |
635 | if (!(ent & PT_PRESENT_MASK)) | |
636 | continue; | |
637 | ent &= PT64_BASE_ADDR_MASK; | |
714b93da | 638 | mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]); |
697fe2e2 | 639 | } |
a436036b AK |
640 | } |
641 | ||
cea0f0e7 AK |
642 | static void kvm_mmu_put_page(struct kvm_vcpu *vcpu, |
643 | struct kvm_mmu_page *page, | |
644 | u64 *parent_pte) | |
645 | { | |
714b93da | 646 | mmu_page_remove_parent_pte(vcpu, page, parent_pte); |
a436036b AK |
647 | } |
648 | ||
649 | static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu, | |
650 | struct kvm_mmu_page *page) | |
651 | { | |
652 | u64 *parent_pte; | |
653 | ||
654 | while (page->multimapped || page->parent_pte) { | |
655 | if (!page->multimapped) | |
656 | parent_pte = page->parent_pte; | |
657 | else { | |
658 | struct kvm_pte_chain *chain; | |
659 | ||
660 | chain = container_of(page->parent_ptes.first, | |
661 | struct kvm_pte_chain, link); | |
662 | parent_pte = chain->parent_ptes[0]; | |
663 | } | |
697fe2e2 | 664 | BUG_ON(!parent_pte); |
a436036b AK |
665 | kvm_mmu_put_page(vcpu, page, parent_pte); |
666 | *parent_pte = 0; | |
667 | } | |
cc4529ef | 668 | kvm_mmu_page_unlink_children(vcpu, page); |
3bb65a22 AK |
669 | if (!page->root_count) { |
670 | hlist_del(&page->hash_link); | |
671 | kvm_mmu_free_page(vcpu, page->page_hpa); | |
672 | } else { | |
673 | list_del(&page->link); | |
674 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
675 | } | |
a436036b AK |
676 | } |
677 | ||
678 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
679 | { | |
680 | unsigned index; | |
681 | struct hlist_head *bucket; | |
682 | struct kvm_mmu_page *page; | |
683 | struct hlist_node *node, *n; | |
684 | int r; | |
685 | ||
686 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
687 | r = 0; | |
688 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
689 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
690 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
691 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
692 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
693 | page->role.word); | |
a436036b AK |
694 | kvm_mmu_zap_page(vcpu, page); |
695 | r = 1; | |
696 | } | |
697 | return r; | |
cea0f0e7 AK |
698 | } |
699 | ||
6aa8b732 AK |
700 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
701 | { | |
702 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
703 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
704 | ||
705 | __set_bit(slot, &page_head->slot_bitmap); | |
706 | } | |
707 | ||
708 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
709 | { | |
710 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
711 | ||
712 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
713 | } | |
714 | ||
715 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
716 | { | |
717 | struct kvm_memory_slot *slot; | |
718 | struct page *page; | |
719 | ||
720 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
721 | slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT); | |
722 | if (!slot) | |
723 | return gpa | HPA_ERR_MASK; | |
724 | page = gfn_to_page(slot, gpa >> PAGE_SHIFT); | |
725 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | |
726 | | (gpa & (PAGE_SIZE-1)); | |
727 | } | |
728 | ||
729 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
730 | { | |
731 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
732 | ||
733 | if (gpa == UNMAPPED_GVA) | |
734 | return UNMAPPED_GVA; | |
735 | return gpa_to_hpa(vcpu, gpa); | |
736 | } | |
737 | ||
6aa8b732 AK |
738 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
739 | { | |
740 | } | |
741 | ||
742 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
743 | { | |
744 | int level = PT32E_ROOT_LEVEL; | |
745 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
746 | ||
747 | for (; ; level--) { | |
748 | u32 index = PT64_INDEX(v, level); | |
749 | u64 *table; | |
cea0f0e7 | 750 | u64 pte; |
6aa8b732 AK |
751 | |
752 | ASSERT(VALID_PAGE(table_addr)); | |
753 | table = __va(table_addr); | |
754 | ||
755 | if (level == 1) { | |
cea0f0e7 AK |
756 | pte = table[index]; |
757 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
758 | return 0; | |
6aa8b732 AK |
759 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
760 | page_header_update_slot(vcpu->kvm, table, v); | |
761 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
762 | PT_USER_MASK; | |
714b93da | 763 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
764 | return 0; |
765 | } | |
766 | ||
767 | if (table[index] == 0) { | |
25c0de2c | 768 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 769 | gfn_t pseudo_gfn; |
6aa8b732 | 770 | |
cea0f0e7 AK |
771 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
772 | >> PAGE_SHIFT; | |
773 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
774 | v, level - 1, | |
775 | 1, &table[index]); | |
25c0de2c | 776 | if (!new_table) { |
6aa8b732 AK |
777 | pgprintk("nonpaging_map: ENOMEM\n"); |
778 | return -ENOMEM; | |
779 | } | |
780 | ||
25c0de2c AK |
781 | table[index] = new_table->page_hpa | PT_PRESENT_MASK |
782 | | PT_WRITABLE_MASK | PT_USER_MASK; | |
6aa8b732 AK |
783 | } |
784 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
785 | } | |
786 | } | |
787 | ||
17ac10ad AK |
788 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
789 | { | |
790 | int i; | |
3bb65a22 | 791 | struct kvm_mmu_page *page; |
17ac10ad AK |
792 | |
793 | #ifdef CONFIG_X86_64 | |
794 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
795 | hpa_t root = vcpu->mmu.root_hpa; | |
796 | ||
797 | ASSERT(VALID_PAGE(root)); | |
3bb65a22 AK |
798 | page = page_header(root); |
799 | --page->root_count; | |
17ac10ad AK |
800 | vcpu->mmu.root_hpa = INVALID_PAGE; |
801 | return; | |
802 | } | |
803 | #endif | |
804 | for (i = 0; i < 4; ++i) { | |
805 | hpa_t root = vcpu->mmu.pae_root[i]; | |
806 | ||
807 | ASSERT(VALID_PAGE(root)); | |
808 | root &= PT64_BASE_ADDR_MASK; | |
3bb65a22 AK |
809 | page = page_header(root); |
810 | --page->root_count; | |
17ac10ad AK |
811 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
812 | } | |
813 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
814 | } | |
815 | ||
816 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
817 | { | |
818 | int i; | |
cea0f0e7 | 819 | gfn_t root_gfn; |
3bb65a22 AK |
820 | struct kvm_mmu_page *page; |
821 | ||
cea0f0e7 | 822 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
823 | |
824 | #ifdef CONFIG_X86_64 | |
825 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
826 | hpa_t root = vcpu->mmu.root_hpa; | |
827 | ||
828 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d IM |
829 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
830 | PT64_ROOT_LEVEL, 0, NULL); | |
831 | root = page->page_hpa; | |
3bb65a22 | 832 | ++page->root_count; |
17ac10ad AK |
833 | vcpu->mmu.root_hpa = root; |
834 | return; | |
835 | } | |
836 | #endif | |
837 | for (i = 0; i < 4; ++i) { | |
838 | hpa_t root = vcpu->mmu.pae_root[i]; | |
839 | ||
840 | ASSERT(!VALID_PAGE(root)); | |
cea0f0e7 AK |
841 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) |
842 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; | |
843 | else if (vcpu->mmu.root_level == 0) | |
844 | root_gfn = 0; | |
68a99f6d | 845 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 846 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
68a99f6d IM |
847 | NULL); |
848 | root = page->page_hpa; | |
3bb65a22 | 849 | ++page->root_count; |
17ac10ad AK |
850 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
851 | } | |
852 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
853 | } | |
854 | ||
6aa8b732 AK |
855 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
856 | { | |
857 | return vaddr; | |
858 | } | |
859 | ||
860 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
861 | u32 error_code) | |
862 | { | |
6aa8b732 | 863 | gpa_t addr = gva; |
ebeace86 | 864 | hpa_t paddr; |
e2dec939 | 865 | int r; |
6aa8b732 | 866 | |
e2dec939 AK |
867 | r = mmu_topup_memory_caches(vcpu); |
868 | if (r) | |
869 | return r; | |
714b93da | 870 | |
6aa8b732 AK |
871 | ASSERT(vcpu); |
872 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
873 | ||
6aa8b732 | 874 | |
ebeace86 | 875 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 876 | |
ebeace86 AK |
877 | if (is_error_hpa(paddr)) |
878 | return 1; | |
6aa8b732 | 879 | |
ebeace86 | 880 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
881 | } |
882 | ||
6aa8b732 AK |
883 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
884 | { | |
17ac10ad | 885 | mmu_free_roots(vcpu); |
6aa8b732 AK |
886 | } |
887 | ||
888 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
889 | { | |
890 | struct kvm_mmu *context = &vcpu->mmu; | |
891 | ||
892 | context->new_cr3 = nonpaging_new_cr3; | |
893 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
894 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
895 | context->free = nonpaging_free; | |
cea0f0e7 | 896 | context->root_level = 0; |
6aa8b732 | 897 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17ac10ad | 898 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
899 | ASSERT(VALID_PAGE(context->root_hpa)); |
900 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa); | |
901 | return 0; | |
902 | } | |
903 | ||
6aa8b732 AK |
904 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
905 | { | |
6aa8b732 AK |
906 | ++kvm_stat.tlb_flush; |
907 | kvm_arch_ops->tlb_flush(vcpu); | |
908 | } | |
909 | ||
910 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
911 | { | |
374cbac0 | 912 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 913 | mmu_free_roots(vcpu); |
7f7417d6 IM |
914 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) |
915 | kvm_mmu_free_some_pages(vcpu); | |
cea0f0e7 | 916 | mmu_alloc_roots(vcpu); |
6aa8b732 | 917 | kvm_mmu_flush_tlb(vcpu); |
cea0f0e7 | 918 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
6aa8b732 AK |
919 | } |
920 | ||
921 | static void mark_pagetable_nonglobal(void *shadow_pte) | |
922 | { | |
923 | page_header(__pa(shadow_pte))->global = 0; | |
924 | } | |
925 | ||
926 | static inline void set_pte_common(struct kvm_vcpu *vcpu, | |
927 | u64 *shadow_pte, | |
928 | gpa_t gaddr, | |
929 | int dirty, | |
815af8d4 AK |
930 | u64 access_bits, |
931 | gfn_t gfn) | |
6aa8b732 AK |
932 | { |
933 | hpa_t paddr; | |
934 | ||
935 | *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET; | |
936 | if (!dirty) | |
937 | access_bits &= ~PT_WRITABLE_MASK; | |
cea0f0e7 | 938 | |
374cbac0 | 939 | paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK); |
6aa8b732 AK |
940 | |
941 | *shadow_pte |= access_bits; | |
942 | ||
6aa8b732 AK |
943 | if (!(*shadow_pte & PT_GLOBAL_MASK)) |
944 | mark_pagetable_nonglobal(shadow_pte); | |
945 | ||
946 | if (is_error_hpa(paddr)) { | |
947 | *shadow_pte |= gaddr; | |
948 | *shadow_pte |= PT_SHADOW_IO_MARK; | |
949 | *shadow_pte &= ~PT_PRESENT_MASK; | |
374cbac0 | 950 | return; |
6aa8b732 | 951 | } |
374cbac0 AK |
952 | |
953 | *shadow_pte |= paddr; | |
954 | ||
955 | if (access_bits & PT_WRITABLE_MASK) { | |
956 | struct kvm_mmu_page *shadow; | |
957 | ||
815af8d4 | 958 | shadow = kvm_mmu_lookup_page(vcpu, gfn); |
374cbac0 AK |
959 | if (shadow) { |
960 | pgprintk("%s: found shadow page for %lx, marking ro\n", | |
815af8d4 | 961 | __FUNCTION__, gfn); |
374cbac0 | 962 | access_bits &= ~PT_WRITABLE_MASK; |
40907d57 AK |
963 | if (is_writeble_pte(*shadow_pte)) { |
964 | *shadow_pte &= ~PT_WRITABLE_MASK; | |
965 | kvm_arch_ops->tlb_flush(vcpu); | |
966 | } | |
374cbac0 AK |
967 | } |
968 | } | |
969 | ||
970 | if (access_bits & PT_WRITABLE_MASK) | |
971 | mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT); | |
972 | ||
973 | page_header_update_slot(vcpu->kvm, shadow_pte, gaddr); | |
714b93da | 974 | rmap_add(vcpu, shadow_pte); |
6aa8b732 AK |
975 | } |
976 | ||
977 | static void inject_page_fault(struct kvm_vcpu *vcpu, | |
978 | u64 addr, | |
979 | u32 err_code) | |
980 | { | |
981 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
982 | } | |
983 | ||
984 | static inline int fix_read_pf(u64 *shadow_ent) | |
985 | { | |
986 | if ((*shadow_ent & PT_SHADOW_USER_MASK) && | |
987 | !(*shadow_ent & PT_USER_MASK)) { | |
988 | /* | |
989 | * If supervisor write protect is disabled, we shadow kernel | |
990 | * pages as user pages so we can trap the write access. | |
991 | */ | |
992 | *shadow_ent |= PT_USER_MASK; | |
993 | *shadow_ent &= ~PT_WRITABLE_MASK; | |
994 | ||
995 | return 1; | |
996 | ||
997 | } | |
998 | return 0; | |
999 | } | |
1000 | ||
6aa8b732 AK |
1001 | static void paging_free(struct kvm_vcpu *vcpu) |
1002 | { | |
1003 | nonpaging_free(vcpu); | |
1004 | } | |
1005 | ||
1006 | #define PTTYPE 64 | |
1007 | #include "paging_tmpl.h" | |
1008 | #undef PTTYPE | |
1009 | ||
1010 | #define PTTYPE 32 | |
1011 | #include "paging_tmpl.h" | |
1012 | #undef PTTYPE | |
1013 | ||
17ac10ad | 1014 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1015 | { |
1016 | struct kvm_mmu *context = &vcpu->mmu; | |
1017 | ||
1018 | ASSERT(is_pae(vcpu)); | |
1019 | context->new_cr3 = paging_new_cr3; | |
1020 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
1021 | context->gva_to_gpa = paging64_gva_to_gpa; |
1022 | context->free = paging_free; | |
17ac10ad AK |
1023 | context->root_level = level; |
1024 | context->shadow_root_level = level; | |
1025 | mmu_alloc_roots(vcpu); | |
6aa8b732 AK |
1026 | ASSERT(VALID_PAGE(context->root_hpa)); |
1027 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1028 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1029 | return 0; | |
1030 | } | |
1031 | ||
17ac10ad AK |
1032 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1033 | { | |
1034 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1035 | } | |
1036 | ||
6aa8b732 AK |
1037 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1038 | { | |
1039 | struct kvm_mmu *context = &vcpu->mmu; | |
1040 | ||
1041 | context->new_cr3 = paging_new_cr3; | |
1042 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1043 | context->gva_to_gpa = paging32_gva_to_gpa; |
1044 | context->free = paging_free; | |
1045 | context->root_level = PT32_ROOT_LEVEL; | |
1046 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17ac10ad | 1047 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
1048 | ASSERT(VALID_PAGE(context->root_hpa)); |
1049 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1050 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1051 | return 0; | |
1052 | } | |
1053 | ||
1054 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1055 | { | |
17ac10ad | 1056 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1057 | } |
1058 | ||
1059 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1060 | { | |
1061 | ASSERT(vcpu); | |
1062 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1063 | ||
1064 | if (!is_paging(vcpu)) | |
1065 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1066 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1067 | return paging64_init_context(vcpu); |
1068 | else if (is_pae(vcpu)) | |
1069 | return paging32E_init_context(vcpu); | |
1070 | else | |
1071 | return paging32_init_context(vcpu); | |
1072 | } | |
1073 | ||
1074 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1075 | { | |
1076 | ASSERT(vcpu); | |
1077 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1078 | vcpu->mmu.free(vcpu); | |
1079 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1080 | } | |
1081 | } | |
1082 | ||
1083 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
1084 | { | |
714b93da AK |
1085 | int r; |
1086 | ||
6aa8b732 | 1087 | destroy_kvm_mmu(vcpu); |
714b93da AK |
1088 | r = init_kvm_mmu(vcpu); |
1089 | if (r < 0) | |
1090 | goto out; | |
e2dec939 | 1091 | r = mmu_topup_memory_caches(vcpu); |
714b93da AK |
1092 | out: |
1093 | return r; | |
6aa8b732 AK |
1094 | } |
1095 | ||
da4a00f0 AK |
1096 | void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) |
1097 | { | |
9b7a0325 AK |
1098 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1099 | struct kvm_mmu_page *page; | |
1100 | struct kvm_mmu_page *child; | |
0e7bc4b9 | 1101 | struct hlist_node *node, *n; |
9b7a0325 AK |
1102 | struct hlist_head *bucket; |
1103 | unsigned index; | |
1104 | u64 *spte; | |
1105 | u64 pte; | |
1106 | unsigned offset = offset_in_page(gpa); | |
0e7bc4b9 | 1107 | unsigned pte_size; |
9b7a0325 | 1108 | unsigned page_offset; |
0e7bc4b9 | 1109 | unsigned misaligned; |
9b7a0325 | 1110 | int level; |
86a5ba02 | 1111 | int flooded = 0; |
9b7a0325 | 1112 | |
da4a00f0 | 1113 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1114 | if (gfn == vcpu->last_pt_write_gfn) { |
1115 | ++vcpu->last_pt_write_count; | |
1116 | if (vcpu->last_pt_write_count >= 3) | |
1117 | flooded = 1; | |
1118 | } else { | |
1119 | vcpu->last_pt_write_gfn = gfn; | |
1120 | vcpu->last_pt_write_count = 1; | |
1121 | } | |
9b7a0325 AK |
1122 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1123 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1124 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1125 | if (page->gfn != gfn || page->role.metaphysical) |
1126 | continue; | |
0e7bc4b9 AK |
1127 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1128 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
86a5ba02 | 1129 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1130 | /* |
1131 | * Misaligned accesses are too much trouble to fix | |
1132 | * up; also, they usually indicate a page is not used | |
1133 | * as a page table. | |
86a5ba02 AK |
1134 | * |
1135 | * If we're seeing too many writes to a page, | |
1136 | * it may no longer be a page table, or we may be | |
1137 | * forking, in which case it is better to unmap the | |
1138 | * page. | |
0e7bc4b9 AK |
1139 | */ |
1140 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1141 | gpa, bytes, page->role.word); | |
1142 | kvm_mmu_zap_page(vcpu, page); | |
1143 | continue; | |
1144 | } | |
9b7a0325 AK |
1145 | page_offset = offset; |
1146 | level = page->role.level; | |
1147 | if (page->role.glevels == PT32_ROOT_LEVEL) { | |
1148 | page_offset <<= 1; /* 32->64 */ | |
1149 | page_offset &= ~PAGE_MASK; | |
1150 | } | |
1151 | spte = __va(page->page_hpa); | |
1152 | spte += page_offset / sizeof(*spte); | |
1153 | pte = *spte; | |
1154 | if (is_present_pte(pte)) { | |
1155 | if (level == PT_PAGE_TABLE_LEVEL) | |
714b93da | 1156 | rmap_remove(vcpu, spte); |
9b7a0325 AK |
1157 | else { |
1158 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
714b93da | 1159 | mmu_page_remove_parent_pte(vcpu, child, spte); |
9b7a0325 AK |
1160 | } |
1161 | } | |
1162 | *spte = 0; | |
1163 | } | |
da4a00f0 AK |
1164 | } |
1165 | ||
1166 | void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) | |
1167 | { | |
1168 | } | |
1169 | ||
a436036b AK |
1170 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1171 | { | |
1172 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1173 | ||
1174 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1175 | } | |
1176 | ||
ebeace86 AK |
1177 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1178 | { | |
1179 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1180 | struct kvm_mmu_page *page; | |
1181 | ||
1182 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1183 | struct kvm_mmu_page, link); | |
1184 | kvm_mmu_zap_page(vcpu, page); | |
1185 | } | |
1186 | } | |
1187 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1188 | ||
6aa8b732 AK |
1189 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1190 | { | |
f51234c2 | 1191 | struct kvm_mmu_page *page; |
6aa8b732 | 1192 | |
f51234c2 AK |
1193 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1194 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1195 | struct kvm_mmu_page, link); | |
1196 | kvm_mmu_zap_page(vcpu, page); | |
1197 | } | |
1198 | while (!list_empty(&vcpu->free_pages)) { | |
6aa8b732 AK |
1199 | page = list_entry(vcpu->free_pages.next, |
1200 | struct kvm_mmu_page, link); | |
1201 | list_del(&page->link); | |
1202 | __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT)); | |
1203 | page->page_hpa = INVALID_PAGE; | |
1204 | } | |
17ac10ad | 1205 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1206 | } |
1207 | ||
1208 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1209 | { | |
17ac10ad | 1210 | struct page *page; |
6aa8b732 AK |
1211 | int i; |
1212 | ||
1213 | ASSERT(vcpu); | |
1214 | ||
1215 | for (i = 0; i < KVM_NUM_MMU_PAGES; i++) { | |
6aa8b732 AK |
1216 | struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i]; |
1217 | ||
1218 | INIT_LIST_HEAD(&page_header->link); | |
17ac10ad | 1219 | if ((page = alloc_page(GFP_KERNEL)) == NULL) |
6aa8b732 | 1220 | goto error_1; |
5972e953 | 1221 | set_page_private(page, (unsigned long)page_header); |
6aa8b732 AK |
1222 | page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT; |
1223 | memset(__va(page_header->page_hpa), 0, PAGE_SIZE); | |
1224 | list_add(&page_header->link, &vcpu->free_pages); | |
ebeace86 | 1225 | ++vcpu->kvm->n_free_mmu_pages; |
6aa8b732 | 1226 | } |
17ac10ad AK |
1227 | |
1228 | /* | |
1229 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1230 | * Therefore we need to allocate shadow page tables in the first | |
1231 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1232 | */ | |
1233 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1234 | if (!page) | |
1235 | goto error_1; | |
1236 | vcpu->mmu.pae_root = page_address(page); | |
1237 | for (i = 0; i < 4; ++i) | |
1238 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1239 | ||
6aa8b732 AK |
1240 | return 0; |
1241 | ||
1242 | error_1: | |
1243 | free_mmu_pages(vcpu); | |
1244 | return -ENOMEM; | |
1245 | } | |
1246 | ||
8018c27b | 1247 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1248 | { |
6aa8b732 AK |
1249 | ASSERT(vcpu); |
1250 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1251 | ASSERT(list_empty(&vcpu->free_pages)); | |
1252 | ||
8018c27b IM |
1253 | return alloc_mmu_pages(vcpu); |
1254 | } | |
6aa8b732 | 1255 | |
8018c27b IM |
1256 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1257 | { | |
1258 | ASSERT(vcpu); | |
1259 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1260 | ASSERT(!list_empty(&vcpu->free_pages)); | |
2c264957 | 1261 | |
8018c27b | 1262 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1263 | } |
1264 | ||
1265 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1266 | { | |
1267 | ASSERT(vcpu); | |
1268 | ||
1269 | destroy_kvm_mmu(vcpu); | |
1270 | free_mmu_pages(vcpu); | |
714b93da | 1271 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1272 | } |
1273 | ||
714b93da | 1274 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot) |
6aa8b732 | 1275 | { |
714b93da | 1276 | struct kvm *kvm = vcpu->kvm; |
6aa8b732 AK |
1277 | struct kvm_mmu_page *page; |
1278 | ||
1279 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1280 | int i; | |
1281 | u64 *pt; | |
1282 | ||
1283 | if (!test_bit(slot, &page->slot_bitmap)) | |
1284 | continue; | |
1285 | ||
1286 | pt = __va(page->page_hpa); | |
1287 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1288 | /* avoid RMW */ | |
cd4a4e53 | 1289 | if (pt[i] & PT_WRITABLE_MASK) { |
714b93da | 1290 | rmap_remove(vcpu, &pt[i]); |
6aa8b732 | 1291 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1292 | } |
6aa8b732 AK |
1293 | } |
1294 | } | |
37a7d8b0 AK |
1295 | |
1296 | #ifdef AUDIT | |
1297 | ||
1298 | static const char *audit_msg; | |
1299 | ||
1300 | static gva_t canonicalize(gva_t gva) | |
1301 | { | |
1302 | #ifdef CONFIG_X86_64 | |
1303 | gva = (long long)(gva << 16) >> 16; | |
1304 | #endif | |
1305 | return gva; | |
1306 | } | |
1307 | ||
1308 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1309 | gva_t va, int level) | |
1310 | { | |
1311 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1312 | int i; | |
1313 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1314 | ||
1315 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1316 | u64 ent = pt[i]; | |
1317 | ||
1318 | if (!ent & PT_PRESENT_MASK) | |
1319 | continue; | |
1320 | ||
1321 | va = canonicalize(va); | |
1322 | if (level > 1) | |
1323 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1324 | else { | |
1325 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1326 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1327 | ||
1328 | if ((ent & PT_PRESENT_MASK) | |
1329 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1330 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1331 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1332 | audit_msg, vcpu->mmu.root_level, | |
1333 | va, gpa, hpa, ent); | |
1334 | } | |
1335 | } | |
1336 | } | |
1337 | ||
1338 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1339 | { | |
1340 | int i; | |
1341 | ||
1342 | if (vcpu->mmu.root_level == 4) | |
1343 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1344 | else | |
1345 | for (i = 0; i < 4; ++i) | |
1346 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1347 | audit_mappings_page(vcpu, | |
1348 | vcpu->mmu.pae_root[i], | |
1349 | i << 30, | |
1350 | 2); | |
1351 | } | |
1352 | ||
1353 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1354 | { | |
1355 | int nmaps = 0; | |
1356 | int i, j, k; | |
1357 | ||
1358 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1359 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1360 | struct kvm_rmap_desc *d; | |
1361 | ||
1362 | for (j = 0; j < m->npages; ++j) { | |
1363 | struct page *page = m->phys_mem[j]; | |
1364 | ||
1365 | if (!page->private) | |
1366 | continue; | |
1367 | if (!(page->private & 1)) { | |
1368 | ++nmaps; | |
1369 | continue; | |
1370 | } | |
1371 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1372 | while (d) { | |
1373 | for (k = 0; k < RMAP_EXT; ++k) | |
1374 | if (d->shadow_ptes[k]) | |
1375 | ++nmaps; | |
1376 | else | |
1377 | break; | |
1378 | d = d->more; | |
1379 | } | |
1380 | } | |
1381 | } | |
1382 | return nmaps; | |
1383 | } | |
1384 | ||
1385 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1386 | { | |
1387 | int nmaps = 0; | |
1388 | struct kvm_mmu_page *page; | |
1389 | int i; | |
1390 | ||
1391 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1392 | u64 *pt = __va(page->page_hpa); | |
1393 | ||
1394 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1395 | continue; | |
1396 | ||
1397 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1398 | u64 ent = pt[i]; | |
1399 | ||
1400 | if (!(ent & PT_PRESENT_MASK)) | |
1401 | continue; | |
1402 | if (!(ent & PT_WRITABLE_MASK)) | |
1403 | continue; | |
1404 | ++nmaps; | |
1405 | } | |
1406 | } | |
1407 | return nmaps; | |
1408 | } | |
1409 | ||
1410 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1411 | { | |
1412 | int n_rmap = count_rmaps(vcpu); | |
1413 | int n_actual = count_writable_mappings(vcpu); | |
1414 | ||
1415 | if (n_rmap != n_actual) | |
1416 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1417 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1418 | } | |
1419 | ||
1420 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1421 | { | |
1422 | struct kvm_mmu_page *page; | |
1423 | ||
1424 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1425 | hfn_t hfn; | |
1426 | struct page *pg; | |
1427 | ||
1428 | if (page->role.metaphysical) | |
1429 | continue; | |
1430 | ||
1431 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1432 | >> PAGE_SHIFT; | |
1433 | pg = pfn_to_page(hfn); | |
1434 | if (pg->private) | |
1435 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1436 | " mappings: gfn %lx role %x\n", | |
1437 | __FUNCTION__, audit_msg, page->gfn, | |
1438 | page->role.word); | |
1439 | } | |
1440 | } | |
1441 | ||
1442 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1443 | { | |
1444 | int olddbg = dbg; | |
1445 | ||
1446 | dbg = 0; | |
1447 | audit_msg = msg; | |
1448 | audit_rmap(vcpu); | |
1449 | audit_write_protection(vcpu); | |
1450 | audit_mappings(vcpu); | |
1451 | dbg = olddbg; | |
1452 | } | |
1453 | ||
1454 | #endif |