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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <asm/page.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/module.h> | |
25 | ||
26 | #include "vmx.h" | |
27 | #include "kvm.h" | |
28 | ||
37a7d8b0 AK |
29 | #undef MMU_DEBUG |
30 | ||
31 | #undef AUDIT | |
32 | ||
33 | #ifdef AUDIT | |
34 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
35 | #else | |
36 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
37 | #endif | |
38 | ||
39 | #ifdef MMU_DEBUG | |
40 | ||
41 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
42 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
43 | ||
44 | #else | |
45 | ||
46 | #define pgprintk(x...) do { } while (0) | |
47 | #define rmap_printk(x...) do { } while (0) | |
48 | ||
49 | #endif | |
50 | ||
51 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
52 | static int dbg = 1; | |
53 | #endif | |
6aa8b732 AK |
54 | |
55 | #define ASSERT(x) \ | |
56 | if (!(x)) { \ | |
57 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
58 | __FILE__, __LINE__, #x); \ | |
59 | } | |
60 | ||
cea0f0e7 AK |
61 | #define PT64_PT_BITS 9 |
62 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
63 | #define PT32_PT_BITS 10 | |
64 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
65 | |
66 | #define PT_WRITABLE_SHIFT 1 | |
67 | ||
68 | #define PT_PRESENT_MASK (1ULL << 0) | |
69 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
70 | #define PT_USER_MASK (1ULL << 2) | |
71 | #define PT_PWT_MASK (1ULL << 3) | |
72 | #define PT_PCD_MASK (1ULL << 4) | |
73 | #define PT_ACCESSED_MASK (1ULL << 5) | |
74 | #define PT_DIRTY_MASK (1ULL << 6) | |
75 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
76 | #define PT_PAT_MASK (1ULL << 7) | |
77 | #define PT_GLOBAL_MASK (1ULL << 8) | |
78 | #define PT64_NX_MASK (1ULL << 63) | |
79 | ||
80 | #define PT_PAT_SHIFT 7 | |
81 | #define PT_DIR_PAT_SHIFT 12 | |
82 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
83 | ||
84 | #define PT32_DIR_PSE36_SIZE 4 | |
85 | #define PT32_DIR_PSE36_SHIFT 13 | |
86 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
87 | ||
88 | ||
89 | #define PT32_PTE_COPY_MASK \ | |
8c7bb723 | 90 | (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK) |
6aa8b732 | 91 | |
8c7bb723 | 92 | #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK) |
6aa8b732 AK |
93 | |
94 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 | |
95 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
96 | ||
97 | #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
98 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
99 | ||
100 | #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1) | |
101 | #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT) | |
102 | ||
103 | #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1) | |
104 | #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT)) | |
105 | ||
106 | #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT) | |
107 | ||
108 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) | |
109 | ||
110 | #define PT64_LEVEL_BITS 9 | |
111 | ||
112 | #define PT64_LEVEL_SHIFT(level) \ | |
113 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
114 | ||
115 | #define PT64_LEVEL_MASK(level) \ | |
116 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
117 | ||
118 | #define PT64_INDEX(address, level)\ | |
119 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
120 | ||
121 | ||
122 | #define PT32_LEVEL_BITS 10 | |
123 | ||
124 | #define PT32_LEVEL_SHIFT(level) \ | |
125 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
126 | ||
127 | #define PT32_LEVEL_MASK(level) \ | |
128 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
129 | ||
130 | #define PT32_INDEX(address, level)\ | |
131 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
132 | ||
133 | ||
27aba766 | 134 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
135 | #define PT64_DIR_BASE_ADDR_MASK \ |
136 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
137 | ||
138 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
139 | #define PT32_DIR_BASE_ADDR_MASK \ | |
140 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
141 | ||
142 | ||
143 | #define PFERR_PRESENT_MASK (1U << 0) | |
144 | #define PFERR_WRITE_MASK (1U << 1) | |
145 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 146 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
147 | |
148 | #define PT64_ROOT_LEVEL 4 | |
149 | #define PT32_ROOT_LEVEL 2 | |
150 | #define PT32E_ROOT_LEVEL 3 | |
151 | ||
152 | #define PT_DIRECTORY_LEVEL 2 | |
153 | #define PT_PAGE_TABLE_LEVEL 1 | |
154 | ||
cd4a4e53 AK |
155 | #define RMAP_EXT 4 |
156 | ||
157 | struct kvm_rmap_desc { | |
158 | u64 *shadow_ptes[RMAP_EXT]; | |
159 | struct kvm_rmap_desc *more; | |
160 | }; | |
161 | ||
6aa8b732 AK |
162 | static int is_write_protection(struct kvm_vcpu *vcpu) |
163 | { | |
164 | return vcpu->cr0 & CR0_WP_MASK; | |
165 | } | |
166 | ||
167 | static int is_cpuid_PSE36(void) | |
168 | { | |
169 | return 1; | |
170 | } | |
171 | ||
73b1087e AK |
172 | static int is_nx(struct kvm_vcpu *vcpu) |
173 | { | |
174 | return vcpu->shadow_efer & EFER_NX; | |
175 | } | |
176 | ||
6aa8b732 AK |
177 | static int is_present_pte(unsigned long pte) |
178 | { | |
179 | return pte & PT_PRESENT_MASK; | |
180 | } | |
181 | ||
182 | static int is_writeble_pte(unsigned long pte) | |
183 | { | |
184 | return pte & PT_WRITABLE_MASK; | |
185 | } | |
186 | ||
187 | static int is_io_pte(unsigned long pte) | |
188 | { | |
189 | return pte & PT_SHADOW_IO_MARK; | |
190 | } | |
191 | ||
cd4a4e53 AK |
192 | static int is_rmap_pte(u64 pte) |
193 | { | |
194 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
195 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
196 | } | |
197 | ||
e2dec939 AK |
198 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
199 | size_t objsize, int min) | |
714b93da AK |
200 | { |
201 | void *obj; | |
202 | ||
203 | if (cache->nobjs >= min) | |
e2dec939 | 204 | return 0; |
714b93da AK |
205 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
206 | obj = kzalloc(objsize, GFP_NOWAIT); | |
207 | if (!obj) | |
e2dec939 | 208 | return -ENOMEM; |
714b93da AK |
209 | cache->objects[cache->nobjs++] = obj; |
210 | } | |
e2dec939 | 211 | return 0; |
714b93da AK |
212 | } |
213 | ||
214 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
215 | { | |
216 | while (mc->nobjs) | |
217 | kfree(mc->objects[--mc->nobjs]); | |
218 | } | |
219 | ||
e2dec939 | 220 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 221 | { |
e2dec939 AK |
222 | int r; |
223 | ||
224 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
225 | sizeof(struct kvm_pte_chain), 4); | |
226 | if (r) | |
227 | goto out; | |
228 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
229 | sizeof(struct kvm_rmap_desc), 1); | |
230 | out: | |
231 | return r; | |
714b93da AK |
232 | } |
233 | ||
234 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
235 | { | |
236 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
237 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
238 | } | |
239 | ||
240 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
241 | size_t size) | |
242 | { | |
243 | void *p; | |
244 | ||
245 | BUG_ON(!mc->nobjs); | |
246 | p = mc->objects[--mc->nobjs]; | |
247 | memset(p, 0, size); | |
248 | return p; | |
249 | } | |
250 | ||
251 | static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj) | |
252 | { | |
253 | if (mc->nobjs < KVM_NR_MEM_OBJS) | |
254 | mc->objects[mc->nobjs++] = obj; | |
255 | else | |
256 | kfree(obj); | |
257 | } | |
258 | ||
259 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) | |
260 | { | |
261 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
262 | sizeof(struct kvm_pte_chain)); | |
263 | } | |
264 | ||
265 | static void mmu_free_pte_chain(struct kvm_vcpu *vcpu, | |
266 | struct kvm_pte_chain *pc) | |
267 | { | |
268 | mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc); | |
269 | } | |
270 | ||
271 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
272 | { | |
273 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
274 | sizeof(struct kvm_rmap_desc)); | |
275 | } | |
276 | ||
277 | static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu, | |
278 | struct kvm_rmap_desc *rd) | |
279 | { | |
280 | mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd); | |
281 | } | |
282 | ||
cd4a4e53 AK |
283 | /* |
284 | * Reverse mapping data structures: | |
285 | * | |
286 | * If page->private bit zero is zero, then page->private points to the | |
287 | * shadow page table entry that points to page_address(page). | |
288 | * | |
289 | * If page->private bit zero is one, (then page->private & ~1) points | |
290 | * to a struct kvm_rmap_desc containing more mappings. | |
291 | */ | |
714b93da | 292 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
293 | { |
294 | struct page *page; | |
295 | struct kvm_rmap_desc *desc; | |
296 | int i; | |
297 | ||
298 | if (!is_rmap_pte(*spte)) | |
299 | return; | |
300 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 301 | if (!page_private(page)) { |
cd4a4e53 | 302 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
303 | set_page_private(page,(unsigned long)spte); |
304 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 305 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 306 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 307 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 308 | desc->shadow_ptes[1] = spte; |
5972e953 | 309 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
310 | } else { |
311 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 312 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
313 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
314 | desc = desc->more; | |
315 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 316 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
317 | desc = desc->more; |
318 | } | |
319 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
320 | ; | |
321 | desc->shadow_ptes[i] = spte; | |
322 | } | |
323 | } | |
324 | ||
714b93da AK |
325 | static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu, |
326 | struct page *page, | |
cd4a4e53 AK |
327 | struct kvm_rmap_desc *desc, |
328 | int i, | |
329 | struct kvm_rmap_desc *prev_desc) | |
330 | { | |
331 | int j; | |
332 | ||
333 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
334 | ; | |
335 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 336 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
337 | if (j != 0) |
338 | return; | |
339 | if (!prev_desc && !desc->more) | |
5972e953 | 340 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
341 | else |
342 | if (prev_desc) | |
343 | prev_desc->more = desc->more; | |
344 | else | |
5972e953 | 345 | set_page_private(page,(unsigned long)desc->more | 1); |
714b93da | 346 | mmu_free_rmap_desc(vcpu, desc); |
cd4a4e53 AK |
347 | } |
348 | ||
714b93da | 349 | static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
350 | { |
351 | struct page *page; | |
352 | struct kvm_rmap_desc *desc; | |
353 | struct kvm_rmap_desc *prev_desc; | |
354 | int i; | |
355 | ||
356 | if (!is_rmap_pte(*spte)) | |
357 | return; | |
358 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 359 | if (!page_private(page)) { |
cd4a4e53 AK |
360 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
361 | BUG(); | |
5972e953 | 362 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 363 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 364 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
365 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
366 | spte, *spte); | |
367 | BUG(); | |
368 | } | |
5972e953 | 369 | set_page_private(page,0); |
cd4a4e53 AK |
370 | } else { |
371 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 372 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
373 | prev_desc = NULL; |
374 | while (desc) { | |
375 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
376 | if (desc->shadow_ptes[i] == spte) { | |
714b93da AK |
377 | rmap_desc_remove_entry(vcpu, page, |
378 | desc, i, | |
cd4a4e53 AK |
379 | prev_desc); |
380 | return; | |
381 | } | |
382 | prev_desc = desc; | |
383 | desc = desc->more; | |
384 | } | |
385 | BUG(); | |
386 | } | |
387 | } | |
388 | ||
714b93da | 389 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 390 | { |
714b93da | 391 | struct kvm *kvm = vcpu->kvm; |
374cbac0 AK |
392 | struct page *page; |
393 | struct kvm_memory_slot *slot; | |
394 | struct kvm_rmap_desc *desc; | |
395 | u64 *spte; | |
396 | ||
397 | slot = gfn_to_memslot(kvm, gfn); | |
398 | BUG_ON(!slot); | |
399 | page = gfn_to_page(slot, gfn); | |
400 | ||
5972e953 MR |
401 | while (page_private(page)) { |
402 | if (!(page_private(page) & 1)) | |
403 | spte = (u64 *)page_private(page); | |
374cbac0 | 404 | else { |
5972e953 | 405 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
406 | spte = desc->shadow_ptes[0]; |
407 | } | |
408 | BUG_ON(!spte); | |
27aba766 AK |
409 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT |
410 | != page_to_pfn(page)); | |
374cbac0 AK |
411 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
412 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
413 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
714b93da | 414 | rmap_remove(vcpu, spte); |
40907d57 | 415 | kvm_arch_ops->tlb_flush(vcpu); |
374cbac0 AK |
416 | *spte &= ~(u64)PT_WRITABLE_MASK; |
417 | } | |
418 | } | |
419 | ||
6aa8b732 AK |
420 | static int is_empty_shadow_page(hpa_t page_hpa) |
421 | { | |
139bdb2d AK |
422 | u64 *pos; |
423 | u64 *end; | |
424 | ||
425 | for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64); | |
6aa8b732 | 426 | pos != end; pos++) |
139bdb2d AK |
427 | if (*pos != 0) { |
428 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
429 | pos, *pos); | |
6aa8b732 | 430 | return 0; |
139bdb2d | 431 | } |
6aa8b732 AK |
432 | return 1; |
433 | } | |
434 | ||
260746c0 AK |
435 | static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa) |
436 | { | |
437 | struct kvm_mmu_page *page_head = page_header(page_hpa); | |
438 | ||
5f1e0b6a | 439 | ASSERT(is_empty_shadow_page(page_hpa)); |
260746c0 AK |
440 | list_del(&page_head->link); |
441 | page_head->page_hpa = page_hpa; | |
442 | list_add(&page_head->link, &vcpu->free_pages); | |
443 | ++vcpu->kvm->n_free_mmu_pages; | |
444 | } | |
445 | ||
cea0f0e7 AK |
446 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
447 | { | |
448 | return gfn; | |
449 | } | |
450 | ||
25c0de2c AK |
451 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
452 | u64 *parent_pte) | |
6aa8b732 AK |
453 | { |
454 | struct kvm_mmu_page *page; | |
455 | ||
456 | if (list_empty(&vcpu->free_pages)) | |
25c0de2c | 457 | return NULL; |
6aa8b732 AK |
458 | |
459 | page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link); | |
460 | list_del(&page->link); | |
461 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
462 | ASSERT(is_empty_shadow_page(page->page_hpa)); | |
463 | page->slot_bitmap = 0; | |
cea0f0e7 | 464 | page->multimapped = 0; |
6aa8b732 | 465 | page->parent_pte = parent_pte; |
ebeace86 | 466 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 467 | return page; |
6aa8b732 AK |
468 | } |
469 | ||
714b93da AK |
470 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
471 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
472 | { |
473 | struct kvm_pte_chain *pte_chain; | |
474 | struct hlist_node *node; | |
475 | int i; | |
476 | ||
477 | if (!parent_pte) | |
478 | return; | |
479 | if (!page->multimapped) { | |
480 | u64 *old = page->parent_pte; | |
481 | ||
482 | if (!old) { | |
483 | page->parent_pte = parent_pte; | |
484 | return; | |
485 | } | |
486 | page->multimapped = 1; | |
714b93da | 487 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
488 | INIT_HLIST_HEAD(&page->parent_ptes); |
489 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
490 | pte_chain->parent_ptes[0] = old; | |
491 | } | |
492 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
493 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
494 | continue; | |
495 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
496 | if (!pte_chain->parent_ptes[i]) { | |
497 | pte_chain->parent_ptes[i] = parent_pte; | |
498 | return; | |
499 | } | |
500 | } | |
714b93da | 501 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
502 | BUG_ON(!pte_chain); |
503 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
504 | pte_chain->parent_ptes[0] = parent_pte; | |
505 | } | |
506 | ||
714b93da AK |
507 | static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu, |
508 | struct kvm_mmu_page *page, | |
cea0f0e7 AK |
509 | u64 *parent_pte) |
510 | { | |
511 | struct kvm_pte_chain *pte_chain; | |
512 | struct hlist_node *node; | |
513 | int i; | |
514 | ||
515 | if (!page->multimapped) { | |
516 | BUG_ON(page->parent_pte != parent_pte); | |
517 | page->parent_pte = NULL; | |
518 | return; | |
519 | } | |
520 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
521 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
522 | if (!pte_chain->parent_ptes[i]) | |
523 | break; | |
524 | if (pte_chain->parent_ptes[i] != parent_pte) | |
525 | continue; | |
697fe2e2 AK |
526 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
527 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
528 | pte_chain->parent_ptes[i] |
529 | = pte_chain->parent_ptes[i + 1]; | |
530 | ++i; | |
531 | } | |
532 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
533 | if (i == 0) { |
534 | hlist_del(&pte_chain->link); | |
714b93da | 535 | mmu_free_pte_chain(vcpu, pte_chain); |
697fe2e2 AK |
536 | if (hlist_empty(&page->parent_ptes)) { |
537 | page->multimapped = 0; | |
538 | page->parent_pte = NULL; | |
539 | } | |
540 | } | |
cea0f0e7 AK |
541 | return; |
542 | } | |
543 | BUG(); | |
544 | } | |
545 | ||
546 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
547 | gfn_t gfn) | |
548 | { | |
549 | unsigned index; | |
550 | struct hlist_head *bucket; | |
551 | struct kvm_mmu_page *page; | |
552 | struct hlist_node *node; | |
553 | ||
554 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
555 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
556 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
557 | hlist_for_each_entry(page, node, bucket, hash_link) | |
558 | if (page->gfn == gfn && !page->role.metaphysical) { | |
559 | pgprintk("%s: found role %x\n", | |
560 | __FUNCTION__, page->role.word); | |
561 | return page; | |
562 | } | |
563 | return NULL; | |
564 | } | |
565 | ||
566 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
567 | gfn_t gfn, | |
568 | gva_t gaddr, | |
569 | unsigned level, | |
570 | int metaphysical, | |
571 | u64 *parent_pte) | |
572 | { | |
573 | union kvm_mmu_page_role role; | |
574 | unsigned index; | |
575 | unsigned quadrant; | |
576 | struct hlist_head *bucket; | |
577 | struct kvm_mmu_page *page; | |
578 | struct hlist_node *node; | |
579 | ||
580 | role.word = 0; | |
581 | role.glevels = vcpu->mmu.root_level; | |
582 | role.level = level; | |
583 | role.metaphysical = metaphysical; | |
584 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { | |
585 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
586 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
587 | role.quadrant = quadrant; | |
588 | } | |
589 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
590 | gfn, role.word); | |
591 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
592 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
593 | hlist_for_each_entry(page, node, bucket, hash_link) | |
594 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 595 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
596 | pgprintk("%s: found\n", __FUNCTION__); |
597 | return page; | |
598 | } | |
599 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
600 | if (!page) | |
601 | return page; | |
602 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
603 | page->gfn = gfn; | |
604 | page->role = role; | |
605 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 606 | if (!metaphysical) |
714b93da | 607 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
608 | return page; |
609 | } | |
610 | ||
a436036b AK |
611 | static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu, |
612 | struct kvm_mmu_page *page) | |
613 | { | |
697fe2e2 AK |
614 | unsigned i; |
615 | u64 *pt; | |
616 | u64 ent; | |
617 | ||
618 | pt = __va(page->page_hpa); | |
619 | ||
620 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
621 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
622 | if (pt[i] & PT_PRESENT_MASK) | |
714b93da | 623 | rmap_remove(vcpu, &pt[i]); |
697fe2e2 AK |
624 | pt[i] = 0; |
625 | } | |
40907d57 | 626 | kvm_arch_ops->tlb_flush(vcpu); |
697fe2e2 AK |
627 | return; |
628 | } | |
629 | ||
630 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
631 | ent = pt[i]; | |
632 | ||
633 | pt[i] = 0; | |
634 | if (!(ent & PT_PRESENT_MASK)) | |
635 | continue; | |
636 | ent &= PT64_BASE_ADDR_MASK; | |
714b93da | 637 | mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]); |
697fe2e2 | 638 | } |
a436036b AK |
639 | } |
640 | ||
cea0f0e7 AK |
641 | static void kvm_mmu_put_page(struct kvm_vcpu *vcpu, |
642 | struct kvm_mmu_page *page, | |
643 | u64 *parent_pte) | |
644 | { | |
714b93da | 645 | mmu_page_remove_parent_pte(vcpu, page, parent_pte); |
a436036b AK |
646 | } |
647 | ||
648 | static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu, | |
649 | struct kvm_mmu_page *page) | |
650 | { | |
651 | u64 *parent_pte; | |
652 | ||
653 | while (page->multimapped || page->parent_pte) { | |
654 | if (!page->multimapped) | |
655 | parent_pte = page->parent_pte; | |
656 | else { | |
657 | struct kvm_pte_chain *chain; | |
658 | ||
659 | chain = container_of(page->parent_ptes.first, | |
660 | struct kvm_pte_chain, link); | |
661 | parent_pte = chain->parent_ptes[0]; | |
662 | } | |
697fe2e2 | 663 | BUG_ON(!parent_pte); |
a436036b AK |
664 | kvm_mmu_put_page(vcpu, page, parent_pte); |
665 | *parent_pte = 0; | |
666 | } | |
cc4529ef | 667 | kvm_mmu_page_unlink_children(vcpu, page); |
3bb65a22 AK |
668 | if (!page->root_count) { |
669 | hlist_del(&page->hash_link); | |
670 | kvm_mmu_free_page(vcpu, page->page_hpa); | |
671 | } else { | |
672 | list_del(&page->link); | |
673 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
674 | } | |
a436036b AK |
675 | } |
676 | ||
677 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
678 | { | |
679 | unsigned index; | |
680 | struct hlist_head *bucket; | |
681 | struct kvm_mmu_page *page; | |
682 | struct hlist_node *node, *n; | |
683 | int r; | |
684 | ||
685 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
686 | r = 0; | |
687 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
688 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
689 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
690 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
691 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
692 | page->role.word); | |
a436036b AK |
693 | kvm_mmu_zap_page(vcpu, page); |
694 | r = 1; | |
695 | } | |
696 | return r; | |
cea0f0e7 AK |
697 | } |
698 | ||
6aa8b732 AK |
699 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
700 | { | |
701 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
702 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
703 | ||
704 | __set_bit(slot, &page_head->slot_bitmap); | |
705 | } | |
706 | ||
707 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
708 | { | |
709 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
710 | ||
711 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
712 | } | |
713 | ||
714 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
715 | { | |
716 | struct kvm_memory_slot *slot; | |
717 | struct page *page; | |
718 | ||
719 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
720 | slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT); | |
721 | if (!slot) | |
722 | return gpa | HPA_ERR_MASK; | |
723 | page = gfn_to_page(slot, gpa >> PAGE_SHIFT); | |
724 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | |
725 | | (gpa & (PAGE_SIZE-1)); | |
726 | } | |
727 | ||
728 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
729 | { | |
730 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
731 | ||
732 | if (gpa == UNMAPPED_GVA) | |
733 | return UNMAPPED_GVA; | |
734 | return gpa_to_hpa(vcpu, gpa); | |
735 | } | |
736 | ||
039576c0 AK |
737 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
738 | { | |
739 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
740 | ||
741 | if (gpa == UNMAPPED_GVA) | |
742 | return NULL; | |
743 | return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT); | |
744 | } | |
745 | ||
6aa8b732 AK |
746 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
747 | { | |
748 | } | |
749 | ||
750 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
751 | { | |
752 | int level = PT32E_ROOT_LEVEL; | |
753 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
754 | ||
755 | for (; ; level--) { | |
756 | u32 index = PT64_INDEX(v, level); | |
757 | u64 *table; | |
cea0f0e7 | 758 | u64 pte; |
6aa8b732 AK |
759 | |
760 | ASSERT(VALID_PAGE(table_addr)); | |
761 | table = __va(table_addr); | |
762 | ||
763 | if (level == 1) { | |
cea0f0e7 AK |
764 | pte = table[index]; |
765 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
766 | return 0; | |
6aa8b732 AK |
767 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
768 | page_header_update_slot(vcpu->kvm, table, v); | |
769 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
770 | PT_USER_MASK; | |
714b93da | 771 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
772 | return 0; |
773 | } | |
774 | ||
775 | if (table[index] == 0) { | |
25c0de2c | 776 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 777 | gfn_t pseudo_gfn; |
6aa8b732 | 778 | |
cea0f0e7 AK |
779 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
780 | >> PAGE_SHIFT; | |
781 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
782 | v, level - 1, | |
783 | 1, &table[index]); | |
25c0de2c | 784 | if (!new_table) { |
6aa8b732 AK |
785 | pgprintk("nonpaging_map: ENOMEM\n"); |
786 | return -ENOMEM; | |
787 | } | |
788 | ||
25c0de2c AK |
789 | table[index] = new_table->page_hpa | PT_PRESENT_MASK |
790 | | PT_WRITABLE_MASK | PT_USER_MASK; | |
6aa8b732 AK |
791 | } |
792 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
793 | } | |
794 | } | |
795 | ||
17ac10ad AK |
796 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
797 | { | |
798 | int i; | |
3bb65a22 | 799 | struct kvm_mmu_page *page; |
17ac10ad AK |
800 | |
801 | #ifdef CONFIG_X86_64 | |
802 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
803 | hpa_t root = vcpu->mmu.root_hpa; | |
804 | ||
805 | ASSERT(VALID_PAGE(root)); | |
3bb65a22 AK |
806 | page = page_header(root); |
807 | --page->root_count; | |
17ac10ad AK |
808 | vcpu->mmu.root_hpa = INVALID_PAGE; |
809 | return; | |
810 | } | |
811 | #endif | |
812 | for (i = 0; i < 4; ++i) { | |
813 | hpa_t root = vcpu->mmu.pae_root[i]; | |
814 | ||
815 | ASSERT(VALID_PAGE(root)); | |
816 | root &= PT64_BASE_ADDR_MASK; | |
3bb65a22 AK |
817 | page = page_header(root); |
818 | --page->root_count; | |
17ac10ad AK |
819 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
820 | } | |
821 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
822 | } | |
823 | ||
824 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
825 | { | |
826 | int i; | |
cea0f0e7 | 827 | gfn_t root_gfn; |
3bb65a22 AK |
828 | struct kvm_mmu_page *page; |
829 | ||
cea0f0e7 | 830 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
831 | |
832 | #ifdef CONFIG_X86_64 | |
833 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
834 | hpa_t root = vcpu->mmu.root_hpa; | |
835 | ||
836 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d IM |
837 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
838 | PT64_ROOT_LEVEL, 0, NULL); | |
839 | root = page->page_hpa; | |
3bb65a22 | 840 | ++page->root_count; |
17ac10ad AK |
841 | vcpu->mmu.root_hpa = root; |
842 | return; | |
843 | } | |
844 | #endif | |
845 | for (i = 0; i < 4; ++i) { | |
846 | hpa_t root = vcpu->mmu.pae_root[i]; | |
847 | ||
848 | ASSERT(!VALID_PAGE(root)); | |
cea0f0e7 AK |
849 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) |
850 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; | |
851 | else if (vcpu->mmu.root_level == 0) | |
852 | root_gfn = 0; | |
68a99f6d | 853 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 854 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
68a99f6d IM |
855 | NULL); |
856 | root = page->page_hpa; | |
3bb65a22 | 857 | ++page->root_count; |
17ac10ad AK |
858 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
859 | } | |
860 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
861 | } | |
862 | ||
6aa8b732 AK |
863 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
864 | { | |
865 | return vaddr; | |
866 | } | |
867 | ||
868 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
869 | u32 error_code) | |
870 | { | |
6aa8b732 | 871 | gpa_t addr = gva; |
ebeace86 | 872 | hpa_t paddr; |
e2dec939 | 873 | int r; |
6aa8b732 | 874 | |
e2dec939 AK |
875 | r = mmu_topup_memory_caches(vcpu); |
876 | if (r) | |
877 | return r; | |
714b93da | 878 | |
6aa8b732 AK |
879 | ASSERT(vcpu); |
880 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
881 | ||
6aa8b732 | 882 | |
ebeace86 | 883 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 884 | |
ebeace86 AK |
885 | if (is_error_hpa(paddr)) |
886 | return 1; | |
6aa8b732 | 887 | |
ebeace86 | 888 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
889 | } |
890 | ||
6aa8b732 AK |
891 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
892 | { | |
17ac10ad | 893 | mmu_free_roots(vcpu); |
6aa8b732 AK |
894 | } |
895 | ||
896 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
897 | { | |
898 | struct kvm_mmu *context = &vcpu->mmu; | |
899 | ||
900 | context->new_cr3 = nonpaging_new_cr3; | |
901 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
902 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
903 | context->free = nonpaging_free; | |
cea0f0e7 | 904 | context->root_level = 0; |
6aa8b732 | 905 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17ac10ad | 906 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
907 | ASSERT(VALID_PAGE(context->root_hpa)); |
908 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa); | |
909 | return 0; | |
910 | } | |
911 | ||
6aa8b732 AK |
912 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
913 | { | |
6aa8b732 AK |
914 | ++kvm_stat.tlb_flush; |
915 | kvm_arch_ops->tlb_flush(vcpu); | |
916 | } | |
917 | ||
918 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
919 | { | |
374cbac0 | 920 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 921 | mmu_free_roots(vcpu); |
7f7417d6 IM |
922 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) |
923 | kvm_mmu_free_some_pages(vcpu); | |
cea0f0e7 | 924 | mmu_alloc_roots(vcpu); |
6aa8b732 | 925 | kvm_mmu_flush_tlb(vcpu); |
cea0f0e7 | 926 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
6aa8b732 AK |
927 | } |
928 | ||
6aa8b732 AK |
929 | static inline void set_pte_common(struct kvm_vcpu *vcpu, |
930 | u64 *shadow_pte, | |
931 | gpa_t gaddr, | |
932 | int dirty, | |
815af8d4 AK |
933 | u64 access_bits, |
934 | gfn_t gfn) | |
6aa8b732 AK |
935 | { |
936 | hpa_t paddr; | |
937 | ||
938 | *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET; | |
939 | if (!dirty) | |
940 | access_bits &= ~PT_WRITABLE_MASK; | |
cea0f0e7 | 941 | |
374cbac0 | 942 | paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK); |
6aa8b732 AK |
943 | |
944 | *shadow_pte |= access_bits; | |
945 | ||
6aa8b732 AK |
946 | if (is_error_hpa(paddr)) { |
947 | *shadow_pte |= gaddr; | |
948 | *shadow_pte |= PT_SHADOW_IO_MARK; | |
949 | *shadow_pte &= ~PT_PRESENT_MASK; | |
374cbac0 | 950 | return; |
6aa8b732 | 951 | } |
374cbac0 AK |
952 | |
953 | *shadow_pte |= paddr; | |
954 | ||
955 | if (access_bits & PT_WRITABLE_MASK) { | |
956 | struct kvm_mmu_page *shadow; | |
957 | ||
815af8d4 | 958 | shadow = kvm_mmu_lookup_page(vcpu, gfn); |
374cbac0 AK |
959 | if (shadow) { |
960 | pgprintk("%s: found shadow page for %lx, marking ro\n", | |
815af8d4 | 961 | __FUNCTION__, gfn); |
374cbac0 | 962 | access_bits &= ~PT_WRITABLE_MASK; |
40907d57 AK |
963 | if (is_writeble_pte(*shadow_pte)) { |
964 | *shadow_pte &= ~PT_WRITABLE_MASK; | |
965 | kvm_arch_ops->tlb_flush(vcpu); | |
966 | } | |
374cbac0 AK |
967 | } |
968 | } | |
969 | ||
970 | if (access_bits & PT_WRITABLE_MASK) | |
971 | mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT); | |
972 | ||
973 | page_header_update_slot(vcpu->kvm, shadow_pte, gaddr); | |
714b93da | 974 | rmap_add(vcpu, shadow_pte); |
6aa8b732 AK |
975 | } |
976 | ||
977 | static void inject_page_fault(struct kvm_vcpu *vcpu, | |
978 | u64 addr, | |
979 | u32 err_code) | |
980 | { | |
981 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
982 | } | |
983 | ||
984 | static inline int fix_read_pf(u64 *shadow_ent) | |
985 | { | |
986 | if ((*shadow_ent & PT_SHADOW_USER_MASK) && | |
987 | !(*shadow_ent & PT_USER_MASK)) { | |
988 | /* | |
989 | * If supervisor write protect is disabled, we shadow kernel | |
990 | * pages as user pages so we can trap the write access. | |
991 | */ | |
992 | *shadow_ent |= PT_USER_MASK; | |
993 | *shadow_ent &= ~PT_WRITABLE_MASK; | |
994 | ||
995 | return 1; | |
996 | ||
997 | } | |
998 | return 0; | |
999 | } | |
1000 | ||
6aa8b732 AK |
1001 | static void paging_free(struct kvm_vcpu *vcpu) |
1002 | { | |
1003 | nonpaging_free(vcpu); | |
1004 | } | |
1005 | ||
1006 | #define PTTYPE 64 | |
1007 | #include "paging_tmpl.h" | |
1008 | #undef PTTYPE | |
1009 | ||
1010 | #define PTTYPE 32 | |
1011 | #include "paging_tmpl.h" | |
1012 | #undef PTTYPE | |
1013 | ||
17ac10ad | 1014 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1015 | { |
1016 | struct kvm_mmu *context = &vcpu->mmu; | |
1017 | ||
1018 | ASSERT(is_pae(vcpu)); | |
1019 | context->new_cr3 = paging_new_cr3; | |
1020 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
1021 | context->gva_to_gpa = paging64_gva_to_gpa; |
1022 | context->free = paging_free; | |
17ac10ad AK |
1023 | context->root_level = level; |
1024 | context->shadow_root_level = level; | |
1025 | mmu_alloc_roots(vcpu); | |
6aa8b732 AK |
1026 | ASSERT(VALID_PAGE(context->root_hpa)); |
1027 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1028 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1029 | return 0; | |
1030 | } | |
1031 | ||
17ac10ad AK |
1032 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1033 | { | |
1034 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1035 | } | |
1036 | ||
6aa8b732 AK |
1037 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1038 | { | |
1039 | struct kvm_mmu *context = &vcpu->mmu; | |
1040 | ||
1041 | context->new_cr3 = paging_new_cr3; | |
1042 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1043 | context->gva_to_gpa = paging32_gva_to_gpa; |
1044 | context->free = paging_free; | |
1045 | context->root_level = PT32_ROOT_LEVEL; | |
1046 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17ac10ad | 1047 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
1048 | ASSERT(VALID_PAGE(context->root_hpa)); |
1049 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1050 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1051 | return 0; | |
1052 | } | |
1053 | ||
1054 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1055 | { | |
17ac10ad | 1056 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1057 | } |
1058 | ||
1059 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1060 | { | |
1061 | ASSERT(vcpu); | |
1062 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1063 | ||
1064 | if (!is_paging(vcpu)) | |
1065 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1066 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1067 | return paging64_init_context(vcpu); |
1068 | else if (is_pae(vcpu)) | |
1069 | return paging32E_init_context(vcpu); | |
1070 | else | |
1071 | return paging32_init_context(vcpu); | |
1072 | } | |
1073 | ||
1074 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1075 | { | |
1076 | ASSERT(vcpu); | |
1077 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1078 | vcpu->mmu.free(vcpu); | |
1079 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1080 | } | |
1081 | } | |
1082 | ||
1083 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
1084 | { | |
714b93da AK |
1085 | int r; |
1086 | ||
6aa8b732 | 1087 | destroy_kvm_mmu(vcpu); |
714b93da AK |
1088 | r = init_kvm_mmu(vcpu); |
1089 | if (r < 0) | |
1090 | goto out; | |
e2dec939 | 1091 | r = mmu_topup_memory_caches(vcpu); |
714b93da AK |
1092 | out: |
1093 | return r; | |
6aa8b732 AK |
1094 | } |
1095 | ||
ac1b714e AK |
1096 | static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu, |
1097 | struct kvm_mmu_page *page, | |
1098 | u64 *spte) | |
1099 | { | |
1100 | u64 pte; | |
1101 | struct kvm_mmu_page *child; | |
1102 | ||
1103 | pte = *spte; | |
1104 | if (is_present_pte(pte)) { | |
1105 | if (page->role.level == PT_PAGE_TABLE_LEVEL) | |
1106 | rmap_remove(vcpu, spte); | |
1107 | else { | |
1108 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1109 | mmu_page_remove_parent_pte(vcpu, child, spte); | |
1110 | } | |
1111 | } | |
1112 | *spte = 0; | |
1113 | } | |
1114 | ||
da4a00f0 AK |
1115 | void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) |
1116 | { | |
9b7a0325 AK |
1117 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1118 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1119 | struct hlist_node *node, *n; |
9b7a0325 AK |
1120 | struct hlist_head *bucket; |
1121 | unsigned index; | |
1122 | u64 *spte; | |
9b7a0325 | 1123 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1124 | unsigned pte_size; |
9b7a0325 | 1125 | unsigned page_offset; |
0e7bc4b9 | 1126 | unsigned misaligned; |
9b7a0325 | 1127 | int level; |
86a5ba02 | 1128 | int flooded = 0; |
ac1b714e | 1129 | int npte; |
9b7a0325 | 1130 | |
da4a00f0 | 1131 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1132 | if (gfn == vcpu->last_pt_write_gfn) { |
1133 | ++vcpu->last_pt_write_count; | |
1134 | if (vcpu->last_pt_write_count >= 3) | |
1135 | flooded = 1; | |
1136 | } else { | |
1137 | vcpu->last_pt_write_gfn = gfn; | |
1138 | vcpu->last_pt_write_count = 1; | |
1139 | } | |
9b7a0325 AK |
1140 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1141 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1142 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1143 | if (page->gfn != gfn || page->role.metaphysical) |
1144 | continue; | |
0e7bc4b9 AK |
1145 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1146 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
86a5ba02 | 1147 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1148 | /* |
1149 | * Misaligned accesses are too much trouble to fix | |
1150 | * up; also, they usually indicate a page is not used | |
1151 | * as a page table. | |
86a5ba02 AK |
1152 | * |
1153 | * If we're seeing too many writes to a page, | |
1154 | * it may no longer be a page table, or we may be | |
1155 | * forking, in which case it is better to unmap the | |
1156 | * page. | |
0e7bc4b9 AK |
1157 | */ |
1158 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1159 | gpa, bytes, page->role.word); | |
1160 | kvm_mmu_zap_page(vcpu, page); | |
1161 | continue; | |
1162 | } | |
9b7a0325 AK |
1163 | page_offset = offset; |
1164 | level = page->role.level; | |
ac1b714e | 1165 | npte = 1; |
9b7a0325 | 1166 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1167 | page_offset <<= 1; /* 32->64 */ |
1168 | /* | |
1169 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1170 | * only 2MB. So we need to double the offset again | |
1171 | * and zap two pdes instead of one. | |
1172 | */ | |
1173 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1174 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1175 | page_offset <<= 1; |
1176 | npte = 2; | |
1177 | } | |
9b7a0325 AK |
1178 | page_offset &= ~PAGE_MASK; |
1179 | } | |
1180 | spte = __va(page->page_hpa); | |
1181 | spte += page_offset / sizeof(*spte); | |
ac1b714e AK |
1182 | while (npte--) { |
1183 | mmu_pre_write_zap_pte(vcpu, page, spte); | |
1184 | ++spte; | |
9b7a0325 | 1185 | } |
9b7a0325 | 1186 | } |
da4a00f0 AK |
1187 | } |
1188 | ||
1189 | void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) | |
1190 | { | |
1191 | } | |
1192 | ||
a436036b AK |
1193 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1194 | { | |
1195 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1196 | ||
1197 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1198 | } | |
1199 | ||
ebeace86 AK |
1200 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1201 | { | |
1202 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1203 | struct kvm_mmu_page *page; | |
1204 | ||
1205 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1206 | struct kvm_mmu_page, link); | |
1207 | kvm_mmu_zap_page(vcpu, page); | |
1208 | } | |
1209 | } | |
1210 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1211 | ||
6aa8b732 AK |
1212 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1213 | { | |
f51234c2 | 1214 | struct kvm_mmu_page *page; |
6aa8b732 | 1215 | |
f51234c2 AK |
1216 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1217 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1218 | struct kvm_mmu_page, link); | |
1219 | kvm_mmu_zap_page(vcpu, page); | |
1220 | } | |
1221 | while (!list_empty(&vcpu->free_pages)) { | |
6aa8b732 AK |
1222 | page = list_entry(vcpu->free_pages.next, |
1223 | struct kvm_mmu_page, link); | |
1224 | list_del(&page->link); | |
1225 | __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT)); | |
1226 | page->page_hpa = INVALID_PAGE; | |
1227 | } | |
17ac10ad | 1228 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1229 | } |
1230 | ||
1231 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1232 | { | |
17ac10ad | 1233 | struct page *page; |
6aa8b732 AK |
1234 | int i; |
1235 | ||
1236 | ASSERT(vcpu); | |
1237 | ||
1238 | for (i = 0; i < KVM_NUM_MMU_PAGES; i++) { | |
6aa8b732 AK |
1239 | struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i]; |
1240 | ||
1241 | INIT_LIST_HEAD(&page_header->link); | |
17ac10ad | 1242 | if ((page = alloc_page(GFP_KERNEL)) == NULL) |
6aa8b732 | 1243 | goto error_1; |
5972e953 | 1244 | set_page_private(page, (unsigned long)page_header); |
6aa8b732 AK |
1245 | page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT; |
1246 | memset(__va(page_header->page_hpa), 0, PAGE_SIZE); | |
1247 | list_add(&page_header->link, &vcpu->free_pages); | |
ebeace86 | 1248 | ++vcpu->kvm->n_free_mmu_pages; |
6aa8b732 | 1249 | } |
17ac10ad AK |
1250 | |
1251 | /* | |
1252 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1253 | * Therefore we need to allocate shadow page tables in the first | |
1254 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1255 | */ | |
1256 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1257 | if (!page) | |
1258 | goto error_1; | |
1259 | vcpu->mmu.pae_root = page_address(page); | |
1260 | for (i = 0; i < 4; ++i) | |
1261 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1262 | ||
6aa8b732 AK |
1263 | return 0; |
1264 | ||
1265 | error_1: | |
1266 | free_mmu_pages(vcpu); | |
1267 | return -ENOMEM; | |
1268 | } | |
1269 | ||
8018c27b | 1270 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1271 | { |
6aa8b732 AK |
1272 | ASSERT(vcpu); |
1273 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1274 | ASSERT(list_empty(&vcpu->free_pages)); | |
1275 | ||
8018c27b IM |
1276 | return alloc_mmu_pages(vcpu); |
1277 | } | |
6aa8b732 | 1278 | |
8018c27b IM |
1279 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1280 | { | |
1281 | ASSERT(vcpu); | |
1282 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1283 | ASSERT(!list_empty(&vcpu->free_pages)); | |
2c264957 | 1284 | |
8018c27b | 1285 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1286 | } |
1287 | ||
1288 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1289 | { | |
1290 | ASSERT(vcpu); | |
1291 | ||
1292 | destroy_kvm_mmu(vcpu); | |
1293 | free_mmu_pages(vcpu); | |
714b93da | 1294 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1295 | } |
1296 | ||
714b93da | 1297 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot) |
6aa8b732 | 1298 | { |
714b93da | 1299 | struct kvm *kvm = vcpu->kvm; |
6aa8b732 AK |
1300 | struct kvm_mmu_page *page; |
1301 | ||
1302 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1303 | int i; | |
1304 | u64 *pt; | |
1305 | ||
1306 | if (!test_bit(slot, &page->slot_bitmap)) | |
1307 | continue; | |
1308 | ||
1309 | pt = __va(page->page_hpa); | |
1310 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1311 | /* avoid RMW */ | |
cd4a4e53 | 1312 | if (pt[i] & PT_WRITABLE_MASK) { |
714b93da | 1313 | rmap_remove(vcpu, &pt[i]); |
6aa8b732 | 1314 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1315 | } |
6aa8b732 AK |
1316 | } |
1317 | } | |
37a7d8b0 AK |
1318 | |
1319 | #ifdef AUDIT | |
1320 | ||
1321 | static const char *audit_msg; | |
1322 | ||
1323 | static gva_t canonicalize(gva_t gva) | |
1324 | { | |
1325 | #ifdef CONFIG_X86_64 | |
1326 | gva = (long long)(gva << 16) >> 16; | |
1327 | #endif | |
1328 | return gva; | |
1329 | } | |
1330 | ||
1331 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1332 | gva_t va, int level) | |
1333 | { | |
1334 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1335 | int i; | |
1336 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1337 | ||
1338 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1339 | u64 ent = pt[i]; | |
1340 | ||
1341 | if (!ent & PT_PRESENT_MASK) | |
1342 | continue; | |
1343 | ||
1344 | va = canonicalize(va); | |
1345 | if (level > 1) | |
1346 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1347 | else { | |
1348 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1349 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1350 | ||
1351 | if ((ent & PT_PRESENT_MASK) | |
1352 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1353 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1354 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1355 | audit_msg, vcpu->mmu.root_level, | |
1356 | va, gpa, hpa, ent); | |
1357 | } | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1362 | { | |
1ea252af | 1363 | unsigned i; |
37a7d8b0 AK |
1364 | |
1365 | if (vcpu->mmu.root_level == 4) | |
1366 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1367 | else | |
1368 | for (i = 0; i < 4; ++i) | |
1369 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1370 | audit_mappings_page(vcpu, | |
1371 | vcpu->mmu.pae_root[i], | |
1372 | i << 30, | |
1373 | 2); | |
1374 | } | |
1375 | ||
1376 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1377 | { | |
1378 | int nmaps = 0; | |
1379 | int i, j, k; | |
1380 | ||
1381 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1382 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1383 | struct kvm_rmap_desc *d; | |
1384 | ||
1385 | for (j = 0; j < m->npages; ++j) { | |
1386 | struct page *page = m->phys_mem[j]; | |
1387 | ||
1388 | if (!page->private) | |
1389 | continue; | |
1390 | if (!(page->private & 1)) { | |
1391 | ++nmaps; | |
1392 | continue; | |
1393 | } | |
1394 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1395 | while (d) { | |
1396 | for (k = 0; k < RMAP_EXT; ++k) | |
1397 | if (d->shadow_ptes[k]) | |
1398 | ++nmaps; | |
1399 | else | |
1400 | break; | |
1401 | d = d->more; | |
1402 | } | |
1403 | } | |
1404 | } | |
1405 | return nmaps; | |
1406 | } | |
1407 | ||
1408 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1409 | { | |
1410 | int nmaps = 0; | |
1411 | struct kvm_mmu_page *page; | |
1412 | int i; | |
1413 | ||
1414 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1415 | u64 *pt = __va(page->page_hpa); | |
1416 | ||
1417 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1418 | continue; | |
1419 | ||
1420 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1421 | u64 ent = pt[i]; | |
1422 | ||
1423 | if (!(ent & PT_PRESENT_MASK)) | |
1424 | continue; | |
1425 | if (!(ent & PT_WRITABLE_MASK)) | |
1426 | continue; | |
1427 | ++nmaps; | |
1428 | } | |
1429 | } | |
1430 | return nmaps; | |
1431 | } | |
1432 | ||
1433 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1434 | { | |
1435 | int n_rmap = count_rmaps(vcpu); | |
1436 | int n_actual = count_writable_mappings(vcpu); | |
1437 | ||
1438 | if (n_rmap != n_actual) | |
1439 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1440 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1441 | } | |
1442 | ||
1443 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1444 | { | |
1445 | struct kvm_mmu_page *page; | |
1446 | ||
1447 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1448 | hfn_t hfn; | |
1449 | struct page *pg; | |
1450 | ||
1451 | if (page->role.metaphysical) | |
1452 | continue; | |
1453 | ||
1454 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1455 | >> PAGE_SHIFT; | |
1456 | pg = pfn_to_page(hfn); | |
1457 | if (pg->private) | |
1458 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1459 | " mappings: gfn %lx role %x\n", | |
1460 | __FUNCTION__, audit_msg, page->gfn, | |
1461 | page->role.word); | |
1462 | } | |
1463 | } | |
1464 | ||
1465 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1466 | { | |
1467 | int olddbg = dbg; | |
1468 | ||
1469 | dbg = 0; | |
1470 | audit_msg = msg; | |
1471 | audit_rmap(vcpu); | |
1472 | audit_write_protection(vcpu); | |
1473 | audit_mappings(vcpu); | |
1474 | dbg = olddbg; | |
1475 | } | |
1476 | ||
1477 | #endif |