Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <asm/page.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/module.h> | |
25 | ||
26 | #include "vmx.h" | |
27 | #include "kvm.h" | |
28 | ||
37a7d8b0 AK |
29 | #undef MMU_DEBUG |
30 | ||
31 | #undef AUDIT | |
32 | ||
33 | #ifdef AUDIT | |
34 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
35 | #else | |
36 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
37 | #endif | |
38 | ||
39 | #ifdef MMU_DEBUG | |
40 | ||
41 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
42 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
43 | ||
44 | #else | |
45 | ||
46 | #define pgprintk(x...) do { } while (0) | |
47 | #define rmap_printk(x...) do { } while (0) | |
48 | ||
49 | #endif | |
50 | ||
51 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
52 | static int dbg = 1; | |
53 | #endif | |
6aa8b732 | 54 | |
d6c69ee9 YD |
55 | #ifndef MMU_DEBUG |
56 | #define ASSERT(x) do { } while (0) | |
57 | #else | |
6aa8b732 AK |
58 | #define ASSERT(x) \ |
59 | if (!(x)) { \ | |
60 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
61 | __FILE__, __LINE__, #x); \ | |
62 | } | |
d6c69ee9 | 63 | #endif |
6aa8b732 | 64 | |
cea0f0e7 AK |
65 | #define PT64_PT_BITS 9 |
66 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
67 | #define PT32_PT_BITS 10 | |
68 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
69 | |
70 | #define PT_WRITABLE_SHIFT 1 | |
71 | ||
72 | #define PT_PRESENT_MASK (1ULL << 0) | |
73 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
74 | #define PT_USER_MASK (1ULL << 2) | |
75 | #define PT_PWT_MASK (1ULL << 3) | |
76 | #define PT_PCD_MASK (1ULL << 4) | |
77 | #define PT_ACCESSED_MASK (1ULL << 5) | |
78 | #define PT_DIRTY_MASK (1ULL << 6) | |
79 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
80 | #define PT_PAT_MASK (1ULL << 7) | |
81 | #define PT_GLOBAL_MASK (1ULL << 8) | |
82 | #define PT64_NX_MASK (1ULL << 63) | |
83 | ||
84 | #define PT_PAT_SHIFT 7 | |
85 | #define PT_DIR_PAT_SHIFT 12 | |
86 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
87 | ||
88 | #define PT32_DIR_PSE36_SIZE 4 | |
89 | #define PT32_DIR_PSE36_SHIFT 13 | |
90 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
91 | ||
92 | ||
93 | #define PT32_PTE_COPY_MASK \ | |
8c7bb723 | 94 | (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK) |
6aa8b732 | 95 | |
8c7bb723 | 96 | #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK) |
6aa8b732 AK |
97 | |
98 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 | |
99 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
100 | ||
101 | #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
102 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
103 | ||
104 | #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1) | |
105 | #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT) | |
106 | ||
107 | #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1) | |
108 | #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT)) | |
109 | ||
110 | #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT) | |
111 | ||
112 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) | |
113 | ||
114 | #define PT64_LEVEL_BITS 9 | |
115 | ||
116 | #define PT64_LEVEL_SHIFT(level) \ | |
117 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
118 | ||
119 | #define PT64_LEVEL_MASK(level) \ | |
120 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
121 | ||
122 | #define PT64_INDEX(address, level)\ | |
123 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
124 | ||
125 | ||
126 | #define PT32_LEVEL_BITS 10 | |
127 | ||
128 | #define PT32_LEVEL_SHIFT(level) \ | |
129 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
130 | ||
131 | #define PT32_LEVEL_MASK(level) \ | |
132 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
133 | ||
134 | #define PT32_INDEX(address, level)\ | |
135 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
136 | ||
137 | ||
27aba766 | 138 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
139 | #define PT64_DIR_BASE_ADDR_MASK \ |
140 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
141 | ||
142 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
143 | #define PT32_DIR_BASE_ADDR_MASK \ | |
144 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
145 | ||
146 | ||
147 | #define PFERR_PRESENT_MASK (1U << 0) | |
148 | #define PFERR_WRITE_MASK (1U << 1) | |
149 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 150 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
151 | |
152 | #define PT64_ROOT_LEVEL 4 | |
153 | #define PT32_ROOT_LEVEL 2 | |
154 | #define PT32E_ROOT_LEVEL 3 | |
155 | ||
156 | #define PT_DIRECTORY_LEVEL 2 | |
157 | #define PT_PAGE_TABLE_LEVEL 1 | |
158 | ||
cd4a4e53 AK |
159 | #define RMAP_EXT 4 |
160 | ||
161 | struct kvm_rmap_desc { | |
162 | u64 *shadow_ptes[RMAP_EXT]; | |
163 | struct kvm_rmap_desc *more; | |
164 | }; | |
165 | ||
b5a33a75 AK |
166 | static struct kmem_cache *pte_chain_cache; |
167 | static struct kmem_cache *rmap_desc_cache; | |
168 | ||
6aa8b732 AK |
169 | static int is_write_protection(struct kvm_vcpu *vcpu) |
170 | { | |
171 | return vcpu->cr0 & CR0_WP_MASK; | |
172 | } | |
173 | ||
174 | static int is_cpuid_PSE36(void) | |
175 | { | |
176 | return 1; | |
177 | } | |
178 | ||
73b1087e AK |
179 | static int is_nx(struct kvm_vcpu *vcpu) |
180 | { | |
181 | return vcpu->shadow_efer & EFER_NX; | |
182 | } | |
183 | ||
6aa8b732 AK |
184 | static int is_present_pte(unsigned long pte) |
185 | { | |
186 | return pte & PT_PRESENT_MASK; | |
187 | } | |
188 | ||
189 | static int is_writeble_pte(unsigned long pte) | |
190 | { | |
191 | return pte & PT_WRITABLE_MASK; | |
192 | } | |
193 | ||
194 | static int is_io_pte(unsigned long pte) | |
195 | { | |
196 | return pte & PT_SHADOW_IO_MARK; | |
197 | } | |
198 | ||
cd4a4e53 AK |
199 | static int is_rmap_pte(u64 pte) |
200 | { | |
201 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
202 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
203 | } | |
204 | ||
e2dec939 | 205 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
8c438502 AK |
206 | struct kmem_cache *base_cache, int min, |
207 | gfp_t gfp_flags) | |
714b93da AK |
208 | { |
209 | void *obj; | |
210 | ||
211 | if (cache->nobjs >= min) | |
e2dec939 | 212 | return 0; |
714b93da | 213 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
8c438502 | 214 | obj = kmem_cache_zalloc(base_cache, gfp_flags); |
714b93da | 215 | if (!obj) |
e2dec939 | 216 | return -ENOMEM; |
714b93da AK |
217 | cache->objects[cache->nobjs++] = obj; |
218 | } | |
e2dec939 | 219 | return 0; |
714b93da AK |
220 | } |
221 | ||
222 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
223 | { | |
224 | while (mc->nobjs) | |
225 | kfree(mc->objects[--mc->nobjs]); | |
226 | } | |
227 | ||
8c438502 | 228 | static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags) |
714b93da | 229 | { |
e2dec939 AK |
230 | int r; |
231 | ||
232 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
8c438502 | 233 | pte_chain_cache, 4, gfp_flags); |
e2dec939 AK |
234 | if (r) |
235 | goto out; | |
236 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
8c438502 | 237 | rmap_desc_cache, 1, gfp_flags); |
e2dec939 AK |
238 | out: |
239 | return r; | |
714b93da AK |
240 | } |
241 | ||
8c438502 AK |
242 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
243 | { | |
244 | int r; | |
245 | ||
246 | r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT); | |
247 | if (r < 0) { | |
248 | spin_unlock(&vcpu->kvm->lock); | |
249 | kvm_arch_ops->vcpu_put(vcpu); | |
250 | r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL); | |
251 | kvm_arch_ops->vcpu_load(vcpu); | |
252 | spin_lock(&vcpu->kvm->lock); | |
253 | } | |
254 | return r; | |
255 | } | |
256 | ||
714b93da AK |
257 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
258 | { | |
259 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
260 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
261 | } | |
262 | ||
263 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
264 | size_t size) | |
265 | { | |
266 | void *p; | |
267 | ||
268 | BUG_ON(!mc->nobjs); | |
269 | p = mc->objects[--mc->nobjs]; | |
270 | memset(p, 0, size); | |
271 | return p; | |
272 | } | |
273 | ||
274 | static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj) | |
275 | { | |
276 | if (mc->nobjs < KVM_NR_MEM_OBJS) | |
277 | mc->objects[mc->nobjs++] = obj; | |
278 | else | |
279 | kfree(obj); | |
280 | } | |
281 | ||
282 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) | |
283 | { | |
284 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
285 | sizeof(struct kvm_pte_chain)); | |
286 | } | |
287 | ||
288 | static void mmu_free_pte_chain(struct kvm_vcpu *vcpu, | |
289 | struct kvm_pte_chain *pc) | |
290 | { | |
291 | mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc); | |
292 | } | |
293 | ||
294 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
295 | { | |
296 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
297 | sizeof(struct kvm_rmap_desc)); | |
298 | } | |
299 | ||
300 | static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu, | |
301 | struct kvm_rmap_desc *rd) | |
302 | { | |
303 | mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd); | |
304 | } | |
305 | ||
cd4a4e53 AK |
306 | /* |
307 | * Reverse mapping data structures: | |
308 | * | |
309 | * If page->private bit zero is zero, then page->private points to the | |
310 | * shadow page table entry that points to page_address(page). | |
311 | * | |
312 | * If page->private bit zero is one, (then page->private & ~1) points | |
313 | * to a struct kvm_rmap_desc containing more mappings. | |
314 | */ | |
714b93da | 315 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
316 | { |
317 | struct page *page; | |
318 | struct kvm_rmap_desc *desc; | |
319 | int i; | |
320 | ||
321 | if (!is_rmap_pte(*spte)) | |
322 | return; | |
323 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 324 | if (!page_private(page)) { |
cd4a4e53 | 325 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
326 | set_page_private(page,(unsigned long)spte); |
327 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 328 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 329 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 330 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 331 | desc->shadow_ptes[1] = spte; |
5972e953 | 332 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
333 | } else { |
334 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 335 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
336 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
337 | desc = desc->more; | |
338 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 339 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
340 | desc = desc->more; |
341 | } | |
342 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
343 | ; | |
344 | desc->shadow_ptes[i] = spte; | |
345 | } | |
346 | } | |
347 | ||
714b93da AK |
348 | static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu, |
349 | struct page *page, | |
cd4a4e53 AK |
350 | struct kvm_rmap_desc *desc, |
351 | int i, | |
352 | struct kvm_rmap_desc *prev_desc) | |
353 | { | |
354 | int j; | |
355 | ||
356 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
357 | ; | |
358 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 359 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
360 | if (j != 0) |
361 | return; | |
362 | if (!prev_desc && !desc->more) | |
5972e953 | 363 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
364 | else |
365 | if (prev_desc) | |
366 | prev_desc->more = desc->more; | |
367 | else | |
5972e953 | 368 | set_page_private(page,(unsigned long)desc->more | 1); |
714b93da | 369 | mmu_free_rmap_desc(vcpu, desc); |
cd4a4e53 AK |
370 | } |
371 | ||
714b93da | 372 | static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
373 | { |
374 | struct page *page; | |
375 | struct kvm_rmap_desc *desc; | |
376 | struct kvm_rmap_desc *prev_desc; | |
377 | int i; | |
378 | ||
379 | if (!is_rmap_pte(*spte)) | |
380 | return; | |
381 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 382 | if (!page_private(page)) { |
cd4a4e53 AK |
383 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
384 | BUG(); | |
5972e953 | 385 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 386 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 387 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
388 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
389 | spte, *spte); | |
390 | BUG(); | |
391 | } | |
5972e953 | 392 | set_page_private(page,0); |
cd4a4e53 AK |
393 | } else { |
394 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 395 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
396 | prev_desc = NULL; |
397 | while (desc) { | |
398 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
399 | if (desc->shadow_ptes[i] == spte) { | |
714b93da AK |
400 | rmap_desc_remove_entry(vcpu, page, |
401 | desc, i, | |
cd4a4e53 AK |
402 | prev_desc); |
403 | return; | |
404 | } | |
405 | prev_desc = desc; | |
406 | desc = desc->more; | |
407 | } | |
408 | BUG(); | |
409 | } | |
410 | } | |
411 | ||
714b93da | 412 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 413 | { |
714b93da | 414 | struct kvm *kvm = vcpu->kvm; |
374cbac0 | 415 | struct page *page; |
374cbac0 AK |
416 | struct kvm_rmap_desc *desc; |
417 | u64 *spte; | |
418 | ||
954bbbc2 AK |
419 | page = gfn_to_page(kvm, gfn); |
420 | BUG_ON(!page); | |
374cbac0 | 421 | |
5972e953 MR |
422 | while (page_private(page)) { |
423 | if (!(page_private(page) & 1)) | |
424 | spte = (u64 *)page_private(page); | |
374cbac0 | 425 | else { |
5972e953 | 426 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
427 | spte = desc->shadow_ptes[0]; |
428 | } | |
429 | BUG_ON(!spte); | |
27aba766 AK |
430 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT |
431 | != page_to_pfn(page)); | |
374cbac0 AK |
432 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
433 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
434 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
714b93da | 435 | rmap_remove(vcpu, spte); |
40907d57 | 436 | kvm_arch_ops->tlb_flush(vcpu); |
374cbac0 AK |
437 | *spte &= ~(u64)PT_WRITABLE_MASK; |
438 | } | |
439 | } | |
440 | ||
d6c69ee9 | 441 | #ifdef MMU_DEBUG |
6aa8b732 AK |
442 | static int is_empty_shadow_page(hpa_t page_hpa) |
443 | { | |
139bdb2d AK |
444 | u64 *pos; |
445 | u64 *end; | |
446 | ||
447 | for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64); | |
6aa8b732 | 448 | pos != end; pos++) |
139bdb2d AK |
449 | if (*pos != 0) { |
450 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
451 | pos, *pos); | |
6aa8b732 | 452 | return 0; |
139bdb2d | 453 | } |
6aa8b732 AK |
454 | return 1; |
455 | } | |
d6c69ee9 | 456 | #endif |
6aa8b732 | 457 | |
260746c0 AK |
458 | static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa) |
459 | { | |
460 | struct kvm_mmu_page *page_head = page_header(page_hpa); | |
461 | ||
5f1e0b6a | 462 | ASSERT(is_empty_shadow_page(page_hpa)); |
260746c0 | 463 | page_head->page_hpa = page_hpa; |
36868f7b | 464 | list_move(&page_head->link, &vcpu->free_pages); |
260746c0 AK |
465 | ++vcpu->kvm->n_free_mmu_pages; |
466 | } | |
467 | ||
cea0f0e7 AK |
468 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
469 | { | |
470 | return gfn; | |
471 | } | |
472 | ||
25c0de2c AK |
473 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
474 | u64 *parent_pte) | |
6aa8b732 AK |
475 | { |
476 | struct kvm_mmu_page *page; | |
477 | ||
478 | if (list_empty(&vcpu->free_pages)) | |
25c0de2c | 479 | return NULL; |
6aa8b732 AK |
480 | |
481 | page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link); | |
36868f7b | 482 | list_move(&page->link, &vcpu->kvm->active_mmu_pages); |
6aa8b732 AK |
483 | ASSERT(is_empty_shadow_page(page->page_hpa)); |
484 | page->slot_bitmap = 0; | |
cea0f0e7 | 485 | page->multimapped = 0; |
6aa8b732 | 486 | page->parent_pte = parent_pte; |
ebeace86 | 487 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 488 | return page; |
6aa8b732 AK |
489 | } |
490 | ||
714b93da AK |
491 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
492 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
493 | { |
494 | struct kvm_pte_chain *pte_chain; | |
495 | struct hlist_node *node; | |
496 | int i; | |
497 | ||
498 | if (!parent_pte) | |
499 | return; | |
500 | if (!page->multimapped) { | |
501 | u64 *old = page->parent_pte; | |
502 | ||
503 | if (!old) { | |
504 | page->parent_pte = parent_pte; | |
505 | return; | |
506 | } | |
507 | page->multimapped = 1; | |
714b93da | 508 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
509 | INIT_HLIST_HEAD(&page->parent_ptes); |
510 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
511 | pte_chain->parent_ptes[0] = old; | |
512 | } | |
513 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
514 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
515 | continue; | |
516 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
517 | if (!pte_chain->parent_ptes[i]) { | |
518 | pte_chain->parent_ptes[i] = parent_pte; | |
519 | return; | |
520 | } | |
521 | } | |
714b93da | 522 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
523 | BUG_ON(!pte_chain); |
524 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
525 | pte_chain->parent_ptes[0] = parent_pte; | |
526 | } | |
527 | ||
714b93da AK |
528 | static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu, |
529 | struct kvm_mmu_page *page, | |
cea0f0e7 AK |
530 | u64 *parent_pte) |
531 | { | |
532 | struct kvm_pte_chain *pte_chain; | |
533 | struct hlist_node *node; | |
534 | int i; | |
535 | ||
536 | if (!page->multimapped) { | |
537 | BUG_ON(page->parent_pte != parent_pte); | |
538 | page->parent_pte = NULL; | |
539 | return; | |
540 | } | |
541 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
542 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
543 | if (!pte_chain->parent_ptes[i]) | |
544 | break; | |
545 | if (pte_chain->parent_ptes[i] != parent_pte) | |
546 | continue; | |
697fe2e2 AK |
547 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
548 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
549 | pte_chain->parent_ptes[i] |
550 | = pte_chain->parent_ptes[i + 1]; | |
551 | ++i; | |
552 | } | |
553 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
554 | if (i == 0) { |
555 | hlist_del(&pte_chain->link); | |
714b93da | 556 | mmu_free_pte_chain(vcpu, pte_chain); |
697fe2e2 AK |
557 | if (hlist_empty(&page->parent_ptes)) { |
558 | page->multimapped = 0; | |
559 | page->parent_pte = NULL; | |
560 | } | |
561 | } | |
cea0f0e7 AK |
562 | return; |
563 | } | |
564 | BUG(); | |
565 | } | |
566 | ||
567 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
568 | gfn_t gfn) | |
569 | { | |
570 | unsigned index; | |
571 | struct hlist_head *bucket; | |
572 | struct kvm_mmu_page *page; | |
573 | struct hlist_node *node; | |
574 | ||
575 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
576 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
577 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
578 | hlist_for_each_entry(page, node, bucket, hash_link) | |
579 | if (page->gfn == gfn && !page->role.metaphysical) { | |
580 | pgprintk("%s: found role %x\n", | |
581 | __FUNCTION__, page->role.word); | |
582 | return page; | |
583 | } | |
584 | return NULL; | |
585 | } | |
586 | ||
587 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
588 | gfn_t gfn, | |
589 | gva_t gaddr, | |
590 | unsigned level, | |
591 | int metaphysical, | |
d28c6cfb | 592 | unsigned hugepage_access, |
cea0f0e7 AK |
593 | u64 *parent_pte) |
594 | { | |
595 | union kvm_mmu_page_role role; | |
596 | unsigned index; | |
597 | unsigned quadrant; | |
598 | struct hlist_head *bucket; | |
599 | struct kvm_mmu_page *page; | |
600 | struct hlist_node *node; | |
601 | ||
602 | role.word = 0; | |
603 | role.glevels = vcpu->mmu.root_level; | |
604 | role.level = level; | |
605 | role.metaphysical = metaphysical; | |
d28c6cfb | 606 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
607 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
608 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
609 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
610 | role.quadrant = quadrant; | |
611 | } | |
612 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
613 | gfn, role.word); | |
614 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
615 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
616 | hlist_for_each_entry(page, node, bucket, hash_link) | |
617 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 618 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
619 | pgprintk("%s: found\n", __FUNCTION__); |
620 | return page; | |
621 | } | |
622 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
623 | if (!page) | |
624 | return page; | |
625 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
626 | page->gfn = gfn; | |
627 | page->role = role; | |
628 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 629 | if (!metaphysical) |
714b93da | 630 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
631 | return page; |
632 | } | |
633 | ||
a436036b AK |
634 | static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu, |
635 | struct kvm_mmu_page *page) | |
636 | { | |
697fe2e2 AK |
637 | unsigned i; |
638 | u64 *pt; | |
639 | u64 ent; | |
640 | ||
641 | pt = __va(page->page_hpa); | |
642 | ||
643 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
644 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
645 | if (pt[i] & PT_PRESENT_MASK) | |
714b93da | 646 | rmap_remove(vcpu, &pt[i]); |
697fe2e2 AK |
647 | pt[i] = 0; |
648 | } | |
40907d57 | 649 | kvm_arch_ops->tlb_flush(vcpu); |
697fe2e2 AK |
650 | return; |
651 | } | |
652 | ||
653 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
654 | ent = pt[i]; | |
655 | ||
656 | pt[i] = 0; | |
657 | if (!(ent & PT_PRESENT_MASK)) | |
658 | continue; | |
659 | ent &= PT64_BASE_ADDR_MASK; | |
714b93da | 660 | mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]); |
697fe2e2 | 661 | } |
a436036b AK |
662 | } |
663 | ||
cea0f0e7 AK |
664 | static void kvm_mmu_put_page(struct kvm_vcpu *vcpu, |
665 | struct kvm_mmu_page *page, | |
666 | u64 *parent_pte) | |
667 | { | |
714b93da | 668 | mmu_page_remove_parent_pte(vcpu, page, parent_pte); |
a436036b AK |
669 | } |
670 | ||
671 | static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu, | |
672 | struct kvm_mmu_page *page) | |
673 | { | |
674 | u64 *parent_pte; | |
675 | ||
676 | while (page->multimapped || page->parent_pte) { | |
677 | if (!page->multimapped) | |
678 | parent_pte = page->parent_pte; | |
679 | else { | |
680 | struct kvm_pte_chain *chain; | |
681 | ||
682 | chain = container_of(page->parent_ptes.first, | |
683 | struct kvm_pte_chain, link); | |
684 | parent_pte = chain->parent_ptes[0]; | |
685 | } | |
697fe2e2 | 686 | BUG_ON(!parent_pte); |
a436036b AK |
687 | kvm_mmu_put_page(vcpu, page, parent_pte); |
688 | *parent_pte = 0; | |
689 | } | |
cc4529ef | 690 | kvm_mmu_page_unlink_children(vcpu, page); |
3bb65a22 AK |
691 | if (!page->root_count) { |
692 | hlist_del(&page->hash_link); | |
693 | kvm_mmu_free_page(vcpu, page->page_hpa); | |
36868f7b AK |
694 | } else |
695 | list_move(&page->link, &vcpu->kvm->active_mmu_pages); | |
a436036b AK |
696 | } |
697 | ||
698 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
699 | { | |
700 | unsigned index; | |
701 | struct hlist_head *bucket; | |
702 | struct kvm_mmu_page *page; | |
703 | struct hlist_node *node, *n; | |
704 | int r; | |
705 | ||
706 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
707 | r = 0; | |
708 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
709 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
710 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
711 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
712 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
713 | page->role.word); | |
a436036b AK |
714 | kvm_mmu_zap_page(vcpu, page); |
715 | r = 1; | |
716 | } | |
717 | return r; | |
cea0f0e7 AK |
718 | } |
719 | ||
6aa8b732 AK |
720 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
721 | { | |
722 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
723 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
724 | ||
725 | __set_bit(slot, &page_head->slot_bitmap); | |
726 | } | |
727 | ||
728 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
729 | { | |
730 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
731 | ||
732 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
733 | } | |
734 | ||
735 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
736 | { | |
6aa8b732 AK |
737 | struct page *page; |
738 | ||
739 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
954bbbc2 AK |
740 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
741 | if (!page) | |
6aa8b732 | 742 | return gpa | HPA_ERR_MASK; |
6aa8b732 AK |
743 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) |
744 | | (gpa & (PAGE_SIZE-1)); | |
745 | } | |
746 | ||
747 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
748 | { | |
749 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
750 | ||
751 | if (gpa == UNMAPPED_GVA) | |
752 | return UNMAPPED_GVA; | |
753 | return gpa_to_hpa(vcpu, gpa); | |
754 | } | |
755 | ||
039576c0 AK |
756 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
757 | { | |
758 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
759 | ||
760 | if (gpa == UNMAPPED_GVA) | |
761 | return NULL; | |
762 | return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT); | |
763 | } | |
764 | ||
6aa8b732 AK |
765 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
766 | { | |
767 | } | |
768 | ||
769 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
770 | { | |
771 | int level = PT32E_ROOT_LEVEL; | |
772 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
773 | ||
774 | for (; ; level--) { | |
775 | u32 index = PT64_INDEX(v, level); | |
776 | u64 *table; | |
cea0f0e7 | 777 | u64 pte; |
6aa8b732 AK |
778 | |
779 | ASSERT(VALID_PAGE(table_addr)); | |
780 | table = __va(table_addr); | |
781 | ||
782 | if (level == 1) { | |
cea0f0e7 AK |
783 | pte = table[index]; |
784 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
785 | return 0; | |
6aa8b732 AK |
786 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
787 | page_header_update_slot(vcpu->kvm, table, v); | |
788 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
789 | PT_USER_MASK; | |
714b93da | 790 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
791 | return 0; |
792 | } | |
793 | ||
794 | if (table[index] == 0) { | |
25c0de2c | 795 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 796 | gfn_t pseudo_gfn; |
6aa8b732 | 797 | |
cea0f0e7 AK |
798 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
799 | >> PAGE_SHIFT; | |
800 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
801 | v, level - 1, | |
d28c6cfb | 802 | 1, 0, &table[index]); |
25c0de2c | 803 | if (!new_table) { |
6aa8b732 AK |
804 | pgprintk("nonpaging_map: ENOMEM\n"); |
805 | return -ENOMEM; | |
806 | } | |
807 | ||
25c0de2c AK |
808 | table[index] = new_table->page_hpa | PT_PRESENT_MASK |
809 | | PT_WRITABLE_MASK | PT_USER_MASK; | |
6aa8b732 AK |
810 | } |
811 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
812 | } | |
813 | } | |
814 | ||
17ac10ad AK |
815 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
816 | { | |
817 | int i; | |
3bb65a22 | 818 | struct kvm_mmu_page *page; |
17ac10ad AK |
819 | |
820 | #ifdef CONFIG_X86_64 | |
821 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
822 | hpa_t root = vcpu->mmu.root_hpa; | |
823 | ||
824 | ASSERT(VALID_PAGE(root)); | |
3bb65a22 AK |
825 | page = page_header(root); |
826 | --page->root_count; | |
17ac10ad AK |
827 | vcpu->mmu.root_hpa = INVALID_PAGE; |
828 | return; | |
829 | } | |
830 | #endif | |
831 | for (i = 0; i < 4; ++i) { | |
832 | hpa_t root = vcpu->mmu.pae_root[i]; | |
833 | ||
417726a3 AK |
834 | if (root) { |
835 | ASSERT(VALID_PAGE(root)); | |
836 | root &= PT64_BASE_ADDR_MASK; | |
837 | page = page_header(root); | |
838 | --page->root_count; | |
839 | } | |
17ac10ad AK |
840 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
841 | } | |
842 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
843 | } | |
844 | ||
845 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
846 | { | |
847 | int i; | |
cea0f0e7 | 848 | gfn_t root_gfn; |
3bb65a22 AK |
849 | struct kvm_mmu_page *page; |
850 | ||
cea0f0e7 | 851 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
852 | |
853 | #ifdef CONFIG_X86_64 | |
854 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
855 | hpa_t root = vcpu->mmu.root_hpa; | |
856 | ||
857 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d | 858 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
d28c6cfb | 859 | PT64_ROOT_LEVEL, 0, 0, NULL); |
68a99f6d | 860 | root = page->page_hpa; |
3bb65a22 | 861 | ++page->root_count; |
17ac10ad AK |
862 | vcpu->mmu.root_hpa = root; |
863 | return; | |
864 | } | |
865 | #endif | |
866 | for (i = 0; i < 4; ++i) { | |
867 | hpa_t root = vcpu->mmu.pae_root[i]; | |
868 | ||
869 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
870 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
871 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
872 | vcpu->mmu.pae_root[i] = 0; | |
873 | continue; | |
874 | } | |
cea0f0e7 | 875 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 876 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 877 | root_gfn = 0; |
68a99f6d | 878 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 879 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
d28c6cfb | 880 | 0, NULL); |
68a99f6d | 881 | root = page->page_hpa; |
3bb65a22 | 882 | ++page->root_count; |
17ac10ad AK |
883 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
884 | } | |
885 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
886 | } | |
887 | ||
6aa8b732 AK |
888 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
889 | { | |
890 | return vaddr; | |
891 | } | |
892 | ||
893 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
894 | u32 error_code) | |
895 | { | |
6aa8b732 | 896 | gpa_t addr = gva; |
ebeace86 | 897 | hpa_t paddr; |
e2dec939 | 898 | int r; |
6aa8b732 | 899 | |
e2dec939 AK |
900 | r = mmu_topup_memory_caches(vcpu); |
901 | if (r) | |
902 | return r; | |
714b93da | 903 | |
6aa8b732 AK |
904 | ASSERT(vcpu); |
905 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
906 | ||
6aa8b732 | 907 | |
ebeace86 | 908 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 909 | |
ebeace86 AK |
910 | if (is_error_hpa(paddr)) |
911 | return 1; | |
6aa8b732 | 912 | |
ebeace86 | 913 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
914 | } |
915 | ||
6aa8b732 AK |
916 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
917 | { | |
17ac10ad | 918 | mmu_free_roots(vcpu); |
6aa8b732 AK |
919 | } |
920 | ||
921 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
922 | { | |
923 | struct kvm_mmu *context = &vcpu->mmu; | |
924 | ||
925 | context->new_cr3 = nonpaging_new_cr3; | |
926 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
927 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
928 | context->free = nonpaging_free; | |
cea0f0e7 | 929 | context->root_level = 0; |
6aa8b732 | 930 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17ac10ad | 931 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
932 | ASSERT(VALID_PAGE(context->root_hpa)); |
933 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa); | |
934 | return 0; | |
935 | } | |
936 | ||
6aa8b732 AK |
937 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
938 | { | |
1165f5fe | 939 | ++vcpu->stat.tlb_flush; |
6aa8b732 AK |
940 | kvm_arch_ops->tlb_flush(vcpu); |
941 | } | |
942 | ||
943 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
944 | { | |
374cbac0 | 945 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 946 | mmu_free_roots(vcpu); |
7f7417d6 IM |
947 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) |
948 | kvm_mmu_free_some_pages(vcpu); | |
cea0f0e7 | 949 | mmu_alloc_roots(vcpu); |
6aa8b732 | 950 | kvm_mmu_flush_tlb(vcpu); |
cea0f0e7 | 951 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
6aa8b732 AK |
952 | } |
953 | ||
6aa8b732 AK |
954 | static inline void set_pte_common(struct kvm_vcpu *vcpu, |
955 | u64 *shadow_pte, | |
956 | gpa_t gaddr, | |
957 | int dirty, | |
815af8d4 AK |
958 | u64 access_bits, |
959 | gfn_t gfn) | |
6aa8b732 AK |
960 | { |
961 | hpa_t paddr; | |
962 | ||
963 | *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET; | |
964 | if (!dirty) | |
965 | access_bits &= ~PT_WRITABLE_MASK; | |
cea0f0e7 | 966 | |
374cbac0 | 967 | paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK); |
6aa8b732 AK |
968 | |
969 | *shadow_pte |= access_bits; | |
970 | ||
6aa8b732 AK |
971 | if (is_error_hpa(paddr)) { |
972 | *shadow_pte |= gaddr; | |
973 | *shadow_pte |= PT_SHADOW_IO_MARK; | |
974 | *shadow_pte &= ~PT_PRESENT_MASK; | |
374cbac0 | 975 | return; |
6aa8b732 | 976 | } |
374cbac0 AK |
977 | |
978 | *shadow_pte |= paddr; | |
979 | ||
980 | if (access_bits & PT_WRITABLE_MASK) { | |
981 | struct kvm_mmu_page *shadow; | |
982 | ||
815af8d4 | 983 | shadow = kvm_mmu_lookup_page(vcpu, gfn); |
374cbac0 AK |
984 | if (shadow) { |
985 | pgprintk("%s: found shadow page for %lx, marking ro\n", | |
815af8d4 | 986 | __FUNCTION__, gfn); |
374cbac0 | 987 | access_bits &= ~PT_WRITABLE_MASK; |
40907d57 AK |
988 | if (is_writeble_pte(*shadow_pte)) { |
989 | *shadow_pte &= ~PT_WRITABLE_MASK; | |
990 | kvm_arch_ops->tlb_flush(vcpu); | |
991 | } | |
374cbac0 AK |
992 | } |
993 | } | |
994 | ||
995 | if (access_bits & PT_WRITABLE_MASK) | |
996 | mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT); | |
997 | ||
998 | page_header_update_slot(vcpu->kvm, shadow_pte, gaddr); | |
714b93da | 999 | rmap_add(vcpu, shadow_pte); |
6aa8b732 AK |
1000 | } |
1001 | ||
1002 | static void inject_page_fault(struct kvm_vcpu *vcpu, | |
1003 | u64 addr, | |
1004 | u32 err_code) | |
1005 | { | |
1006 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
1007 | } | |
1008 | ||
1009 | static inline int fix_read_pf(u64 *shadow_ent) | |
1010 | { | |
1011 | if ((*shadow_ent & PT_SHADOW_USER_MASK) && | |
1012 | !(*shadow_ent & PT_USER_MASK)) { | |
1013 | /* | |
1014 | * If supervisor write protect is disabled, we shadow kernel | |
1015 | * pages as user pages so we can trap the write access. | |
1016 | */ | |
1017 | *shadow_ent |= PT_USER_MASK; | |
1018 | *shadow_ent &= ~PT_WRITABLE_MASK; | |
1019 | ||
1020 | return 1; | |
1021 | ||
1022 | } | |
1023 | return 0; | |
1024 | } | |
1025 | ||
6aa8b732 AK |
1026 | static void paging_free(struct kvm_vcpu *vcpu) |
1027 | { | |
1028 | nonpaging_free(vcpu); | |
1029 | } | |
1030 | ||
1031 | #define PTTYPE 64 | |
1032 | #include "paging_tmpl.h" | |
1033 | #undef PTTYPE | |
1034 | ||
1035 | #define PTTYPE 32 | |
1036 | #include "paging_tmpl.h" | |
1037 | #undef PTTYPE | |
1038 | ||
17ac10ad | 1039 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1040 | { |
1041 | struct kvm_mmu *context = &vcpu->mmu; | |
1042 | ||
1043 | ASSERT(is_pae(vcpu)); | |
1044 | context->new_cr3 = paging_new_cr3; | |
1045 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
1046 | context->gva_to_gpa = paging64_gva_to_gpa; |
1047 | context->free = paging_free; | |
17ac10ad AK |
1048 | context->root_level = level; |
1049 | context->shadow_root_level = level; | |
1050 | mmu_alloc_roots(vcpu); | |
6aa8b732 AK |
1051 | ASSERT(VALID_PAGE(context->root_hpa)); |
1052 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1053 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1054 | return 0; | |
1055 | } | |
1056 | ||
17ac10ad AK |
1057 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1058 | { | |
1059 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1060 | } | |
1061 | ||
6aa8b732 AK |
1062 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1063 | { | |
1064 | struct kvm_mmu *context = &vcpu->mmu; | |
1065 | ||
1066 | context->new_cr3 = paging_new_cr3; | |
1067 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1068 | context->gva_to_gpa = paging32_gva_to_gpa; |
1069 | context->free = paging_free; | |
1070 | context->root_level = PT32_ROOT_LEVEL; | |
1071 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17ac10ad | 1072 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
1073 | ASSERT(VALID_PAGE(context->root_hpa)); |
1074 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1075 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1076 | return 0; | |
1077 | } | |
1078 | ||
1079 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1080 | { | |
17ac10ad | 1081 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1082 | } |
1083 | ||
1084 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1085 | { | |
1086 | ASSERT(vcpu); | |
1087 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1088 | ||
1089 | if (!is_paging(vcpu)) | |
1090 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1091 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1092 | return paging64_init_context(vcpu); |
1093 | else if (is_pae(vcpu)) | |
1094 | return paging32E_init_context(vcpu); | |
1095 | else | |
1096 | return paging32_init_context(vcpu); | |
1097 | } | |
1098 | ||
1099 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1100 | { | |
1101 | ASSERT(vcpu); | |
1102 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1103 | vcpu->mmu.free(vcpu); | |
1104 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1105 | } | |
1106 | } | |
1107 | ||
1108 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
1109 | { | |
714b93da AK |
1110 | int r; |
1111 | ||
6aa8b732 | 1112 | destroy_kvm_mmu(vcpu); |
714b93da AK |
1113 | r = init_kvm_mmu(vcpu); |
1114 | if (r < 0) | |
1115 | goto out; | |
e2dec939 | 1116 | r = mmu_topup_memory_caches(vcpu); |
714b93da AK |
1117 | out: |
1118 | return r; | |
6aa8b732 AK |
1119 | } |
1120 | ||
ac1b714e AK |
1121 | static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu, |
1122 | struct kvm_mmu_page *page, | |
1123 | u64 *spte) | |
1124 | { | |
1125 | u64 pte; | |
1126 | struct kvm_mmu_page *child; | |
1127 | ||
1128 | pte = *spte; | |
1129 | if (is_present_pte(pte)) { | |
1130 | if (page->role.level == PT_PAGE_TABLE_LEVEL) | |
1131 | rmap_remove(vcpu, spte); | |
1132 | else { | |
1133 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1134 | mmu_page_remove_parent_pte(vcpu, child, spte); | |
1135 | } | |
1136 | } | |
1137 | *spte = 0; | |
1138 | } | |
1139 | ||
da4a00f0 AK |
1140 | void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) |
1141 | { | |
9b7a0325 AK |
1142 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1143 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1144 | struct hlist_node *node, *n; |
9b7a0325 AK |
1145 | struct hlist_head *bucket; |
1146 | unsigned index; | |
1147 | u64 *spte; | |
9b7a0325 | 1148 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1149 | unsigned pte_size; |
9b7a0325 | 1150 | unsigned page_offset; |
0e7bc4b9 | 1151 | unsigned misaligned; |
9b7a0325 | 1152 | int level; |
86a5ba02 | 1153 | int flooded = 0; |
ac1b714e | 1154 | int npte; |
9b7a0325 | 1155 | |
da4a00f0 | 1156 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1157 | if (gfn == vcpu->last_pt_write_gfn) { |
1158 | ++vcpu->last_pt_write_count; | |
1159 | if (vcpu->last_pt_write_count >= 3) | |
1160 | flooded = 1; | |
1161 | } else { | |
1162 | vcpu->last_pt_write_gfn = gfn; | |
1163 | vcpu->last_pt_write_count = 1; | |
1164 | } | |
9b7a0325 AK |
1165 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1166 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1167 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1168 | if (page->gfn != gfn || page->role.metaphysical) |
1169 | continue; | |
0e7bc4b9 AK |
1170 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1171 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
e925c5ba | 1172 | misaligned |= bytes < 4; |
86a5ba02 | 1173 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1174 | /* |
1175 | * Misaligned accesses are too much trouble to fix | |
1176 | * up; also, they usually indicate a page is not used | |
1177 | * as a page table. | |
86a5ba02 AK |
1178 | * |
1179 | * If we're seeing too many writes to a page, | |
1180 | * it may no longer be a page table, or we may be | |
1181 | * forking, in which case it is better to unmap the | |
1182 | * page. | |
0e7bc4b9 AK |
1183 | */ |
1184 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1185 | gpa, bytes, page->role.word); | |
1186 | kvm_mmu_zap_page(vcpu, page); | |
1187 | continue; | |
1188 | } | |
9b7a0325 AK |
1189 | page_offset = offset; |
1190 | level = page->role.level; | |
ac1b714e | 1191 | npte = 1; |
9b7a0325 | 1192 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1193 | page_offset <<= 1; /* 32->64 */ |
1194 | /* | |
1195 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1196 | * only 2MB. So we need to double the offset again | |
1197 | * and zap two pdes instead of one. | |
1198 | */ | |
1199 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1200 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1201 | page_offset <<= 1; |
1202 | npte = 2; | |
1203 | } | |
9b7a0325 AK |
1204 | page_offset &= ~PAGE_MASK; |
1205 | } | |
1206 | spte = __va(page->page_hpa); | |
1207 | spte += page_offset / sizeof(*spte); | |
ac1b714e AK |
1208 | while (npte--) { |
1209 | mmu_pre_write_zap_pte(vcpu, page, spte); | |
1210 | ++spte; | |
9b7a0325 | 1211 | } |
9b7a0325 | 1212 | } |
da4a00f0 AK |
1213 | } |
1214 | ||
1215 | void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes) | |
1216 | { | |
1217 | } | |
1218 | ||
a436036b AK |
1219 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1220 | { | |
1221 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1222 | ||
1223 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1224 | } | |
1225 | ||
ebeace86 AK |
1226 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1227 | { | |
1228 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1229 | struct kvm_mmu_page *page; | |
1230 | ||
1231 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1232 | struct kvm_mmu_page, link); | |
1233 | kvm_mmu_zap_page(vcpu, page); | |
1234 | } | |
1235 | } | |
1236 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1237 | ||
6aa8b732 AK |
1238 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1239 | { | |
f51234c2 | 1240 | struct kvm_mmu_page *page; |
6aa8b732 | 1241 | |
f51234c2 AK |
1242 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1243 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1244 | struct kvm_mmu_page, link); | |
1245 | kvm_mmu_zap_page(vcpu, page); | |
1246 | } | |
1247 | while (!list_empty(&vcpu->free_pages)) { | |
6aa8b732 AK |
1248 | page = list_entry(vcpu->free_pages.next, |
1249 | struct kvm_mmu_page, link); | |
1250 | list_del(&page->link); | |
1251 | __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT)); | |
1252 | page->page_hpa = INVALID_PAGE; | |
1253 | } | |
17ac10ad | 1254 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1255 | } |
1256 | ||
1257 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1258 | { | |
17ac10ad | 1259 | struct page *page; |
6aa8b732 AK |
1260 | int i; |
1261 | ||
1262 | ASSERT(vcpu); | |
1263 | ||
1264 | for (i = 0; i < KVM_NUM_MMU_PAGES; i++) { | |
6aa8b732 AK |
1265 | struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i]; |
1266 | ||
1267 | INIT_LIST_HEAD(&page_header->link); | |
17ac10ad | 1268 | if ((page = alloc_page(GFP_KERNEL)) == NULL) |
6aa8b732 | 1269 | goto error_1; |
5972e953 | 1270 | set_page_private(page, (unsigned long)page_header); |
6aa8b732 AK |
1271 | page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT; |
1272 | memset(__va(page_header->page_hpa), 0, PAGE_SIZE); | |
1273 | list_add(&page_header->link, &vcpu->free_pages); | |
ebeace86 | 1274 | ++vcpu->kvm->n_free_mmu_pages; |
6aa8b732 | 1275 | } |
17ac10ad AK |
1276 | |
1277 | /* | |
1278 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1279 | * Therefore we need to allocate shadow page tables in the first | |
1280 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1281 | */ | |
1282 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1283 | if (!page) | |
1284 | goto error_1; | |
1285 | vcpu->mmu.pae_root = page_address(page); | |
1286 | for (i = 0; i < 4; ++i) | |
1287 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1288 | ||
6aa8b732 AK |
1289 | return 0; |
1290 | ||
1291 | error_1: | |
1292 | free_mmu_pages(vcpu); | |
1293 | return -ENOMEM; | |
1294 | } | |
1295 | ||
8018c27b | 1296 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1297 | { |
6aa8b732 AK |
1298 | ASSERT(vcpu); |
1299 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1300 | ASSERT(list_empty(&vcpu->free_pages)); | |
1301 | ||
8018c27b IM |
1302 | return alloc_mmu_pages(vcpu); |
1303 | } | |
6aa8b732 | 1304 | |
8018c27b IM |
1305 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1306 | { | |
1307 | ASSERT(vcpu); | |
1308 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1309 | ASSERT(!list_empty(&vcpu->free_pages)); | |
2c264957 | 1310 | |
8018c27b | 1311 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1312 | } |
1313 | ||
1314 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1315 | { | |
1316 | ASSERT(vcpu); | |
1317 | ||
1318 | destroy_kvm_mmu(vcpu); | |
1319 | free_mmu_pages(vcpu); | |
714b93da | 1320 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1321 | } |
1322 | ||
714b93da | 1323 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot) |
6aa8b732 | 1324 | { |
714b93da | 1325 | struct kvm *kvm = vcpu->kvm; |
6aa8b732 AK |
1326 | struct kvm_mmu_page *page; |
1327 | ||
1328 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1329 | int i; | |
1330 | u64 *pt; | |
1331 | ||
1332 | if (!test_bit(slot, &page->slot_bitmap)) | |
1333 | continue; | |
1334 | ||
1335 | pt = __va(page->page_hpa); | |
1336 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1337 | /* avoid RMW */ | |
cd4a4e53 | 1338 | if (pt[i] & PT_WRITABLE_MASK) { |
714b93da | 1339 | rmap_remove(vcpu, &pt[i]); |
6aa8b732 | 1340 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1341 | } |
6aa8b732 AK |
1342 | } |
1343 | } | |
37a7d8b0 | 1344 | |
e0fa826f DL |
1345 | void kvm_mmu_zap_all(struct kvm_vcpu *vcpu) |
1346 | { | |
1347 | destroy_kvm_mmu(vcpu); | |
1348 | ||
1349 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { | |
1350 | struct kvm_mmu_page *page; | |
1351 | ||
1352 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1353 | struct kvm_mmu_page, link); | |
1354 | kvm_mmu_zap_page(vcpu, page); | |
1355 | } | |
1356 | ||
1357 | mmu_free_memory_caches(vcpu); | |
1358 | kvm_arch_ops->tlb_flush(vcpu); | |
1359 | init_kvm_mmu(vcpu); | |
1360 | } | |
1361 | ||
b5a33a75 AK |
1362 | void kvm_mmu_module_exit(void) |
1363 | { | |
1364 | if (pte_chain_cache) | |
1365 | kmem_cache_destroy(pte_chain_cache); | |
1366 | if (rmap_desc_cache) | |
1367 | kmem_cache_destroy(rmap_desc_cache); | |
1368 | } | |
1369 | ||
1370 | int kvm_mmu_module_init(void) | |
1371 | { | |
1372 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1373 | sizeof(struct kvm_pte_chain), | |
1374 | 0, 0, NULL, NULL); | |
1375 | if (!pte_chain_cache) | |
1376 | goto nomem; | |
1377 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1378 | sizeof(struct kvm_rmap_desc), | |
1379 | 0, 0, NULL, NULL); | |
1380 | if (!rmap_desc_cache) | |
1381 | goto nomem; | |
1382 | ||
1383 | return 0; | |
1384 | ||
1385 | nomem: | |
1386 | kvm_mmu_module_exit(); | |
1387 | return -ENOMEM; | |
1388 | } | |
1389 | ||
37a7d8b0 AK |
1390 | #ifdef AUDIT |
1391 | ||
1392 | static const char *audit_msg; | |
1393 | ||
1394 | static gva_t canonicalize(gva_t gva) | |
1395 | { | |
1396 | #ifdef CONFIG_X86_64 | |
1397 | gva = (long long)(gva << 16) >> 16; | |
1398 | #endif | |
1399 | return gva; | |
1400 | } | |
1401 | ||
1402 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1403 | gva_t va, int level) | |
1404 | { | |
1405 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1406 | int i; | |
1407 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1408 | ||
1409 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1410 | u64 ent = pt[i]; | |
1411 | ||
2807696c | 1412 | if (!(ent & PT_PRESENT_MASK)) |
37a7d8b0 AK |
1413 | continue; |
1414 | ||
1415 | va = canonicalize(va); | |
1416 | if (level > 1) | |
1417 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1418 | else { | |
1419 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1420 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1421 | ||
1422 | if ((ent & PT_PRESENT_MASK) | |
1423 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1424 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1425 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1426 | audit_msg, vcpu->mmu.root_level, | |
1427 | va, gpa, hpa, ent); | |
1428 | } | |
1429 | } | |
1430 | } | |
1431 | ||
1432 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1433 | { | |
1ea252af | 1434 | unsigned i; |
37a7d8b0 AK |
1435 | |
1436 | if (vcpu->mmu.root_level == 4) | |
1437 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1438 | else | |
1439 | for (i = 0; i < 4; ++i) | |
1440 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1441 | audit_mappings_page(vcpu, | |
1442 | vcpu->mmu.pae_root[i], | |
1443 | i << 30, | |
1444 | 2); | |
1445 | } | |
1446 | ||
1447 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1448 | { | |
1449 | int nmaps = 0; | |
1450 | int i, j, k; | |
1451 | ||
1452 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1453 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1454 | struct kvm_rmap_desc *d; | |
1455 | ||
1456 | for (j = 0; j < m->npages; ++j) { | |
1457 | struct page *page = m->phys_mem[j]; | |
1458 | ||
1459 | if (!page->private) | |
1460 | continue; | |
1461 | if (!(page->private & 1)) { | |
1462 | ++nmaps; | |
1463 | continue; | |
1464 | } | |
1465 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1466 | while (d) { | |
1467 | for (k = 0; k < RMAP_EXT; ++k) | |
1468 | if (d->shadow_ptes[k]) | |
1469 | ++nmaps; | |
1470 | else | |
1471 | break; | |
1472 | d = d->more; | |
1473 | } | |
1474 | } | |
1475 | } | |
1476 | return nmaps; | |
1477 | } | |
1478 | ||
1479 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1480 | { | |
1481 | int nmaps = 0; | |
1482 | struct kvm_mmu_page *page; | |
1483 | int i; | |
1484 | ||
1485 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1486 | u64 *pt = __va(page->page_hpa); | |
1487 | ||
1488 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1489 | continue; | |
1490 | ||
1491 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1492 | u64 ent = pt[i]; | |
1493 | ||
1494 | if (!(ent & PT_PRESENT_MASK)) | |
1495 | continue; | |
1496 | if (!(ent & PT_WRITABLE_MASK)) | |
1497 | continue; | |
1498 | ++nmaps; | |
1499 | } | |
1500 | } | |
1501 | return nmaps; | |
1502 | } | |
1503 | ||
1504 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1505 | { | |
1506 | int n_rmap = count_rmaps(vcpu); | |
1507 | int n_actual = count_writable_mappings(vcpu); | |
1508 | ||
1509 | if (n_rmap != n_actual) | |
1510 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1511 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1512 | } | |
1513 | ||
1514 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1515 | { | |
1516 | struct kvm_mmu_page *page; | |
1517 | ||
1518 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1519 | hfn_t hfn; | |
1520 | struct page *pg; | |
1521 | ||
1522 | if (page->role.metaphysical) | |
1523 | continue; | |
1524 | ||
1525 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1526 | >> PAGE_SHIFT; | |
1527 | pg = pfn_to_page(hfn); | |
1528 | if (pg->private) | |
1529 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1530 | " mappings: gfn %lx role %x\n", | |
1531 | __FUNCTION__, audit_msg, page->gfn, | |
1532 | page->role.word); | |
1533 | } | |
1534 | } | |
1535 | ||
1536 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1537 | { | |
1538 | int olddbg = dbg; | |
1539 | ||
1540 | dbg = 0; | |
1541 | audit_msg = msg; | |
1542 | audit_rmap(vcpu); | |
1543 | audit_write_protection(vcpu); | |
1544 | audit_mappings(vcpu); | |
1545 | dbg = olddbg; | |
1546 | } | |
1547 | ||
1548 | #endif |