KVM: MMU: Fix potential memory leak with smp real-mode
[linux-block.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
34c16eec 22#include "x86.h"
e495606d 23
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
29
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30#include <asm/page.h>
31#include <asm/cmpxchg.h>
6aa8b732 32
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33#undef MMU_DEBUG
34
35#undef AUDIT
36
37#ifdef AUDIT
38static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
39#else
40static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41#endif
42
43#ifdef MMU_DEBUG
44
45#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
46#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
47
48#else
49
50#define pgprintk(x...) do { } while (0)
51#define rmap_printk(x...) do { } while (0)
52
53#endif
54
55#if defined(MMU_DEBUG) || defined(AUDIT)
56static int dbg = 1;
57#endif
6aa8b732 58
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59#ifndef MMU_DEBUG
60#define ASSERT(x) do { } while (0)
61#else
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62#define ASSERT(x) \
63 if (!(x)) { \
64 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
65 __FILE__, __LINE__, #x); \
66 }
d6c69ee9 67#endif
6aa8b732 68
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69#define PT64_PT_BITS 9
70#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
71#define PT32_PT_BITS 10
72#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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73
74#define PT_WRITABLE_SHIFT 1
75
76#define PT_PRESENT_MASK (1ULL << 0)
77#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
78#define PT_USER_MASK (1ULL << 2)
79#define PT_PWT_MASK (1ULL << 3)
80#define PT_PCD_MASK (1ULL << 4)
81#define PT_ACCESSED_MASK (1ULL << 5)
82#define PT_DIRTY_MASK (1ULL << 6)
83#define PT_PAGE_SIZE_MASK (1ULL << 7)
84#define PT_PAT_MASK (1ULL << 7)
85#define PT_GLOBAL_MASK (1ULL << 8)
86#define PT64_NX_MASK (1ULL << 63)
87
88#define PT_PAT_SHIFT 7
89#define PT_DIR_PAT_SHIFT 12
90#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
91
92#define PT32_DIR_PSE36_SIZE 4
93#define PT32_DIR_PSE36_SHIFT 13
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94#define PT32_DIR_PSE36_MASK \
95 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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96
97
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98#define PT_FIRST_AVAIL_BITS_SHIFT 9
99#define PT64_SECOND_AVAIL_BITS_SHIFT 52
100
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101#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
102
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103#define VALID_PAGE(x) ((x) != INVALID_PAGE)
104
105#define PT64_LEVEL_BITS 9
106
107#define PT64_LEVEL_SHIFT(level) \
d77c26fc 108 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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109
110#define PT64_LEVEL_MASK(level) \
111 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
112
113#define PT64_INDEX(address, level)\
114 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
115
116
117#define PT32_LEVEL_BITS 10
118
119#define PT32_LEVEL_SHIFT(level) \
d77c26fc 120 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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121
122#define PT32_LEVEL_MASK(level) \
123 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
124
125#define PT32_INDEX(address, level)\
126 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
127
128
27aba766 129#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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130#define PT64_DIR_BASE_ADDR_MASK \
131 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
132
133#define PT32_BASE_ADDR_MASK PAGE_MASK
134#define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136
137
138#define PFERR_PRESENT_MASK (1U << 0)
139#define PFERR_WRITE_MASK (1U << 1)
140#define PFERR_USER_MASK (1U << 2)
73b1087e 141#define PFERR_FETCH_MASK (1U << 4)
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142
143#define PT64_ROOT_LEVEL 4
144#define PT32_ROOT_LEVEL 2
145#define PT32E_ROOT_LEVEL 3
146
147#define PT_DIRECTORY_LEVEL 2
148#define PT_PAGE_TABLE_LEVEL 1
149
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150#define RMAP_EXT 4
151
152struct kvm_rmap_desc {
153 u64 *shadow_ptes[RMAP_EXT];
154 struct kvm_rmap_desc *more;
155};
156
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157static struct kmem_cache *pte_chain_cache;
158static struct kmem_cache *rmap_desc_cache;
d3d25b04 159static struct kmem_cache *mmu_page_header_cache;
b5a33a75 160
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161static u64 __read_mostly shadow_trap_nonpresent_pte;
162static u64 __read_mostly shadow_notrap_nonpresent_pte;
163
164void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
165{
166 shadow_trap_nonpresent_pte = trap_pte;
167 shadow_notrap_nonpresent_pte = notrap_pte;
168}
169EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
170
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171static int is_write_protection(struct kvm_vcpu *vcpu)
172{
707d92fa 173 return vcpu->cr0 & X86_CR0_WP;
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174}
175
176static int is_cpuid_PSE36(void)
177{
178 return 1;
179}
180
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181static int is_nx(struct kvm_vcpu *vcpu)
182{
183 return vcpu->shadow_efer & EFER_NX;
184}
185
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186static int is_present_pte(unsigned long pte)
187{
188 return pte & PT_PRESENT_MASK;
189}
190
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191static int is_shadow_present_pte(u64 pte)
192{
193 pte &= ~PT_SHADOW_IO_MARK;
194 return pte != shadow_trap_nonpresent_pte
195 && pte != shadow_notrap_nonpresent_pte;
196}
197
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198static int is_writeble_pte(unsigned long pte)
199{
200 return pte & PT_WRITABLE_MASK;
201}
202
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203static int is_dirty_pte(unsigned long pte)
204{
205 return pte & PT_DIRTY_MASK;
206}
207
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208static int is_io_pte(unsigned long pte)
209{
210 return pte & PT_SHADOW_IO_MARK;
211}
212
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213static int is_rmap_pte(u64 pte)
214{
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215 return pte != shadow_trap_nonpresent_pte
216 && pte != shadow_notrap_nonpresent_pte;
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217}
218
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219static void set_shadow_pte(u64 *sptep, u64 spte)
220{
221#ifdef CONFIG_X86_64
222 set_64bit((unsigned long *)sptep, spte);
223#else
224 set_64bit((unsigned long long *)sptep, spte);
225#endif
226}
227
e2dec939 228static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 229 struct kmem_cache *base_cache, int min)
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230{
231 void *obj;
232
233 if (cache->nobjs >= min)
e2dec939 234 return 0;
714b93da 235 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 236 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 237 if (!obj)
e2dec939 238 return -ENOMEM;
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239 cache->objects[cache->nobjs++] = obj;
240 }
e2dec939 241 return 0;
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242}
243
244static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
245{
246 while (mc->nobjs)
247 kfree(mc->objects[--mc->nobjs]);
248}
249
c1158e63 250static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 251 int min)
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252{
253 struct page *page;
254
255 if (cache->nobjs >= min)
256 return 0;
257 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 258 page = alloc_page(GFP_KERNEL);
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259 if (!page)
260 return -ENOMEM;
261 set_page_private(page, 0);
262 cache->objects[cache->nobjs++] = page_address(page);
263 }
264 return 0;
265}
266
267static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
268{
269 while (mc->nobjs)
c4d198d5 270 free_page((unsigned long)mc->objects[--mc->nobjs]);
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271}
272
2e3e5882 273static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 274{
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275 int r;
276
2e3e5882 277 kvm_mmu_free_some_pages(vcpu);
e2dec939 278 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 279 pte_chain_cache, 4);
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280 if (r)
281 goto out;
282 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 283 rmap_desc_cache, 1);
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284 if (r)
285 goto out;
290fc38d 286 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
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287 if (r)
288 goto out;
289 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 290 mmu_page_header_cache, 4);
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291out:
292 return r;
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293}
294
295static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
296{
297 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
298 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 299 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 300 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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301}
302
303static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
304 size_t size)
305{
306 void *p;
307
308 BUG_ON(!mc->nobjs);
309 p = mc->objects[--mc->nobjs];
310 memset(p, 0, size);
311 return p;
312}
313
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314static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
315{
316 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
317 sizeof(struct kvm_pte_chain));
318}
319
90cb0529 320static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 321{
90cb0529 322 kfree(pc);
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323}
324
325static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
326{
327 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
328 sizeof(struct kvm_rmap_desc));
329}
330
90cb0529 331static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 332{
90cb0529 333 kfree(rd);
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334}
335
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336/*
337 * Take gfn and return the reverse mapping to it.
338 * Note: gfn must be unaliased before this function get called
339 */
340
341static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
342{
343 struct kvm_memory_slot *slot;
344
345 slot = gfn_to_memslot(kvm, gfn);
346 return &slot->rmap[gfn - slot->base_gfn];
347}
348
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349/*
350 * Reverse mapping data structures:
351 *
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352 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
353 * that points to page_address(page).
cd4a4e53 354 *
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355 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
356 * containing more mappings.
cd4a4e53 357 */
290fc38d 358static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 359{
290fc38d 360 struct kvm_mmu_page *page;
cd4a4e53 361 struct kvm_rmap_desc *desc;
290fc38d 362 unsigned long *rmapp;
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363 int i;
364
365 if (!is_rmap_pte(*spte))
366 return;
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367 gfn = unalias_gfn(vcpu->kvm, gfn);
368 page = page_header(__pa(spte));
369 page->gfns[spte - page->spt] = gfn;
370 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
371 if (!*rmapp) {
cd4a4e53 372 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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373 *rmapp = (unsigned long)spte;
374 } else if (!(*rmapp & 1)) {
cd4a4e53 375 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 376 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 377 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 378 desc->shadow_ptes[1] = spte;
290fc38d 379 *rmapp = (unsigned long)desc | 1;
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380 } else {
381 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 382 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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383 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
384 desc = desc->more;
385 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 386 desc->more = mmu_alloc_rmap_desc(vcpu);
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387 desc = desc->more;
388 }
389 for (i = 0; desc->shadow_ptes[i]; ++i)
390 ;
391 desc->shadow_ptes[i] = spte;
392 }
393}
394
290fc38d 395static void rmap_desc_remove_entry(unsigned long *rmapp,
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396 struct kvm_rmap_desc *desc,
397 int i,
398 struct kvm_rmap_desc *prev_desc)
399{
400 int j;
401
402 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
403 ;
404 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 405 desc->shadow_ptes[j] = NULL;
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406 if (j != 0)
407 return;
408 if (!prev_desc && !desc->more)
290fc38d 409 *rmapp = (unsigned long)desc->shadow_ptes[0];
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410 else
411 if (prev_desc)
412 prev_desc->more = desc->more;
413 else
290fc38d 414 *rmapp = (unsigned long)desc->more | 1;
90cb0529 415 mmu_free_rmap_desc(desc);
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416}
417
290fc38d 418static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 419{
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420 struct kvm_rmap_desc *desc;
421 struct kvm_rmap_desc *prev_desc;
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422 struct kvm_mmu_page *page;
423 unsigned long *rmapp;
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424 int i;
425
426 if (!is_rmap_pte(*spte))
427 return;
290fc38d 428 page = page_header(__pa(spte));
8a7ae055
IE
429 kvm_release_page(pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >>
430 PAGE_SHIFT));
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431 rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
432 if (!*rmapp) {
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433 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
434 BUG();
290fc38d 435 } else if (!(*rmapp & 1)) {
cd4a4e53 436 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 437 if ((u64 *)*rmapp != spte) {
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438 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
439 spte, *spte);
440 BUG();
441 }
290fc38d 442 *rmapp = 0;
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443 } else {
444 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 445 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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446 prev_desc = NULL;
447 while (desc) {
448 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
449 if (desc->shadow_ptes[i] == spte) {
290fc38d 450 rmap_desc_remove_entry(rmapp,
714b93da 451 desc, i,
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452 prev_desc);
453 return;
454 }
455 prev_desc = desc;
456 desc = desc->more;
457 }
458 BUG();
459 }
460}
461
98348e95 462static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 463{
374cbac0 464 struct kvm_rmap_desc *desc;
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IE
465 struct kvm_rmap_desc *prev_desc;
466 u64 *prev_spte;
467 int i;
468
469 if (!*rmapp)
470 return NULL;
471 else if (!(*rmapp & 1)) {
472 if (!spte)
473 return (u64 *)*rmapp;
474 return NULL;
475 }
476 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
477 prev_desc = NULL;
478 prev_spte = NULL;
479 while (desc) {
480 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
481 if (prev_spte == spte)
482 return desc->shadow_ptes[i];
483 prev_spte = desc->shadow_ptes[i];
484 }
485 desc = desc->more;
486 }
487 return NULL;
488}
489
490static void rmap_write_protect(struct kvm *kvm, u64 gfn)
491{
290fc38d 492 unsigned long *rmapp;
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493 u64 *spte;
494
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495 gfn = unalias_gfn(kvm, gfn);
496 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 497
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498 spte = rmap_next(kvm, rmapp, NULL);
499 while (spte) {
374cbac0 500 BUG_ON(!spte);
374cbac0 501 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 502 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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503 if (is_writeble_pte(*spte))
504 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
4a4c9924 505 kvm_flush_remote_tlbs(kvm);
9647c14c 506 spte = rmap_next(kvm, rmapp, spte);
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507 }
508}
509
d6c69ee9 510#ifdef MMU_DEBUG
47ad8e68 511static int is_empty_shadow_page(u64 *spt)
6aa8b732 512{
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513 u64 *pos;
514 u64 *end;
515
47ad8e68 516 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 517 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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518 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
519 pos, *pos);
6aa8b732 520 return 0;
139bdb2d 521 }
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522 return 1;
523}
d6c69ee9 524#endif
6aa8b732 525
90cb0529 526static void kvm_mmu_free_page(struct kvm *kvm,
4b02d6da 527 struct kvm_mmu_page *page_head)
260746c0 528{
47ad8e68 529 ASSERT(is_empty_shadow_page(page_head->spt));
d3d25b04 530 list_del(&page_head->link);
c1158e63 531 __free_page(virt_to_page(page_head->spt));
290fc38d 532 __free_page(virt_to_page(page_head->gfns));
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533 kfree(page_head);
534 ++kvm->n_free_mmu_pages;
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535}
536
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537static unsigned kvm_page_table_hashfn(gfn_t gfn)
538{
539 return gfn;
540}
541
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542static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
543 u64 *parent_pte)
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544{
545 struct kvm_mmu_page *page;
546
d3d25b04 547 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 548 return NULL;
6aa8b732 549
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550 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
551 sizeof *page);
552 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
290fc38d 553 page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
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554 set_page_private(virt_to_page(page->spt), (unsigned long)page);
555 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
47ad8e68 556 ASSERT(is_empty_shadow_page(page->spt));
6aa8b732 557 page->slot_bitmap = 0;
cea0f0e7 558 page->multimapped = 0;
6aa8b732 559 page->parent_pte = parent_pte;
ebeace86 560 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 561 return page;
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562}
563
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564static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
565 struct kvm_mmu_page *page, u64 *parent_pte)
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566{
567 struct kvm_pte_chain *pte_chain;
568 struct hlist_node *node;
569 int i;
570
571 if (!parent_pte)
572 return;
573 if (!page->multimapped) {
574 u64 *old = page->parent_pte;
575
576 if (!old) {
577 page->parent_pte = parent_pte;
578 return;
579 }
580 page->multimapped = 1;
714b93da 581 pte_chain = mmu_alloc_pte_chain(vcpu);
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582 INIT_HLIST_HEAD(&page->parent_ptes);
583 hlist_add_head(&pte_chain->link, &page->parent_ptes);
584 pte_chain->parent_ptes[0] = old;
585 }
586 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
587 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
588 continue;
589 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
590 if (!pte_chain->parent_ptes[i]) {
591 pte_chain->parent_ptes[i] = parent_pte;
592 return;
593 }
594 }
714b93da 595 pte_chain = mmu_alloc_pte_chain(vcpu);
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596 BUG_ON(!pte_chain);
597 hlist_add_head(&pte_chain->link, &page->parent_ptes);
598 pte_chain->parent_ptes[0] = parent_pte;
599}
600
90cb0529 601static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
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602 u64 *parent_pte)
603{
604 struct kvm_pte_chain *pte_chain;
605 struct hlist_node *node;
606 int i;
607
608 if (!page->multimapped) {
609 BUG_ON(page->parent_pte != parent_pte);
610 page->parent_pte = NULL;
611 return;
612 }
613 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
614 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
615 if (!pte_chain->parent_ptes[i])
616 break;
617 if (pte_chain->parent_ptes[i] != parent_pte)
618 continue;
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619 while (i + 1 < NR_PTE_CHAIN_ENTRIES
620 && pte_chain->parent_ptes[i + 1]) {
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621 pte_chain->parent_ptes[i]
622 = pte_chain->parent_ptes[i + 1];
623 ++i;
624 }
625 pte_chain->parent_ptes[i] = NULL;
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626 if (i == 0) {
627 hlist_del(&pte_chain->link);
90cb0529 628 mmu_free_pte_chain(pte_chain);
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629 if (hlist_empty(&page->parent_ptes)) {
630 page->multimapped = 0;
631 page->parent_pte = NULL;
632 }
633 }
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634 return;
635 }
636 BUG();
637}
638
f67a46f4 639static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
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640 gfn_t gfn)
641{
642 unsigned index;
643 struct hlist_head *bucket;
644 struct kvm_mmu_page *page;
645 struct hlist_node *node;
646
647 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
648 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 649 bucket = &kvm->mmu_page_hash[index];
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650 hlist_for_each_entry(page, node, bucket, hash_link)
651 if (page->gfn == gfn && !page->role.metaphysical) {
652 pgprintk("%s: found role %x\n",
653 __FUNCTION__, page->role.word);
654 return page;
655 }
656 return NULL;
657}
658
659static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
660 gfn_t gfn,
661 gva_t gaddr,
662 unsigned level,
663 int metaphysical,
d28c6cfb 664 unsigned hugepage_access,
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665 u64 *parent_pte)
666{
667 union kvm_mmu_page_role role;
668 unsigned index;
669 unsigned quadrant;
670 struct hlist_head *bucket;
671 struct kvm_mmu_page *page;
672 struct hlist_node *node;
673
674 role.word = 0;
675 role.glevels = vcpu->mmu.root_level;
676 role.level = level;
677 role.metaphysical = metaphysical;
d28c6cfb 678 role.hugepage_access = hugepage_access;
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679 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
680 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
681 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
682 role.quadrant = quadrant;
683 }
684 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
685 gfn, role.word);
686 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
687 bucket = &vcpu->kvm->mmu_page_hash[index];
688 hlist_for_each_entry(page, node, bucket, hash_link)
689 if (page->gfn == gfn && page->role.word == role.word) {
714b93da 690 mmu_page_add_parent_pte(vcpu, page, parent_pte);
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691 pgprintk("%s: found\n", __FUNCTION__);
692 return page;
693 }
694 page = kvm_mmu_alloc_page(vcpu, parent_pte);
695 if (!page)
696 return page;
697 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
698 page->gfn = gfn;
699 page->role = role;
700 hlist_add_head(&page->hash_link, bucket);
c7addb90 701 vcpu->mmu.prefetch_page(vcpu, page);
374cbac0 702 if (!metaphysical)
4a4c9924 703 rmap_write_protect(vcpu->kvm, gfn);
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704 return page;
705}
706
90cb0529 707static void kvm_mmu_page_unlink_children(struct kvm *kvm,
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708 struct kvm_mmu_page *page)
709{
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710 unsigned i;
711 u64 *pt;
712 u64 ent;
713
47ad8e68 714 pt = page->spt;
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715
716 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
717 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 718 if (is_shadow_present_pte(pt[i]))
290fc38d 719 rmap_remove(kvm, &pt[i]);
c7addb90 720 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 721 }
90cb0529 722 kvm_flush_remote_tlbs(kvm);
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723 return;
724 }
725
726 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
727 ent = pt[i];
728
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729 pt[i] = shadow_trap_nonpresent_pte;
730 if (!is_shadow_present_pte(ent))
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731 continue;
732 ent &= PT64_BASE_ADDR_MASK;
90cb0529 733 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 734 }
90cb0529 735 kvm_flush_remote_tlbs(kvm);
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736}
737
90cb0529 738static void kvm_mmu_put_page(struct kvm_mmu_page *page,
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739 u64 *parent_pte)
740{
90cb0529 741 mmu_page_remove_parent_pte(page, parent_pte);
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742}
743
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744static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
745{
746 int i;
747
748 for (i = 0; i < KVM_MAX_VCPUS; ++i)
749 if (kvm->vcpus[i])
750 kvm->vcpus[i]->last_pte_updated = NULL;
751}
752
90cb0529 753static void kvm_mmu_zap_page(struct kvm *kvm,
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754 struct kvm_mmu_page *page)
755{
756 u64 *parent_pte;
757
4cee5764 758 ++kvm->stat.mmu_shadow_zapped;
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759 while (page->multimapped || page->parent_pte) {
760 if (!page->multimapped)
761 parent_pte = page->parent_pte;
762 else {
763 struct kvm_pte_chain *chain;
764
765 chain = container_of(page->parent_ptes.first,
766 struct kvm_pte_chain, link);
767 parent_pte = chain->parent_ptes[0];
768 }
697fe2e2 769 BUG_ON(!parent_pte);
90cb0529 770 kvm_mmu_put_page(page, parent_pte);
c7addb90 771 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 772 }
90cb0529 773 kvm_mmu_page_unlink_children(kvm, page);
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774 if (!page->root_count) {
775 hlist_del(&page->hash_link);
90cb0529 776 kvm_mmu_free_page(kvm, page);
36868f7b 777 } else
90cb0529 778 list_move(&page->link, &kvm->active_mmu_pages);
12b7d28f 779 kvm_mmu_reset_last_pte_updated(kvm);
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780}
781
82ce2c96
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782/*
783 * Changing the number of mmu pages allocated to the vm
784 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
785 */
786void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
787{
788 /*
789 * If we set the number of mmu pages to be smaller be than the
790 * number of actived pages , we must to free some mmu pages before we
791 * change the value
792 */
793
794 if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
795 kvm_nr_mmu_pages) {
796 int n_used_mmu_pages = kvm->n_alloc_mmu_pages
797 - kvm->n_free_mmu_pages;
798
799 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
800 struct kvm_mmu_page *page;
801
802 page = container_of(kvm->active_mmu_pages.prev,
803 struct kvm_mmu_page, link);
804 kvm_mmu_zap_page(kvm, page);
805 n_used_mmu_pages--;
806 }
807 kvm->n_free_mmu_pages = 0;
808 }
809 else
810 kvm->n_free_mmu_pages += kvm_nr_mmu_pages
811 - kvm->n_alloc_mmu_pages;
812
813 kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
814}
815
f67a46f4 816static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
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817{
818 unsigned index;
819 struct hlist_head *bucket;
820 struct kvm_mmu_page *page;
821 struct hlist_node *node, *n;
822 int r;
823
824 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
825 r = 0;
826 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 827 bucket = &kvm->mmu_page_hash[index];
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828 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
829 if (page->gfn == gfn && !page->role.metaphysical) {
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830 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
831 page->role.word);
f67a46f4 832 kvm_mmu_zap_page(kvm, page);
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833 r = 1;
834 }
835 return r;
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836}
837
f67a46f4 838static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
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839{
840 struct kvm_mmu_page *page;
841
f67a46f4 842 while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
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843 pgprintk("%s: zap %lx %x\n",
844 __FUNCTION__, gfn, page->role.word);
f67a46f4 845 kvm_mmu_zap_page(kvm, page);
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846 }
847}
848
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849static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
850{
851 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
852 struct kvm_mmu_page *page_head = page_header(__pa(pte));
853
854 __set_bit(slot, &page_head->slot_bitmap);
855}
856
4a4c9924 857hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
6aa8b732 858{
6aa8b732 859 struct page *page;
cea7bb21 860 hpa_t hpa;
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861
862 ASSERT((gpa & HPA_ERR_MASK) == 0);
4a4c9924 863 page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
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864 hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
865 if (is_error_page(page))
866 return hpa | HPA_ERR_MASK;
867 return hpa;
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868}
869
870hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
871{
872 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
873
874 if (gpa == UNMAPPED_GVA)
875 return UNMAPPED_GVA;
4a4c9924 876 return gpa_to_hpa(vcpu->kvm, gpa);
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877}
878
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879struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
880{
881 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
882
883 if (gpa == UNMAPPED_GVA)
884 return NULL;
4a4c9924 885 return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
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886}
887
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888static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
889{
890}
891
892static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
893{
894 int level = PT32E_ROOT_LEVEL;
895 hpa_t table_addr = vcpu->mmu.root_hpa;
896
897 for (; ; level--) {
898 u32 index = PT64_INDEX(v, level);
899 u64 *table;
cea0f0e7 900 u64 pte;
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901
902 ASSERT(VALID_PAGE(table_addr));
903 table = __va(table_addr);
904
905 if (level == 1) {
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906 int was_rmapped;
907
cea0f0e7 908 pte = table[index];
9647c14c 909 was_rmapped = is_rmap_pte(pte);
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IE
910 if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
911 kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
cea0f0e7 912 return 0;
2065b372 913 }
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914 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
915 page_header_update_slot(vcpu->kvm, table, v);
916 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
917 PT_USER_MASK;
9647c14c
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918 if (!was_rmapped)
919 rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
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920 else
921 kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
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922 return 0;
923 }
924
c7addb90 925 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 926 struct kvm_mmu_page *new_table;
cea0f0e7 927 gfn_t pseudo_gfn;
6aa8b732 928
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929 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
930 >> PAGE_SHIFT;
931 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
932 v, level - 1,
6bfccdc9 933 1, 3, &table[index]);
25c0de2c 934 if (!new_table) {
6aa8b732 935 pgprintk("nonpaging_map: ENOMEM\n");
8a7ae055 936 kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
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937 return -ENOMEM;
938 }
939
47ad8e68 940 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 941 | PT_WRITABLE_MASK | PT_USER_MASK;
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942 }
943 table_addr = table[index] & PT64_BASE_ADDR_MASK;
944 }
945}
946
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947static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
948 struct kvm_mmu_page *sp)
949{
950 int i;
951
952 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
953 sp->spt[i] = shadow_trap_nonpresent_pte;
954}
955
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956static void mmu_free_roots(struct kvm_vcpu *vcpu)
957{
958 int i;
3bb65a22 959 struct kvm_mmu_page *page;
17ac10ad 960
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961 if (!VALID_PAGE(vcpu->mmu.root_hpa))
962 return;
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963#ifdef CONFIG_X86_64
964 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
965 hpa_t root = vcpu->mmu.root_hpa;
966
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967 page = page_header(root);
968 --page->root_count;
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969 vcpu->mmu.root_hpa = INVALID_PAGE;
970 return;
971 }
972#endif
973 for (i = 0; i < 4; ++i) {
974 hpa_t root = vcpu->mmu.pae_root[i];
975
417726a3 976 if (root) {
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977 root &= PT64_BASE_ADDR_MASK;
978 page = page_header(root);
979 --page->root_count;
980 }
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981 vcpu->mmu.pae_root[i] = INVALID_PAGE;
982 }
983 vcpu->mmu.root_hpa = INVALID_PAGE;
984}
985
986static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
987{
988 int i;
cea0f0e7 989 gfn_t root_gfn;
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990 struct kvm_mmu_page *page;
991
cea0f0e7 992 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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993
994#ifdef CONFIG_X86_64
995 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
996 hpa_t root = vcpu->mmu.root_hpa;
997
998 ASSERT(!VALID_PAGE(root));
68a99f6d 999 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
d28c6cfb 1000 PT64_ROOT_LEVEL, 0, 0, NULL);
47ad8e68 1001 root = __pa(page->spt);
3bb65a22 1002 ++page->root_count;
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1003 vcpu->mmu.root_hpa = root;
1004 return;
1005 }
1006#endif
1007 for (i = 0; i < 4; ++i) {
1008 hpa_t root = vcpu->mmu.pae_root[i];
1009
1010 ASSERT(!VALID_PAGE(root));
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1011 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
1012 if (!is_present_pte(vcpu->pdptrs[i])) {
1013 vcpu->mmu.pae_root[i] = 0;
1014 continue;
1015 }
cea0f0e7 1016 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 1017 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 1018 root_gfn = 0;
68a99f6d 1019 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
cea0f0e7 1020 PT32_ROOT_LEVEL, !is_paging(vcpu),
d28c6cfb 1021 0, NULL);
47ad8e68 1022 root = __pa(page->spt);
3bb65a22 1023 ++page->root_count;
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1024 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
1025 }
1026 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
1027}
1028
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1029static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1030{
1031 return vaddr;
1032}
1033
1034static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1035 u32 error_code)
1036{
6aa8b732 1037 gpa_t addr = gva;
ebeace86 1038 hpa_t paddr;
e2dec939 1039 int r;
6aa8b732 1040
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1041 r = mmu_topup_memory_caches(vcpu);
1042 if (r)
1043 return r;
714b93da 1044
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1045 ASSERT(vcpu);
1046 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
1047
6aa8b732 1048
4a4c9924 1049 paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
6aa8b732 1050
8a7ae055
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1051 if (is_error_hpa(paddr)) {
1052 kvm_release_page(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
1053 >> PAGE_SHIFT));
ebeace86 1054 return 1;
8a7ae055 1055 }
6aa8b732 1056
ebeace86 1057 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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1058}
1059
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1060static void nonpaging_free(struct kvm_vcpu *vcpu)
1061{
17ac10ad 1062 mmu_free_roots(vcpu);
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1063}
1064
1065static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1066{
1067 struct kvm_mmu *context = &vcpu->mmu;
1068
1069 context->new_cr3 = nonpaging_new_cr3;
1070 context->page_fault = nonpaging_page_fault;
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1071 context->gva_to_gpa = nonpaging_gva_to_gpa;
1072 context->free = nonpaging_free;
c7addb90 1073 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1074 context->root_level = 0;
6aa8b732 1075 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1076 context->root_hpa = INVALID_PAGE;
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1077 return 0;
1078}
1079
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1080static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1081{
1165f5fe 1082 ++vcpu->stat.tlb_flush;
cbdd1bea 1083 kvm_x86_ops->tlb_flush(vcpu);
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1084}
1085
1086static void paging_new_cr3(struct kvm_vcpu *vcpu)
1087{
374cbac0 1088 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1089 mmu_free_roots(vcpu);
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1090}
1091
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1092static void inject_page_fault(struct kvm_vcpu *vcpu,
1093 u64 addr,
1094 u32 err_code)
1095{
cbdd1bea 1096 kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1097}
1098
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1099static void paging_free(struct kvm_vcpu *vcpu)
1100{
1101 nonpaging_free(vcpu);
1102}
1103
1104#define PTTYPE 64
1105#include "paging_tmpl.h"
1106#undef PTTYPE
1107
1108#define PTTYPE 32
1109#include "paging_tmpl.h"
1110#undef PTTYPE
1111
17ac10ad 1112static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732
AK
1113{
1114 struct kvm_mmu *context = &vcpu->mmu;
1115
1116 ASSERT(is_pae(vcpu));
1117 context->new_cr3 = paging_new_cr3;
1118 context->page_fault = paging64_page_fault;
6aa8b732 1119 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1120 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1121 context->free = paging_free;
17ac10ad
AK
1122 context->root_level = level;
1123 context->shadow_root_level = level;
17c3ba9d 1124 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1125 return 0;
1126}
1127
17ac10ad
AK
1128static int paging64_init_context(struct kvm_vcpu *vcpu)
1129{
1130 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1131}
1132
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1133static int paging32_init_context(struct kvm_vcpu *vcpu)
1134{
1135 struct kvm_mmu *context = &vcpu->mmu;
1136
1137 context->new_cr3 = paging_new_cr3;
1138 context->page_fault = paging32_page_fault;
6aa8b732
AK
1139 context->gva_to_gpa = paging32_gva_to_gpa;
1140 context->free = paging_free;
c7addb90 1141 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1142 context->root_level = PT32_ROOT_LEVEL;
1143 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1144 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1145 return 0;
1146}
1147
1148static int paging32E_init_context(struct kvm_vcpu *vcpu)
1149{
17ac10ad 1150 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1151}
1152
1153static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1154{
1155 ASSERT(vcpu);
1156 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1157
1158 if (!is_paging(vcpu))
1159 return nonpaging_init_context(vcpu);
a9058ecd 1160 else if (is_long_mode(vcpu))
6aa8b732
AK
1161 return paging64_init_context(vcpu);
1162 else if (is_pae(vcpu))
1163 return paging32E_init_context(vcpu);
1164 else
1165 return paging32_init_context(vcpu);
1166}
1167
1168static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1169{
1170 ASSERT(vcpu);
1171 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1172 vcpu->mmu.free(vcpu);
1173 vcpu->mmu.root_hpa = INVALID_PAGE;
1174 }
1175}
1176
1177int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1178{
1179 destroy_kvm_mmu(vcpu);
1180 return init_kvm_mmu(vcpu);
1181}
8668a3c4 1182EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1183
1184int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1185{
714b93da
AK
1186 int r;
1187
11ec2804 1188 mutex_lock(&vcpu->kvm->lock);
e2dec939 1189 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1190 if (r)
1191 goto out;
1192 mmu_alloc_roots(vcpu);
cbdd1bea 1193 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1194 kvm_mmu_flush_tlb(vcpu);
714b93da 1195out:
11ec2804 1196 mutex_unlock(&vcpu->kvm->lock);
714b93da 1197 return r;
6aa8b732 1198}
17c3ba9d
AK
1199EXPORT_SYMBOL_GPL(kvm_mmu_load);
1200
1201void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1202{
1203 mmu_free_roots(vcpu);
1204}
6aa8b732 1205
09072daf 1206static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
ac1b714e
AK
1207 struct kvm_mmu_page *page,
1208 u64 *spte)
1209{
1210 u64 pte;
1211 struct kvm_mmu_page *child;
1212
1213 pte = *spte;
c7addb90 1214 if (is_shadow_present_pte(pte)) {
ac1b714e 1215 if (page->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1216 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1217 else {
1218 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1219 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1220 }
1221 }
c7addb90 1222 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
d9e368d6 1223 kvm_flush_remote_tlbs(vcpu->kvm);
ac1b714e
AK
1224}
1225
0028425f
AK
1226static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1227 struct kvm_mmu_page *page,
1228 u64 *spte,
c7addb90
AK
1229 const void *new, int bytes,
1230 int offset_in_pte)
0028425f 1231{
4cee5764
AK
1232 if (page->role.level != PT_PAGE_TABLE_LEVEL) {
1233 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1234 return;
4cee5764 1235 }
0028425f 1236
4cee5764 1237 ++vcpu->kvm->stat.mmu_pte_updated;
0028425f 1238 if (page->role.glevels == PT32_ROOT_LEVEL)
c7addb90
AK
1239 paging32_update_pte(vcpu, page, spte, new, bytes,
1240 offset_in_pte);
0028425f 1241 else
c7addb90
AK
1242 paging64_update_pte(vcpu, page, spte, new, bytes,
1243 offset_in_pte);
0028425f
AK
1244}
1245
12b7d28f
AK
1246static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1247{
1248 u64 *spte = vcpu->last_pte_updated;
1249
1250 return !!(spte && (*spte & PT_ACCESSED_MASK));
1251}
1252
09072daf 1253void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1254 const u8 *new, int bytes)
da4a00f0 1255{
9b7a0325
AK
1256 gfn_t gfn = gpa >> PAGE_SHIFT;
1257 struct kvm_mmu_page *page;
0e7bc4b9 1258 struct hlist_node *node, *n;
9b7a0325
AK
1259 struct hlist_head *bucket;
1260 unsigned index;
1261 u64 *spte;
9b7a0325 1262 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1263 unsigned pte_size;
9b7a0325 1264 unsigned page_offset;
0e7bc4b9 1265 unsigned misaligned;
fce0657f 1266 unsigned quadrant;
9b7a0325 1267 int level;
86a5ba02 1268 int flooded = 0;
ac1b714e 1269 int npte;
9b7a0325 1270
da4a00f0 1271 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
4cee5764 1272 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1273 kvm_mmu_audit(vcpu, "pre pte write");
12b7d28f
AK
1274 if (gfn == vcpu->last_pt_write_gfn
1275 && !last_updated_pte_accessed(vcpu)) {
86a5ba02
AK
1276 ++vcpu->last_pt_write_count;
1277 if (vcpu->last_pt_write_count >= 3)
1278 flooded = 1;
1279 } else {
1280 vcpu->last_pt_write_gfn = gfn;
1281 vcpu->last_pt_write_count = 1;
12b7d28f 1282 vcpu->last_pte_updated = NULL;
86a5ba02 1283 }
9b7a0325
AK
1284 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1285 bucket = &vcpu->kvm->mmu_page_hash[index];
0e7bc4b9 1286 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
9b7a0325
AK
1287 if (page->gfn != gfn || page->role.metaphysical)
1288 continue;
0e7bc4b9
AK
1289 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1290 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1291 misaligned |= bytes < 4;
86a5ba02 1292 if (misaligned || flooded) {
0e7bc4b9
AK
1293 /*
1294 * Misaligned accesses are too much trouble to fix
1295 * up; also, they usually indicate a page is not used
1296 * as a page table.
86a5ba02
AK
1297 *
1298 * If we're seeing too many writes to a page,
1299 * it may no longer be a page table, or we may be
1300 * forking, in which case it is better to unmap the
1301 * page.
0e7bc4b9
AK
1302 */
1303 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1304 gpa, bytes, page->role.word);
90cb0529 1305 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1306 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1307 continue;
1308 }
9b7a0325
AK
1309 page_offset = offset;
1310 level = page->role.level;
ac1b714e 1311 npte = 1;
9b7a0325 1312 if (page->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1313 page_offset <<= 1; /* 32->64 */
1314 /*
1315 * A 32-bit pde maps 4MB while the shadow pdes map
1316 * only 2MB. So we need to double the offset again
1317 * and zap two pdes instead of one.
1318 */
1319 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1320 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1321 page_offset <<= 1;
1322 npte = 2;
1323 }
fce0657f 1324 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1325 page_offset &= ~PAGE_MASK;
fce0657f
AK
1326 if (quadrant != page->role.quadrant)
1327 continue;
9b7a0325 1328 }
47ad8e68 1329 spte = &page->spt[page_offset / sizeof(*spte)];
ac1b714e 1330 while (npte--) {
09072daf 1331 mmu_pte_write_zap_pte(vcpu, page, spte);
c7addb90
AK
1332 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
1333 page_offset & (pte_size - 1));
ac1b714e 1334 ++spte;
9b7a0325 1335 }
9b7a0325 1336 }
c7addb90 1337 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1338}
1339
a436036b
AK
1340int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1341{
1342 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1343
f67a46f4 1344 return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
a436036b
AK
1345}
1346
22d95b12 1347void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1348{
1349 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1350 struct kvm_mmu_page *page;
1351
1352 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1353 struct kvm_mmu_page, link);
90cb0529 1354 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1355 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1356 }
1357}
ebeace86 1358
3067714c
AK
1359int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1360{
1361 int r;
1362 enum emulation_result er;
1363
1364 mutex_lock(&vcpu->kvm->lock);
1365 r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
1366 if (r < 0)
1367 goto out;
1368
1369 if (!r) {
1370 r = 1;
1371 goto out;
1372 }
1373
b733bfb5
AK
1374 r = mmu_topup_memory_caches(vcpu);
1375 if (r)
1376 goto out;
1377
3067714c
AK
1378 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1379 mutex_unlock(&vcpu->kvm->lock);
1380
1381 switch (er) {
1382 case EMULATE_DONE:
1383 return 1;
1384 case EMULATE_DO_MMIO:
1385 ++vcpu->stat.mmio_exits;
1386 return 0;
1387 case EMULATE_FAIL:
1388 kvm_report_emulation_failure(vcpu, "pagetable");
1389 return 1;
1390 default:
1391 BUG();
1392 }
1393out:
1394 mutex_unlock(&vcpu->kvm->lock);
1395 return r;
1396}
1397EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1398
6aa8b732
AK
1399static void free_mmu_pages(struct kvm_vcpu *vcpu)
1400{
f51234c2 1401 struct kvm_mmu_page *page;
6aa8b732 1402
f51234c2
AK
1403 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1404 page = container_of(vcpu->kvm->active_mmu_pages.next,
1405 struct kvm_mmu_page, link);
90cb0529 1406 kvm_mmu_zap_page(vcpu->kvm, page);
f51234c2 1407 }
17ac10ad 1408 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1409}
1410
1411static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1412{
17ac10ad 1413 struct page *page;
6aa8b732
AK
1414 int i;
1415
1416 ASSERT(vcpu);
1417
82ce2c96
IE
1418 if (vcpu->kvm->n_requested_mmu_pages)
1419 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
1420 else
1421 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
17ac10ad
AK
1422 /*
1423 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1424 * Therefore we need to allocate shadow page tables in the first
1425 * 4GB of memory, which happens to fit the DMA32 zone.
1426 */
1427 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1428 if (!page)
1429 goto error_1;
1430 vcpu->mmu.pae_root = page_address(page);
1431 for (i = 0; i < 4; ++i)
1432 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1433
6aa8b732
AK
1434 return 0;
1435
1436error_1:
1437 free_mmu_pages(vcpu);
1438 return -ENOMEM;
1439}
1440
8018c27b 1441int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1442{
6aa8b732
AK
1443 ASSERT(vcpu);
1444 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1445
8018c27b
IM
1446 return alloc_mmu_pages(vcpu);
1447}
6aa8b732 1448
8018c27b
IM
1449int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1450{
1451 ASSERT(vcpu);
1452 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1453
8018c27b 1454 return init_kvm_mmu(vcpu);
6aa8b732
AK
1455}
1456
1457void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1458{
1459 ASSERT(vcpu);
1460
1461 destroy_kvm_mmu(vcpu);
1462 free_mmu_pages(vcpu);
714b93da 1463 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1464}
1465
90cb0529 1466void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732
AK
1467{
1468 struct kvm_mmu_page *page;
1469
1470 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1471 int i;
1472 u64 *pt;
1473
1474 if (!test_bit(slot, &page->slot_bitmap))
1475 continue;
1476
47ad8e68 1477 pt = page->spt;
6aa8b732
AK
1478 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1479 /* avoid RMW */
9647c14c 1480 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1481 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1482 }
1483}
37a7d8b0 1484
90cb0529 1485void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1486{
90cb0529 1487 struct kvm_mmu_page *page, *node;
e0fa826f 1488
90cb0529
AK
1489 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1490 kvm_mmu_zap_page(kvm, page);
e0fa826f 1491
90cb0529 1492 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1493}
1494
b5a33a75
AK
1495void kvm_mmu_module_exit(void)
1496{
1497 if (pte_chain_cache)
1498 kmem_cache_destroy(pte_chain_cache);
1499 if (rmap_desc_cache)
1500 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1501 if (mmu_page_header_cache)
1502 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1503}
1504
1505int kvm_mmu_module_init(void)
1506{
1507 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1508 sizeof(struct kvm_pte_chain),
20c2df83 1509 0, 0, NULL);
b5a33a75
AK
1510 if (!pte_chain_cache)
1511 goto nomem;
1512 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1513 sizeof(struct kvm_rmap_desc),
20c2df83 1514 0, 0, NULL);
b5a33a75
AK
1515 if (!rmap_desc_cache)
1516 goto nomem;
1517
d3d25b04
AK
1518 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1519 sizeof(struct kvm_mmu_page),
20c2df83 1520 0, 0, NULL);
d3d25b04
AK
1521 if (!mmu_page_header_cache)
1522 goto nomem;
1523
b5a33a75
AK
1524 return 0;
1525
1526nomem:
1527 kvm_mmu_module_exit();
1528 return -ENOMEM;
1529}
1530
37a7d8b0
AK
1531#ifdef AUDIT
1532
1533static const char *audit_msg;
1534
1535static gva_t canonicalize(gva_t gva)
1536{
1537#ifdef CONFIG_X86_64
1538 gva = (long long)(gva << 16) >> 16;
1539#endif
1540 return gva;
1541}
1542
1543static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1544 gva_t va, int level)
1545{
1546 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1547 int i;
1548 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1549
1550 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1551 u64 ent = pt[i];
1552
c7addb90 1553 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1554 continue;
1555
1556 va = canonicalize(va);
c7addb90
AK
1557 if (level > 1) {
1558 if (ent == shadow_notrap_nonpresent_pte)
1559 printk(KERN_ERR "audit: (%s) nontrapping pte"
1560 " in nonleaf level: levels %d gva %lx"
1561 " level %d pte %llx\n", audit_msg,
1562 vcpu->mmu.root_level, va, level, ent);
1563
37a7d8b0 1564 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1565 } else {
37a7d8b0
AK
1566 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1567 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
8a7ae055 1568 struct page *page;
37a7d8b0 1569
c7addb90 1570 if (is_shadow_present_pte(ent)
37a7d8b0 1571 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1572 printk(KERN_ERR "xx audit error: (%s) levels %d"
1573 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
37a7d8b0 1574 audit_msg, vcpu->mmu.root_level,
d77c26fc
MD
1575 va, gpa, hpa, ent,
1576 is_shadow_present_pte(ent));
c7addb90
AK
1577 else if (ent == shadow_notrap_nonpresent_pte
1578 && !is_error_hpa(hpa))
1579 printk(KERN_ERR "audit: (%s) notrap shadow,"
1580 " valid guest gva %lx\n", audit_msg, va);
8a7ae055
IE
1581 page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
1582 >> PAGE_SHIFT);
1583 kvm_release_page(page);
c7addb90 1584
37a7d8b0
AK
1585 }
1586 }
1587}
1588
1589static void audit_mappings(struct kvm_vcpu *vcpu)
1590{
1ea252af 1591 unsigned i;
37a7d8b0
AK
1592
1593 if (vcpu->mmu.root_level == 4)
1594 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1595 else
1596 for (i = 0; i < 4; ++i)
1597 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1598 audit_mappings_page(vcpu,
1599 vcpu->mmu.pae_root[i],
1600 i << 30,
1601 2);
1602}
1603
1604static int count_rmaps(struct kvm_vcpu *vcpu)
1605{
1606 int nmaps = 0;
1607 int i, j, k;
1608
1609 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1610 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1611 struct kvm_rmap_desc *d;
1612
1613 for (j = 0; j < m->npages; ++j) {
290fc38d 1614 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1615
290fc38d 1616 if (!*rmapp)
37a7d8b0 1617 continue;
290fc38d 1618 if (!(*rmapp & 1)) {
37a7d8b0
AK
1619 ++nmaps;
1620 continue;
1621 }
290fc38d 1622 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1623 while (d) {
1624 for (k = 0; k < RMAP_EXT; ++k)
1625 if (d->shadow_ptes[k])
1626 ++nmaps;
1627 else
1628 break;
1629 d = d->more;
1630 }
1631 }
1632 }
1633 return nmaps;
1634}
1635
1636static int count_writable_mappings(struct kvm_vcpu *vcpu)
1637{
1638 int nmaps = 0;
1639 struct kvm_mmu_page *page;
1640 int i;
1641
1642 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
47ad8e68 1643 u64 *pt = page->spt;
37a7d8b0
AK
1644
1645 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1646 continue;
1647
1648 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1649 u64 ent = pt[i];
1650
1651 if (!(ent & PT_PRESENT_MASK))
1652 continue;
1653 if (!(ent & PT_WRITABLE_MASK))
1654 continue;
1655 ++nmaps;
1656 }
1657 }
1658 return nmaps;
1659}
1660
1661static void audit_rmap(struct kvm_vcpu *vcpu)
1662{
1663 int n_rmap = count_rmaps(vcpu);
1664 int n_actual = count_writable_mappings(vcpu);
1665
1666 if (n_rmap != n_actual)
1667 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1668 __FUNCTION__, audit_msg, n_rmap, n_actual);
1669}
1670
1671static void audit_write_protection(struct kvm_vcpu *vcpu)
1672{
1673 struct kvm_mmu_page *page;
290fc38d
IE
1674 struct kvm_memory_slot *slot;
1675 unsigned long *rmapp;
1676 gfn_t gfn;
37a7d8b0
AK
1677
1678 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
37a7d8b0
AK
1679 if (page->role.metaphysical)
1680 continue;
1681
290fc38d
IE
1682 slot = gfn_to_memslot(vcpu->kvm, page->gfn);
1683 gfn = unalias_gfn(vcpu->kvm, page->gfn);
1684 rmapp = &slot->rmap[gfn - slot->base_gfn];
1685 if (*rmapp)
37a7d8b0
AK
1686 printk(KERN_ERR "%s: (%s) shadow page has writable"
1687 " mappings: gfn %lx role %x\n",
1688 __FUNCTION__, audit_msg, page->gfn,
1689 page->role.word);
1690 }
1691}
1692
1693static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1694{
1695 int olddbg = dbg;
1696
1697 dbg = 0;
1698 audit_msg = msg;
1699 audit_rmap(vcpu);
1700 audit_write_protection(vcpu);
1701 audit_mappings(vcpu);
1702 dbg = olddbg;
1703}
1704
1705#endif