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6aa8b732 AK |
1 | #ifndef __KVM_H |
2 | #define __KVM_H | |
3 | ||
4 | /* | |
5 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
6 | * the COPYING file in the top-level directory. | |
7 | */ | |
8 | ||
9 | #include <linux/types.h> | |
10 | #include <linux/list.h> | |
11 | #include <linux/mutex.h> | |
12 | #include <linux/spinlock.h> | |
13 | #include <linux/mm.h> | |
14 | ||
15 | #include "vmx.h" | |
16 | #include <linux/kvm.h> | |
17 | ||
18 | #define CR0_PE_MASK (1ULL << 0) | |
19 | #define CR0_TS_MASK (1ULL << 3) | |
20 | #define CR0_NE_MASK (1ULL << 5) | |
21 | #define CR0_WP_MASK (1ULL << 16) | |
22 | #define CR0_NW_MASK (1ULL << 29) | |
23 | #define CR0_CD_MASK (1ULL << 30) | |
24 | #define CR0_PG_MASK (1ULL << 31) | |
25 | ||
26 | #define CR3_WPT_MASK (1ULL << 3) | |
27 | #define CR3_PCD_MASK (1ULL << 4) | |
28 | ||
29 | #define CR3_RESEVED_BITS 0x07ULL | |
30 | #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL) | |
31 | #define CR3_FLAGS_MASK ((1ULL << 5) - 1) | |
32 | ||
33 | #define CR4_VME_MASK (1ULL << 0) | |
34 | #define CR4_PSE_MASK (1ULL << 4) | |
35 | #define CR4_PAE_MASK (1ULL << 5) | |
36 | #define CR4_PGE_MASK (1ULL << 7) | |
37 | #define CR4_VMXE_MASK (1ULL << 13) | |
38 | ||
39 | #define KVM_GUEST_CR0_MASK \ | |
40 | (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \ | |
41 | | CR0_NW_MASK | CR0_CD_MASK) | |
42 | #define KVM_VM_CR0_ALWAYS_ON \ | |
43 | (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK) | |
44 | #define KVM_GUEST_CR4_MASK \ | |
45 | (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK) | |
46 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK) | |
47 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK) | |
48 | ||
49 | #define INVALID_PAGE (~(hpa_t)0) | |
50 | #define UNMAPPED_GVA (~(gpa_t)0) | |
51 | ||
52 | #define KVM_MAX_VCPUS 1 | |
53 | #define KVM_MEMORY_SLOTS 4 | |
54 | #define KVM_NUM_MMU_PAGES 256 | |
55 | ||
56 | #define FX_IMAGE_SIZE 512 | |
57 | #define FX_IMAGE_ALIGN 16 | |
58 | #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN) | |
59 | ||
60 | #define DE_VECTOR 0 | |
61 | #define DF_VECTOR 8 | |
62 | #define TS_VECTOR 10 | |
63 | #define NP_VECTOR 11 | |
64 | #define SS_VECTOR 12 | |
65 | #define GP_VECTOR 13 | |
66 | #define PF_VECTOR 14 | |
67 | ||
68 | #define SELECTOR_TI_MASK (1 << 2) | |
69 | #define SELECTOR_RPL_MASK 0x03 | |
70 | ||
71 | #define IOPL_SHIFT 12 | |
72 | ||
73 | /* | |
74 | * Address types: | |
75 | * | |
76 | * gva - guest virtual address | |
77 | * gpa - guest physical address | |
78 | * gfn - guest frame number | |
79 | * hva - host virtual address | |
80 | * hpa - host physical address | |
81 | * hfn - host frame number | |
82 | */ | |
83 | ||
84 | typedef unsigned long gva_t; | |
85 | typedef u64 gpa_t; | |
86 | typedef unsigned long gfn_t; | |
87 | ||
88 | typedef unsigned long hva_t; | |
89 | typedef u64 hpa_t; | |
90 | typedef unsigned long hfn_t; | |
91 | ||
cea0f0e7 AK |
92 | #define NR_PTE_CHAIN_ENTRIES 5 |
93 | ||
94 | struct kvm_pte_chain { | |
95 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
96 | struct hlist_node link; | |
97 | }; | |
98 | ||
99 | /* | |
100 | * kvm_mmu_page_role, below, is defined as: | |
101 | * | |
102 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
103 | * bits 4:7 - page table level for this shadow (1-4) | |
104 | * bits 8:9 - page table quadrant for 2-level guests | |
105 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
106 | */ | |
107 | union kvm_mmu_page_role { | |
108 | unsigned word; | |
109 | struct { | |
110 | unsigned glevels : 4; | |
111 | unsigned level : 4; | |
112 | unsigned quadrant : 2; | |
113 | unsigned pad_for_nice_hex_output : 6; | |
114 | unsigned metaphysical : 1; | |
115 | }; | |
116 | }; | |
117 | ||
6aa8b732 AK |
118 | struct kvm_mmu_page { |
119 | struct list_head link; | |
cea0f0e7 AK |
120 | struct hlist_node hash_link; |
121 | ||
122 | /* | |
123 | * The following two entries are used to key the shadow page in the | |
124 | * hash table. | |
125 | */ | |
126 | gfn_t gfn; | |
127 | union kvm_mmu_page_role role; | |
128 | ||
6aa8b732 AK |
129 | hpa_t page_hpa; |
130 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
131 | * in this shadow page. | |
132 | */ | |
133 | int global; /* Set if all ptes in this page are global */ | |
cea0f0e7 AK |
134 | int multimapped; /* More than one parent_pte? */ |
135 | union { | |
136 | u64 *parent_pte; /* !multimapped */ | |
137 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
138 | }; | |
6aa8b732 AK |
139 | }; |
140 | ||
141 | struct vmcs { | |
142 | u32 revision_id; | |
143 | u32 abort; | |
144 | char data[0]; | |
145 | }; | |
146 | ||
147 | #define vmx_msr_entry kvm_msr_entry | |
148 | ||
149 | struct kvm_vcpu; | |
150 | ||
151 | /* | |
152 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
153 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
154 | * mode. | |
155 | */ | |
156 | struct kvm_mmu { | |
157 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
158 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
159 | void (*inval_page)(struct kvm_vcpu *vcpu, gva_t gva); | |
160 | void (*free)(struct kvm_vcpu *vcpu); | |
161 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
162 | hpa_t root_hpa; | |
163 | int root_level; | |
164 | int shadow_root_level; | |
17ac10ad AK |
165 | |
166 | u64 *pae_root; | |
6aa8b732 AK |
167 | }; |
168 | ||
169 | struct kvm_guest_debug { | |
170 | int enabled; | |
171 | unsigned long bp[4]; | |
172 | int singlestep; | |
173 | }; | |
174 | ||
175 | enum { | |
176 | VCPU_REGS_RAX = 0, | |
177 | VCPU_REGS_RCX = 1, | |
178 | VCPU_REGS_RDX = 2, | |
179 | VCPU_REGS_RBX = 3, | |
180 | VCPU_REGS_RSP = 4, | |
181 | VCPU_REGS_RBP = 5, | |
182 | VCPU_REGS_RSI = 6, | |
183 | VCPU_REGS_RDI = 7, | |
05b3e0c2 | 184 | #ifdef CONFIG_X86_64 |
6aa8b732 AK |
185 | VCPU_REGS_R8 = 8, |
186 | VCPU_REGS_R9 = 9, | |
187 | VCPU_REGS_R10 = 10, | |
188 | VCPU_REGS_R11 = 11, | |
189 | VCPU_REGS_R12 = 12, | |
190 | VCPU_REGS_R13 = 13, | |
191 | VCPU_REGS_R14 = 14, | |
192 | VCPU_REGS_R15 = 15, | |
193 | #endif | |
194 | NR_VCPU_REGS | |
195 | }; | |
196 | ||
197 | enum { | |
198 | VCPU_SREG_CS, | |
199 | VCPU_SREG_DS, | |
200 | VCPU_SREG_ES, | |
201 | VCPU_SREG_FS, | |
202 | VCPU_SREG_GS, | |
203 | VCPU_SREG_SS, | |
204 | VCPU_SREG_TR, | |
205 | VCPU_SREG_LDTR, | |
206 | }; | |
207 | ||
208 | struct kvm_vcpu { | |
209 | struct kvm *kvm; | |
210 | union { | |
211 | struct vmcs *vmcs; | |
212 | struct vcpu_svm *svm; | |
213 | }; | |
214 | struct mutex mutex; | |
215 | int cpu; | |
216 | int launched; | |
c1150d8c | 217 | int interrupt_window_open; |
6aa8b732 AK |
218 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ |
219 | #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long) | |
220 | unsigned long irq_pending[NR_IRQ_WORDS]; | |
221 | unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ | |
222 | unsigned long rip; /* needs vcpu_load_rsp_rip() */ | |
223 | ||
224 | unsigned long cr0; | |
225 | unsigned long cr2; | |
226 | unsigned long cr3; | |
227 | unsigned long cr4; | |
228 | unsigned long cr8; | |
1342d353 | 229 | u64 pdptrs[4]; /* pae */ |
6aa8b732 AK |
230 | u64 shadow_efer; |
231 | u64 apic_base; | |
232 | int nmsrs; | |
233 | struct vmx_msr_entry *guest_msrs; | |
234 | struct vmx_msr_entry *host_msrs; | |
235 | ||
236 | struct list_head free_pages; | |
237 | struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES]; | |
238 | struct kvm_mmu mmu; | |
239 | ||
240 | struct kvm_guest_debug guest_debug; | |
241 | ||
242 | char fx_buf[FX_BUF_SIZE]; | |
243 | char *host_fx_image; | |
244 | char *guest_fx_image; | |
245 | ||
246 | int mmio_needed; | |
247 | int mmio_read_completed; | |
248 | int mmio_is_write; | |
249 | int mmio_size; | |
250 | unsigned char mmio_data[8]; | |
251 | gpa_t mmio_phys_addr; | |
252 | ||
253 | struct { | |
254 | int active; | |
255 | u8 save_iopl; | |
256 | struct kvm_save_segment { | |
257 | u16 selector; | |
258 | unsigned long base; | |
259 | u32 limit; | |
260 | u32 ar; | |
261 | } tr, es, ds, fs, gs; | |
262 | } rmode; | |
263 | }; | |
264 | ||
265 | struct kvm_memory_slot { | |
266 | gfn_t base_gfn; | |
267 | unsigned long npages; | |
268 | unsigned long flags; | |
269 | struct page **phys_mem; | |
270 | unsigned long *dirty_bitmap; | |
271 | }; | |
272 | ||
273 | struct kvm { | |
274 | spinlock_t lock; /* protects everything except vcpus */ | |
275 | int nmemslots; | |
276 | struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS]; | |
cea0f0e7 AK |
277 | /* |
278 | * Hash table of struct kvm_mmu_page. | |
279 | */ | |
6aa8b732 | 280 | struct list_head active_mmu_pages; |
cea0f0e7 | 281 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; |
6aa8b732 AK |
282 | struct kvm_vcpu vcpus[KVM_MAX_VCPUS]; |
283 | int memory_config_version; | |
284 | int busy; | |
cd4a4e53 | 285 | unsigned long rmap_overflow; |
6aa8b732 AK |
286 | }; |
287 | ||
288 | struct kvm_stat { | |
289 | u32 pf_fixed; | |
290 | u32 pf_guest; | |
291 | u32 tlb_flush; | |
292 | u32 invlpg; | |
293 | ||
294 | u32 exits; | |
295 | u32 io_exits; | |
296 | u32 mmio_exits; | |
297 | u32 signal_exits; | |
c1150d8c DL |
298 | u32 irq_window_exits; |
299 | u32 halt_exits; | |
300 | u32 request_irq_exits; | |
6aa8b732 AK |
301 | u32 irq_exits; |
302 | }; | |
303 | ||
304 | struct descriptor_table { | |
305 | u16 limit; | |
306 | unsigned long base; | |
307 | } __attribute__((packed)); | |
308 | ||
309 | struct kvm_arch_ops { | |
310 | int (*cpu_has_kvm_support)(void); /* __init */ | |
311 | int (*disabled_by_bios)(void); /* __init */ | |
312 | void (*hardware_enable)(void *dummy); /* __init */ | |
313 | void (*hardware_disable)(void *dummy); | |
314 | int (*hardware_setup)(void); /* __init */ | |
315 | void (*hardware_unsetup)(void); /* __exit */ | |
316 | ||
317 | int (*vcpu_create)(struct kvm_vcpu *vcpu); | |
318 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
319 | ||
320 | struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu); | |
321 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
322 | ||
323 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
324 | struct kvm_debug_guest *dbg); | |
325 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
326 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
327 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
328 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
329 | struct kvm_segment *var, int seg); | |
330 | void (*set_segment)(struct kvm_vcpu *vcpu, | |
331 | struct kvm_segment *var, int seg); | |
6aa8b732 | 332 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); |
399badf3 | 333 | void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu); |
6aa8b732 AK |
334 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); |
335 | void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu, | |
336 | unsigned long cr0); | |
337 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
338 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
339 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
340 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
341 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
342 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
343 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
344 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
345 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
346 | int *exception); | |
347 | void (*cache_regs)(struct kvm_vcpu *vcpu); | |
348 | void (*decache_regs)(struct kvm_vcpu *vcpu); | |
349 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | |
350 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
351 | ||
352 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr); | |
353 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
354 | void (*inject_page_fault)(struct kvm_vcpu *vcpu, | |
355 | unsigned long addr, u32 err_code); | |
356 | ||
357 | void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code); | |
358 | ||
359 | int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); | |
360 | int (*vcpu_setup)(struct kvm_vcpu *vcpu); | |
361 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
362 | }; | |
363 | ||
364 | extern struct kvm_stat kvm_stat; | |
365 | extern struct kvm_arch_ops *kvm_arch_ops; | |
366 | ||
367 | #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt) | |
368 | #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt) | |
369 | ||
370 | int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module); | |
371 | void kvm_exit_arch(void); | |
372 | ||
373 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
8018c27b IM |
374 | int kvm_mmu_create(struct kvm_vcpu *vcpu); |
375 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
6aa8b732 AK |
376 | |
377 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
378 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
379 | ||
380 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa); | |
381 | #define HPA_MSB ((sizeof(hpa_t) * 8) - 1) | |
382 | #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB) | |
383 | static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; } | |
384 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva); | |
385 | ||
386 | void kvm_emulator_want_group7_invlpg(void); | |
387 | ||
388 | extern hpa_t bad_page_address; | |
389 | ||
390 | static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn) | |
391 | { | |
392 | return slot->phys_mem[gfn - slot->base_gfn]; | |
393 | } | |
394 | ||
395 | struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn); | |
396 | void mark_page_dirty(struct kvm *kvm, gfn_t gfn); | |
397 | ||
398 | enum emulation_result { | |
399 | EMULATE_DONE, /* no further processing */ | |
400 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
401 | EMULATE_FAIL, /* can't emulate this instruction */ | |
402 | }; | |
403 | ||
404 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, | |
405 | unsigned long cr2, u16 error_code); | |
406 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
407 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
408 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
409 | unsigned long *rflags); | |
410 | ||
411 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
412 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
413 | unsigned long *rflags); | |
414 | ||
415 | struct x86_emulate_ctxt; | |
416 | ||
417 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
418 | int emulate_clts(struct kvm_vcpu *vcpu); | |
419 | int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr, | |
420 | unsigned long *dest); | |
421 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
422 | unsigned long value); | |
423 | ||
424 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | |
425 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0); | |
426 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0); | |
427 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0); | |
428 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
429 | ||
3bab1f5d AK |
430 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); |
431 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
6aa8b732 AK |
432 | |
433 | void fx_init(struct kvm_vcpu *vcpu); | |
434 | ||
435 | void load_msrs(struct vmx_msr_entry *e, int n); | |
436 | void save_msrs(struct vmx_msr_entry *e, int n); | |
437 | void kvm_resched(struct kvm_vcpu *vcpu); | |
438 | ||
439 | int kvm_read_guest(struct kvm_vcpu *vcpu, | |
440 | gva_t addr, | |
441 | unsigned long size, | |
442 | void *dest); | |
443 | ||
444 | int kvm_write_guest(struct kvm_vcpu *vcpu, | |
445 | gva_t addr, | |
446 | unsigned long size, | |
447 | void *data); | |
448 | ||
449 | unsigned long segment_base(u16 selector); | |
450 | ||
da4a00f0 AK |
451 | void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes); |
452 | void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes); | |
a436036b | 453 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
da4a00f0 | 454 | |
6aa8b732 AK |
455 | static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn) |
456 | { | |
457 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
458 | return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL; | |
459 | } | |
460 | ||
a9058ecd AK |
461 | static inline int is_long_mode(struct kvm_vcpu *vcpu) |
462 | { | |
463 | #ifdef CONFIG_X86_64 | |
464 | return vcpu->shadow_efer & EFER_LME; | |
465 | #else | |
466 | return 0; | |
467 | #endif | |
468 | } | |
469 | ||
6aa8b732 AK |
470 | static inline int is_pae(struct kvm_vcpu *vcpu) |
471 | { | |
472 | return vcpu->cr4 & CR4_PAE_MASK; | |
473 | } | |
474 | ||
475 | static inline int is_pse(struct kvm_vcpu *vcpu) | |
476 | { | |
477 | return vcpu->cr4 & CR4_PSE_MASK; | |
478 | } | |
479 | ||
480 | static inline int is_paging(struct kvm_vcpu *vcpu) | |
481 | { | |
482 | return vcpu->cr0 & CR0_PG_MASK; | |
483 | } | |
484 | ||
485 | static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot) | |
486 | { | |
487 | return slot - kvm->memslots; | |
488 | } | |
489 | ||
490 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
491 | { | |
492 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
493 | ||
494 | return (struct kvm_mmu_page *)page->private; | |
495 | } | |
496 | ||
497 | static inline u16 read_fs(void) | |
498 | { | |
499 | u16 seg; | |
500 | asm ("mov %%fs, %0" : "=g"(seg)); | |
501 | return seg; | |
502 | } | |
503 | ||
504 | static inline u16 read_gs(void) | |
505 | { | |
506 | u16 seg; | |
507 | asm ("mov %%gs, %0" : "=g"(seg)); | |
508 | return seg; | |
509 | } | |
510 | ||
511 | static inline u16 read_ldt(void) | |
512 | { | |
513 | u16 ldt; | |
514 | asm ("sldt %0" : "=g"(ldt)); | |
515 | return ldt; | |
516 | } | |
517 | ||
518 | static inline void load_fs(u16 sel) | |
519 | { | |
520 | asm ("mov %0, %%fs" : : "rm"(sel)); | |
521 | } | |
522 | ||
523 | static inline void load_gs(u16 sel) | |
524 | { | |
525 | asm ("mov %0, %%gs" : : "rm"(sel)); | |
526 | } | |
527 | ||
528 | #ifndef load_ldt | |
529 | static inline void load_ldt(u16 sel) | |
530 | { | |
531 | asm ("lldt %0" : : "g"(sel)); | |
532 | } | |
533 | #endif | |
534 | ||
535 | static inline void get_idt(struct descriptor_table *table) | |
536 | { | |
537 | asm ("sidt %0" : "=m"(*table)); | |
538 | } | |
539 | ||
540 | static inline void get_gdt(struct descriptor_table *table) | |
541 | { | |
542 | asm ("sgdt %0" : "=m"(*table)); | |
543 | } | |
544 | ||
545 | static inline unsigned long read_tr_base(void) | |
546 | { | |
547 | u16 tr; | |
548 | asm ("str %0" : "=g"(tr)); | |
549 | return segment_base(tr); | |
550 | } | |
551 | ||
05b3e0c2 | 552 | #ifdef CONFIG_X86_64 |
6aa8b732 AK |
553 | static inline unsigned long read_msr(unsigned long msr) |
554 | { | |
555 | u64 value; | |
556 | ||
557 | rdmsrl(msr, value); | |
558 | return value; | |
559 | } | |
560 | #endif | |
561 | ||
562 | static inline void fx_save(void *image) | |
563 | { | |
564 | asm ("fxsave (%0)":: "r" (image)); | |
565 | } | |
566 | ||
567 | static inline void fx_restore(void *image) | |
568 | { | |
569 | asm ("fxrstor (%0)":: "r" (image)); | |
570 | } | |
571 | ||
572 | static inline void fpu_init(void) | |
573 | { | |
574 | asm ("finit"); | |
575 | } | |
576 | ||
577 | static inline u32 get_rdx_init_val(void) | |
578 | { | |
579 | return 0x600; /* P6 family */ | |
580 | } | |
581 | ||
582 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" | |
583 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
584 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
585 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
586 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
587 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
588 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
589 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
590 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
591 | ||
592 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
593 | ||
594 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
595 | #define TSS_BASE_SIZE 0x68 | |
596 | #define TSS_IOPB_SIZE (65536 / 8) | |
597 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
598 | #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
599 | ||
6aa8b732 | 600 | #endif |