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6aa8b732 AK |
1 | #ifndef __KVM_H |
2 | #define __KVM_H | |
3 | ||
4 | /* | |
5 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
6 | * the COPYING file in the top-level directory. | |
7 | */ | |
8 | ||
9 | #include <linux/types.h> | |
10 | #include <linux/list.h> | |
11 | #include <linux/mutex.h> | |
12 | #include <linux/spinlock.h> | |
13 | #include <linux/mm.h> | |
e8edc6e0 | 14 | #include <asm/signal.h> |
6aa8b732 AK |
15 | |
16 | #include "vmx.h" | |
17 | #include <linux/kvm.h> | |
102d8325 | 18 | #include <linux/kvm_para.h> |
6aa8b732 AK |
19 | |
20 | #define CR0_PE_MASK (1ULL << 0) | |
a3a06367 | 21 | #define CR0_MP_MASK (1ULL << 1) |
6aa8b732 AK |
22 | #define CR0_TS_MASK (1ULL << 3) |
23 | #define CR0_NE_MASK (1ULL << 5) | |
24 | #define CR0_WP_MASK (1ULL << 16) | |
25 | #define CR0_NW_MASK (1ULL << 29) | |
26 | #define CR0_CD_MASK (1ULL << 30) | |
27 | #define CR0_PG_MASK (1ULL << 31) | |
28 | ||
29 | #define CR3_WPT_MASK (1ULL << 3) | |
30 | #define CR3_PCD_MASK (1ULL << 4) | |
31 | ||
32 | #define CR3_RESEVED_BITS 0x07ULL | |
33 | #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL) | |
34 | #define CR3_FLAGS_MASK ((1ULL << 5) - 1) | |
35 | ||
36 | #define CR4_VME_MASK (1ULL << 0) | |
37 | #define CR4_PSE_MASK (1ULL << 4) | |
38 | #define CR4_PAE_MASK (1ULL << 5) | |
39 | #define CR4_PGE_MASK (1ULL << 7) | |
40 | #define CR4_VMXE_MASK (1ULL << 13) | |
41 | ||
42 | #define KVM_GUEST_CR0_MASK \ | |
43 | (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \ | |
44 | | CR0_NW_MASK | CR0_CD_MASK) | |
45 | #define KVM_VM_CR0_ALWAYS_ON \ | |
a3a06367 AK |
46 | (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK | CR0_TS_MASK \ |
47 | | CR0_MP_MASK) | |
6aa8b732 AK |
48 | #define KVM_GUEST_CR4_MASK \ |
49 | (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK) | |
50 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK) | |
51 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK) | |
52 | ||
53 | #define INVALID_PAGE (~(hpa_t)0) | |
54 | #define UNMAPPED_GVA (~(gpa_t)0) | |
55 | ||
56 | #define KVM_MAX_VCPUS 1 | |
e8207547 | 57 | #define KVM_ALIAS_SLOTS 4 |
6aa8b732 | 58 | #define KVM_MEMORY_SLOTS 4 |
7494c0cc | 59 | #define KVM_NUM_MMU_PAGES 1024 |
ebeace86 AK |
60 | #define KVM_MIN_FREE_MMU_PAGES 5 |
61 | #define KVM_REFILL_PAGES 25 | |
06465c5a | 62 | #define KVM_MAX_CPUID_ENTRIES 40 |
6aa8b732 AK |
63 | |
64 | #define FX_IMAGE_SIZE 512 | |
65 | #define FX_IMAGE_ALIGN 16 | |
66 | #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN) | |
67 | ||
68 | #define DE_VECTOR 0 | |
7807fa6c | 69 | #define NM_VECTOR 7 |
6aa8b732 AK |
70 | #define DF_VECTOR 8 |
71 | #define TS_VECTOR 10 | |
72 | #define NP_VECTOR 11 | |
73 | #define SS_VECTOR 12 | |
74 | #define GP_VECTOR 13 | |
75 | #define PF_VECTOR 14 | |
76 | ||
77 | #define SELECTOR_TI_MASK (1 << 2) | |
78 | #define SELECTOR_RPL_MASK 0x03 | |
79 | ||
80 | #define IOPL_SHIFT 12 | |
81 | ||
039576c0 AK |
82 | #define KVM_PIO_PAGE_OFFSET 1 |
83 | ||
6aa8b732 AK |
84 | /* |
85 | * Address types: | |
86 | * | |
87 | * gva - guest virtual address | |
88 | * gpa - guest physical address | |
89 | * gfn - guest frame number | |
90 | * hva - host virtual address | |
91 | * hpa - host physical address | |
92 | * hfn - host frame number | |
93 | */ | |
94 | ||
95 | typedef unsigned long gva_t; | |
96 | typedef u64 gpa_t; | |
97 | typedef unsigned long gfn_t; | |
98 | ||
99 | typedef unsigned long hva_t; | |
100 | typedef u64 hpa_t; | |
101 | typedef unsigned long hfn_t; | |
102 | ||
cea0f0e7 AK |
103 | #define NR_PTE_CHAIN_ENTRIES 5 |
104 | ||
105 | struct kvm_pte_chain { | |
106 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
107 | struct hlist_node link; | |
108 | }; | |
109 | ||
110 | /* | |
111 | * kvm_mmu_page_role, below, is defined as: | |
112 | * | |
113 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
114 | * bits 4:7 - page table level for this shadow (1-4) | |
115 | * bits 8:9 - page table quadrant for 2-level guests | |
116 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
d28c6cfb | 117 | * bits 17:18 - "access" - the user and writable bits of a huge page pde |
cea0f0e7 AK |
118 | */ |
119 | union kvm_mmu_page_role { | |
120 | unsigned word; | |
121 | struct { | |
122 | unsigned glevels : 4; | |
123 | unsigned level : 4; | |
124 | unsigned quadrant : 2; | |
125 | unsigned pad_for_nice_hex_output : 6; | |
126 | unsigned metaphysical : 1; | |
d28c6cfb | 127 | unsigned hugepage_access : 2; |
cea0f0e7 AK |
128 | }; |
129 | }; | |
130 | ||
6aa8b732 AK |
131 | struct kvm_mmu_page { |
132 | struct list_head link; | |
cea0f0e7 AK |
133 | struct hlist_node hash_link; |
134 | ||
135 | /* | |
136 | * The following two entries are used to key the shadow page in the | |
137 | * hash table. | |
138 | */ | |
139 | gfn_t gfn; | |
140 | union kvm_mmu_page_role role; | |
141 | ||
6aa8b732 AK |
142 | hpa_t page_hpa; |
143 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
144 | * in this shadow page. | |
145 | */ | |
cea0f0e7 | 146 | int multimapped; /* More than one parent_pte? */ |
3bb65a22 | 147 | int root_count; /* Currently serving as active root */ |
cea0f0e7 AK |
148 | union { |
149 | u64 *parent_pte; /* !multimapped */ | |
150 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
151 | }; | |
6aa8b732 AK |
152 | }; |
153 | ||
154 | struct vmcs { | |
155 | u32 revision_id; | |
156 | u32 abort; | |
157 | char data[0]; | |
158 | }; | |
159 | ||
160 | #define vmx_msr_entry kvm_msr_entry | |
161 | ||
162 | struct kvm_vcpu; | |
163 | ||
164 | /* | |
165 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
166 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
167 | * mode. | |
168 | */ | |
169 | struct kvm_mmu { | |
170 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
171 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
6aa8b732 AK |
172 | void (*free)(struct kvm_vcpu *vcpu); |
173 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
174 | hpa_t root_hpa; | |
175 | int root_level; | |
176 | int shadow_root_level; | |
17ac10ad AK |
177 | |
178 | u64 *pae_root; | |
6aa8b732 AK |
179 | }; |
180 | ||
714b93da AK |
181 | #define KVM_NR_MEM_OBJS 20 |
182 | ||
183 | struct kvm_mmu_memory_cache { | |
184 | int nobjs; | |
185 | void *objects[KVM_NR_MEM_OBJS]; | |
186 | }; | |
187 | ||
188 | /* | |
189 | * We don't want allocation failures within the mmu code, so we preallocate | |
190 | * enough memory for a single page fault in a cache. | |
191 | */ | |
6aa8b732 AK |
192 | struct kvm_guest_debug { |
193 | int enabled; | |
194 | unsigned long bp[4]; | |
195 | int singlestep; | |
196 | }; | |
197 | ||
198 | enum { | |
199 | VCPU_REGS_RAX = 0, | |
200 | VCPU_REGS_RCX = 1, | |
201 | VCPU_REGS_RDX = 2, | |
202 | VCPU_REGS_RBX = 3, | |
203 | VCPU_REGS_RSP = 4, | |
204 | VCPU_REGS_RBP = 5, | |
205 | VCPU_REGS_RSI = 6, | |
206 | VCPU_REGS_RDI = 7, | |
05b3e0c2 | 207 | #ifdef CONFIG_X86_64 |
6aa8b732 AK |
208 | VCPU_REGS_R8 = 8, |
209 | VCPU_REGS_R9 = 9, | |
210 | VCPU_REGS_R10 = 10, | |
211 | VCPU_REGS_R11 = 11, | |
212 | VCPU_REGS_R12 = 12, | |
213 | VCPU_REGS_R13 = 13, | |
214 | VCPU_REGS_R14 = 14, | |
215 | VCPU_REGS_R15 = 15, | |
216 | #endif | |
217 | NR_VCPU_REGS | |
218 | }; | |
219 | ||
220 | enum { | |
221 | VCPU_SREG_CS, | |
222 | VCPU_SREG_DS, | |
223 | VCPU_SREG_ES, | |
224 | VCPU_SREG_FS, | |
225 | VCPU_SREG_GS, | |
226 | VCPU_SREG_SS, | |
227 | VCPU_SREG_TR, | |
228 | VCPU_SREG_LDTR, | |
229 | }; | |
230 | ||
039576c0 AK |
231 | struct kvm_pio_request { |
232 | unsigned long count; | |
233 | int cur_count; | |
234 | struct page *guest_pages[2]; | |
235 | unsigned guest_page_offset; | |
236 | int in; | |
237 | int size; | |
238 | int string; | |
239 | int down; | |
240 | int rep; | |
241 | }; | |
242 | ||
1165f5fe AK |
243 | struct kvm_stat { |
244 | u32 pf_fixed; | |
245 | u32 pf_guest; | |
246 | u32 tlb_flush; | |
247 | u32 invlpg; | |
248 | ||
249 | u32 exits; | |
250 | u32 io_exits; | |
251 | u32 mmio_exits; | |
252 | u32 signal_exits; | |
253 | u32 irq_window_exits; | |
254 | u32 halt_exits; | |
255 | u32 request_irq_exits; | |
256 | u32 irq_exits; | |
e6adf283 | 257 | u32 light_exits; |
1165f5fe AK |
258 | }; |
259 | ||
6aa8b732 AK |
260 | struct kvm_vcpu { |
261 | struct kvm *kvm; | |
262 | union { | |
263 | struct vmcs *vmcs; | |
264 | struct vcpu_svm *svm; | |
265 | }; | |
266 | struct mutex mutex; | |
267 | int cpu; | |
268 | int launched; | |
0cc5064d | 269 | u64 host_tsc; |
9a2bb7f4 | 270 | struct kvm_run *run; |
c1150d8c | 271 | int interrupt_window_open; |
6aa8b732 AK |
272 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ |
273 | #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long) | |
274 | unsigned long irq_pending[NR_IRQ_WORDS]; | |
275 | unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ | |
276 | unsigned long rip; /* needs vcpu_load_rsp_rip() */ | |
277 | ||
278 | unsigned long cr0; | |
279 | unsigned long cr2; | |
280 | unsigned long cr3; | |
102d8325 IM |
281 | gpa_t para_state_gpa; |
282 | struct page *para_state_page; | |
283 | gpa_t hypercall_gpa; | |
6aa8b732 AK |
284 | unsigned long cr4; |
285 | unsigned long cr8; | |
1342d353 | 286 | u64 pdptrs[4]; /* pae */ |
6aa8b732 AK |
287 | u64 shadow_efer; |
288 | u64 apic_base; | |
6f00e68f | 289 | u64 ia32_misc_enable_msr; |
6aa8b732 AK |
290 | int nmsrs; |
291 | struct vmx_msr_entry *guest_msrs; | |
292 | struct vmx_msr_entry *host_msrs; | |
293 | ||
294 | struct list_head free_pages; | |
295 | struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES]; | |
296 | struct kvm_mmu mmu; | |
297 | ||
714b93da AK |
298 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; |
299 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
300 | ||
86a5ba02 AK |
301 | gfn_t last_pt_write_gfn; |
302 | int last_pt_write_count; | |
303 | ||
6aa8b732 AK |
304 | struct kvm_guest_debug guest_debug; |
305 | ||
306 | char fx_buf[FX_BUF_SIZE]; | |
307 | char *host_fx_image; | |
308 | char *guest_fx_image; | |
7807fa6c | 309 | int fpu_active; |
7702fd1f | 310 | int guest_fpu_loaded; |
33ed6329 AK |
311 | struct vmx_host_state { |
312 | int loaded; | |
313 | u16 fs_sel, gs_sel, ldt_sel; | |
314 | int fs_gs_ldt_reload_needed; | |
315 | } vmx_host_state; | |
6aa8b732 AK |
316 | |
317 | int mmio_needed; | |
318 | int mmio_read_completed; | |
319 | int mmio_is_write; | |
320 | int mmio_size; | |
321 | unsigned char mmio_data[8]; | |
322 | gpa_t mmio_phys_addr; | |
e7df56e4 | 323 | gva_t mmio_fault_cr2; |
039576c0 AK |
324 | struct kvm_pio_request pio; |
325 | void *pio_data; | |
6aa8b732 | 326 | |
1961d276 AK |
327 | int sigset_active; |
328 | sigset_t sigset; | |
329 | ||
1165f5fe AK |
330 | struct kvm_stat stat; |
331 | ||
6aa8b732 AK |
332 | struct { |
333 | int active; | |
334 | u8 save_iopl; | |
335 | struct kvm_save_segment { | |
336 | u16 selector; | |
337 | unsigned long base; | |
338 | u32 limit; | |
339 | u32 ar; | |
340 | } tr, es, ds, fs, gs; | |
341 | } rmode; | |
06465c5a AK |
342 | |
343 | int cpuid_nent; | |
344 | struct kvm_cpuid_entry cpuid_entries[KVM_MAX_CPUID_ENTRIES]; | |
6aa8b732 AK |
345 | }; |
346 | ||
e8207547 AK |
347 | struct kvm_mem_alias { |
348 | gfn_t base_gfn; | |
349 | unsigned long npages; | |
350 | gfn_t target_gfn; | |
351 | }; | |
352 | ||
6aa8b732 AK |
353 | struct kvm_memory_slot { |
354 | gfn_t base_gfn; | |
355 | unsigned long npages; | |
356 | unsigned long flags; | |
357 | struct page **phys_mem; | |
358 | unsigned long *dirty_bitmap; | |
359 | }; | |
360 | ||
361 | struct kvm { | |
362 | spinlock_t lock; /* protects everything except vcpus */ | |
e8207547 AK |
363 | int naliases; |
364 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
6aa8b732 AK |
365 | int nmemslots; |
366 | struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS]; | |
cea0f0e7 AK |
367 | /* |
368 | * Hash table of struct kvm_mmu_page. | |
369 | */ | |
6aa8b732 | 370 | struct list_head active_mmu_pages; |
ebeace86 | 371 | int n_free_mmu_pages; |
cea0f0e7 | 372 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; |
6aa8b732 AK |
373 | struct kvm_vcpu vcpus[KVM_MAX_VCPUS]; |
374 | int memory_config_version; | |
375 | int busy; | |
cd4a4e53 | 376 | unsigned long rmap_overflow; |
133de902 | 377 | struct list_head vm_list; |
bccf2150 | 378 | struct file *filp; |
6aa8b732 AK |
379 | }; |
380 | ||
6aa8b732 AK |
381 | struct descriptor_table { |
382 | u16 limit; | |
383 | unsigned long base; | |
384 | } __attribute__((packed)); | |
385 | ||
386 | struct kvm_arch_ops { | |
387 | int (*cpu_has_kvm_support)(void); /* __init */ | |
388 | int (*disabled_by_bios)(void); /* __init */ | |
389 | void (*hardware_enable)(void *dummy); /* __init */ | |
390 | void (*hardware_disable)(void *dummy); | |
391 | int (*hardware_setup)(void); /* __init */ | |
392 | void (*hardware_unsetup)(void); /* __exit */ | |
393 | ||
394 | int (*vcpu_create)(struct kvm_vcpu *vcpu); | |
395 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
396 | ||
bccf2150 | 397 | void (*vcpu_load)(struct kvm_vcpu *vcpu); |
6aa8b732 | 398 | void (*vcpu_put)(struct kvm_vcpu *vcpu); |
774c47f1 | 399 | void (*vcpu_decache)(struct kvm_vcpu *vcpu); |
6aa8b732 AK |
400 | |
401 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
402 | struct kvm_debug_guest *dbg); | |
403 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
404 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
405 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
406 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
407 | struct kvm_segment *var, int seg); | |
408 | void (*set_segment)(struct kvm_vcpu *vcpu, | |
409 | struct kvm_segment *var, int seg); | |
6aa8b732 | 410 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); |
25c4c276 | 411 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); |
6aa8b732 | 412 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); |
6aa8b732 AK |
413 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); |
414 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
415 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
416 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
417 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
418 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
419 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
420 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
421 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
422 | int *exception); | |
423 | void (*cache_regs)(struct kvm_vcpu *vcpu); | |
424 | void (*decache_regs)(struct kvm_vcpu *vcpu); | |
425 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | |
426 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
427 | ||
428 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr); | |
429 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
430 | void (*inject_page_fault)(struct kvm_vcpu *vcpu, | |
431 | unsigned long addr, u32 err_code); | |
432 | ||
433 | void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code); | |
434 | ||
435 | int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); | |
436 | int (*vcpu_setup)(struct kvm_vcpu *vcpu); | |
437 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
102d8325 IM |
438 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, |
439 | unsigned char *hypercall_addr); | |
6aa8b732 AK |
440 | }; |
441 | ||
6aa8b732 AK |
442 | extern struct kvm_arch_ops *kvm_arch_ops; |
443 | ||
444 | #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt) | |
445 | #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt) | |
446 | ||
447 | int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module); | |
448 | void kvm_exit_arch(void); | |
449 | ||
b5a33a75 AK |
450 | int kvm_mmu_module_init(void); |
451 | void kvm_mmu_module_exit(void); | |
452 | ||
6aa8b732 | 453 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); |
8018c27b IM |
454 | int kvm_mmu_create(struct kvm_vcpu *vcpu); |
455 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
6aa8b732 AK |
456 | |
457 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
714b93da | 458 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot); |
e0fa826f | 459 | void kvm_mmu_zap_all(struct kvm_vcpu *vcpu); |
6aa8b732 AK |
460 | |
461 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa); | |
462 | #define HPA_MSB ((sizeof(hpa_t) * 8) - 1) | |
463 | #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB) | |
464 | static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; } | |
465 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva); | |
039576c0 | 466 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva); |
6aa8b732 AK |
467 | |
468 | void kvm_emulator_want_group7_invlpg(void); | |
469 | ||
470 | extern hpa_t bad_page_address; | |
471 | ||
954bbbc2 | 472 | struct page *gfn_to_page(struct kvm *kvm, gfn_t gfn); |
6aa8b732 AK |
473 | struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn); |
474 | void mark_page_dirty(struct kvm *kvm, gfn_t gfn); | |
475 | ||
476 | enum emulation_result { | |
477 | EMULATE_DONE, /* no further processing */ | |
478 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
479 | EMULATE_FAIL, /* can't emulate this instruction */ | |
480 | }; | |
481 | ||
482 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, | |
483 | unsigned long cr2, u16 error_code); | |
484 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
485 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
486 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
487 | unsigned long *rflags); | |
488 | ||
489 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
490 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
491 | unsigned long *rflags); | |
492 | ||
493 | struct x86_emulate_ctxt; | |
494 | ||
039576c0 AK |
495 | int kvm_setup_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, |
496 | int size, unsigned long count, int string, int down, | |
497 | gva_t address, int rep, unsigned port); | |
06465c5a | 498 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); |
6aa8b732 AK |
499 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); |
500 | int emulate_clts(struct kvm_vcpu *vcpu); | |
501 | int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr, | |
502 | unsigned long *dest); | |
503 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
504 | unsigned long value); | |
505 | ||
506 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | |
507 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0); | |
508 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0); | |
509 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0); | |
510 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
511 | ||
3bab1f5d AK |
512 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); |
513 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
6aa8b732 AK |
514 | |
515 | void fx_init(struct kvm_vcpu *vcpu); | |
516 | ||
517 | void load_msrs(struct vmx_msr_entry *e, int n); | |
518 | void save_msrs(struct vmx_msr_entry *e, int n); | |
519 | void kvm_resched(struct kvm_vcpu *vcpu); | |
7702fd1f AK |
520 | void kvm_load_guest_fpu(struct kvm_vcpu *vcpu); |
521 | void kvm_put_guest_fpu(struct kvm_vcpu *vcpu); | |
6aa8b732 AK |
522 | |
523 | int kvm_read_guest(struct kvm_vcpu *vcpu, | |
524 | gva_t addr, | |
525 | unsigned long size, | |
526 | void *dest); | |
527 | ||
528 | int kvm_write_guest(struct kvm_vcpu *vcpu, | |
529 | gva_t addr, | |
530 | unsigned long size, | |
531 | void *data); | |
532 | ||
533 | unsigned long segment_base(u16 selector); | |
534 | ||
09072daf AK |
535 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
536 | const u8 *old, const u8 *new, int bytes); | |
a436036b | 537 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
ebeace86 AK |
538 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); |
539 | ||
270fd9b9 AK |
540 | int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run); |
541 | ||
ebeace86 AK |
542 | static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, |
543 | u32 error_code) | |
544 | { | |
545 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) | |
546 | kvm_mmu_free_some_pages(vcpu); | |
547 | return vcpu->mmu.page_fault(vcpu, gva, error_code); | |
548 | } | |
da4a00f0 | 549 | |
a9058ecd AK |
550 | static inline int is_long_mode(struct kvm_vcpu *vcpu) |
551 | { | |
552 | #ifdef CONFIG_X86_64 | |
553 | return vcpu->shadow_efer & EFER_LME; | |
554 | #else | |
555 | return 0; | |
556 | #endif | |
557 | } | |
558 | ||
6aa8b732 AK |
559 | static inline int is_pae(struct kvm_vcpu *vcpu) |
560 | { | |
561 | return vcpu->cr4 & CR4_PAE_MASK; | |
562 | } | |
563 | ||
564 | static inline int is_pse(struct kvm_vcpu *vcpu) | |
565 | { | |
566 | return vcpu->cr4 & CR4_PSE_MASK; | |
567 | } | |
568 | ||
569 | static inline int is_paging(struct kvm_vcpu *vcpu) | |
570 | { | |
571 | return vcpu->cr0 & CR0_PG_MASK; | |
572 | } | |
573 | ||
574 | static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot) | |
575 | { | |
576 | return slot - kvm->memslots; | |
577 | } | |
578 | ||
579 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
580 | { | |
581 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
582 | ||
5972e953 | 583 | return (struct kvm_mmu_page *)page_private(page); |
6aa8b732 AK |
584 | } |
585 | ||
586 | static inline u16 read_fs(void) | |
587 | { | |
588 | u16 seg; | |
589 | asm ("mov %%fs, %0" : "=g"(seg)); | |
590 | return seg; | |
591 | } | |
592 | ||
593 | static inline u16 read_gs(void) | |
594 | { | |
595 | u16 seg; | |
596 | asm ("mov %%gs, %0" : "=g"(seg)); | |
597 | return seg; | |
598 | } | |
599 | ||
600 | static inline u16 read_ldt(void) | |
601 | { | |
602 | u16 ldt; | |
603 | asm ("sldt %0" : "=g"(ldt)); | |
604 | return ldt; | |
605 | } | |
606 | ||
607 | static inline void load_fs(u16 sel) | |
608 | { | |
609 | asm ("mov %0, %%fs" : : "rm"(sel)); | |
610 | } | |
611 | ||
612 | static inline void load_gs(u16 sel) | |
613 | { | |
614 | asm ("mov %0, %%gs" : : "rm"(sel)); | |
615 | } | |
616 | ||
617 | #ifndef load_ldt | |
618 | static inline void load_ldt(u16 sel) | |
619 | { | |
a0610ddf | 620 | asm ("lldt %0" : : "rm"(sel)); |
6aa8b732 AK |
621 | } |
622 | #endif | |
623 | ||
624 | static inline void get_idt(struct descriptor_table *table) | |
625 | { | |
626 | asm ("sidt %0" : "=m"(*table)); | |
627 | } | |
628 | ||
629 | static inline void get_gdt(struct descriptor_table *table) | |
630 | { | |
631 | asm ("sgdt %0" : "=m"(*table)); | |
632 | } | |
633 | ||
634 | static inline unsigned long read_tr_base(void) | |
635 | { | |
636 | u16 tr; | |
637 | asm ("str %0" : "=g"(tr)); | |
638 | return segment_base(tr); | |
639 | } | |
640 | ||
05b3e0c2 | 641 | #ifdef CONFIG_X86_64 |
6aa8b732 AK |
642 | static inline unsigned long read_msr(unsigned long msr) |
643 | { | |
644 | u64 value; | |
645 | ||
646 | rdmsrl(msr, value); | |
647 | return value; | |
648 | } | |
649 | #endif | |
650 | ||
651 | static inline void fx_save(void *image) | |
652 | { | |
653 | asm ("fxsave (%0)":: "r" (image)); | |
654 | } | |
655 | ||
656 | static inline void fx_restore(void *image) | |
657 | { | |
658 | asm ("fxrstor (%0)":: "r" (image)); | |
659 | } | |
660 | ||
661 | static inline void fpu_init(void) | |
662 | { | |
663 | asm ("finit"); | |
664 | } | |
665 | ||
666 | static inline u32 get_rdx_init_val(void) | |
667 | { | |
668 | return 0x600; /* P6 family */ | |
669 | } | |
670 | ||
671 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" | |
672 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
673 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
674 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
675 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
676 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
677 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
678 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
679 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
680 | ||
681 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
682 | ||
683 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
684 | #define TSS_BASE_SIZE 0x68 | |
685 | #define TSS_IOPB_SIZE (65536 / 8) | |
686 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
687 | #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
688 | ||
6aa8b732 | 689 | #endif |