[linux-block.git] / drivers / isdn / hisax / enternow_pci.c

/* enternow_pci.c,v 0.99 2001/10/02
 *
 * enternow_pci.c       Card-specific routines for
 *                      Formula-n enter:now ISDN PCI ab
 *                      Gerdes AG Power ISDN PCI
 *                      Woerltronic SA 16 PCI
 *                      (based on HiSax driver by Karsten Keil)
 *
 * Author               Christoph Ersfeld <info@formula-n.de>
 *                      Formula-n Europe AG (www.formula-n.com)
 *                      previously Gerdes AG
 *
 *
 *                      This file is (c) under GNU PUBLIC LICENSE
 *
 * Notes:
 * This driver interfaces to netjet.c which performs B-channel
 * processing.
 *
 * Version 0.99 is the first release of this driver and there are
 * certainly a few bugs.
 * It isn't testet on linux 2.4 yet, so consider this code to be
 * beta.
 *
 * Please don't report me any malfunction without sending
 * (compressed) debug-logs.
 * It would be nearly impossible to retrace it.
 *
 * Log D-channel-processing as follows:
 *
 * 1. Load hisax with card-specific parameters, this example ist for
 *    Formula-n enter:now ISDN PCI and compatible
 *    (f.e. Gerdes Power ISDN PCI)
 *
 *    modprobe hisax type=41 protocol=2 id=gerdes
 *
 *    if you chose an other value for id, you need to modify the
 *    code below, too.
 *
 * 2. set debug-level
 *
 *    hisaxctrl gerdes 1 0x3ff
 *    hisaxctrl gerdes 11 0x4f
 *    cat /dev/isdnctrl >> ~/log &
 *
 * Please take also a look into /var/log/messages if there is
 * anything importand concerning HISAX.
 *
 *
 * Credits:
 * Programming the driver for Formula-n enter:now ISDN PCI and
 * necessary the driver for the used Amd 7930 D-channel-controller
 * was spnsored by Formula-n Europe AG.
 * Thanks to Karsten Keil and Petr Novak, who gave me support in
 * Hisax-specific questions.
 * I want so say special thanks to Carl-Friedrich Braun, who had to
 * answer a lot of questions about generally ISDN and about handling
 * of the Amd-Chip.
 *
 */


#include "hisax.h"
#include "isac.h"
#include "isdnl1.h"
#include "amd7930_fn.h"
#include <linux/interrupt.h>
#include <linux/ppp_defs.h>
#include <linux/pci.h>
#include <linux/init.h>
#include "netjet.h"


static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";


/* for PowerISDN PCI */
#define TJ_AMD_IRQ                                              0x20
#define TJ_LED1                                                 0x40
#define TJ_LED2                                                 0x80


/* The window to [the] AMD [chip]...
 * From address hw.njet.base + TJ_AMD_PORT onwards, the AMD
 * maps [consecutive/multiple] 8 bits into the TigerJet I/O space
 * -> 0x01 of the AMD at hw.njet.base + 0C4 */
#define TJ_AMD_PORT                                             0xC0


/* *************************** I/O-Interface functions ************************************* */


/* cs->readisac, macro rByteAMD */
static unsigned char
ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
{
	/* direct register */
	if(offset < 8)
		return (inb(cs->hw.njet.isac + 4*offset));

	/* indirect register */
	else {
		outb(offset, cs->hw.njet.isac + 4*AMD_CR);
		return(inb(cs->hw.njet.isac + 4*AMD_DR));
	}
}

/* cs->writeisac, macro wByteAMD */
static void
WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
{
	/* direct register */
	if(offset < 8)
		outb(value, cs->hw.njet.isac + 4*offset);

	/* indirect register */
	else {
		outb(offset, cs->hw.njet.isac + 4*AMD_CR);
		outb(value, cs->hw.njet.isac + 4*AMD_DR);
	}
}


static void
enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
        if (!val)
	        outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
        else
	        outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
}


static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
{
        return(5);
}

static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
{

}


/* ******************************************************************************** */


static void
reset_enpci(struct IsdnCardState *cs)
{
	if (cs->debug & L1_DEB_ISAC)
		debugl1(cs, "enter:now PCI: reset");

	/* Reset on, (also for AMD) */
	cs->hw.njet.ctrl_reg = 0x07;
	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
	mdelay(20);
	/* Reset off */
	cs->hw.njet.ctrl_reg = 0x30;
	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
	/* 20ms delay */
	mdelay(20);
	cs->hw.njet.auxd = 0;  // LED-status
	cs->hw.njet.dmactrl = 0;
	outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
	outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
	outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
}


static int
enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
	u_long flags;
        unsigned char *chan;

	if (cs->debug & L1_DEB_ISAC)
		debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);

        switch (mt) {
		case CARD_RESET:
			spin_lock_irqsave(&cs->lock, flags);
			reset_enpci(cs);
                        Amd7930_init(cs);
                        spin_unlock_irqrestore(&cs->lock, flags);
			break;
		case CARD_RELEASE:
			release_io_netjet(cs);
			break;
		case CARD_INIT:
			reset_enpci(cs);
			inittiger(cs);
			/* irq must be on here */
			Amd7930_init(cs);
			break;
		case CARD_TEST:
			break;
                case MDL_ASSIGN:
                        /* TEI assigned, LED1 on */
                        cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
                        outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
                        break;
                case MDL_REMOVE:
                        /* TEI removed, LEDs off */
	                cs->hw.njet.auxd = 0;
                        outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
                        break;
                case MDL_BC_ASSIGN:
                        /* activate B-channel */
                        chan = (unsigned char *)arg;

                        if (cs->debug & L1_DEB_ISAC)
		                debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);

                        cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
                        /* at least one b-channel in use, LED 2 on */
                        cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
                        outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
                        break;
                case MDL_BC_RELEASE:
                        /* deactivate B-channel */
                        chan = (unsigned char *)arg;

                        if (cs->debug & L1_DEB_ISAC)
		                debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);

                        cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
                        /* no b-channel active -> LED2 off */
                        if (!(cs->dc.amd7930.lmr1 & 3)) {
                                cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
                                outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
                        }
                        break;
                default:
                        break;

	}
	return(0);
}

static irqreturn_t
enpci_interrupt(int intno, void *dev_id)
{
	struct IsdnCardState *cs = dev_id;
	unsigned char s0val, s1val, ir;
	u_long flags;

	spin_lock_irqsave(&cs->lock, flags);
	s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);

        /* AMD threw an interrupt */
	if (!(s1val & TJ_AMD_IRQ)) {
                /* read and clear interrupt-register */
		ir = ReadByteAmd7930(cs, 0x00);
		Amd7930_interrupt(cs, ir);
		s1val = 1;
	} else
		s1val = 0;
	s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
	if ((s0val | s1val)==0) { // shared IRQ
		spin_unlock_irqrestore(&cs->lock, flags);
		return IRQ_NONE;
	} 
	if (s0val)
		outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);

	/* DMA-Interrupt: B-channel-stuff */
	/* set bits in sval to indicate which page is free */
	if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
		inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
		/* the 2nd write page is free */
		s0val = 0x08;
	else	/* the 1st write page is free */
		s0val = 0x04;
	if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
		inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
		/* the 2nd read page is free */
		s0val = s0val | 0x02;
	else	/* the 1st read page is free */
		s0val = s0val | 0x01;
	if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
	{
		if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
			spin_unlock_irqrestore(&cs->lock, flags);
			return IRQ_HANDLED;
		}
		cs->hw.njet.irqstat0 = s0val;
		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
			(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
			/* we have a read dma int */
			read_tiger(cs);
		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
			(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
			/* we have a write dma int */
			write_tiger(cs);
		test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
	}
	spin_unlock_irqrestore(&cs->lock, flags);
	return IRQ_HANDLED;
}

static int __devinit en_pci_probe(struct pci_dev *dev_netjet,
				  struct IsdnCardState *cs)
{
	if (pci_enable_device(dev_netjet))
		return(0);
	cs->irq = dev_netjet->irq;
	if (!cs->irq) {
		printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
		return(0);
	}
	cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
	if (!cs->hw.njet.base) {
		printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
		return(0);
	}
	/* checks Sub-Vendor ID because system crashes with Traverse-Card */
	if ((dev_netjet->subsystem_vendor != 0x55) ||
	    (dev_netjet->subsystem_device != 0x02)) {
		printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
		printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
		return(0);
	}

	return(1);
}

static void __devinit en_cs_init(struct IsdnCard *card,
				 struct IsdnCardState *cs)
{
	cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
	cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD

	/* Reset an */
Commit	Line	Data
1da177e4 LT	1	/* enternow_pci.c,v 0.99 2001/10/02
	2	*
	3	* enternow_pci.c Card-specific routines for
	4	* Formula-n enter:now ISDN PCI ab
	5	* Gerdes AG Power ISDN PCI
	6	* Woerltronic SA 16 PCI
	7	* (based on HiSax driver by Karsten Keil)
	8	*
	9	* Author Christoph Ersfeld <info@formula-n.de>
	10	* Formula-n Europe AG (www.formula-n.com)
	11	* previously Gerdes AG
	12	*
	13	*
	14	* This file is (c) under GNU PUBLIC LICENSE
	15	*
	16	* Notes:
	17	* This driver interfaces to netjet.c which performs B-channel
	18	* processing.
	19	*
	20	* Version 0.99 is the first release of this driver and there are
	21	* certainly a few bugs.
	22	* It isn't testet on linux 2.4 yet, so consider this code to be
	23	* beta.
	24	*
	25	* Please don't report me any malfunction without sending
	26	* (compressed) debug-logs.
	27	* It would be nearly impossible to retrace it.
	28	*
	29	* Log D-channel-processing as follows:
	30	*
	31	* 1. Load hisax with card-specific parameters, this example ist for
	32	* Formula-n enter:now ISDN PCI and compatible
	33	* (f.e. Gerdes Power ISDN PCI)
	34	*
	35	* modprobe hisax type=41 protocol=2 id=gerdes
	36	*
	37	* if you chose an other value for id, you need to modify the
	38	* code below, too.
	39	*
	40	* 2. set debug-level
	41	*
	42	* hisaxctrl gerdes 1 0x3ff
	43	* hisaxctrl gerdes 11 0x4f
	44	* cat /dev/isdnctrl >> ~/log &
	45	*
	46	* Please take also a look into /var/log/messages if there is
	47	* anything importand concerning HISAX.
	48	*
	49	*
	50	* Credits:
	51	* Programming the driver for Formula-n enter:now ISDN PCI and
	52	* necessary the driver for the used Amd 7930 D-channel-controller
	53	* was spnsored by Formula-n Europe AG.
	54	* Thanks to Karsten Keil and Petr Novak, who gave me support in
	55	* Hisax-specific questions.
	56	* I want so say special thanks to Carl-Friedrich Braun, who had to
	57	* answer a lot of questions about generally ISDN and about handling
	58	* of the Amd-Chip.
	59	*
	60	*/
	61
	62
1da177e4 LT	63	#include "hisax.h"
	64	#include "isac.h"
	65	#include "isdnl1.h"
	66	#include "amd7930_fn.h"
1da177e4 LT	67	#include <linux/interrupt.h>
	68	#include <linux/ppp_defs.h>
	69	#include <linux/pci.h>
	70	#include <linux/init.h>
	71	#include "netjet.h"
	72
	73
	74
672c3fd9 AB	75	static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
	76
	77
96de0e25	78	/* for PowerISDN PCI */
672c3fd9 AB	79	#define TJ_AMD_IRQ 0x20
	80	#define TJ_LED1 0x40
	81	#define TJ_LED2 0x80
	82
	83
96de0e25 JE	84	/* The window to [the] AMD [chip]...
	85	* From address hw.njet.base + TJ_AMD_PORT onwards, the AMD
	86	* maps [consecutive/multiple] 8 bits into the TigerJet I/O space
	87	* -> 0x01 of the AMD at hw.njet.base + 0C4 */
672c3fd9 AB	88	#define TJ_AMD_PORT 0xC0
672c3fd9 AB	89
1da177e4 LT	90
	91
	92	/* ************************* I/O-Interface functions *********************************** */
	93
	94
	95	/* cs->readisac, macro rByteAMD */
672c3fd9 AB	96	static unsigned char
672c3fd9 AB	97	ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
1da177e4	98	{
96de0e25	99	/* direct register */
1da177e4	100	if(offset < 8)
672c3fd9	101	return (inb(cs->hw.njet.isac + 4*offset));
1da177e4	102
96de0e25	103	/* indirect register */
1da177e4	104	else {
672c3fd9 AB	105	outb(offset, cs->hw.njet.isac + 4*AMD_CR);
672c3fd9 AB	106	return(inb(cs->hw.njet.isac + 4*AMD_DR));
1da177e4 LT	107	}
	108	}
	109
	110	/* cs->writeisac, macro wByteAMD */
672c3fd9 AB	111	static void
672c3fd9 AB	112	WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
1da177e4	113	{
96de0e25	114	/* direct register */
1da177e4	115	if(offset < 8)
672c3fd9	116	outb(value, cs->hw.njet.isac + 4*offset);
1da177e4	117
96de0e25	118	/* indirect register */
1da177e4	119	else {
672c3fd9 AB	120	outb(offset, cs->hw.njet.isac + 4*AMD_CR);
672c3fd9 AB	121	outb(value, cs->hw.njet.isac + 4*AMD_DR);
1da177e4 LT	122	}
	123	}
	124
	125
672c3fd9 AB	126	static void
672c3fd9 AB	127	enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
1da177e4	128	if (!val)
672c3fd9	129	outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
1da177e4	130	else
672c3fd9	131	outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
1da177e4 LT	132	}
	133
	134
672c3fd9	135	static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
1da177e4 LT	136	{
	137	return(5);
	138	}
	139
672c3fd9	140	static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
1da177e4 LT	141	{
	142
	143	}
	144
	145
	146	/* ******************************************************************************** */
	147
	148
	149	static void
	150	reset_enpci(struct IsdnCardState *cs)
	151	{
	152	if (cs->debug & L1_DEB_ISAC)
	153	debugl1(cs, "enter:now PCI: reset");
	154
	155	/* Reset on, (also for AMD) */
	156	cs->hw.njet.ctrl_reg = 0x07;
672c3fd9	157	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
1da177e4 LT	158	mdelay(20);
	159	/* Reset off */
	160	cs->hw.njet.ctrl_reg = 0x30;
672c3fd9	161	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
1da177e4 LT	162	/* 20ms delay */
	163	mdelay(20);
	164	cs->hw.njet.auxd = 0; // LED-status
	165	cs->hw.njet.dmactrl = 0;
672c3fd9 AB	166	outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
	167	outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
	168	outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
1da177e4 LT	169	}
	170
	171
	172	static int
	173	enpci_card_msg(struct IsdnCardState cs, int mt, void arg)
	174	{
	175	u_long flags;
672c3fd9	176	unsigned char *chan;
1da177e4 LT	177
	178	if (cs->debug & L1_DEB_ISAC)
	179	debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
	180
	181	switch (mt) {
	182	case CARD_RESET:
	183	spin_lock_irqsave(&cs->lock, flags);
	184	reset_enpci(cs);
	185	Amd7930_init(cs);
	186	spin_unlock_irqrestore(&cs->lock, flags);
	187	break;
	188	case CARD_RELEASE:
	189	release_io_netjet(cs);
	190	break;
	191	case CARD_INIT:
	192	reset_enpci(cs);
	193	inittiger(cs);
	194	/* irq must be on here */
	195	Amd7930_init(cs);
	196	break;
	197	case CARD_TEST:
	198	break;
	199	case MDL_ASSIGN:
	200	/* TEI assigned, LED1 on */
	201	cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
672c3fd9	202	outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
1da177e4 LT	203	break;
	204	case MDL_REMOVE:
	205	/* TEI removed, LEDs off */
	206	cs->hw.njet.auxd = 0;
672c3fd9	207	outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
1da177e4 LT	208	break;
	209	case MDL_BC_ASSIGN:
	210	/* activate B-channel */
672c3fd9	211	chan = (unsigned char *)arg;
1da177e4 LT	212
	213	if (cs->debug & L1_DEB_ISAC)
	214	debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
	215
	216	cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 \| (*chan + 1)), "MDL_BC_ASSIGN");
	217	/* at least one b-channel in use, LED 2 on */
	218	cs->hw.njet.auxd \|= TJ_AMD_IRQ << 2;
672c3fd9	219	outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
1da177e4 LT	220	break;
	221	case MDL_BC_RELEASE:
	222	/* deactivate B-channel */
672c3fd9	223	chan = (unsigned char *)arg;
1da177e4 LT	224
	225	if (cs->debug & L1_DEB_ISAC)
	226	debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
	227
	228	cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
	229	/* no b-channel active -> LED2 off */
	230	if (!(cs->dc.amd7930.lmr1 & 3)) {
	231	cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
672c3fd9	232	outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
1da177e4 LT	233	}
	234	break;
	235	default:
	236	break;
	237
	238	}
	239	return(0);
	240	}
	241
	242	static irqreturn_t
7d12e780	243	enpci_interrupt(int intno, void *dev_id)
1da177e4 LT	244	{
1da177e4 LT	245	struct IsdnCardState *cs = dev_id;
672c3fd9	246	unsigned char s0val, s1val, ir;
1da177e4 LT	247	u_long flags;
	248
	249	spin_lock_irqsave(&cs->lock, flags);
672c3fd9	250	s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
1da177e4 LT	251
	252	/* AMD threw an interrupt */
	253	if (!(s1val & TJ_AMD_IRQ)) {
	254	/* read and clear interrupt-register */
	255	ir = ReadByteAmd7930(cs, 0x00);
	256	Amd7930_interrupt(cs, ir);
	257	s1val = 1;
	258	} else
	259	s1val = 0;
672c3fd9	260	s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
1da177e4 LT	261	if ((s0val \| s1val)==0) { // shared IRQ
	262	spin_unlock_irqrestore(&cs->lock, flags);
	263	return IRQ_NONE;
	264	}
	265	if (s0val)
672c3fd9	266	outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
1da177e4 LT	267
	268	/* DMA-Interrupt: B-channel-stuff */
	269	/* set bits in sval to indicate which page is free */
	270	if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
	271	inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
	272	/* the 2nd write page is free */
	273	s0val = 0x08;
	274	else /* the 1st write page is free */
	275	s0val = 0x04;
	276	if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
	277	inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
	278	/* the 2nd read page is free */
	279	s0val = s0val \| 0x02;
	280	else /* the 1st read page is free */
	281	s0val = s0val \| 0x01;
	282	if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
	283	{
	284	if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
	285	spin_unlock_irqrestore(&cs->lock, flags);
	286	return IRQ_HANDLED;
	287	}
	288	cs->hw.njet.irqstat0 = s0val;
	289	if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
	290	(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
	291	/* we have a read dma int */
	292	read_tiger(cs);
	293	if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
	294	(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
	295	/* we have a write dma int */
	296	write_tiger(cs);
	297	test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
	298	}
	299	spin_unlock_irqrestore(&cs->lock, flags);
	300	return IRQ_HANDLED;
	301	}
	302
a2b66515 JG	303	static int __devinit en_pci_probe(struct pci_dev *dev_netjet,
a2b66515 JG	304	struct IsdnCardState *cs)
1da177e4	305	{
a2b66515	306	if (pci_enable_device(dev_netjet))
1da177e4	307	return(0);
a2b66515 JG	308	cs->irq = dev_netjet->irq;
	309	if (!cs->irq) {
	310	printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
	311	return(0);
	312	}
	313	cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
	314	if (!cs->hw.njet.base) {
	315	printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
	316	return(0);
	317	}
	318	/* checks Sub-Vendor ID because system crashes with Traverse-Card */
	319	if ((dev_netjet->subsystem_vendor != 0x55) \|\|
	320	(dev_netjet->subsystem_device != 0x02)) {
	321	printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
	322	printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
	323	return(0);
	324	}
1da177e4	325
a2b66515 JG	326	return(1);
a2b66515 JG	327	}
1da177e4	328
a2b66515 JG	329	static void __devinit en_cs_init(struct IsdnCard *card,
	330	struct IsdnCardState *cs)
	331	{
	332	cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
	333	cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
1da177e4	334
a2b66515 JG	335	/* Reset an */
	336