[linux-block.git] / drivers / irqchip / irq-ls-scfg-msi.c

/*
 * Freescale SCFG MSI(-X) support
 *
 * Copyright (C) 2016 Freescale Semiconductor.
 *
 * Author: Minghuan Lian <Minghuan.Lian@nxp.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/msi.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/of_irq.h>
#include <linux/of_pci.h>
#include <linux/of_platform.h>
#include <linux/spinlock.h>

#define MSI_IRQS_PER_MSIR	32
#define MSI_MSIR_OFFSET		4

struct ls_scfg_msi_cfg {
	u32 ibs_shift; /* Shift of interrupt bit select */
};

struct ls_scfg_msir {
	struct ls_scfg_msi *msi_data;
	unsigned int index;
	unsigned int gic_irq;
	void __iomem *reg;
};

struct ls_scfg_msi {
	spinlock_t		lock;
	struct platform_device	*pdev;
	struct irq_domain	*parent;
	struct irq_domain	*msi_domain;
	void __iomem		*regs;
	phys_addr_t		msiir_addr;
	struct ls_scfg_msi_cfg	*cfg;
	u32			msir_num;
	struct ls_scfg_msir	*msir;
	u32			irqs_num;
	unsigned long		*used;
};

static struct irq_chip ls_scfg_msi_irq_chip = {
	.name = "MSI",
	.irq_mask	= pci_msi_mask_irq,
	.irq_unmask	= pci_msi_unmask_irq,
};

static struct msi_domain_info ls_scfg_msi_domain_info = {
	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS |
		   MSI_FLAG_USE_DEF_CHIP_OPS |
		   MSI_FLAG_PCI_MSIX),
	.chip	= &ls_scfg_msi_irq_chip,
};

static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
{
	struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);

	msg->address_hi = upper_32_bits(msi_data->msiir_addr);
	msg->address_lo = lower_32_bits(msi_data->msiir_addr);
	msg->data = data->hwirq;
}

static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
				    const struct cpumask *mask, bool force)
{
	return -EINVAL;
}

static struct irq_chip ls_scfg_msi_parent_chip = {
	.name			= "SCFG",
	.irq_compose_msi_msg	= ls_scfg_msi_compose_msg,
	.irq_set_affinity	= ls_scfg_msi_set_affinity,
};

static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain,
					unsigned int virq,
					unsigned int nr_irqs,
					void *args)
{
	struct ls_scfg_msi *msi_data = domain->host_data;
	int pos, err = 0;

	WARN_ON(nr_irqs != 1);

	spin_lock(&msi_data->lock);
	pos = find_first_zero_bit(msi_data->used, msi_data->irqs_num);
	if (pos < msi_data->irqs_num)
		__set_bit(pos, msi_data->used);
	else
		err = -ENOSPC;
	spin_unlock(&msi_data->lock);

	if (err)
		return err;

	irq_domain_set_info(domain, virq, pos,
			    &ls_scfg_msi_parent_chip, msi_data,
			    handle_simple_irq, NULL, NULL);

	return 0;
}

static void ls_scfg_msi_domain_irq_free(struct irq_domain *domain,
				   unsigned int virq, unsigned int nr_irqs)
{
	struct irq_data *d = irq_domain_get_irq_data(domain, virq);
	struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(d);
	int pos;

	pos = d->hwirq;
	if (pos < 0 || pos >= msi_data->irqs_num) {
		pr_err("failed to teardown msi. Invalid hwirq %d\n", pos);
		return;
	}

	spin_lock(&msi_data->lock);
	__clear_bit(pos, msi_data->used);
	spin_unlock(&msi_data->lock);
}

static const struct irq_domain_ops ls_scfg_msi_domain_ops = {
	.alloc	= ls_scfg_msi_domain_irq_alloc,
	.free	= ls_scfg_msi_domain_irq_free,
};

static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
{
	struct ls_scfg_msir *msir = irq_desc_get_handler_data(desc);
	struct ls_scfg_msi *msi_data = msir->msi_data;
	unsigned long val;
	int pos, virq, hwirq;

	chained_irq_enter(irq_desc_get_chip(desc), desc);

	val = ioread32be(msir->reg);
	for_each_set_bit(pos, &val, MSI_IRQS_PER_MSIR) {
		hwirq = ((31 - pos) << msi_data->cfg->ibs_shift) | msir->index;
		virq = irq_find_mapping(msi_data->parent, hwirq);
		if (virq)
			generic_handle_irq(virq);
	}

	chained_irq_exit(irq_desc_get_chip(desc), desc);
}

static int ls_scfg_msi_domains_init(struct ls_scfg_msi *msi_data)
{
	/* Initialize MSI domain parent */
	msi_data->parent = irq_domain_add_linear(NULL,
						 msi_data->irqs_num,
						 &ls_scfg_msi_domain_ops,
						 msi_data);
	if (!msi_data->parent) {
		dev_err(&msi_data->pdev->dev, "failed to create IRQ domain\n");
		return -ENOMEM;
	}

	msi_data->msi_domain = pci_msi_create_irq_domain(
				of_node_to_fwnode(msi_data->pdev->dev.of_node),
				&ls_scfg_msi_domain_info,
				msi_data->parent);
	if (!msi_data->msi_domain) {
		dev_err(&msi_data->pdev->dev, "failed to create MSI domain\n");
		irq_domain_remove(msi_data->parent);
		return -ENOMEM;
	}

	return 0;
}

static int ls_scfg_msi_setup_hwirq(struct ls_scfg_msi *msi_data, int index)
{
	struct ls_scfg_msir *msir;
	int virq, i, hwirq;

	virq = platform_get_irq(msi_data->pdev, index);
	if (virq <= 0)
		return -ENODEV;

	msir = &msi_data->msir[index];
	msir->index = index;
	msir->msi_data = msi_data;
	msir->gic_irq = virq;
	msir->reg = msi_data->regs + MSI_MSIR_OFFSET + 4 * index;

	irq_set_chained_handler_and_data(msir->gic_irq,
					 ls_scfg_msi_irq_handler,
					 msir);

	/* Release the hwirqs corresponding to this MSIR */
	for (i = 0; i < MSI_IRQS_PER_MSIR; i++) {
		hwirq = i << msi_data->cfg->ibs_shift | msir->index;
		bitmap_clear(msi_data->used, hwirq, 1);
	}

	return 0;
}

static int ls_scfg_msi_teardown_hwirq(struct ls_scfg_msir *msir)
{
	struct ls_scfg_msi *msi_data = msir->msi_data;
	int i, hwirq;

	if (msir->gic_irq > 0)
		irq_set_chained_handler_and_data(msir->gic_irq, NULL, NULL);

	for (i = 0; i < MSI_IRQS_PER_MSIR; i++) {
		hwirq = i << msi_data->cfg->ibs_shift | msir->index;
		bitmap_set(msi_data->used, hwirq, 1);
	}

	return 0;
}

static struct ls_scfg_msi_cfg ls1021_msi_cfg = {
	.ibs_shift = 3,
};

static struct ls_scfg_msi_cfg ls1046_msi_cfg = {
	.ibs_shift = 2,
};

static const struct of_device_id ls_scfg_msi_id[] = {
	/* The following two misspelled compatibles are obsolete */
	{ .compatible = "fsl,1s1021a-msi", .data = &ls1021_msi_cfg},
	{ .compatible = "fsl,1s1043a-msi", .data = &ls1021_msi_cfg},

	{ .compatible = "fsl,ls1021a-msi", .data = &ls1021_msi_cfg },
	{ .compatible = "fsl,ls1043a-msi", .data = &ls1021_msi_cfg },
	{ .compatible = "fsl,ls1046a-msi", .data = &ls1046_msi_cfg },
	{},
};
MODULE_DEVICE_TABLE(of, ls_scfg_msi_id);

static int ls_scfg_msi_probe(struct platform_device *pdev)
{
	const struct of_device_id *match;
	struct ls_scfg_msi *msi_data;
	struct resource *res;
	int i, ret;

	match = of_match_device(ls_scfg_msi_id, &pdev->dev);
	if (!match)
		return -ENODEV;

	msi_data = devm_kzalloc(&pdev->dev, sizeof(*msi_data), GFP_KERNEL);
	if (!msi_data)
		return -ENOMEM;

	msi_data->cfg = (struct ls_scfg_msi_cfg *) match->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	msi_data->regs = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(msi_data->regs)) {
		dev_err(&pdev->dev, "failed to initialize 'regs'\n");
		return PTR_ERR(msi_data->regs);
	}
	msi_data->msiir_addr = res->start;

	msi_data->pdev = pdev;
	spin_lock_init(&msi_data->lock);

	msi_data->irqs_num = MSI_IRQS_PER_MSIR *
			     (1 << msi_data->cfg->ibs_shift);
	msi_data->used = devm_kcalloc(&pdev->dev,
				    BITS_TO_LONGS(msi_data->irqs_num),
				    sizeof(*msi_data->used),
				    GFP_KERNEL);
	if (!msi_data->used)
		return -ENOMEM;
	/*
	 * Reserve all the hwirqs
	 * The available hwirqs will be released in ls1_msi_setup_hwirq()
	 */
	bitmap_set(msi_data->used, 0, msi_data->irqs_num);

	msi_data->msir_num = of_irq_count(pdev->dev.of_node);
	msi_data->msir = devm_kcalloc(&pdev->dev, msi_data->msir_num,
				      sizeof(*msi_data->msir),
				      GFP_KERNEL);
	if (!msi_data->msir)
		return -ENOMEM;

	for (i = 0; i < msi_data->msir_num; i++)
		ls_scfg_msi_setup_hwirq(msi_data, i);

	ret = ls_scfg_msi_domains_init(msi_data);
	if (ret)
		return ret;

	platform_set_drvdata(pdev, msi_data);

	return 0;
}

static int ls_scfg_msi_remove(struct platform_device *pdev)
{
	struct ls_scfg_msi *msi_data = platform_get_drvdata(pdev);
	int i;

	for (i = 0; i < msi_data->msir_num; i++)
		ls_scfg_msi_teardown_hwirq(&msi_data->msir[i]);

	irq_domain_remove(msi_data->msi_domain);
	irq_domain_remove(msi_data->parent);

	platform_set_drvdata(pdev, NULL);

	return 0;
}

static struct platform_driver ls_scfg_msi_driver = {
	.driver = {
		.name = "ls-scfg-msi",
		.of_match_table = ls_scfg_msi_id,
	},
	.probe = ls_scfg_msi_probe,
	.remove = ls_scfg_msi_remove,
};

module_platform_driver(ls_scfg_msi_driver);

MODULE_AUTHOR("Minghuan Lian <Minghuan.Lian@nxp.com>");
MODULE_DESCRIPTION("Freescale Layerscape SCFG MSI controller driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b8f3ebe6 ML	1	/*
	2	* Freescale SCFG MSI(-X) support
	3	*
	4	* Copyright (C) 2016 Freescale Semiconductor.
	5	*
	6	* Author: Minghuan Lian <Minghuan.Lian@nxp.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/module.h>
	15	#include <linux/msi.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/irq.h>
	18	#include <linux/irqchip/chained_irq.h>
	19	#include <linux/irqdomain.h>
4dd5da65	20	#include <linux/of_irq.h>
b8f3ebe6 ML	21	#include <linux/of_pci.h>
	22	#include <linux/of_platform.h>
	23	#include <linux/spinlock.h>
	24
4dd5da65 ML	25	#define MSI_IRQS_PER_MSIR 32
	26	#define MSI_MSIR_OFFSET 4
	27
	28	struct ls_scfg_msi_cfg {
	29	u32 ibs_shift; /* Shift of interrupt bit select */
	30	};
	31
	32	struct ls_scfg_msir {
	33	struct ls_scfg_msi *msi_data;
	34	unsigned int index;
	35	unsigned int gic_irq;
	36	void __iomem *reg;
	37	};
b8f3ebe6 ML	38
	39	struct ls_scfg_msi {
	40	spinlock_t lock;
	41	struct platform_device *pdev;
	42	struct irq_domain *parent;
	43	struct irq_domain *msi_domain;
	44	void __iomem *regs;
	45	phys_addr_t msiir_addr;
4dd5da65 ML	46	struct ls_scfg_msi_cfg *cfg;
	47	u32 msir_num;
	48	struct ls_scfg_msir *msir;
	49	u32 irqs_num;
	50	unsigned long *used;
b8f3ebe6 ML	51	};
	52
	53	static struct irq_chip ls_scfg_msi_irq_chip = {
	54	.name = "MSI",
	55	.irq_mask = pci_msi_mask_irq,
	56	.irq_unmask = pci_msi_unmask_irq,
	57	};
	58
	59	static struct msi_domain_info ls_scfg_msi_domain_info = {
	60	.flags = (MSI_FLAG_USE_DEF_DOM_OPS \|
	61	MSI_FLAG_USE_DEF_CHIP_OPS \|
	62	MSI_FLAG_PCI_MSIX),
	63	.chip = &ls_scfg_msi_irq_chip,
	64	};
	65
	66	static void ls_scfg_msi_compose_msg(struct irq_data data, struct msi_msg msg)
	67	{
	68	struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);
	69
	70	msg->address_hi = upper_32_bits(msi_data->msiir_addr);
	71	msg->address_lo = lower_32_bits(msi_data->msiir_addr);
4dd5da65	72	msg->data = data->hwirq;
b8f3ebe6 ML	73	}
	74
	75	static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
	76	const struct cpumask *mask, bool force)
	77	{
	78	return -EINVAL;
	79	}
	80
	81	static struct irq_chip ls_scfg_msi_parent_chip = {
	82	.name = "SCFG",
	83	.irq_compose_msi_msg = ls_scfg_msi_compose_msg,
	84	.irq_set_affinity = ls_scfg_msi_set_affinity,
	85	};
	86
	87	static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain,
	88	unsigned int virq,
	89	unsigned int nr_irqs,
	90	void *args)
	91	{
	92	struct ls_scfg_msi *msi_data = domain->host_data;
	93	int pos, err = 0;
	94
	95	WARN_ON(nr_irqs != 1);
	96
	97	spin_lock(&msi_data->lock);
4dd5da65 ML	98	pos = find_first_zero_bit(msi_data->used, msi_data->irqs_num);
4dd5da65 ML	99	if (pos < msi_data->irqs_num)
b8f3ebe6 ML	100	__set_bit(pos, msi_data->used);
	101	else
	102	err = -ENOSPC;
	103	spin_unlock(&msi_data->lock);
	104
	105	if (err)
	106	return err;
	107
	108	irq_domain_set_info(domain, virq, pos,
	109	&ls_scfg_msi_parent_chip, msi_data,
	110	handle_simple_irq, NULL, NULL);
	111
	112	return 0;
	113	}
	114
	115	static void ls_scfg_msi_domain_irq_free(struct irq_domain *domain,
	116	unsigned int virq, unsigned int nr_irqs)
	117	{
	118	struct irq_data *d = irq_domain_get_irq_data(domain, virq);
	119	struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(d);
	120	int pos;
	121
	122	pos = d->hwirq;
4dd5da65	123	if (pos < 0 \|\| pos >= msi_data->irqs_num) {
b8f3ebe6 ML	124	pr_err("failed to teardown msi. Invalid hwirq %d\n", pos);
	125	return;
	126	}
	127
	128	spin_lock(&msi_data->lock);
	129	__clear_bit(pos, msi_data->used);
	130	spin_unlock(&msi_data->lock);
	131	}
	132
	133	static const struct irq_domain_ops ls_scfg_msi_domain_ops = {
	134	.alloc = ls_scfg_msi_domain_irq_alloc,
	135	.free = ls_scfg_msi_domain_irq_free,
	136	};
	137
	138	static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
	139	{
4dd5da65 ML	140	struct ls_scfg_msir *msir = irq_desc_get_handler_data(desc);
4dd5da65 ML	141	struct ls_scfg_msi *msi_data = msir->msi_data;
b8f3ebe6	142	unsigned long val;
4dd5da65	143	int pos, virq, hwirq;
b8f3ebe6 ML	144
	145	chained_irq_enter(irq_desc_get_chip(desc), desc);
	146
4dd5da65 ML	147	val = ioread32be(msir->reg);
	148	for_each_set_bit(pos, &val, MSI_IRQS_PER_MSIR) {
	149	hwirq = ((31 - pos) << msi_data->cfg->ibs_shift) \| msir->index;
	150	virq = irq_find_mapping(msi_data->parent, hwirq);
b8f3ebe6 ML	151	if (virq)
	152	generic_handle_irq(virq);
	153	}
	154
	155	chained_irq_exit(irq_desc_get_chip(desc), desc);
	156	}
	157
	158	static int ls_scfg_msi_domains_init(struct ls_scfg_msi *msi_data)
	159	{
	160	/* Initialize MSI domain parent */
	161	msi_data->parent = irq_domain_add_linear(NULL,
4dd5da65	162	msi_data->irqs_num,
b8f3ebe6 ML	163	&ls_scfg_msi_domain_ops,
	164	msi_data);
	165	if (!msi_data->parent) {
	166	dev_err(&msi_data->pdev->dev, "failed to create IRQ domain\n");
	167	return -ENOMEM;
	168	}
	169
	170	msi_data->msi_domain = pci_msi_create_irq_domain(
	171	of_node_to_fwnode(msi_data->pdev->dev.of_node),
	172	&ls_scfg_msi_domain_info,
	173	msi_data->parent);
	174	if (!msi_data->msi_domain) {
	175	dev_err(&msi_data->pdev->dev, "failed to create MSI domain\n");
	176	irq_domain_remove(msi_data->parent);
	177	return -ENOMEM;
	178	}
	179
	180	return 0;
	181	}
	182
4dd5da65 ML	183	static int ls_scfg_msi_setup_hwirq(struct ls_scfg_msi *msi_data, int index)
	184	{
	185	struct ls_scfg_msir *msir;
	186	int virq, i, hwirq;
	187
	188	virq = platform_get_irq(msi_data->pdev, index);
	189	if (virq <= 0)
	190	return -ENODEV;
	191
	192	msir = &msi_data->msir[index];
	193	msir->index = index;
	194	msir->msi_data = msi_data;
	195	msir->gic_irq = virq;
	196	msir->reg = msi_data->regs + MSI_MSIR_OFFSET + 4 * index;
	197
	198	irq_set_chained_handler_and_data(msir->gic_irq,
	199	ls_scfg_msi_irq_handler,
	200	msir);
	201
	202	/* Release the hwirqs corresponding to this MSIR */
	203	for (i = 0; i < MSI_IRQS_PER_MSIR; i++) {
	204	hwirq = i << msi_data->cfg->ibs_shift \| msir->index;
	205	bitmap_clear(msi_data->used, hwirq, 1);
	206	}
	207
	208	return 0;
	209	}
	210
	211	static int ls_scfg_msi_teardown_hwirq(struct ls_scfg_msir *msir)
	212	{
	213	struct ls_scfg_msi *msi_data = msir->msi_data;
	214	int i, hwirq;
	215
	216	if (msir->gic_irq > 0)
	217	irq_set_chained_handler_and_data(msir->gic_irq, NULL, NULL);
	218
	219	for (i = 0; i < MSI_IRQS_PER_MSIR; i++) {
	220	hwirq = i << msi_data->cfg->ibs_shift \| msir->index;
	221	bitmap_set(msi_data->used, hwirq, 1);
	222	}
	223
	224	return 0;
	225	}
	226
	227	static struct ls_scfg_msi_cfg ls1021_msi_cfg = {
	228	.ibs_shift = 3,
	229	};
	230
	231	static struct ls_scfg_msi_cfg ls1046_msi_cfg = {
	232	.ibs_shift = 2,
	233	};
	234
	235	static const struct of_device_id ls_scfg_msi_id[] = {
	236	/* The following two misspelled compatibles are obsolete */
	237	{ .compatible = "fsl,1s1021a-msi", .data = &ls1021_msi_cfg},
	238	{ .compatible = "fsl,1s1043a-msi", .data = &ls1021_msi_cfg},
	239
	240	{ .compatible = "fsl,ls1021a-msi", .data = &ls1021_msi_cfg },
	241	{ .compatible = "fsl,ls1043a-msi", .data = &ls1021_msi_cfg },
	242	{ .compatible = "fsl,ls1046a-msi", .data = &ls1046_msi_cfg },
	243	{},
	244	};
	245	MODULE_DEVICE_TABLE(of, ls_scfg_msi_id);
	246
b8f3ebe6 ML	247	static int ls_scfg_msi_probe(struct platform_device *pdev)
b8f3ebe6 ML	248	{
4dd5da65	249	const struct of_device_id *match;
b8f3ebe6 ML	250	struct ls_scfg_msi *msi_data;
b8f3ebe6 ML	251	struct resource *res;
4dd5da65 ML	252	int i, ret;
	253
	254	match = of_match_device(ls_scfg_msi_id, &pdev->dev);
	255	if (!match)
	256	return -ENODEV;
b8f3ebe6 ML	257
	258	msi_data = devm_kzalloc(&pdev->dev, sizeof(*msi_data), GFP_KERNEL);
	259	if (!msi_data)
	260	return -ENOMEM;
	261
4dd5da65 ML	262	msi_data->cfg = (struct ls_scfg_msi_cfg *) match->data;
4dd5da65 ML	263
b8f3ebe6 ML	264	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	265	msi_data->regs = devm_ioremap_resource(&pdev->dev, res);
	266	if (IS_ERR(msi_data->regs)) {
	267	dev_err(&pdev->dev, "failed to initialize 'regs'\n");
	268	return PTR_ERR(msi_data->regs);
	269	}
	270	msi_data->msiir_addr = res->start;
	271
b8f3ebe6 ML	272	msi_data->pdev = pdev;
	273	spin_lock_init(&msi_data->lock);
	274
4dd5da65 ML	275	msi_data->irqs_num = MSI_IRQS_PER_MSIR *
	276	(1 << msi_data->cfg->ibs_shift);
	277	msi_data->used = devm_kcalloc(&pdev->dev,
	278	BITS_TO_LONGS(msi_data->irqs_num),
	279	sizeof(*msi_data->used),
	280	GFP_KERNEL);
	281	if (!msi_data->used)
	282	return -ENOMEM;
	283	/*
	284	* Reserve all the hwirqs
	285	* The available hwirqs will be released in ls1_msi_setup_hwirq()
	286	*/
	287	bitmap_set(msi_data->used, 0, msi_data->irqs_num);
	288
	289	msi_data->msir_num = of_irq_count(pdev->dev.of_node);
	290	msi_data->msir = devm_kcalloc(&pdev->dev, msi_data->msir_num,
	291	sizeof(*msi_data->msir),
	292	GFP_KERNEL);
	293	if (!msi_data->msir)
	294	return -ENOMEM;
	295
	296	for (i = 0; i < msi_data->msir_num; i++)
	297	ls_scfg_msi_setup_hwirq(msi_data, i);
	298
b8f3ebe6 ML	299	ret = ls_scfg_msi_domains_init(msi_data);
	300	if (ret)
	301	return ret;
	302
b8f3ebe6 ML	303	platform_set_drvdata(pdev, msi_data);
	304
	305	return 0;
	306	}
	307
	308	static int ls_scfg_msi_remove(struct platform_device *pdev)
	309	{
	310	struct ls_scfg_msi *msi_data = platform_get_drvdata(pdev);
4dd5da65	311	int i;
b8f3ebe6	312
4dd5da65 ML	313	for (i = 0; i < msi_data->msir_num; i++)
4dd5da65 ML	314	ls_scfg_msi_teardown_hwirq(&msi_data->msir[i]);
b8f3ebe6 ML	315
	316	irq_domain_remove(msi_data->msi_domain);
	317	irq_domain_remove(msi_data->parent);
	318
	319	platform_set_drvdata(pdev, NULL);
	320
	321	return 0;
	322	}
	323
b8f3ebe6 ML	324	static struct platform_driver ls_scfg_msi_driver = {
	325	.driver = {
	326	.name = "ls-scfg-msi",
	327	.of_match_table = ls_scfg_msi_id,
	328	},
	329	.probe = ls_scfg_msi_probe,
	330	.remove = ls_scfg_msi_remove,
	331	};
	332
	333	module_platform_driver(ls_scfg_msi_driver);
	334
	335	MODULE_AUTHOR("Minghuan Lian <Minghuan.Lian@nxp.com>");
	336	MODULE_DESCRIPTION("Freescale Layerscape SCFG MSI controller driver");
	337	MODULE_LICENSE("GPL v2");