[linux-block.git] / drivers / irqchip / irq-crossbar.c

/*
 *  drivers/irqchip/irq-crossbar.c
 *
 *  Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
 *  Author: Sricharan R <r.sricharan@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/slab.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/irqchip/irq-crossbar.h>

#define IRQ_FREE	-1
#define IRQ_RESERVED	-2
#define IRQ_SKIP	-3
#define GIC_IRQ_START	32

/**
 * struct crossbar_device - crossbar device description
 * @int_max: maximum number of supported interrupts
 * @safe_map: safe default value to initialize the crossbar
 * @max_crossbar_sources: Maximum number of crossbar sources
 * @irq_map: array of interrupts to crossbar number mapping
 * @crossbar_base: crossbar base address
 * @register_offsets: offsets for each irq number
 * @write: register write function pointer
 */
struct crossbar_device {
	uint int_max;
	uint safe_map;
	uint max_crossbar_sources;
	uint *irq_map;
	void __iomem *crossbar_base;
	int *register_offsets;
	void (*write)(int, int);
};

static struct crossbar_device *cb;

static inline void crossbar_writel(int irq_no, int cb_no)
{
	writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}

static inline void crossbar_writew(int irq_no, int cb_no)
{
	writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}

static inline void crossbar_writeb(int irq_no, int cb_no)
{
	writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}

static inline int get_prev_map_irq(int cb_no)
{
	int i;

	for (i = cb->int_max - 1; i >= 0; i--)
		if (cb->irq_map[i] == cb_no)
			return i;

	return -ENODEV;
}

static inline int allocate_free_irq(int cb_no)
{
	int i;

	for (i = cb->int_max - 1; i >= 0; i--) {
		if (cb->irq_map[i] == IRQ_FREE) {
			cb->irq_map[i] = cb_no;
			return i;
		}
	}

	return -ENODEV;
}

static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
			       irq_hw_number_t hw)
{
	cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
	return 0;
}

/**
 * crossbar_domain_unmap - unmap a crossbar<->irq connection
 * @d: domain of irq to unmap
 * @irq: virq number
 *
 * We do not maintain a use count of total number of map/unmap
 * calls for a particular irq to find out if a irq can be really
 * unmapped. This is because unmap is called during irq_dispose_mapping(irq),
 * after which irq is anyways unusable. So an explicit map has to be called
 * after that.
 */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
	irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;

	if (hw > GIC_IRQ_START) {
		cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
		cb->write(hw - GIC_IRQ_START, cb->safe_map);
	}
}

static int crossbar_domain_xlate(struct irq_domain *d,
				 struct device_node *controller,
				 const u32 *intspec, unsigned int intsize,
				 unsigned long *out_hwirq,
				 unsigned int *out_type)
{
	int ret;
	int req_num = intspec[1];

	if (req_num >= cb->max_crossbar_sources) {
		pr_err("%s: requested crossbar number %d > max %d\n",
		       __func__, req_num, cb->max_crossbar_sources);
		return -EINVAL;
	}

	ret = get_prev_map_irq(req_num);
	if (ret >= 0)
		goto found;

	ret = allocate_free_irq(req_num);

	if (ret < 0)
		return ret;

found:
	*out_hwirq = ret + GIC_IRQ_START;
	return 0;
}

static const struct irq_domain_ops routable_irq_domain_ops = {
	.map = crossbar_domain_map,
	.unmap = crossbar_domain_unmap,
	.xlate = crossbar_domain_xlate
};

static int __init crossbar_of_init(struct device_node *node)
{
	int i, size, max = 0, reserved = 0, entry;
	const __be32 *irqsr;
	int ret = -ENOMEM;

	cb = kzalloc(sizeof(*cb), GFP_KERNEL);

	if (!cb)
		return ret;

	cb->crossbar_base = of_iomap(node, 0);
	if (!cb->crossbar_base)
		goto err_cb;

	of_property_read_u32(node, "ti,max-crossbar-sources",
			     &cb->max_crossbar_sources);
	if (!cb->max_crossbar_sources) {
		pr_err("missing 'ti,max-crossbar-sources' property\n");
		ret = -EINVAL;
		goto err_base;
	}

	of_property_read_u32(node, "ti,max-irqs", &max);
	if (!max) {
		pr_err("missing 'ti,max-irqs' property\n");
		ret = -EINVAL;
		goto err_base;
	}
	cb->irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
	if (!cb->irq_map)
		goto err_base;

	cb->int_max = max;

	for (i = 0; i < max; i++)
		cb->irq_map[i] = IRQ_FREE;

	/* Get and mark reserved irqs */
	irqsr = of_get_property(node, "ti,irqs-reserved", &size);
	if (irqsr) {
		size /= sizeof(__be32);

		for (i = 0; i < size; i++) {
			of_property_read_u32_index(node,
						   "ti,irqs-reserved",
						   i, &entry);
			if (entry > max) {
				pr_err("Invalid reserved entry\n");
				ret = -EINVAL;
				goto err_irq_map;
			}
			cb->irq_map[entry] = IRQ_RESERVED;
		}
	}

	/* Skip irqs hardwired to bypass the crossbar */
	irqsr = of_get_property(node, "ti,irqs-skip", &size);
	if (irqsr) {
		size /= sizeof(__be32);

		for (i = 0; i < size; i++) {
			of_property_read_u32_index(node,
						   "ti,irqs-skip",
						   i, &entry);
			if (entry > max) {
				pr_err("Invalid skip entry\n");
				ret = -EINVAL;
				goto err_irq_map;
			}
			cb->irq_map[entry] = IRQ_SKIP;
		}
	}


	cb->register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
	if (!cb->register_offsets)
		goto err_irq_map;

	of_property_read_u32(node, "ti,reg-size", &size);

	switch (size) {
	case 1:
		cb->write = crossbar_writeb;
		break;
	case 2:
		cb->write = crossbar_writew;
		break;
	case 4:
		cb->write = crossbar_writel;
		break;
	default:
		pr_err("Invalid reg-size property\n");
		ret = -EINVAL;
		goto err_reg_offset;
		break;
	}

	/*
	 * Register offsets are not linear because of the
	 * reserved irqs. so find and store the offsets once.
	 */
	for (i = 0; i < max; i++) {
		if (cb->irq_map[i] == IRQ_RESERVED)
			continue;

		cb->register_offsets[i] = reserved;
		reserved += size;
	}

	of_property_read_u32(node, "ti,irqs-safe-map", &cb->safe_map);
	/* Initialize the crossbar with safe map to start with */
	for (i = 0; i < max; i++) {
		if (cb->irq_map[i] == IRQ_RESERVED ||
		    cb->irq_map[i] == IRQ_SKIP)
			continue;

		cb->write(i, cb->safe_map);
	}

	register_routable_domain_ops(&routable_irq_domain_ops);
	return 0;

err_reg_offset:
	kfree(cb->register_offsets);
err_irq_map:
	kfree(cb->irq_map);
err_base:
	iounmap(cb->crossbar_base);
err_cb:
	kfree(cb);

	cb = NULL;
	return ret;
}

static const struct of_device_id crossbar_match[] __initconst = {
	{ .compatible = "ti,irq-crossbar" },
	{}
};

int __init irqcrossbar_init(void)
{
	struct device_node *np;
	np = of_find_matching_node(NULL, crossbar_match);
	if (!np)
		return -ENODEV;

	crossbar_of_init(np);
	return 0;
}
Commit	Line	Data
96ca848e S	1	/*
	2	* drivers/irqchip/irq-crossbar.c
	3	*
	4	* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
	5	* Author: Sricharan R <r.sricharan@ti.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	*/
	12	#include <linux/err.h>
	13	#include <linux/io.h>
	14	#include <linux/of_address.h>
	15	#include <linux/of_irq.h>
	16	#include <linux/slab.h>
	17	#include <linux/irqchip/arm-gic.h>
4dbf45e3	18	#include <linux/irqchip/irq-crossbar.h>
96ca848e S	19
96ca848e S	20	#define IRQ_FREE -1
1d50d2ce	21	#define IRQ_RESERVED -2
64e0f8ba	22	#define IRQ_SKIP -3
96ca848e S	23	#define GIC_IRQ_START 32
96ca848e S	24
e30ef8ab NM	25	/**
e30ef8ab NM	26	* struct crossbar_device - crossbar device description
96ca848e	27	* @int_max: maximum number of supported interrupts
a35057d1	28	* @safe_map: safe default value to initialize the crossbar
2f7d2fb7	29	* @max_crossbar_sources: Maximum number of crossbar sources
96ca848e S	30	* @irq_map: array of interrupts to crossbar number mapping
	31	* @crossbar_base: crossbar base address
	32	* @register_offsets: offsets for each irq number
e30ef8ab	33	* @write: register write function pointer
96ca848e S	34	*/
	35	struct crossbar_device {
	36	uint int_max;
a35057d1	37	uint safe_map;
2f7d2fb7	38	uint max_crossbar_sources;
96ca848e S	39	uint *irq_map;
	40	void __iomem *crossbar_base;
	41	int *register_offsets;
a35057d1	42	void (*write)(int, int);
96ca848e S	43	};
	44
	45	static struct crossbar_device *cb;
	46
	47	static inline void crossbar_writel(int irq_no, int cb_no)
	48	{
	49	writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
	50	}
	51
	52	static inline void crossbar_writew(int irq_no, int cb_no)
	53	{
	54	writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
	55	}
	56
	57	static inline void crossbar_writeb(int irq_no, int cb_no)
	58	{
	59	writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
	60	}
	61
6f16fc87 NM	62	static inline int get_prev_map_irq(int cb_no)
	63	{
	64	int i;
	65
ddee0fb4	66	for (i = cb->int_max - 1; i >= 0; i--)
6f16fc87 NM	67	if (cb->irq_map[i] == cb_no)
	68	return i;
	69
	70	return -ENODEV;
	71	}
	72
96ca848e S	73	static inline int allocate_free_irq(int cb_no)
	74	{
	75	int i;
	76
ddee0fb4	77	for (i = cb->int_max - 1; i >= 0; i--) {
96ca848e S	78	if (cb->irq_map[i] == IRQ_FREE) {
	79	cb->irq_map[i] = cb_no;
	80	return i;
	81	}
	82	}
	83
	84	return -ENODEV;
	85	}
	86
	87	static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
	88	irq_hw_number_t hw)
	89	{
	90	cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
	91	return 0;
	92	}
	93
8b09a45d S	94	/**
	95	* crossbar_domain_unmap - unmap a crossbar<->irq connection
	96	* @d: domain of irq to unmap
	97	* @irq: virq number
	98	*
	99	* We do not maintain a use count of total number of map/unmap
	100	* calls for a particular irq to find out if a irq can be really
	101	* unmapped. This is because unmap is called during irq_dispose_mapping(irq),
	102	* after which irq is anyways unusable. So an explicit map has to be called
	103	* after that.
	104	*/
96ca848e S	105	static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
	106	{
	107	irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
	108
a35057d1	109	if (hw > GIC_IRQ_START) {
96ca848e	110	cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
a35057d1 NM	111	cb->write(hw - GIC_IRQ_START, cb->safe_map);
a35057d1 NM	112	}
96ca848e S	113	}
	114
	115	static int crossbar_domain_xlate(struct irq_domain *d,
	116	struct device_node *controller,
	117	const u32 *intspec, unsigned int intsize,
	118	unsigned long *out_hwirq,
	119	unsigned int *out_type)
	120	{
d4922a95	121	int ret;
2f7d2fb7	122	int req_num = intspec[1];
96ca848e	123
2f7d2fb7 NM	124	if (req_num >= cb->max_crossbar_sources) {
	125	pr_err("%s: requested crossbar number %d > max %d\n",
	126	__func__, req_num, cb->max_crossbar_sources);
	127	return -EINVAL;
	128	}
	129
	130	ret = get_prev_map_irq(req_num);
d4922a95	131	if (ret >= 0)
6f16fc87 NM	132	goto found;
6f16fc87 NM	133
2f7d2fb7	134	ret = allocate_free_irq(req_num);
96ca848e	135
d4922a95	136	if (ret < 0)
96ca848e S	137	return ret;
96ca848e S	138
6f16fc87	139	found:
96ca848e S	140	*out_hwirq = ret + GIC_IRQ_START;
	141	return 0;
	142	}
	143
4dbf45e3	144	static const struct irq_domain_ops routable_irq_domain_ops = {
96ca848e S	145	.map = crossbar_domain_map,
	146	.unmap = crossbar_domain_unmap,
	147	.xlate = crossbar_domain_xlate
	148	};
	149
	150	static int __init crossbar_of_init(struct device_node *node)
	151	{
edb442de	152	int i, size, max = 0, reserved = 0, entry;
96ca848e	153	const __be32 *irqsr;
edb442de	154	int ret = -ENOMEM;
96ca848e	155
3894e9e8	156	cb = kzalloc(sizeof(*cb), GFP_KERNEL);
96ca848e S	157
96ca848e S	158	if (!cb)
edb442de	159	return ret;
96ca848e S	160
	161	cb->crossbar_base = of_iomap(node, 0);
	162	if (!cb->crossbar_base)
3c44d515	163	goto err_cb;
96ca848e	164
2f7d2fb7 NM	165	of_property_read_u32(node, "ti,max-crossbar-sources",
	166	&cb->max_crossbar_sources);
	167	if (!cb->max_crossbar_sources) {
	168	pr_err("missing 'ti,max-crossbar-sources' property\n");
	169	ret = -EINVAL;
	170	goto err_base;
	171	}
	172
96ca848e	173	of_property_read_u32(node, "ti,max-irqs", &max);
edb442de NM	174	if (!max) {
	175	pr_err("missing 'ti,max-irqs' property\n");
	176	ret = -EINVAL;
3c44d515	177	goto err_base;
edb442de	178	}
4dbf45e3	179	cb->irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
96ca848e	180	if (!cb->irq_map)
3c44d515	181	goto err_base;
96ca848e S	182
	183	cb->int_max = max;
	184
	185	for (i = 0; i < max; i++)
	186	cb->irq_map[i] = IRQ_FREE;
	187
	188	/* Get and mark reserved irqs */
	189	irqsr = of_get_property(node, "ti,irqs-reserved", &size);
	190	if (irqsr) {
	191	size /= sizeof(__be32);
	192
	193	for (i = 0; i < size; i++) {
	194	of_property_read_u32_index(node,
	195	"ti,irqs-reserved",
	196	i, &entry);
	197	if (entry > max) {
	198	pr_err("Invalid reserved entry\n");
edb442de	199	ret = -EINVAL;
3c44d515	200	goto err_irq_map;
96ca848e	201	}
1d50d2ce	202	cb->irq_map[entry] = IRQ_RESERVED;
96ca848e S	203	}
	204	}
	205
64e0f8ba NM	206	/* Skip irqs hardwired to bypass the crossbar */
	207	irqsr = of_get_property(node, "ti,irqs-skip", &size);
	208	if (irqsr) {
	209	size /= sizeof(__be32);
	210
	211	for (i = 0; i < size; i++) {
	212	of_property_read_u32_index(node,
	213	"ti,irqs-skip",
	214	i, &entry);
	215	if (entry > max) {
	216	pr_err("Invalid skip entry\n");
	217	ret = -EINVAL;
3c44d515	218	goto err_irq_map;
64e0f8ba NM	219	}
	220	cb->irq_map[entry] = IRQ_SKIP;
	221	}
	222	}
	223
	224
4dbf45e3	225	cb->register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
96ca848e	226	if (!cb->register_offsets)
3c44d515	227	goto err_irq_map;
96ca848e S	228
	229	of_property_read_u32(node, "ti,reg-size", &size);
	230
	231	switch (size) {
	232	case 1:
	233	cb->write = crossbar_writeb;
	234	break;
	235	case 2:
	236	cb->write = crossbar_writew;
	237	break;
	238	case 4:
	239	cb->write = crossbar_writel;
	240	break;
	241	default:
	242	pr_err("Invalid reg-size property\n");
edb442de	243	ret = -EINVAL;
3c44d515	244	goto err_reg_offset;
96ca848e S	245	break;
	246	}
	247
	248	/*
	249	* Register offsets are not linear because of the
	250	* reserved irqs. so find and store the offsets once.
	251	*/
	252	for (i = 0; i < max; i++) {
1d50d2ce	253	if (cb->irq_map[i] == IRQ_RESERVED)
96ca848e S	254	continue;
	255
	256	cb->register_offsets[i] = reserved;
	257	reserved += size;
	258	}
	259
a35057d1	260	of_property_read_u32(node, "ti,irqs-safe-map", &cb->safe_map);
a35057d1 NM	261	/* Initialize the crossbar with safe map to start with */
	262	for (i = 0; i < max; i++) {
	263	if (cb->irq_map[i] == IRQ_RESERVED \|\|
	264	cb->irq_map[i] == IRQ_SKIP)
	265	continue;
	266
	267	cb->write(i, cb->safe_map);
	268	}
	269
96ca848e S	270	register_routable_domain_ops(&routable_irq_domain_ops);
	271	return 0;
	272
3c44d515	273	err_reg_offset:
96ca848e	274	kfree(cb->register_offsets);
3c44d515	275	err_irq_map:
96ca848e	276	kfree(cb->irq_map);
3c44d515	277	err_base:
96ca848e	278	iounmap(cb->crossbar_base);
3c44d515	279	err_cb:
96ca848e	280	kfree(cb);
99e37d0e S	281
99e37d0e S	282	cb = NULL;
edb442de	283	return ret;
96ca848e S	284	}
	285
	286	static const struct of_device_id crossbar_match[] __initconst = {
	287	{ .compatible = "ti,irq-crossbar" },
	288	{}
	289	};
	290
	291	int __init irqcrossbar_init(void)
	292	{
	293	struct device_node *np;
	294	np = of_find_matching_node(NULL, crossbar_match);
	295	if (!np)
	296	return -ENODEV;
	297
	298	crossbar_of_init(np);
	299	return 0;
	300	}