[linux-2.6-block.git] / drivers / irqchip / irq-bcm7120-l2.c

/*
 * Broadcom BCM7120 style Level 2 interrupt controller driver
 *
 * Copyright (C) 2014 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#define pr_fmt(fmt)	KBUILD_MODNAME	": " fmt

#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
#include <linux/reboot.h>
#include <linux/irqchip/chained_irq.h>

#include "irqchip.h"

/* Register offset in the L2 interrupt controller */
#define IRQEN		0x00
#define IRQSTAT		0x04

struct bcm7120_l2_intc_data {
	void __iomem *base;
	struct irq_domain *domain;
	bool can_wake;
	u32 irq_fwd_mask;
	u32 irq_map_mask;
};

static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
{
	struct bcm7120_l2_intc_data *b = irq_desc_get_handler_data(desc);
	struct irq_chip *chip = irq_desc_get_chip(desc);
	u32 status;

	chained_irq_enter(chip, desc);

	status = __raw_readl(b->base + IRQSTAT);
	while (status) {
		irq = ffs(status) - 1;
		status &= ~(1 << irq);
		generic_handle_irq(irq_find_mapping(b->domain, irq));
	}

	chained_irq_exit(chip, desc);
}

static void bcm7120_l2_intc_suspend(struct irq_data *d)
{
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
	struct bcm7120_l2_intc_data *b = gc->private;

	irq_gc_lock(gc);
	if (b->can_wake) {
		__raw_writel(gc->mask_cache | gc->wake_active,
			     b->base + IRQEN);
	}
	irq_gc_unlock(gc);
}

static void bcm7120_l2_intc_resume(struct irq_data *d)
{
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	/* Restore the saved mask */
	irq_gc_lock(gc);
	__raw_writel(gc->mask_cache, b->base + IRQEN);
	irq_gc_unlock(gc);
}

static int bcm7120_l2_intc_init_one(struct device_node *dn,
					struct bcm7120_l2_intc_data *data,
					int irq, const __be32 *map_mask)
{
	int parent_irq;

	parent_irq = irq_of_parse_and_map(dn, irq);
	if (parent_irq < 0) {
		pr_err("failed to map interrupt %d\n", irq);
		return parent_irq;
	}

	data->irq_map_mask |= be32_to_cpup(map_mask + irq);

	irq_set_handler_data(parent_irq, data);
	irq_set_chained_handler(parent_irq, bcm7120_l2_intc_irq_handle);

	return 0;
}

int __init bcm7120_l2_intc_of_init(struct device_node *dn,
					struct device_node *parent)
{
	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
	struct bcm7120_l2_intc_data *data;
	struct irq_chip_generic *gc;
	struct irq_chip_type *ct;
	const __be32 *map_mask;
	int num_parent_irqs;
	int ret = 0, len, irq;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->base = of_iomap(dn, 0);
	if (!data->base) {
		pr_err("failed to remap intc L2 registers\n");
		ret = -ENOMEM;
		goto out_free;
	}

	if (of_property_read_u32(dn, "brcm,int-fwd-mask", &data->irq_fwd_mask))
		data->irq_fwd_mask = 0;

	/* Enable all interrupt specified in the interrupt forward mask and have
	 * the other disabled
	 */
	__raw_writel(data->irq_fwd_mask, data->base + IRQEN);

	num_parent_irqs = of_irq_count(dn);
	if (num_parent_irqs <= 0) {
		pr_err("invalid number of parent interrupts\n");
		ret = -ENOMEM;
		goto out_unmap;
	}

	map_mask = of_get_property(dn, "brcm,int-map-mask", &len);
	if (!map_mask || (len != (sizeof(*map_mask) * num_parent_irqs))) {
		pr_err("invalid brcm,int-map-mask property\n");
		ret = -EINVAL;
		goto out_unmap;
	}

	for (irq = 0; irq < num_parent_irqs; irq++) {
		ret = bcm7120_l2_intc_init_one(dn, data, irq, map_mask);
		if (ret)
			goto out_unmap;
	}

	data->domain = irq_domain_add_linear(dn, 32,
					&irq_generic_chip_ops, NULL);
	if (!data->domain) {
		ret = -ENOMEM;
		goto out_unmap;
	}

	ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
				dn->full_name, handle_level_irq, clr, 0,
				IRQ_GC_INIT_MASK_CACHE);
	if (ret) {
		pr_err("failed to allocate generic irq chip\n");
		goto out_free_domain;
	}

	gc = irq_get_domain_generic_chip(data->domain, 0);
	gc->unused = 0xffffffff & ~data->irq_map_mask;
	gc->reg_base = data->base;
	gc->private = data;
	ct = gc->chip_types;

	ct->regs.mask = IRQEN;
	ct->chip.irq_mask = irq_gc_mask_clr_bit;
	ct->chip.irq_unmask = irq_gc_mask_set_bit;
	ct->chip.irq_ack = irq_gc_noop;
	ct->chip.irq_suspend = bcm7120_l2_intc_suspend;
	ct->chip.irq_resume = bcm7120_l2_intc_resume;

	if (of_property_read_bool(dn, "brcm,irq-can-wake")) {
		data->can_wake = true;
		/* This IRQ chip can wake the system, set all relevant child
		 * interupts in wake_enabled mask
		 */
		gc->wake_enabled = 0xffffffff;
		gc->wake_enabled &= ~gc->unused;
		ct->chip.irq_set_wake = irq_gc_set_wake;
	}

	pr_info("registered BCM7120 L2 intc (mem: 0x%p, parent IRQ(s): %d)\n",
			data->base, num_parent_irqs);

	return 0;

out_free_domain:
	irq_domain_remove(data->domain);
out_unmap:
	iounmap(data->base);
out_free:
	kfree(data);
	return ret;
}
IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,bcm7120-l2-intc",
		bcm7120_l2_intc_of_init);
Commit	Line	Data
a5042de2 FF	1	/*
	2	* Broadcom BCM7120 style Level 2 interrupt controller driver
	3	*
	4	* Copyright (C) 2014 Broadcom Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	12
	13	#include <linux/init.h>
	14	#include <linux/slab.h>
	15	#include <linux/module.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/of.h>
	18	#include <linux/of_irq.h>
	19	#include <linux/of_address.h>
	20	#include <linux/of_platform.h>
	21	#include <linux/interrupt.h>
	22	#include <linux/irq.h>
	23	#include <linux/io.h>
	24	#include <linux/irqdomain.h>
	25	#include <linux/reboot.h>
	26	#include <linux/irqchip/chained_irq.h>
	27
	28	#include "irqchip.h"
	29
a5042de2 FF	30	/* Register offset in the L2 interrupt controller */
	31	#define IRQEN 0x00
	32	#define IRQSTAT 0x04
	33
	34	struct bcm7120_l2_intc_data {
	35	void __iomem *base;
	36	struct irq_domain *domain;
	37	bool can_wake;
	38	u32 irq_fwd_mask;
	39	u32 irq_map_mask;
a5042de2 FF	40	};
	41
	42	static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
	43	{
	44	struct bcm7120_l2_intc_data *b = irq_desc_get_handler_data(desc);
	45	struct irq_chip *chip = irq_desc_get_chip(desc);
	46	u32 status;
	47
	48	chained_irq_enter(chip, desc);
	49
	50	status = __raw_readl(b->base + IRQSTAT);
f668f074	51	while (status) {
a5042de2 FF	52	irq = ffs(status) - 1;
	53	status &= ~(1 << irq);
	54	generic_handle_irq(irq_find_mapping(b->domain, irq));
f668f074	55	}
a5042de2	56
a5042de2 FF	57	chained_irq_exit(chip, desc);
	58	}
	59
	60	static void bcm7120_l2_intc_suspend(struct irq_data *d)
	61	{
	62	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
	63	struct bcm7120_l2_intc_data *b = gc->private;
a5042de2 FF	64
a5042de2 FF	65	irq_gc_lock(gc);
a5042de2	66	if (b->can_wake) {
05b8ce82 KC	67	__raw_writel(gc->mask_cache \| gc->wake_active,
05b8ce82 KC	68	b->base + IRQEN);
a5042de2 FF	69	}
	70	irq_gc_unlock(gc);
	71	}
	72
	73	static void bcm7120_l2_intc_resume(struct irq_data *d)
	74	{
	75	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
a5042de2 FF	76
	77	/* Restore the saved mask */
	78	irq_gc_lock(gc);
05b8ce82	79	__raw_writel(gc->mask_cache, b->base + IRQEN);
a5042de2 FF	80	irq_gc_unlock(gc);
	81	}
	82
	83	static int bcm7120_l2_intc_init_one(struct device_node *dn,
	84	struct bcm7120_l2_intc_data *data,
	85	int irq, const __be32 *map_mask)
	86	{
	87	int parent_irq;
	88
	89	parent_irq = irq_of_parse_and_map(dn, irq);
	90	if (parent_irq < 0) {
	91	pr_err("failed to map interrupt %d\n", irq);
	92	return parent_irq;
	93	}
	94
	95	data->irq_map_mask \|= be32_to_cpup(map_mask + irq);
	96
	97	irq_set_handler_data(parent_irq, data);
	98	irq_set_chained_handler(parent_irq, bcm7120_l2_intc_irq_handle);
	99
	100	return 0;
	101	}
	102
	103	int __init bcm7120_l2_intc_of_init(struct device_node *dn,
	104	struct device_node *parent)
	105	{
	106	unsigned int clr = IRQ_NOREQUEST \| IRQ_NOPROBE \| IRQ_NOAUTOEN;
	107	struct bcm7120_l2_intc_data *data;
	108	struct irq_chip_generic *gc;
	109	struct irq_chip_type *ct;
	110	const __be32 *map_mask;
	111	int num_parent_irqs;
	112	int ret = 0, len, irq;
	113
	114	data = kzalloc(sizeof(*data), GFP_KERNEL);
	115	if (!data)
	116	return -ENOMEM;
	117
	118	data->base = of_iomap(dn, 0);
	119	if (!data->base) {
	120	pr_err("failed to remap intc L2 registers\n");
	121	ret = -ENOMEM;
	122	goto out_free;
	123	}
	124
	125	if (of_property_read_u32(dn, "brcm,int-fwd-mask", &data->irq_fwd_mask))
	126	data->irq_fwd_mask = 0;
	127
	128	/* Enable all interrupt specified in the interrupt forward mask and have
	129	* the other disabled
	130	*/
	131	__raw_writel(data->irq_fwd_mask, data->base + IRQEN);
	132
	133	num_parent_irqs = of_irq_count(dn);
	134	if (num_parent_irqs <= 0) {
	135	pr_err("invalid number of parent interrupts\n");
	136	ret = -ENOMEM;
	137	goto out_unmap;
	138	}
	139
	140	map_mask = of_get_property(dn, "brcm,int-map-mask", &len);
	141	if (!map_mask \|\| (len != (sizeof(map_mask) num_parent_irqs))) {
	142	pr_err("invalid brcm,int-map-mask property\n");
	143	ret = -EINVAL;
144	goto out_unmap;
145	}
146
147	for (irq = 0; irq < num_parent_irqs; irq++) {
148	ret = bcm7120_l2_intc_init_one(dn, data, irq, map_mask);
149	if (ret)
150	goto out_unmap;
151	}
152
153	data->domain = irq_domain_add_linear(dn, 32,
154	&irq_generic_chip_ops, NULL);
155	if (!data->domain) {
156	ret = -ENOMEM;
157	goto out_unmap;
158	}
159
160	ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
161	dn->full_name, handle_level_irq, clr, 0,
162	IRQ_GC_INIT_MASK_CACHE);
163	if (ret) {
164	pr_err("failed to allocate generic irq chip\n");
165	goto out_free_domain;
166	}
167
168	gc = irq_get_domain_generic_chip(data->domain, 0);
0b5cb32c	169	gc->unused = 0xffffffff & ~data->irq_map_mask;
a5042de2 FF	170	gc->reg_base = data->base;
	171	gc->private = data;
	172	ct = gc->chip_types;
	173
	174	ct->regs.mask = IRQEN;
	175	ct->chip.irq_mask = irq_gc_mask_clr_bit;
	176	ct->chip.irq_unmask = irq_gc_mask_set_bit;
	177	ct->chip.irq_ack = irq_gc_noop;
	178	ct->chip.irq_suspend = bcm7120_l2_intc_suspend;
	179	ct->chip.irq_resume = bcm7120_l2_intc_resume;
	180
	181	if (of_property_read_bool(dn, "brcm,irq-can-wake")) {
	182	data->can_wake = true;
	183	/* This IRQ chip can wake the system, set all relevant child
	184	* interupts in wake_enabled mask
	185	*/
	186	gc->wake_enabled = 0xffffffff;
	187	gc->wake_enabled &= ~gc->unused;
	188	ct->chip.irq_set_wake = irq_gc_set_wake;
	189	}
	190
	191	pr_info("registered BCM7120 L2 intc (mem: 0x%p, parent IRQ(s): %d)\n",
	192	data->base, num_parent_irqs);
	193
	194	return 0;
	195
	196	out_free_domain:
	197	irq_domain_remove(data->domain);
	198	out_unmap:
	199	iounmap(data->base);
	200	out_free:
	201	kfree(data);
	202	return ret;
	203	}
	204	IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,bcm7120-l2-intc",
	205	bcm7120_l2_intc_of_init);