Commit | Line | Data |
---|---|---|
f6e916b8 TP |
1 | config IRQCHIP |
2 | def_bool y | |
3 | depends on OF_IRQ | |
4 | ||
81243e44 RH |
5 | config ARM_GIC |
6 | bool | |
7 | select IRQ_DOMAIN | |
8 | select MULTI_IRQ_HANDLER | |
9 | ||
10 | config GIC_NON_BANKED | |
11 | bool | |
12 | ||
021f6537 MZ |
13 | config ARM_GIC_V3 |
14 | bool | |
15 | select IRQ_DOMAIN | |
16 | select MULTI_IRQ_HANDLER | |
17 | ||
292ec080 UKK |
18 | config ARM_NVIC |
19 | bool | |
20 | select IRQ_DOMAIN | |
21 | select GENERIC_IRQ_CHIP | |
22 | ||
44430ec0 RH |
23 | config ARM_VIC |
24 | bool | |
25 | select IRQ_DOMAIN | |
26 | select MULTI_IRQ_HANDLER | |
27 | ||
28 | config ARM_VIC_NR | |
29 | int | |
30 | default 4 if ARCH_S5PV210 | |
44430ec0 RH |
31 | default 2 |
32 | depends on ARM_VIC | |
33 | help | |
34 | The maximum number of VICs available in the system, for | |
35 | power management. | |
36 | ||
b1479ebb BB |
37 | config ATMEL_AIC_IRQ |
38 | bool | |
39 | select GENERIC_IRQ_CHIP | |
40 | select IRQ_DOMAIN | |
41 | select MULTI_IRQ_HANDLER | |
42 | select SPARSE_IRQ | |
43 | ||
44 | config ATMEL_AIC5_IRQ | |
45 | bool | |
46 | select GENERIC_IRQ_CHIP | |
47 | select IRQ_DOMAIN | |
48 | select MULTI_IRQ_HANDLER | |
49 | select SPARSE_IRQ | |
50 | ||
a4fcbb86 KC |
51 | config BCM7120_L2_IRQ |
52 | bool | |
53 | select GENERIC_IRQ_CHIP | |
54 | select IRQ_DOMAIN | |
55 | ||
7f646e92 FF |
56 | config BRCMSTB_L2_IRQ |
57 | bool | |
7f646e92 FF |
58 | select GENERIC_IRQ_CHIP |
59 | select IRQ_DOMAIN | |
60 | ||
350d71b9 SH |
61 | config DW_APB_ICTL |
62 | bool | |
e1588490 | 63 | select GENERIC_IRQ_CHIP |
350d71b9 SH |
64 | select IRQ_DOMAIN |
65 | ||
b6ef9161 JH |
66 | config IMGPDC_IRQ |
67 | bool | |
68 | select GENERIC_IRQ_CHIP | |
69 | select IRQ_DOMAIN | |
70 | ||
afc98d90 AS |
71 | config CLPS711X_IRQCHIP |
72 | bool | |
73 | depends on ARCH_CLPS711X | |
74 | select IRQ_DOMAIN | |
75 | select MULTI_IRQ_HANDLER | |
76 | select SPARSE_IRQ | |
77 | default y | |
78 | ||
4db8e6d2 SK |
79 | config OR1K_PIC |
80 | bool | |
81 | select IRQ_DOMAIN | |
82 | ||
8598066c FB |
83 | config OMAP_IRQCHIP |
84 | bool | |
85 | select GENERIC_IRQ_CHIP | |
86 | select IRQ_DOMAIN | |
87 | ||
9dbd90f1 SH |
88 | config ORION_IRQCHIP |
89 | bool | |
90 | select IRQ_DOMAIN | |
91 | select MULTI_IRQ_HANDLER | |
92 | ||
44358048 MD |
93 | config RENESAS_INTC_IRQPIN |
94 | bool | |
95 | select IRQ_DOMAIN | |
96 | ||
fbc83b7f MD |
97 | config RENESAS_IRQC |
98 | bool | |
99 | select IRQ_DOMAIN | |
100 | ||
b06eb017 CR |
101 | config TB10X_IRQC |
102 | bool | |
103 | select IRQ_DOMAIN | |
104 | select GENERIC_IRQ_CHIP | |
105 | ||
2389d501 LW |
106 | config VERSATILE_FPGA_IRQ |
107 | bool | |
108 | select IRQ_DOMAIN | |
109 | ||
110 | config VERSATILE_FPGA_IRQ_NR | |
111 | int | |
112 | default 4 | |
113 | depends on VERSATILE_FPGA_IRQ | |
26a8e96a MF |
114 | |
115 | config XTENSA_MX | |
116 | bool | |
117 | select IRQ_DOMAIN | |
96ca848e S |
118 | |
119 | config IRQ_CROSSBAR | |
120 | bool | |
121 | help | |
f54619f2 | 122 | Support for a CROSSBAR ip that precedes the main interrupt controller. |
96ca848e S |
123 | The primary irqchip invokes the crossbar's callback which inturn allocates |
124 | a free irq and configures the IP. Thus the peripheral interrupts are | |
125 | routed to one of the free irqchip interrupt lines. | |
89323f8c GS |
126 | |
127 | config KEYSTONE_IRQ | |
128 | tristate "Keystone 2 IRQ controller IP" | |
129 | depends on ARCH_KEYSTONE | |
130 | help | |
131 | Support for Texas Instruments Keystone 2 IRQ controller IP which | |
132 | is part of the Keystone 2 IPC mechanism | |
8a19b8f1 AB |
133 | |
134 | config MIPS_GIC | |
135 | bool | |
136 | select MIPS_CM |