[linux-2.6-block.git] / drivers / irqchip / Kconfig

menu "IRQ chip support"

config IRQCHIP
	def_bool y
	depends on OF_IRQ

config ARM_GIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select MULTI_IRQ_HANDLER
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config ARM_GIC_PM
	bool
	depends on PM
	select ARM_GIC
	select PM_CLK

config ARM_GIC_MAX_NR
	int
	default 2 if ARCH_REALVIEW
	default 1

config ARM_GIC_V2M
	bool
	depends on PCI
	select ARM_GIC
	select PCI_MSI

config GIC_NON_BANKED
	bool

config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select IRQ_DOMAIN_HIERARCHY
	select PARTITION_PERCPU
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config ARM_GIC_V3_ITS
	bool
	depends on PCI
	depends on PCI_MSI

config ARM_NVIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_IRQ_CHIP

config ARM_VIC
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_VIC_NR
	int
	default 4 if ARCH_S5PV210
	default 2
	depends on ARM_VIC
	help
	  The maximum number of VICs available in the system, for
	  power management.

config ARMADA_370_XP_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select PCI_MSI if PCI
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config ALPINE_MSI
	bool
	depends on PCI
	select PCI_MSI
	select GENERIC_IRQ_CHIP

config ATMEL_AIC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config ATMEL_AIC5_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config I8259
	bool
	select IRQ_DOMAIN

config BCM6345_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config BCM7038_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config BCM7120_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BRCMSTB_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config DW_APB_ICTL
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config FARADAY_FTINTC010
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config HISILICON_IRQ_MBIGEN
	bool
	select ARM_GIC_V3
	select ARM_GIC_V3_ITS

config IMGPDC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config IRQ_MIPS_CPU
	bool
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config CLPS711X_IRQCHIP
	bool
	depends on ARCH_CLPS711X
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	default y

config OMPIC
	bool

config OR1K_PIC
	bool
	select IRQ_DOMAIN

config OMAP_IRQCHIP
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ORION_IRQCHIP
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config PIC32_EVIC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config JCORE_AIC
	bool "J-Core integrated AIC" if COMPILE_TEST
	depends on OF
	select IRQ_DOMAIN
	help
	  Support for the J-Core integrated AIC.

config RENESAS_INTC_IRQPIN
	bool
	select IRQ_DOMAIN

config RENESAS_IRQC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ST_IRQCHIP
	bool
	select REGMAP
	select MFD_SYSCON
	help
	  Enables SysCfg Controlled IRQs on STi based platforms.

config TANGO_IRQ
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TB10X_IRQC
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TS4800_IRQ
	tristate "TS-4800 IRQ controller"
	select IRQ_DOMAIN
	depends on HAS_IOMEM
	depends on SOC_IMX51 || COMPILE_TEST
	help
	  Support for the TS-4800 FPGA IRQ controller

config VERSATILE_FPGA_IRQ
	bool
	select IRQ_DOMAIN

config VERSATILE_FPGA_IRQ_NR
       int
       default 4
       depends on VERSATILE_FPGA_IRQ

config XTENSA_MX
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config XILINX_INTC
	bool
	select IRQ_DOMAIN

config IRQ_CROSSBAR
	bool
	help
	  Support for a CROSSBAR ip that precedes the main interrupt controller.
	  The primary irqchip invokes the crossbar's callback which inturn allocates
	  a free irq and configures the IP. Thus the peripheral interrupts are
	  routed to one of the free irqchip interrupt lines.

config KEYSTONE_IRQ
	tristate "Keystone 2 IRQ controller IP"
	depends on ARCH_KEYSTONE
	help
		Support for Texas Instruments Keystone 2 IRQ controller IP which
		is part of the Keystone 2 IPC mechanism

config MIPS_GIC
	bool
	select GENERIC_IRQ_IPI
	select IRQ_DOMAIN_HIERARCHY
	select MIPS_CM

config INGENIC_IRQ
	bool
	depends on MACH_INGENIC
	default y

config RENESAS_H8300H_INTC
        bool
	select IRQ_DOMAIN

config RENESAS_H8S_INTC
        bool
	select IRQ_DOMAIN

config IMX_GPCV2
	bool
	select IRQ_DOMAIN
	help
	  Enables the wakeup IRQs for IMX platforms with GPCv2 block

config IRQ_MXS
	def_bool y if MACH_ASM9260 || ARCH_MXS
	select IRQ_DOMAIN
	select STMP_DEVICE

config MVEBU_GICP
	bool

config MVEBU_ICU
	bool

config MVEBU_ODMI
	bool
	select GENERIC_MSI_IRQ_DOMAIN

config MVEBU_PIC
	bool

config LS_SCFG_MSI
	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
	depends on PCI && PCI_MSI

config PARTITION_PERCPU
	bool

config EZNPS_GIC
	bool "NPS400 Global Interrupt Manager (GIM)"
	depends on ARC || (COMPILE_TEST && !64BIT)
	select IRQ_DOMAIN
	help
	  Support the EZchip NPS400 global interrupt controller

config STM32_EXTI
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config QCOM_IRQ_COMBINER
	bool "QCOM IRQ combiner support"
	depends on ARCH_QCOM && ACPI
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	help
	  Say yes here to add support for the IRQ combiner devices embedded
	  in Qualcomm Technologies chips.

config IRQ_UNIPHIER_AIDET
	bool "UniPhier AIDET support" if COMPILE_TEST
	depends on ARCH_UNIPHIER || COMPILE_TEST
	default ARCH_UNIPHIER
	select IRQ_DOMAIN_HIERARCHY
	help
	  Support for the UniPhier AIDET (ARM Interrupt Detector).

config MESON_IRQ_GPIO
       bool "Meson GPIO Interrupt Multiplexer"
       depends on ARCH_MESON
       select IRQ_DOMAIN
       select IRQ_DOMAIN_HIERARCHY
       help
         Support Meson SoC Family GPIO Interrupt Multiplexer

endmenu
Commit	Line	Data
c94fb639 RD	1	menu "IRQ chip support"
c94fb639 RD	2
f6e916b8 TP	3	config IRQCHIP
	4	def_bool y
	5	depends on OF_IRQ
	6
81243e44 RH	7	config ARM_GIC
	8	bool
	9	select IRQ_DOMAIN
9a1091ef	10	select IRQ_DOMAIN_HIERARCHY
81243e44	11	select MULTI_IRQ_HANDLER
0c9e4982	12	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
81243e44	13
9c8edddf JH	14	config ARM_GIC_PM
	15	bool
	16	depends on PM
	17	select ARM_GIC
	18	select PM_CLK
	19
a27d21e0 LW	20	config ARM_GIC_MAX_NR
	21	int
	22	default 2 if ARCH_REALVIEW
	23	default 1
	24
853a33ce SS	25	config ARM_GIC_V2M
853a33ce SS	26	bool
3ee80364 AB	27	depends on PCI
	28	select ARM_GIC
	29	select PCI_MSI
853a33ce	30
81243e44 RH	31	config GIC_NON_BANKED
	32	bool
	33
021f6537 MZ	34	config ARM_GIC_V3
	35	bool
	36	select IRQ_DOMAIN
	37	select MULTI_IRQ_HANDLER
443acc4f	38	select IRQ_DOMAIN_HIERARCHY
e3825ba1	39	select PARTITION_PERCPU
956ae91a	40	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
021f6537	41
19812729 MZ	42	config ARM_GIC_V3_ITS
19812729 MZ	43	bool
3ee80364 AB	44	depends on PCI
3ee80364 AB	45	depends on PCI_MSI
021f6537	46
292ec080 UKK	47	config ARM_NVIC
	48	bool
	49	select IRQ_DOMAIN
2d9f59f7	50	select IRQ_DOMAIN_HIERARCHY
292ec080 UKK	51	select GENERIC_IRQ_CHIP
292ec080 UKK	52
44430ec0 RH	53	config ARM_VIC
	54	bool
	55	select IRQ_DOMAIN
	56	select MULTI_IRQ_HANDLER
	57
	58	config ARM_VIC_NR
	59	int
	60	default 4 if ARCH_S5PV210
44430ec0 RH	61	default 2
	62	depends on ARM_VIC
	63	help
	64	The maximum number of VICs available in the system, for
	65	power management.
	66
fed6d336 TP	67	config ARMADA_370_XP_IRQ
fed6d336 TP	68	bool
fed6d336	69	select GENERIC_IRQ_CHIP
3ee80364	70	select PCI_MSI if PCI
e31793a3	71	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
fed6d336	72
e6b78f2c AT	73	config ALPINE_MSI
e6b78f2c AT	74	bool
3ee80364 AB	75	depends on PCI
3ee80364 AB	76	select PCI_MSI
e6b78f2c	77	select GENERIC_IRQ_CHIP
e6b78f2c	78
b1479ebb BB	79	config ATMEL_AIC_IRQ
	80	bool
	81	select GENERIC_IRQ_CHIP
	82	select IRQ_DOMAIN
	83	select MULTI_IRQ_HANDLER
	84	select SPARSE_IRQ
	85
	86	config ATMEL_AIC5_IRQ
	87	bool
	88	select GENERIC_IRQ_CHIP
	89	select IRQ_DOMAIN
	90	select MULTI_IRQ_HANDLER
	91	select SPARSE_IRQ
	92
0509cfde RB	93	config I8259
	94	bool
	95	select IRQ_DOMAIN
	96
c7c42ec2 SA	97	config BCM6345_L1_IRQ
	98	bool
	99	select GENERIC_IRQ_CHIP
	100	select IRQ_DOMAIN
d0ed5e8e	101	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
c7c42ec2	102
5f7f0317 KC	103	config BCM7038_L1_IRQ
	104	bool
	105	select GENERIC_IRQ_CHIP
	106	select IRQ_DOMAIN
b8d9884a	107	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
5f7f0317	108
a4fcbb86 KC	109	config BCM7120_L2_IRQ
	110	bool
	111	select GENERIC_IRQ_CHIP
	112	select IRQ_DOMAIN
	113
7f646e92 FF	114	config BRCMSTB_L2_IRQ
7f646e92 FF	115	bool
7f646e92 FF	116	select GENERIC_IRQ_CHIP
	117	select IRQ_DOMAIN
	118
350d71b9 SH	119	config DW_APB_ICTL
350d71b9 SH	120	bool
e1588490	121	select GENERIC_IRQ_CHIP
350d71b9 SH	122	select IRQ_DOMAIN
350d71b9 SH	123
6ee532e2 LW	124	config FARADAY_FTINTC010
	125	bool
	126	select IRQ_DOMAIN
	127	select MULTI_IRQ_HANDLER
	128	select SPARSE_IRQ
	129
9a7c4abd M	130	config HISILICON_IRQ_MBIGEN
	131	bool
	132	select ARM_GIC_V3
	133	select ARM_GIC_V3_ITS
9a7c4abd	134
b6ef9161 JH	135	config IMGPDC_IRQ
	136	bool
	137	select GENERIC_IRQ_CHIP
	138	select IRQ_DOMAIN
	139
67e38cf2 RB	140	config IRQ_MIPS_CPU
	141	bool
	142	select GENERIC_IRQ_CHIP
3838a547	143	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
67e38cf2	144	select IRQ_DOMAIN
3838a547	145	select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
18416e45	146	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
67e38cf2	147
afc98d90 AS	148	config CLPS711X_IRQCHIP
	149	bool
	150	depends on ARCH_CLPS711X
	151	select IRQ_DOMAIN
	152	select MULTI_IRQ_HANDLER
	153	select SPARSE_IRQ
	154	default y
	155
9b54470a SH	156	config OMPIC
	157	bool
	158
4db8e6d2 SK	159	config OR1K_PIC
	160	bool
	161	select IRQ_DOMAIN
	162
8598066c FB	163	config OMAP_IRQCHIP
	164	bool
	165	select GENERIC_IRQ_CHIP
	166	select IRQ_DOMAIN
	167
9dbd90f1 SH	168	config ORION_IRQCHIP
	169	bool
	170	select IRQ_DOMAIN
	171	select MULTI_IRQ_HANDLER
	172
aaa8666a CB	173	config PIC32_EVIC
	174	bool
	175	select GENERIC_IRQ_CHIP
	176	select IRQ_DOMAIN
	177
981b58f6	178	config JCORE_AIC
3602ffde RF	179	bool "J-Core integrated AIC" if COMPILE_TEST
3602ffde RF	180	depends on OF
981b58f6 RF	181	select IRQ_DOMAIN
	182	help
	183	Support for the J-Core integrated AIC.
	184
44358048 MD	185	config RENESAS_INTC_IRQPIN
	186	bool
	187	select IRQ_DOMAIN
	188
fbc83b7f MD	189	config RENESAS_IRQC
fbc83b7f MD	190	bool
99c221df	191	select GENERIC_IRQ_CHIP
fbc83b7f MD	192	select IRQ_DOMAIN
fbc83b7f MD	193
07088484 LJ	194	config ST_IRQCHIP
	195	bool
	196	select REGMAP
	197	select MFD_SYSCON
	198	help
	199	Enables SysCfg Controlled IRQs on STi based platforms.
	200
4bba6689 MR	201	config TANGO_IRQ
	202	bool
	203	select IRQ_DOMAIN
	204	select GENERIC_IRQ_CHIP
	205
b06eb017 CR	206	config TB10X_IRQC
	207	bool
	208	select IRQ_DOMAIN
	209	select GENERIC_IRQ_CHIP
	210
d01f8633 DR	211	config TS4800_IRQ
	212	tristate "TS-4800 IRQ controller"
	213	select IRQ_DOMAIN
0df337cf	214	depends on HAS_IOMEM
d2b383dc	215	depends on SOC_IMX51 \|\| COMPILE_TEST
d01f8633 DR	216	help
	217	Support for the TS-4800 FPGA IRQ controller
	218
2389d501 LW	219	config VERSATILE_FPGA_IRQ
	220	bool
	221	select IRQ_DOMAIN
	222
	223	config VERSATILE_FPGA_IRQ_NR
	224	int
	225	default 4
	226	depends on VERSATILE_FPGA_IRQ
26a8e96a MF	227
	228	config XTENSA_MX
	229	bool
	230	select IRQ_DOMAIN
50091212	231	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
96ca848e	232
0547dc78 ZLK	233	config XILINX_INTC
	234	bool
	235	select IRQ_DOMAIN
	236
96ca848e S	237	config IRQ_CROSSBAR
	238	bool
	239	help
f54619f2	240	Support for a CROSSBAR ip that precedes the main interrupt controller.
96ca848e S	241	The primary irqchip invokes the crossbar's callback which inturn allocates
	242	a free irq and configures the IP. Thus the peripheral interrupts are
	243	routed to one of the free irqchip interrupt lines.
89323f8c GS	244
	245	config KEYSTONE_IRQ
	246	tristate "Keystone 2 IRQ controller IP"
	247	depends on ARCH_KEYSTONE
	248	help
	249	Support for Texas Instruments Keystone 2 IRQ controller IP which
	250	is part of the Keystone 2 IPC mechanism
8a19b8f1 AB	251
	252	config MIPS_GIC
	253	bool
bb11cff3	254	select GENERIC_IRQ_IPI
2af70a96	255	select IRQ_DOMAIN_HIERARCHY
8a19b8f1	256	select MIPS_CM
8a764482	257
44e08e70 PB	258	config INGENIC_IRQ
	259	bool
	260	depends on MACH_INGENIC
	261	default y
78c10e55	262
8a764482 YS	263	config RENESAS_H8300H_INTC
	264	bool
	265	select IRQ_DOMAIN
	266
	267	config RENESAS_H8S_INTC
	268	bool
78c10e55	269	select IRQ_DOMAIN
e324c4dc SW	270
	271	config IMX_GPCV2
	272	bool
	273	select IRQ_DOMAIN
	274	help
	275	Enables the wakeup IRQs for IMX platforms with GPCv2 block
7e4ac676 OR	276
	277	config IRQ_MXS
	278	def_bool y if MACH_ASM9260 \|\| ARCH_MXS
	279	select IRQ_DOMAIN
	280	select STMP_DEVICE
c27f29bb	281
a68a63cb TP	282	config MVEBU_GICP
	283	bool
	284
e0de91a9 TP	285	config MVEBU_ICU
	286	bool
	287
c27f29bb TP	288	config MVEBU_ODMI
c27f29bb TP	289	bool
fa23b9d1	290	select GENERIC_MSI_IRQ_DOMAIN
9e2c986c	291
a109893b TP	292	config MVEBU_PIC
	293	bool
	294
b8f3ebe6 ML	295	config LS_SCFG_MSI
	296	def_bool y if SOC_LS1021A \|\| ARCH_LAYERSCAPE
	297	depends on PCI && PCI_MSI
b8f3ebe6	298
9e2c986c MZ	299	config PARTITION_PERCPU
9e2c986c MZ	300	bool
0efacbba	301
44df427c NC	302	config EZNPS_GIC
44df427c NC	303	bool "NPS400 Global Interrupt Manager (GIM)"
ffd565e3	304	depends on ARC \|\| (COMPILE_TEST && !64BIT)
44df427c NC	305	select IRQ_DOMAIN
	306	help
	307	Support the EZchip NPS400 global interrupt controller
e0720416 AT	308
	309	config STM32_EXTI
	310	bool
	311	select IRQ_DOMAIN
0e7d7807	312	select GENERIC_IRQ_CHIP
f20cc9b0 AVF	313
	314	config QCOM_IRQ_COMBINER
	315	bool "QCOM IRQ combiner support"
	316	depends on ARCH_QCOM && ACPI
	317	select IRQ_DOMAIN
	318	select IRQ_DOMAIN_HIERARCHY
	319	help
	320	Say yes here to add support for the IRQ combiner devices embedded
	321	in Qualcomm Technologies chips.
5ed34d3a MY	322
	323	config IRQ_UNIPHIER_AIDET
	324	bool "UniPhier AIDET support" if COMPILE_TEST
	325	depends on ARCH_UNIPHIER \|\| COMPILE_TEST
	326	default ARCH_UNIPHIER
	327	select IRQ_DOMAIN_HIERARCHY
	328	help
	329	Support for the UniPhier AIDET (ARM Interrupt Detector).
c94fb639	330
215f4cc0 JB	331	config MESON_IRQ_GPIO
215f4cc0 JB	332	bool "Meson GPIO Interrupt Multiplexer"
d9ee91c1	333	depends on ARCH_MESON
215f4cc0 JB	334	select IRQ_DOMAIN
	335	select IRQ_DOMAIN_HIERARCHY
	336	help
	337	Support Meson SoC Family GPIO Interrupt Multiplexer
	338
c94fb639	339	endmenu