[linux-2.6-block.git] / drivers / irqchip / Kconfig

config IRQCHIP
	def_bool y
	depends on OF_IRQ

config ARM_GIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select MULTI_IRQ_HANDLER

config ARM_GIC_MAX_NR
	int
	default 2 if ARCH_REALVIEW
	default 1

config ARM_GIC_V2M
	bool
	depends on ARM_GIC
	depends on PCI && PCI_MSI
	select PCI_MSI_IRQ_DOMAIN

config GIC_NON_BANKED
	bool

config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select IRQ_DOMAIN_HIERARCHY

config ARM_GIC_V3_ITS
	bool
	select PCI_MSI_IRQ_DOMAIN

config ARM_NVIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_IRQ_CHIP

config ARM_VIC
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_VIC_NR
	int
	default 4 if ARCH_S5PV210
	default 2
	depends on ARM_VIC
	help
	  The maximum number of VICs available in the system, for
	  power management.

config ARMADA_370_XP_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select PCI_MSI_IRQ_DOMAIN if PCI_MSI

config ALPINE_MSI
	bool
	depends on PCI && PCI_MSI
	select GENERIC_IRQ_CHIP
	select PCI_MSI_IRQ_DOMAIN

config ATMEL_AIC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config ATMEL_AIC5_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config I8259
	bool
	select IRQ_DOMAIN

config BCM6345_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BCM7038_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BCM7120_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BRCMSTB_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config DW_APB_ICTL
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config HISILICON_IRQ_MBIGEN
	bool
	select ARM_GIC_V3
	select ARM_GIC_V3_ITS
	select GENERIC_MSI_IRQ_DOMAIN

config IMGPDC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config IRQ_MIPS_CPU
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config CLPS711X_IRQCHIP
	bool
	depends on ARCH_CLPS711X
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	default y

config OR1K_PIC
	bool
	select IRQ_DOMAIN

config OMAP_IRQCHIP
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ORION_IRQCHIP
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config PIC32_EVIC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config RENESAS_INTC_IRQPIN
	bool
	select IRQ_DOMAIN

config RENESAS_IRQC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ST_IRQCHIP
	bool
	select REGMAP
	select MFD_SYSCON
	help
	  Enables SysCfg Controlled IRQs on STi based platforms.

config TANGO_IRQ
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TB10X_IRQC
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TS4800_IRQ
	tristate "TS-4800 IRQ controller"
	select IRQ_DOMAIN
	depends on HAS_IOMEM
	depends on SOC_IMX51 || COMPILE_TEST
	help
	  Support for the TS-4800 FPGA IRQ controller

config VERSATILE_FPGA_IRQ
	bool
	select IRQ_DOMAIN

config VERSATILE_FPGA_IRQ_NR
       int
       default 4
       depends on VERSATILE_FPGA_IRQ

config XTENSA_MX
	bool
	select IRQ_DOMAIN

config IRQ_CROSSBAR
	bool
	help
	  Support for a CROSSBAR ip that precedes the main interrupt controller.
	  The primary irqchip invokes the crossbar's callback which inturn allocates
	  a free irq and configures the IP. Thus the peripheral interrupts are
	  routed to one of the free irqchip interrupt lines.

config KEYSTONE_IRQ
	tristate "Keystone 2 IRQ controller IP"
	depends on ARCH_KEYSTONE
	help
		Support for Texas Instruments Keystone 2 IRQ controller IP which
		is part of the Keystone 2 IPC mechanism

config MIPS_GIC
	bool
	select GENERIC_IRQ_IPI
	select IRQ_DOMAIN_HIERARCHY
	select MIPS_CM

config INGENIC_IRQ
	bool
	depends on MACH_INGENIC
	default y

config RENESAS_H8300H_INTC
        bool
	select IRQ_DOMAIN

config RENESAS_H8S_INTC
        bool
	select IRQ_DOMAIN

config IMX_GPCV2
	bool
	select IRQ_DOMAIN
	help
	  Enables the wakeup IRQs for IMX platforms with GPCv2 block

config IRQ_MXS
	def_bool y if MACH_ASM9260 || ARCH_MXS
	select IRQ_DOMAIN
	select STMP_DEVICE

config MVEBU_ODMI
	bool
	select GENERIC_MSI_IRQ_DOMAIN
Commit	Line	Data
f6e916b8 TP	1	config IRQCHIP
	2	def_bool y
	3	depends on OF_IRQ
	4
81243e44 RH	5	config ARM_GIC
	6	bool
	7	select IRQ_DOMAIN
9a1091ef	8	select IRQ_DOMAIN_HIERARCHY
81243e44 RH	9	select MULTI_IRQ_HANDLER
81243e44 RH	10
a27d21e0 LW	11	config ARM_GIC_MAX_NR
	12	int
	13	default 2 if ARCH_REALVIEW
	14	default 1
	15
853a33ce SS	16	config ARM_GIC_V2M
	17	bool
	18	depends on ARM_GIC
	19	depends on PCI && PCI_MSI
	20	select PCI_MSI_IRQ_DOMAIN
	21
81243e44 RH	22	config GIC_NON_BANKED
	23	bool
	24
021f6537 MZ	25	config ARM_GIC_V3
	26	bool
	27	select IRQ_DOMAIN
	28	select MULTI_IRQ_HANDLER
443acc4f	29	select IRQ_DOMAIN_HIERARCHY
021f6537	30
19812729 MZ	31	config ARM_GIC_V3_ITS
	32	bool
	33	select PCI_MSI_IRQ_DOMAIN
021f6537	34
292ec080 UKK	35	config ARM_NVIC
	36	bool
	37	select IRQ_DOMAIN
2d9f59f7	38	select IRQ_DOMAIN_HIERARCHY
292ec080 UKK	39	select GENERIC_IRQ_CHIP
292ec080 UKK	40
44430ec0 RH	41	config ARM_VIC
	42	bool
	43	select IRQ_DOMAIN
	44	select MULTI_IRQ_HANDLER
	45
	46	config ARM_VIC_NR
	47	int
	48	default 4 if ARCH_S5PV210
44430ec0 RH	49	default 2
	50	depends on ARM_VIC
	51	help
	52	The maximum number of VICs available in the system, for
	53	power management.
	54
fed6d336 TP	55	config ARMADA_370_XP_IRQ
fed6d336 TP	56	bool
fed6d336	57	select GENERIC_IRQ_CHIP
fcc392d5	58	select PCI_MSI_IRQ_DOMAIN if PCI_MSI
fed6d336	59
e6b78f2c AT	60	config ALPINE_MSI
	61	bool
	62	depends on PCI && PCI_MSI
	63	select GENERIC_IRQ_CHIP
	64	select PCI_MSI_IRQ_DOMAIN
	65
b1479ebb BB	66	config ATMEL_AIC_IRQ
	67	bool
	68	select GENERIC_IRQ_CHIP
	69	select IRQ_DOMAIN
	70	select MULTI_IRQ_HANDLER
	71	select SPARSE_IRQ
	72
	73	config ATMEL_AIC5_IRQ
	74	bool
	75	select GENERIC_IRQ_CHIP
	76	select IRQ_DOMAIN
	77	select MULTI_IRQ_HANDLER
	78	select SPARSE_IRQ
	79
0509cfde RB	80	config I8259
	81	bool
	82	select IRQ_DOMAIN
	83
c7c42ec2 SA	84	config BCM6345_L1_IRQ
	85	bool
	86	select GENERIC_IRQ_CHIP
	87	select IRQ_DOMAIN
	88
5f7f0317 KC	89	config BCM7038_L1_IRQ
	90	bool
	91	select GENERIC_IRQ_CHIP
	92	select IRQ_DOMAIN
	93
a4fcbb86 KC	94	config BCM7120_L2_IRQ
	95	bool
	96	select GENERIC_IRQ_CHIP
	97	select IRQ_DOMAIN
	98
7f646e92 FF	99	config BRCMSTB_L2_IRQ
7f646e92 FF	100	bool
7f646e92 FF	101	select GENERIC_IRQ_CHIP
	102	select IRQ_DOMAIN
	103
350d71b9 SH	104	config DW_APB_ICTL
350d71b9 SH	105	bool
e1588490	106	select GENERIC_IRQ_CHIP
350d71b9 SH	107	select IRQ_DOMAIN
350d71b9 SH	108
9a7c4abd M	109	config HISILICON_IRQ_MBIGEN
	110	bool
	111	select ARM_GIC_V3
	112	select ARM_GIC_V3_ITS
	113	select GENERIC_MSI_IRQ_DOMAIN
	114
b6ef9161 JH	115	config IMGPDC_IRQ
	116	bool
	117	select GENERIC_IRQ_CHIP
	118	select IRQ_DOMAIN
	119
67e38cf2 RB	120	config IRQ_MIPS_CPU
	121	bool
	122	select GENERIC_IRQ_CHIP
	123	select IRQ_DOMAIN
	124
afc98d90 AS	125	config CLPS711X_IRQCHIP
	126	bool
	127	depends on ARCH_CLPS711X
	128	select IRQ_DOMAIN
	129	select MULTI_IRQ_HANDLER
	130	select SPARSE_IRQ
	131	default y
	132
4db8e6d2 SK	133	config OR1K_PIC
	134	bool
	135	select IRQ_DOMAIN
	136
8598066c FB	137	config OMAP_IRQCHIP
	138	bool
	139	select GENERIC_IRQ_CHIP
	140	select IRQ_DOMAIN
	141
9dbd90f1 SH	142	config ORION_IRQCHIP
	143	bool
	144	select IRQ_DOMAIN
	145	select MULTI_IRQ_HANDLER
	146
aaa8666a CB	147	config PIC32_EVIC
	148	bool
	149	select GENERIC_IRQ_CHIP
	150	select IRQ_DOMAIN
	151
44358048 MD	152	config RENESAS_INTC_IRQPIN
	153	bool
	154	select IRQ_DOMAIN
	155
fbc83b7f MD	156	config RENESAS_IRQC
fbc83b7f MD	157	bool
99c221df	158	select GENERIC_IRQ_CHIP
fbc83b7f MD	159	select IRQ_DOMAIN
fbc83b7f MD	160
07088484 LJ	161	config ST_IRQCHIP
	162	bool
	163	select REGMAP
	164	select MFD_SYSCON
	165	help
	166	Enables SysCfg Controlled IRQs on STi based platforms.
	167
4bba6689 MR	168	config TANGO_IRQ
	169	bool
	170	select IRQ_DOMAIN
	171	select GENERIC_IRQ_CHIP
	172
b06eb017 CR	173	config TB10X_IRQC
	174	bool
	175	select IRQ_DOMAIN
	176	select GENERIC_IRQ_CHIP
	177
d01f8633 DR	178	config TS4800_IRQ
	179	tristate "TS-4800 IRQ controller"
	180	select IRQ_DOMAIN
0df337cf	181	depends on HAS_IOMEM
d2b383dc	182	depends on SOC_IMX51 \|\| COMPILE_TEST
d01f8633 DR	183	help
	184	Support for the TS-4800 FPGA IRQ controller
	185
2389d501 LW	186	config VERSATILE_FPGA_IRQ
	187	bool
	188	select IRQ_DOMAIN
	189
	190	config VERSATILE_FPGA_IRQ_NR
	191	int
	192	default 4
	193	depends on VERSATILE_FPGA_IRQ
26a8e96a MF	194
	195	config XTENSA_MX
	196	bool
	197	select IRQ_DOMAIN
96ca848e S	198
	199	config IRQ_CROSSBAR
	200	bool
	201	help
f54619f2	202	Support for a CROSSBAR ip that precedes the main interrupt controller.
96ca848e S	203	The primary irqchip invokes the crossbar's callback which inturn allocates
	204	a free irq and configures the IP. Thus the peripheral interrupts are
	205	routed to one of the free irqchip interrupt lines.
89323f8c GS	206
	207	config KEYSTONE_IRQ
	208	tristate "Keystone 2 IRQ controller IP"
	209	depends on ARCH_KEYSTONE
	210	help
	211	Support for Texas Instruments Keystone 2 IRQ controller IP which
	212	is part of the Keystone 2 IPC mechanism
8a19b8f1 AB	213
	214	config MIPS_GIC
	215	bool
bb11cff3	216	select GENERIC_IRQ_IPI
2af70a96	217	select IRQ_DOMAIN_HIERARCHY
8a19b8f1	218	select MIPS_CM
8a764482	219
44e08e70 PB	220	config INGENIC_IRQ
	221	bool
	222	depends on MACH_INGENIC
	223	default y
78c10e55	224
8a764482 YS	225	config RENESAS_H8300H_INTC
	226	bool
	227	select IRQ_DOMAIN
	228
	229	config RENESAS_H8S_INTC
	230	bool
78c10e55	231	select IRQ_DOMAIN
e324c4dc SW	232
	233	config IMX_GPCV2
	234	bool
	235	select IRQ_DOMAIN
	236	help
	237	Enables the wakeup IRQs for IMX platforms with GPCv2 block
7e4ac676 OR	238
	239	config IRQ_MXS
	240	def_bool y if MACH_ASM9260 \|\| ARCH_MXS
	241	select IRQ_DOMAIN
	242	select STMP_DEVICE
c27f29bb TP	243
	244	config MVEBU_ODMI
	245	bool
	246	select GENERIC_MSI_IRQ_DOMAIN