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a61127c2 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4e0ee78f HD |
2 | /* |
3 | * OF helpers for IOMMU | |
4 | * | |
5 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | |
4e0ee78f HD |
6 | */ |
7 | ||
8 | #include <linux/export.h> | |
7eba1d51 | 9 | #include <linux/iommu.h> |
4e0ee78f | 10 | #include <linux/limits.h> |
386dce27 | 11 | #include <linux/module.h> |
4e0ee78f | 12 | #include <linux/of.h> |
a5bf3cfc | 13 | #include <linux/of_address.h> |
cbff5634 | 14 | #include <linux/of_iommu.h> |
b996444c | 15 | #include <linux/of_pci.h> |
386dce27 | 16 | #include <linux/pci.h> |
a42a7a1f | 17 | #include <linux/slab.h> |
fa0656b4 | 18 | #include <linux/fsl/mc.h> |
4e0ee78f | 19 | |
da4b0275 RM |
20 | #define NO_IOMMU 1 |
21 | ||
da4b0275 RM |
22 | static int of_iommu_xlate(struct device *dev, |
23 | struct of_phandle_args *iommu_spec) | |
2a0c5754 RM |
24 | { |
25 | const struct iommu_ops *ops; | |
26 | struct fwnode_handle *fwnode = &iommu_spec->np->fwnode; | |
386dce27 | 27 | int ret; |
2a0c5754 RM |
28 | |
29 | ops = iommu_ops_from_fwnode(fwnode); | |
d7b05582 | 30 | if ((ops && !ops->of_xlate) || |
ac6bbf0c | 31 | !of_device_is_available(iommu_spec->np)) |
da4b0275 | 32 | return NO_IOMMU; |
2a0c5754 | 33 | |
386dce27 WD |
34 | ret = iommu_fwspec_init(dev, &iommu_spec->np->fwnode, ops); |
35 | if (ret) | |
36 | return ret; | |
d7b05582 RM |
37 | /* |
38 | * The otherwise-empty fwspec handily serves to indicate the specific | |
39 | * IOMMU device we're waiting for, which will be useful if we ever get | |
40 | * a proper probe-ordering dependency mechanism in future. | |
41 | */ | |
42 | if (!ops) | |
a4f12490 | 43 | return driver_deferred_probe_check_state(dev); |
2a0c5754 | 44 | |
386dce27 WD |
45 | if (!try_module_get(ops->owner)) |
46 | return -ENODEV; | |
47 | ||
48 | ret = ops->of_xlate(dev, iommu_spec); | |
49 | module_put(ops->owner); | |
50 | return ret; | |
2a0c5754 RM |
51 | } |
52 | ||
a081bd4a LP |
53 | static int of_iommu_configure_dev_id(struct device_node *master_np, |
54 | struct device *dev, | |
55 | const u32 *id) | |
b996444c | 56 | { |
d87beb74 | 57 | struct of_phandle_args iommu_spec = { .args_count = 1 }; |
2a0c5754 | 58 | int err; |
b996444c | 59 | |
a081bd4a LP |
60 | err = of_map_id(master_np, *id, "iommu-map", |
61 | "iommu-map-mask", &iommu_spec.np, | |
62 | iommu_spec.args); | |
2a0c5754 | 63 | if (err) |
da4b0275 | 64 | return err == -ENODEV ? NO_IOMMU : err; |
b996444c | 65 | |
a081bd4a | 66 | err = of_iommu_xlate(dev, &iommu_spec); |
b996444c | 67 | of_node_put(iommu_spec.np); |
c0d05cde | 68 | return err; |
2a0c5754 RM |
69 | } |
70 | ||
a081bd4a LP |
71 | static int of_iommu_configure_dev(struct device_node *master_np, |
72 | struct device *dev) | |
fa0656b4 | 73 | { |
a081bd4a LP |
74 | struct of_phandle_args iommu_spec; |
75 | int err = NO_IOMMU, idx = 0; | |
76 | ||
77 | while (!of_parse_phandle_with_args(master_np, "iommus", | |
78 | "#iommu-cells", | |
79 | idx, &iommu_spec)) { | |
80 | err = of_iommu_xlate(dev, &iommu_spec); | |
81 | of_node_put(iommu_spec.np); | |
82 | idx++; | |
83 | if (err) | |
84 | break; | |
85 | } | |
fa0656b4 | 86 | |
fa0656b4 NG |
87 | return err; |
88 | } | |
89 | ||
a081bd4a LP |
90 | struct of_pci_iommu_alias_info { |
91 | struct device *dev; | |
92 | struct device_node *np; | |
93 | }; | |
94 | ||
95 | static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data) | |
96 | { | |
97 | struct of_pci_iommu_alias_info *info = data; | |
98 | u32 input_id = alias; | |
99 | ||
100 | return of_iommu_configure_dev_id(info->np, info->dev, &input_id); | |
101 | } | |
102 | ||
103 | static int of_iommu_configure_device(struct device_node *master_np, | |
104 | struct device *dev, const u32 *id) | |
105 | { | |
106 | return (id) ? of_iommu_configure_dev_id(master_np, dev, id) : | |
107 | of_iommu_configure_dev(master_np, dev); | |
108 | } | |
109 | ||
2a0c5754 | 110 | const struct iommu_ops *of_iommu_configure(struct device *dev, |
a081bd4a LP |
111 | struct device_node *master_np, |
112 | const u32 *id) | |
2a0c5754 | 113 | { |
d87beb74 | 114 | const struct iommu_ops *ops = NULL; |
5c7e6bd7 | 115 | struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); |
da4b0275 | 116 | int err = NO_IOMMU; |
2a0c5754 RM |
117 | |
118 | if (!master_np) | |
119 | return NULL; | |
120 | ||
d7b05582 RM |
121 | if (fwspec) { |
122 | if (fwspec->ops) | |
123 | return fwspec->ops; | |
124 | ||
125 | /* In the deferred case, start again from scratch */ | |
126 | iommu_fwspec_free(dev); | |
127 | } | |
128 | ||
d87beb74 RM |
129 | /* |
130 | * We don't currently walk up the tree looking for a parent IOMMU. | |
131 | * See the `Notes:' section of | |
132 | * Documentation/devicetree/bindings/iommu/iommu.txt | |
133 | */ | |
134 | if (dev_is_pci(dev)) { | |
135 | struct of_pci_iommu_alias_info info = { | |
136 | .dev = dev, | |
137 | .np = master_np, | |
138 | }; | |
139 | ||
6bf6c247 | 140 | pci_request_acs(); |
d87beb74 RM |
141 | err = pci_for_each_dma_alias(to_pci_dev(dev), |
142 | of_pci_iommu_init, &info); | |
d87beb74 | 143 | } else { |
a081bd4a | 144 | err = of_iommu_configure_device(master_np, dev, id); |
89535821 | 145 | } |
5c7e6bd7 | 146 | |
da4b0275 RM |
147 | /* |
148 | * Two success conditions can be represented by non-negative err here: | |
149 | * >0 : there is no IOMMU, or one was unavailable for non-fatal reasons | |
150 | * 0 : we found an IOMMU, and dev->fwspec is initialised appropriately | |
151 | * <0 : any actual error | |
152 | */ | |
5c7e6bd7 JR |
153 | if (!err) { |
154 | /* The fwspec pointer changed, read it again */ | |
155 | fwspec = dev_iommu_fwspec_get(dev); | |
156 | ops = fwspec->ops; | |
157 | } | |
d7b05582 RM |
158 | /* |
159 | * If we have reason to believe the IOMMU driver missed the initial | |
641fb0ef | 160 | * probe for dev, replay it to get things in order. |
d7b05582 | 161 | */ |
6eb4da8c | 162 | if (!err && dev->bus) |
641fb0ef | 163 | err = iommu_probe_device(dev); |
7eba1d51 | 164 | |
a37b19a3 | 165 | /* Ignore all other errors apart from EPROBE_DEFER */ |
da4b0275 RM |
166 | if (err == -EPROBE_DEFER) { |
167 | ops = ERR_PTR(err); | |
168 | } else if (err < 0) { | |
169 | dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); | |
a37b19a3 S |
170 | ops = NULL; |
171 | } | |
172 | ||
7b07cbef | 173 | return ops; |
7eba1d51 | 174 | } |
a5bf3cfc | 175 | |
4762315d RD |
176 | static enum iommu_resv_type __maybe_unused |
177 | iommu_resv_region_get_type(struct device *dev, | |
178 | struct resource *phys, | |
179 | phys_addr_t start, size_t length) | |
a5bf3cfc TR |
180 | { |
181 | phys_addr_t end = start + length - 1; | |
182 | ||
183 | /* | |
184 | * IOMMU regions without an associated physical region cannot be | |
185 | * mapped and are simply reservations. | |
186 | */ | |
187 | if (phys->start >= phys->end) | |
188 | return IOMMU_RESV_RESERVED; | |
189 | ||
190 | /* may be IOMMU_RESV_DIRECT_RELAXABLE for certain cases */ | |
191 | if (start == phys->start && end == phys->end) | |
192 | return IOMMU_RESV_DIRECT; | |
193 | ||
194 | dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", &phys, | |
195 | &start, &end); | |
196 | return IOMMU_RESV_RESERVED; | |
197 | } | |
198 | ||
199 | /** | |
200 | * of_iommu_get_resv_regions - reserved region driver helper for device tree | |
201 | * @dev: device for which to get reserved regions | |
202 | * @list: reserved region list | |
203 | * | |
204 | * IOMMU drivers can use this to implement their .get_resv_regions() callback | |
205 | * for memory regions attached to a device tree node. See the reserved-memory | |
206 | * device tree bindings on how to use these: | |
207 | * | |
208 | * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt | |
209 | */ | |
210 | void of_iommu_get_resv_regions(struct device *dev, struct list_head *list) | |
211 | { | |
212 | #if IS_ENABLED(CONFIG_OF_ADDRESS) | |
213 | struct of_phandle_iterator it; | |
214 | int err; | |
215 | ||
216 | of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) { | |
217 | const __be32 *maps, *end; | |
218 | struct resource phys; | |
219 | int size; | |
220 | ||
221 | memset(&phys, 0, sizeof(phys)); | |
222 | ||
223 | /* | |
224 | * The "reg" property is optional and can be omitted by reserved-memory regions | |
225 | * that represent reservations in the IOVA space, which are regions that should | |
226 | * not be mapped. | |
227 | */ | |
228 | if (of_find_property(it.node, "reg", NULL)) { | |
229 | err = of_address_to_resource(it.node, 0, &phys); | |
230 | if (err < 0) { | |
231 | dev_err(dev, "failed to parse memory region %pOF: %d\n", | |
232 | it.node, err); | |
233 | continue; | |
234 | } | |
235 | } | |
236 | ||
237 | maps = of_get_property(it.node, "iommu-addresses", &size); | |
238 | if (!maps) | |
239 | continue; | |
240 | ||
241 | end = maps + size / sizeof(__be32); | |
242 | ||
243 | while (maps < end) { | |
244 | struct device_node *np; | |
245 | u32 phandle; | |
246 | ||
247 | phandle = be32_to_cpup(maps++); | |
248 | np = of_find_node_by_phandle(phandle); | |
249 | ||
250 | if (np == dev->of_node) { | |
251 | int prot = IOMMU_READ | IOMMU_WRITE; | |
252 | struct iommu_resv_region *region; | |
253 | enum iommu_resv_type type; | |
254 | phys_addr_t iova; | |
255 | size_t length; | |
256 | ||
257 | maps = of_translate_dma_region(np, maps, &iova, &length); | |
258 | type = iommu_resv_region_get_type(dev, &phys, iova, length); | |
259 | ||
260 | region = iommu_alloc_resv_region(iova, length, prot, type, | |
261 | GFP_KERNEL); | |
262 | if (region) | |
263 | list_add_tail(®ion->list, list); | |
264 | } | |
265 | } | |
266 | } | |
267 | #endif | |
268 | } | |
269 | EXPORT_SYMBOL(of_iommu_get_resv_regions); |