Commit | Line | Data |
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9ca340c9 HZ |
1 | /* |
2 | * Copyright (c) 2015-2016 MediaTek Inc. | |
3 | * Author: Honghui Zhang <honghui.zhang@mediatek.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | */ | |
14 | ||
15 | #ifndef _MTK_IOMMU_H_ | |
16 | #define _MTK_IOMMU_H_ | |
17 | ||
18 | #include <linux/clk.h> | |
19 | #include <linux/component.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/iommu.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <soc/mediatek/smi.h> | |
26 | ||
27 | #include "io-pgtable.h" | |
28 | ||
29 | struct mtk_iommu_suspend_reg { | |
30 | u32 standard_axi_mode; | |
31 | u32 dcm_dis; | |
32 | u32 ctrl_reg; | |
33 | u32 int_control0; | |
34 | u32 int_main_control; | |
70ca608b | 35 | u32 ivrp_paddr; |
9ca340c9 HZ |
36 | }; |
37 | ||
e6dec923 YW |
38 | enum mtk_iommu_plat { |
39 | M4U_MT2701, | |
40 | M4U_MT2712, | |
41 | M4U_MT8173, | |
42 | }; | |
43 | ||
9ca340c9 HZ |
44 | struct mtk_iommu_domain; |
45 | ||
46 | struct mtk_iommu_data { | |
47 | void __iomem *base; | |
48 | int irq; | |
49 | struct device *dev; | |
50 | struct clk *bclk; | |
51 | phys_addr_t protect_base; /* protect memory base */ | |
52 | struct mtk_iommu_suspend_reg reg; | |
53 | struct mtk_iommu_domain *m4u_dom; | |
54 | struct iommu_group *m4u_group; | |
55 | struct mtk_smi_iommu smi_imu; /* SMI larb iommu info */ | |
56 | bool enable_4GB; | |
98a8f63e | 57 | bool tlb_flush_active; |
b16c0170 JR |
58 | |
59 | struct iommu_device iommu; | |
e6dec923 | 60 | enum mtk_iommu_plat m4u_plat; |
7c3a2ec0 YW |
61 | |
62 | struct list_head list; | |
9ca340c9 HZ |
63 | }; |
64 | ||
9a8a5dcf | 65 | static inline int compare_of(struct device *dev, void *data) |
9ca340c9 HZ |
66 | { |
67 | return dev->of_node == data; | |
68 | } | |
69 | ||
00c7c81f RK |
70 | static inline void release_of(struct device *dev, void *data) |
71 | { | |
72 | of_node_put(data); | |
73 | } | |
74 | ||
9a8a5dcf | 75 | static inline int mtk_iommu_bind(struct device *dev) |
9ca340c9 HZ |
76 | { |
77 | struct mtk_iommu_data *data = dev_get_drvdata(dev); | |
78 | ||
79 | return component_bind_all(dev, &data->smi_imu); | |
80 | } | |
81 | ||
9a8a5dcf | 82 | static inline void mtk_iommu_unbind(struct device *dev) |
9ca340c9 HZ |
83 | { |
84 | struct mtk_iommu_data *data = dev_get_drvdata(dev); | |
85 | ||
86 | component_unbind_all(dev, &data->smi_imu); | |
87 | } | |
88 | ||
89 | #endif |