projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 45051539 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 6a9401a7 | 2 | /* |
| 5d0d7156 | 3 | * Copyright (C) 2009-2010 Advanced Micro Devices, Inc. |
| 63ce3ae8 | 4 | * Author: Joerg Roedel <jroedel@suse.de> |
| 6a9401a7 JR |
5 | */ |
| 6 | ||
| 7 | #ifndef _ASM_X86_AMD_IOMMU_PROTO_H | |
| 8 | #define _ASM_X86_AMD_IOMMU_PROTO_H | |
| 9 | ||
| 403f81d8 | 10 | #include "amd_iommu_types.h" |
| 6a9401a7 | 11 | |
| 6b9376e3 | 12 | extern int amd_iommu_get_num_iommus(void); |
| 6a9401a7 JR |
13 | extern int amd_iommu_init_dma_ops(void); |
| 14 | extern int amd_iommu_init_passthrough(void); | |
| 72fe00f0 | 15 | extern irqreturn_t amd_iommu_int_thread(int irq, void *data); |
| 6a9401a7 | 16 | extern irqreturn_t amd_iommu_int_handler(int irq, void *data); |
| 6a9401a7 JR |
17 | extern void amd_iommu_apply_erratum_63(u16 devid); |
| 18 | extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu); | |
| b7cc9554 JR |
19 | extern int amd_iommu_init_devices(void); |
| 20 | extern void amd_iommu_uninit_devices(void); | |
| 8638c491 | 21 | extern void amd_iommu_init_notifier(void); |
| 3a18404c | 22 | extern int amd_iommu_init_api(void); |
| 400a28a0 | 23 | |
| 7d0f5fd3 GH |
24 | #ifdef CONFIG_AMD_IOMMU_DEBUGFS |
| 25 | void amd_iommu_debugfs_setup(struct amd_iommu *iommu); | |
| 26 | #else | |
| 27 | static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {} | |
| 28 | #endif | |
| 29 | ||
| 6b474b82 | 30 | /* Needed for interrupt remapping */ |
| 6b474b82 JR |
31 | extern int amd_iommu_prepare(void); |
| 32 | extern int amd_iommu_enable(void); | |
| 33 | extern void amd_iommu_disable(void); | |
| 34 | extern int amd_iommu_reenable(int); | |
| 35 | extern int amd_iommu_enable_faulting(void); | |
| 3928aa3f | 36 | extern int amd_iommu_guest_ir; |
| 6b474b82 | 37 | |
| 72e1dcc4 | 38 | /* IOMMUv2 specific functions */ |
| 132bd68f JR |
39 | struct iommu_domain; |
| 40 | ||
| 400a28a0 | 41 | extern bool amd_iommu_v2_supported(void); |
| 72e1dcc4 JR |
42 | extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb); |
| 43 | extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb); | |
| 132bd68f | 44 | extern void amd_iommu_domain_direct_map(struct iommu_domain *dom); |
| 52815b75 | 45 | extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids); |
| 22e266c7 JR |
46 | extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 47 | u64 address); | |
| 48 | extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid); | |
| b16137b1 JR |
49 | extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 50 | unsigned long cr3); | |
| 51 | extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); | |
| f3572db8 | 52 | extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); |
| b16137b1 | 53 | |
| 7c71d306 JL |
54 | #ifdef CONFIG_IRQ_REMAP |
| 55 | extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); | |
| 56 | #else | |
| 57 | static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu) | |
| 58 | { | |
| 59 | return 0; | |
| 60 | } | |
| 61 | #endif | |
| 62 | ||
| c99afa25 JR |
63 | #define PPR_SUCCESS 0x0 |
| 64 | #define PPR_INVALID 0x1 | |
| 65 | #define PPR_FAILURE 0xf | |
| 66 | ||
| 67 | extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, | |
| 68 | int status, int tag); | |
| 400a28a0 | 69 | |
| 4c894f47 JR |
70 | static inline bool is_rd890_iommu(struct pci_dev *pdev) |
| 71 | { | |
| 72 | return (pdev->vendor == PCI_VENDOR_ID_ATI) && | |
| 73 | (pdev->device == PCI_DEVICE_ID_RD890_IOMMU); | |
| 74 | } | |
| 75 | ||
| d99ddec3 JR |
76 | static inline bool iommu_feature(struct amd_iommu *iommu, u64 f) |
| 77 | { | |
| 78 | if (!(iommu->cap & (1 << IOMMU_CAP_EFR))) | |
| 79 | return false; | |
| 80 | ||
| 81 | return !!(iommu->features & f); | |
| 82 | } | |
| 83 | ||
| 2543a786 TL |
84 | static inline u64 iommu_virt_to_phys(void *vaddr) |
| 85 | { | |
| 86 | return (u64)__sme_set(virt_to_phys(vaddr)); | |
| 87 | } | |
| 88 | ||
| 89 | static inline void *iommu_phys_to_virt(unsigned long paddr) | |
| 90 | { | |
| 91 | return phys_to_virt(__sme_clr(paddr)); | |
| 92 | } | |
| 93 | ||
| 4c232a70 | 94 | extern bool translation_pre_enabled(struct amd_iommu *iommu); |
| daae2d25 | 95 | extern struct iommu_dev_data *get_dev_data(struct device *dev); |
| 6a9401a7 | 96 | #endif /* _ASM_X86_AMD_IOMMU_PROTO_H */ |