Commit | Line | Data |
---|---|---|
ab493a0f OBC |
1 | # IOMMU_API always gets selected by whoever wants it. |
2 | config IOMMU_API | |
3 | bool | |
b10f127e | 4 | |
68255b62 JR |
5 | menuconfig IOMMU_SUPPORT |
6 | bool "IOMMU Hardware Support" | |
e5144c93 | 7 | depends on MMU |
68255b62 JR |
8 | default y |
9 | ---help--- | |
10 | Say Y here if you want to compile device drivers for IO Memory | |
11 | Management Units into the kernel. These devices usually allow to | |
12 | remap DMA requests and/or remap interrupts from other devices on the | |
13 | system. | |
14 | ||
15 | if IOMMU_SUPPORT | |
16 | ||
fdb1d7be WD |
17 | menu "Generic IOMMU Pagetable Support" |
18 | ||
19 | # Selected by the actual pagetable implementations | |
20 | config IOMMU_IO_PGTABLE | |
21 | bool | |
22 | ||
e1d3c0fd WD |
23 | config IOMMU_IO_PGTABLE_LPAE |
24 | bool "ARMv7/v8 Long Descriptor Format" | |
25 | select IOMMU_IO_PGTABLE | |
48e6f765 | 26 | depends on ARM || ARM64 || (COMPILE_TEST && !GENERIC_ATOMIC64) |
e1d3c0fd WD |
27 | help |
28 | Enable support for the ARM long descriptor pagetable format. | |
29 | This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page | |
30 | sizes at both stage-1 and stage-2, as well as address spaces | |
31 | up to 48-bits in size. | |
32 | ||
fe4b991d WD |
33 | config IOMMU_IO_PGTABLE_LPAE_SELFTEST |
34 | bool "LPAE selftests" | |
35 | depends on IOMMU_IO_PGTABLE_LPAE | |
36 | help | |
37 | Enable self-tests for LPAE page table allocator. This performs | |
38 | a series of page-table consistency checks during boot. | |
39 | ||
40 | If unsure, say N here. | |
41 | ||
e5fc9753 RM |
42 | config IOMMU_IO_PGTABLE_ARMV7S |
43 | bool "ARMv7/v8 Short Descriptor Format" | |
44 | select IOMMU_IO_PGTABLE | |
48e6f765 | 45 | depends on ARM || ARM64 || COMPILE_TEST |
e5fc9753 RM |
46 | help |
47 | Enable support for the ARM Short-descriptor pagetable format. | |
48 | This supports 32-bit virtual and physical addresses mapped using | |
49 | 2-level tables with 4KB pages/1MB sections, and contiguous entries | |
50 | for 64KB pages/16MB supersections if indicated by the IOMMU driver. | |
51 | ||
52 | config IOMMU_IO_PGTABLE_ARMV7S_SELFTEST | |
53 | bool "ARMv7s selftests" | |
54 | depends on IOMMU_IO_PGTABLE_ARMV7S | |
55 | help | |
56 | Enable self-tests for ARMv7s page table allocator. This performs | |
57 | a series of page-table consistency checks during boot. | |
58 | ||
59 | If unsure, say N here. | |
60 | ||
fdb1d7be WD |
61 | endmenu |
62 | ||
114150d8 | 63 | config IOMMU_IOVA |
15bbdec3 | 64 | tristate |
114150d8 | 65 | |
4e0ee78f HD |
66 | config OF_IOMMU |
67 | def_bool y | |
7eba1d51 | 68 | depends on OF && IOMMU_API |
4e0ee78f | 69 | |
0db2e5d1 RM |
70 | # IOMMU-agnostic DMA-mapping layer |
71 | config IOMMU_DMA | |
72 | bool | |
0db2e5d1 RM |
73 | select IOMMU_API |
74 | select IOMMU_IOVA | |
59a68eb8 | 75 | select NEED_SG_DMA_LENGTH |
0db2e5d1 | 76 | |
695093e3 VS |
77 | config FSL_PAMU |
78 | bool "Freescale IOMMU support" | |
a4d98fb3 | 79 | depends on PCI |
af29d9fa | 80 | depends on PHYS_64BIT |
a0d284d2 | 81 | depends on PPC_E500MC || (COMPILE_TEST && PPC) |
695093e3 VS |
82 | select IOMMU_API |
83 | select GENERIC_ALLOCATOR | |
84 | help | |
85 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. | |
86 | PAMU can authorize memory access, remap the memory address, and remap I/O | |
87 | transaction types. | |
88 | ||
b10f127e OBC |
89 | # MSM IOMMU support |
90 | config MSM_IOMMU | |
91 | bool "MSM IOMMU Support" | |
477ab7a1 JR |
92 | depends on ARM |
93 | depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST | |
b10f127e | 94 | select IOMMU_API |
c9220fbd | 95 | select IOMMU_IO_PGTABLE_ARMV7S |
b10f127e OBC |
96 | help |
97 | Support for the IOMMUs found on certain Qualcomm SOCs. | |
98 | These IOMMUs allow virtualization of the address space used by most | |
99 | cores within the multimedia subsystem. | |
100 | ||
101 | If unsure, say N here. | |
102 | ||
103 | config IOMMU_PGTABLES_L2 | |
104 | def_bool y | |
105 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n | |
29b68415 OBC |
106 | |
107 | # AMD IOMMU support | |
108 | config AMD_IOMMU | |
109 | bool "AMD IOMMU support" | |
110 | select SWIOTLB | |
111 | select PCI_MSI | |
52815b75 JR |
112 | select PCI_ATS |
113 | select PCI_PRI | |
114 | select PCI_PASID | |
29b68415 | 115 | select IOMMU_API |
a72c4225 | 116 | select IOMMU_IOVA |
0dbc6078 | 117 | depends on X86_64 && PCI && ACPI |
29b68415 OBC |
118 | ---help--- |
119 | With this option you can enable support for AMD IOMMU hardware in | |
120 | your system. An IOMMU is a hardware component which provides | |
121 | remapping of DMA memory accesses from devices. With an AMD IOMMU you | |
59bf8964 | 122 | can isolate the DMA memory of different devices and protect the |
29b68415 OBC |
123 | system from misbehaving device drivers or hardware. |
124 | ||
125 | You can find out if your system has an AMD IOMMU if you look into | |
126 | your BIOS for an option to enable it or if you have an IVRS ACPI | |
127 | table. | |
128 | ||
e3c495c7 | 129 | config AMD_IOMMU_V2 |
a446e219 | 130 | tristate "AMD IOMMU Version 2 driver" |
e5cac32c | 131 | depends on AMD_IOMMU |
8736b2c3 | 132 | select MMU_NOTIFIER |
e3c495c7 JR |
133 | ---help--- |
134 | This option enables support for the AMD IOMMUv2 features of the IOMMU | |
135 | hardware. Select this option if you want to use devices that support | |
59bf8964 | 136 | the PCI PRI and PASID interface. |
e3c495c7 | 137 | |
166e9278 | 138 | # Intel IOMMU support |
d3f13810 SS |
139 | config DMAR_TABLE |
140 | bool | |
141 | ||
142 | config INTEL_IOMMU | |
143 | bool "Support for Intel IOMMU using DMA Remapping Devices" | |
166e9278 | 144 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
d657c5c7 | 145 | select DMA_DIRECT_OPS |
166e9278 | 146 | select IOMMU_API |
114150d8 | 147 | select IOMMU_IOVA |
f616ab59 | 148 | select NEED_DMA_MAP_STATE |
d3f13810 | 149 | select DMAR_TABLE |
166e9278 OBC |
150 | help |
151 | DMA remapping (DMAR) devices support enables independent address | |
152 | translations for Direct Memory Access (DMA) from devices. | |
153 | These DMA remapping devices are reported via ACPI tables | |
154 | and include PCI device scope covered by these DMA | |
155 | remapping devices. | |
156 | ||
8a94ade4 DW |
157 | config INTEL_IOMMU_SVM |
158 | bool "Support for Shared Virtual Memory with Intel IOMMU" | |
159 | depends on INTEL_IOMMU && X86 | |
b16d0cb9 | 160 | select PCI_PASID |
2f26e0a9 | 161 | select MMU_NOTIFIER |
8a94ade4 DW |
162 | help |
163 | Shared Virtual Memory (SVM) provides a facility for devices | |
164 | to access DMA resources through process address space by | |
165 | means of a Process Address Space ID (PASID). | |
166 | ||
d3f13810 | 167 | config INTEL_IOMMU_DEFAULT_ON |
166e9278 | 168 | def_bool y |
d3f13810 SS |
169 | prompt "Enable Intel DMA Remapping Devices by default" |
170 | depends on INTEL_IOMMU | |
166e9278 OBC |
171 | help |
172 | Selecting this option will enable a DMAR device at boot time if | |
173 | one is found. If this option is not selected, DMAR support can | |
174 | be enabled by passing intel_iommu=on to the kernel. | |
175 | ||
d3f13810 | 176 | config INTEL_IOMMU_BROKEN_GFX_WA |
166e9278 | 177 | bool "Workaround broken graphics drivers (going away soon)" |
d3f13810 | 178 | depends on INTEL_IOMMU && BROKEN && X86 |
166e9278 OBC |
179 | ---help--- |
180 | Current Graphics drivers tend to use physical address | |
181 | for DMA and avoid using DMA APIs. Setting this config | |
182 | option permits the IOMMU driver to set a unity map for | |
183 | all the OS-visible memory. Hence the driver can continue | |
184 | to use physical addresses for DMA, at least until this | |
185 | option is removed in the 2.6.32 kernel. | |
186 | ||
d3f13810 | 187 | config INTEL_IOMMU_FLOPPY_WA |
166e9278 | 188 | def_bool y |
d3f13810 | 189 | depends on INTEL_IOMMU && X86 |
166e9278 OBC |
190 | ---help--- |
191 | Floppy disk drivers are known to bypass DMA API calls | |
192 | thereby failing to work when IOMMU is enabled. This | |
193 | workaround will setup a 1:1 mapping for the first | |
194 | 16MiB to make floppy (an ISA device) work. | |
195 | ||
d3f13810 | 196 | config IRQ_REMAP |
a446e219 KC |
197 | bool "Support for Interrupt Remapping" |
198 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI | |
d3f13810 | 199 | select DMAR_TABLE |
166e9278 OBC |
200 | ---help--- |
201 | Supports Interrupt remapping for IO-APIC and MSI devices. | |
202 | To use x2apic mode in the CPU's which support x2APIC enhancements or | |
203 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | |
68255b62 | 204 | |
fcf3a6ef OBC |
205 | # OMAP IOMMU support |
206 | config OMAP_IOMMU | |
207 | bool "OMAP IOMMU Support" | |
477ab7a1 JR |
208 | depends on ARM && MMU |
209 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
fcf3a6ef | 210 | select IOMMU_API |
06b718c0 GH |
211 | ---help--- |
212 | The OMAP3 media platform drivers depend on iommu support, | |
213 | if you need them say Y here. | |
fcf3a6ef | 214 | |
fcf3a6ef | 215 | config OMAP_IOMMU_DEBUG |
61c75352 SA |
216 | bool "Export OMAP IOMMU internals in DebugFS" |
217 | depends on OMAP_IOMMU && DEBUG_FS | |
218 | ---help--- | |
219 | Select this to see extensive information about | |
220 | the internal state of OMAP IOMMU in debugfs. | |
fcf3a6ef | 221 | |
61c75352 | 222 | Say N unless you know you need this. |
fcf3a6ef | 223 | |
c68a2921 DK |
224 | config ROCKCHIP_IOMMU |
225 | bool "Rockchip IOMMU Support" | |
4f1fcfe9 | 226 | depends on ARM || ARM64 |
11175886 | 227 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
c68a2921 DK |
228 | select IOMMU_API |
229 | select ARM_DMA_USE_IOMMU | |
230 | help | |
231 | Support for IOMMUs found on Rockchip rk32xx SOCs. | |
232 | These IOMMUs allow virtualization of the address space used by most | |
233 | cores within the multimedia subsystem. | |
234 | Say Y here if you are using a Rockchip SoC that includes an IOMMU | |
235 | device. | |
fcf3a6ef | 236 | |
d53e54b4 HD |
237 | config TEGRA_IOMMU_GART |
238 | bool "Tegra GART IOMMU Support" | |
239 | depends on ARCH_TEGRA_2x_SOC | |
240 | select IOMMU_API | |
241 | help | |
242 | Enables support for remapping discontiguous physical memory | |
243 | shared with the operating system into contiguous I/O virtual | |
244 | space through the GART (Graphics Address Relocation Table) | |
245 | hardware included on Tegra SoCs. | |
246 | ||
7a31f6f4 | 247 | config TEGRA_IOMMU_SMMU |
89184651 TR |
248 | bool "NVIDIA Tegra SMMU Support" |
249 | depends on ARCH_TEGRA | |
250 | depends on TEGRA_AHB | |
251 | depends on TEGRA_MC | |
7a31f6f4 HD |
252 | select IOMMU_API |
253 | help | |
89184651 | 254 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
588c43a7 | 255 | SoCs (Tegra30 up to Tegra210). |
7a31f6f4 | 256 | |
2a96536e KC |
257 | config EXYNOS_IOMMU |
258 | bool "Exynos IOMMU Support" | |
740a01ee | 259 | depends on ARCH_EXYNOS && MMU |
db3a7fd7 | 260 | depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes |
2a96536e | 261 | select IOMMU_API |
4802c1d0 | 262 | select ARM_DMA_USE_IOMMU |
2a96536e | 263 | help |
5455d700 SK |
264 | Support for the IOMMU (System MMU) of Samsung Exynos application |
265 | processor family. This enables H/W multimedia accelerators to see | |
266 | non-linear physical memory chunks as linear memory in their | |
267 | address space. | |
2a96536e KC |
268 | |
269 | If unsure, say N here. | |
270 | ||
271 | config EXYNOS_IOMMU_DEBUG | |
272 | bool "Debugging log for Exynos IOMMU" | |
273 | depends on EXYNOS_IOMMU | |
274 | help | |
275 | Select this to see the detailed log message that shows what | |
5455d700 | 276 | happens in the IOMMU driver. |
2a96536e | 277 | |
5455d700 | 278 | Say N unless you need kernel log message for IOMMU debugging. |
2a96536e | 279 | |
d25a2a16 LP |
280 | config IPMMU_VMSA |
281 | bool "Renesas VMSA-compatible IPMMU" | |
3ae47292 | 282 | depends on ARM || IOMMU_DMA |
a4aaeccc | 283 | depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64) |
d25a2a16 | 284 | select IOMMU_API |
f20ed39f | 285 | select IOMMU_IO_PGTABLE_LPAE |
d25a2a16 LP |
286 | select ARM_DMA_USE_IOMMU |
287 | help | |
288 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the | |
289 | R-Mobile APE6 and R-Car H2/M2 SoCs. | |
290 | ||
291 | If unsure, say N. | |
292 | ||
4e13c1ac AK |
293 | config SPAPR_TCE_IOMMU |
294 | bool "sPAPR TCE IOMMU Support" | |
5b25199e | 295 | depends on PPC_POWERNV || PPC_PSERIES |
4e13c1ac AK |
296 | select IOMMU_API |
297 | help | |
298 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
299 | is not implemented as it is not necessary for VFIO. | |
300 | ||
48ec83bc | 301 | # ARM IOMMU support |
45ae7cff WD |
302 | config ARM_SMMU |
303 | bool "ARM Ltd. System MMU (SMMU) Support" | |
a20cc76b | 304 | depends on (ARM64 || ARM) && MMU |
45ae7cff | 305 | select IOMMU_API |
518f7136 | 306 | select IOMMU_IO_PGTABLE_LPAE |
45ae7cff WD |
307 | select ARM_DMA_USE_IOMMU if ARM |
308 | help | |
309 | Support for implementations of the ARM System MMU architecture | |
518f7136 | 310 | versions 1 and 2. |
45ae7cff WD |
311 | |
312 | Say Y here if your SoC includes an IOMMU device implementing | |
313 | the ARM SMMU architecture. | |
314 | ||
48ec83bc WD |
315 | config ARM_SMMU_V3 |
316 | bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" | |
08d4ca2a | 317 | depends on ARM64 |
48ec83bc WD |
318 | select IOMMU_API |
319 | select IOMMU_IO_PGTABLE_LPAE | |
166bdbd2 | 320 | select GENERIC_MSI_IRQ_DOMAIN |
48ec83bc WD |
321 | help |
322 | Support for implementations of the ARM System MMU architecture | |
323 | version 3 providing translation support to a PCIe root complex. | |
324 | ||
325 | Say Y here if your system includes an IOMMU device implementing | |
326 | the ARM SMMUv3 architecture. | |
327 | ||
8128f23c GS |
328 | config S390_IOMMU |
329 | def_bool y if S390 && PCI | |
330 | depends on S390 && PCI | |
331 | select IOMMU_API | |
332 | help | |
333 | Support for the IOMMU API for s390 PCI devices. | |
334 | ||
63f1934d DJS |
335 | config S390_CCW_IOMMU |
336 | bool "S390 CCW IOMMU Support" | |
337 | depends on S390 && CCW | |
338 | select IOMMU_API | |
339 | help | |
340 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
341 | is not implemented as it is not necessary for VFIO. | |
342 | ||
0df4fabe YW |
343 | config MTK_IOMMU |
344 | bool "MTK IOMMU Support" | |
345 | depends on ARM || ARM64 | |
346 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
1928832f | 347 | select ARM_DMA_USE_IOMMU |
0df4fabe YW |
348 | select IOMMU_API |
349 | select IOMMU_DMA | |
350 | select IOMMU_IO_PGTABLE_ARMV7S | |
351 | select MEMORY | |
352 | select MTK_SMI | |
353 | help | |
354 | Support for the M4U on certain Mediatek SOCs. M4U is MultiMedia | |
355 | Memory Management Unit. This option enables remapping of DMA memory | |
356 | accesses for the multimedia subsystem. | |
357 | ||
358 | If unsure, say N here. | |
359 | ||
b17336c5 HZ |
360 | config MTK_IOMMU_V1 |
361 | bool "MTK IOMMU Version 1 (M4U gen1) Support" | |
362 | depends on ARM | |
363 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
364 | select ARM_DMA_USE_IOMMU | |
365 | select IOMMU_API | |
366 | select MEMORY | |
367 | select MTK_SMI | |
b17336c5 HZ |
368 | help |
369 | Support for the M4U on certain Mediatek SoCs. M4U generation 1 HW is | |
370 | Multimedia Memory Managememt Unit. This option enables remapping of | |
371 | DMA memory accesses for the multimedia subsystem. | |
372 | ||
373 | if unsure, say N here. | |
374 | ||
0ae349a0 RC |
375 | config QCOM_IOMMU |
376 | # Note: iommu drivers cannot (yet?) be built as modules | |
377 | bool "Qualcomm IOMMU Support" | |
a4aaeccc | 378 | depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) |
0ae349a0 RC |
379 | select IOMMU_API |
380 | select IOMMU_IO_PGTABLE_LPAE | |
381 | select ARM_DMA_USE_IOMMU | |
382 | help | |
383 | Support for IOMMU on certain Qualcomm SoCs. | |
384 | ||
68255b62 | 385 | endif # IOMMU_SUPPORT |