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62feb14e JN |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Copyright (C) 2020 Linaro Ltd | |
4 | */ | |
5 | ||
6 | #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H | |
7 | #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H | |
8 | ||
19ced2ae KD |
9 | #include <linux/soc/qcom/smd-rpm.h> |
10 | ||
dcbce7b0 | 11 | #include <dt-bindings/interconnect/qcom,icc.h> |
40cdeed6 KD |
12 | #include <linux/clk.h> |
13 | #include <linux/interconnect-provider.h> | |
14 | #include <linux/platform_device.h> | |
dcbce7b0 | 15 | |
62feb14e JN |
16 | #define RPM_BUS_MASTER_REQ 0x73616d62 |
17 | #define RPM_BUS_SLAVE_REQ 0x766c7362 | |
18 | ||
62feb14e JN |
19 | #define to_qcom_provider(_provider) \ |
20 | container_of(_provider, struct qcom_icc_provider, provider) | |
21 | ||
e9d54c26 SG |
22 | enum qcom_icc_type { |
23 | QCOM_ICC_NOC, | |
24 | QCOM_ICC_BIMC, | |
08c59040 | 25 | QCOM_ICC_QNOC, |
e9d54c26 SG |
26 | }; |
27 | ||
a927eb09 KD |
28 | /** |
29 | * struct rpm_clk_resource - RPM bus clock resource | |
30 | * @resource_type: RPM resource type of the clock resource | |
31 | * @clock_id: index of the clock resource of a specific resource type | |
32 | * @branch: whether the resource represents a branch clock | |
33 | */ | |
34 | struct rpm_clk_resource { | |
35 | u32 resource_type; | |
36 | u32 clock_id; | |
37 | bool branch; | |
38 | }; | |
39 | ||
62feb14e JN |
40 | /** |
41 | * struct qcom_icc_provider - Qualcomm specific interconnect provider | |
42 | * @provider: generic interconnect provider | |
2e2113c8 | 43 | * @num_intf_clks: the total number of intf_clks clk_bulk_data entries |
e9d54c26 | 44 | * @type: the ICC provider type |
2b6c7d64 | 45 | * @regmap: regmap for QoS registers read/write access |
82a4b285 | 46 | * @qos_offset: offset to QoS registers |
65fac3b3 | 47 | * @bus_clk_rate: bus clock rate in Hz |
11f63efe KD |
48 | * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks |
49 | * @bus_clk: a pointer to a HLOS-owned bus clock | |
2e2113c8 | 50 | * @intf_clks: a clk_bulk_data array of interface clocks |
b979049c | 51 | * @keep_alive: whether to always keep a minimum vote on the bus clocks |
2e2113c8 | 52 | * @is_on: whether the bus is powered on |
62feb14e JN |
53 | */ |
54 | struct qcom_icc_provider { | |
55 | struct icc_provider provider; | |
2e2113c8 | 56 | int num_intf_clks; |
e9d54c26 | 57 | enum qcom_icc_type type; |
2b6c7d64 | 58 | struct regmap *regmap; |
0788f4d5 | 59 | unsigned int qos_offset; |
11f63efe | 60 | u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; |
a927eb09 | 61 | const struct rpm_clk_resource *bus_clk_desc; |
11f63efe | 62 | struct clk *bus_clk; |
2e2113c8 | 63 | struct clk_bulk_data *intf_clks; |
b979049c | 64 | bool keep_alive; |
2e2113c8 | 65 | bool is_on; |
62feb14e JN |
66 | }; |
67 | ||
2b6c7d64 DB |
68 | /** |
69 | * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters | |
70 | * @areq_prio: node requests priority | |
71 | * @prio_level: priority level for bus communication | |
72 | * @limit_commands: activate/deactivate limiter mode during runtime | |
73 | * @ap_owned: indicates if the node is owned by the AP or by the RPM | |
74 | * @qos_mode: default qos mode for this node | |
75 | * @qos_port: qos port number for finding qos registers of this node | |
08c59040 | 76 | * @urg_fwd_en: enable urgent forwarding |
2b6c7d64 DB |
77 | */ |
78 | struct qcom_icc_qos { | |
79 | u32 areq_prio; | |
80 | u32 prio_level; | |
81 | bool limit_commands; | |
82 | bool ap_owned; | |
83 | int qos_mode; | |
84 | int qos_port; | |
08c59040 | 85 | bool urg_fwd_en; |
2b6c7d64 DB |
86 | }; |
87 | ||
62feb14e JN |
88 | /** |
89 | * struct qcom_icc_node - Qualcomm specific interconnect nodes | |
90 | * @name: the node name used in debugfs | |
91 | * @id: a unique node identifier | |
92 | * @links: an array of nodes where we can go next while traversing | |
93 | * @num_links: the total number of @links | |
02819953 | 94 | * @channels: number of channels at this node (e.g. DDR channels) |
62feb14e | 95 | * @buswidth: width of the interconnect between a node and the bus (bytes) |
dcbce7b0 LY |
96 | * @sum_avg: current sum aggregate value of all avg bw requests |
97 | * @max_peak: current max aggregate value of all peak bw requests | |
62feb14e JN |
98 | * @mas_rpm_id: RPM id for devices that are bus masters |
99 | * @slv_rpm_id: RPM id for devices that are bus slaves | |
2b6c7d64 | 100 | * @qos: NoC QoS setting parameters |
62feb14e JN |
101 | */ |
102 | struct qcom_icc_node { | |
103 | unsigned char *name; | |
104 | u16 id; | |
2b6c7d64 | 105 | const u16 *links; |
62feb14e | 106 | u16 num_links; |
02819953 | 107 | u16 channels; |
62feb14e | 108 | u16 buswidth; |
dcbce7b0 LY |
109 | u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; |
110 | u64 max_peak[QCOM_ICC_NUM_BUCKETS]; | |
62feb14e JN |
111 | int mas_rpm_id; |
112 | int slv_rpm_id; | |
2b6c7d64 | 113 | struct qcom_icc_qos qos; |
62feb14e JN |
114 | }; |
115 | ||
116 | struct qcom_icc_desc { | |
2ccf33c0 | 117 | struct qcom_icc_node * const *nodes; |
62feb14e | 118 | size_t num_nodes; |
a927eb09 | 119 | const struct rpm_clk_resource *bus_clk_desc; |
2e2113c8 KD |
120 | const char * const *intf_clocks; |
121 | size_t num_intf_clocks; | |
b979049c | 122 | bool keep_alive; |
e9d54c26 | 123 | enum qcom_icc_type type; |
2b6c7d64 | 124 | const struct regmap_config *regmap_cfg; |
0788f4d5 | 125 | unsigned int qos_offset; |
62feb14e JN |
126 | }; |
127 | ||
1d779317 KD |
128 | /* Valid for all bus types */ |
129 | enum qos_mode { | |
130 | NOC_QOS_MODE_INVALID = 0, | |
131 | NOC_QOS_MODE_FIXED, | |
132 | NOC_QOS_MODE_BYPASS, | |
133 | }; | |
62feb14e | 134 | |
918b8604 KD |
135 | extern const struct rpm_clk_resource aggre1_clk; |
136 | extern const struct rpm_clk_resource aggre2_clk; | |
137 | extern const struct rpm_clk_resource bimc_clk; | |
138 | extern const struct rpm_clk_resource bus_0_clk; | |
139 | extern const struct rpm_clk_resource bus_1_clk; | |
140 | extern const struct rpm_clk_resource bus_2_clk; | |
141 | extern const struct rpm_clk_resource mmaxi_0_clk; | |
142 | extern const struct rpm_clk_resource mmaxi_1_clk; | |
143 | extern const struct rpm_clk_resource qup_clk; | |
144 | ||
145 | extern const struct rpm_clk_resource aggre1_branch_clk; | |
146 | extern const struct rpm_clk_resource aggre2_branch_clk; | |
147 | ||
63e8ab61 | 148 | int qnoc_probe(struct platform_device *pdev); |
62feb14e JN |
149 | int qnoc_remove(struct platform_device *pdev); |
150 | ||
19ced2ae KD |
151 | bool qcom_icc_rpm_smd_available(void); |
152 | int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); | |
a927eb09 | 153 | int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate); |
19ced2ae | 154 | |
62feb14e | 155 | #endif |