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62feb14e JN |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Copyright (C) 2020 Linaro Ltd | |
4 | */ | |
5 | ||
6 | #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H | |
7 | #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H | |
8 | ||
9 | #define RPM_BUS_MASTER_REQ 0x73616d62 | |
10 | #define RPM_BUS_SLAVE_REQ 0x766c7362 | |
11 | ||
62feb14e JN |
12 | #define to_qcom_provider(_provider) \ |
13 | container_of(_provider, struct qcom_icc_provider, provider) | |
14 | ||
15 | /** | |
16 | * struct qcom_icc_provider - Qualcomm specific interconnect provider | |
17 | * @provider: generic interconnect provider | |
18 | * @bus_clks: the clk_bulk_data table of bus clocks | |
19 | * @num_clks: the total number of clk_bulk_data entries | |
2b6c7d64 DB |
20 | * @is_bimc_node: indicates whether to use bimc specific setting |
21 | * @regmap: regmap for QoS registers read/write access | |
62feb14e JN |
22 | */ |
23 | struct qcom_icc_provider { | |
24 | struct icc_provider provider; | |
62feb14e | 25 | int num_clks; |
2b6c7d64 DB |
26 | bool is_bimc_node; |
27 | struct regmap *regmap; | |
63e8ab61 | 28 | struct clk_bulk_data bus_clks[]; |
62feb14e JN |
29 | }; |
30 | ||
2b6c7d64 DB |
31 | /** |
32 | * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters | |
33 | * @areq_prio: node requests priority | |
34 | * @prio_level: priority level for bus communication | |
35 | * @limit_commands: activate/deactivate limiter mode during runtime | |
36 | * @ap_owned: indicates if the node is owned by the AP or by the RPM | |
37 | * @qos_mode: default qos mode for this node | |
38 | * @qos_port: qos port number for finding qos registers of this node | |
39 | */ | |
40 | struct qcom_icc_qos { | |
41 | u32 areq_prio; | |
42 | u32 prio_level; | |
43 | bool limit_commands; | |
44 | bool ap_owned; | |
45 | int qos_mode; | |
46 | int qos_port; | |
47 | }; | |
48 | ||
62feb14e JN |
49 | /** |
50 | * struct qcom_icc_node - Qualcomm specific interconnect nodes | |
51 | * @name: the node name used in debugfs | |
52 | * @id: a unique node identifier | |
53 | * @links: an array of nodes where we can go next while traversing | |
54 | * @num_links: the total number of @links | |
55 | * @buswidth: width of the interconnect between a node and the bus (bytes) | |
56 | * @mas_rpm_id: RPM id for devices that are bus masters | |
57 | * @slv_rpm_id: RPM id for devices that are bus slaves | |
2b6c7d64 | 58 | * @qos: NoC QoS setting parameters |
62feb14e JN |
59 | * @rate: current bus clock rate in Hz |
60 | */ | |
61 | struct qcom_icc_node { | |
62 | unsigned char *name; | |
63 | u16 id; | |
2b6c7d64 | 64 | const u16 *links; |
62feb14e JN |
65 | u16 num_links; |
66 | u16 buswidth; | |
67 | int mas_rpm_id; | |
68 | int slv_rpm_id; | |
2b6c7d64 | 69 | struct qcom_icc_qos qos; |
62feb14e JN |
70 | u64 rate; |
71 | }; | |
72 | ||
73 | struct qcom_icc_desc { | |
74 | struct qcom_icc_node **nodes; | |
75 | size_t num_nodes; | |
2b6c7d64 DB |
76 | const char * const *clocks; |
77 | size_t num_clocks; | |
78 | bool is_bimc_node; | |
79 | const struct regmap_config *regmap_cfg; | |
62feb14e JN |
80 | }; |
81 | ||
82 | #define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \ | |
83 | ...) \ | |
2b6c7d64 DB |
84 | static const u16 _name ## _links[] = { __VA_ARGS__ }; \ |
85 | \ | |
62feb14e JN |
86 | static struct qcom_icc_node _name = { \ |
87 | .name = #_name, \ | |
88 | .id = _id, \ | |
89 | .buswidth = _buswidth, \ | |
90 | .mas_rpm_id = _mas_rpm_id, \ | |
91 | .slv_rpm_id = _slv_rpm_id, \ | |
2b6c7d64 DB |
92 | .num_links = ARRAY_SIZE(_name ## _links), \ |
93 | .links = _name ## _links, \ | |
62feb14e JN |
94 | } |
95 | ||
2b6c7d64 DB |
96 | /* Valid for both NoC and BIMC */ |
97 | #define NOC_QOS_MODE_INVALID -1 | |
98 | #define NOC_QOS_MODE_FIXED 0x0 | |
99 | #define NOC_QOS_MODE_BYPASS 0x2 | |
62feb14e | 100 | |
63e8ab61 | 101 | int qnoc_probe(struct platform_device *pdev); |
62feb14e JN |
102 | int qnoc_remove(struct platform_device *pdev); |
103 | ||
104 | #endif |