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f40219bf NP |
1 | /* |
2 | * Philips UCB1400 touchscreen driver | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: September 25, 2006 | |
6 | * Copyright: MontaVista Software, Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This code is heavily based on ucb1x00-*.c copyrighted by Russell King | |
13 | * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has | |
14 | * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/moduleparam.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/completion.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/input.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/suspend.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/kthread.h> | |
29 | ||
30 | #include <sound/driver.h> | |
31 | #include <sound/core.h> | |
32 | #include <sound/ac97_codec.h> | |
33 | ||
34 | ||
35 | /* | |
36 | * Interesting UCB1400 AC-link registers | |
37 | */ | |
38 | ||
39 | #define UCB_IE_RIS 0x5e | |
40 | #define UCB_IE_FAL 0x60 | |
41 | #define UCB_IE_STATUS 0x62 | |
42 | #define UCB_IE_CLEAR 0x62 | |
43 | #define UCB_IE_ADC (1 << 11) | |
44 | #define UCB_IE_TSPX (1 << 12) | |
45 | ||
46 | #define UCB_TS_CR 0x64 | |
47 | #define UCB_TS_CR_TSMX_POW (1 << 0) | |
48 | #define UCB_TS_CR_TSPX_POW (1 << 1) | |
49 | #define UCB_TS_CR_TSMY_POW (1 << 2) | |
50 | #define UCB_TS_CR_TSPY_POW (1 << 3) | |
51 | #define UCB_TS_CR_TSMX_GND (1 << 4) | |
52 | #define UCB_TS_CR_TSPX_GND (1 << 5) | |
53 | #define UCB_TS_CR_TSMY_GND (1 << 6) | |
54 | #define UCB_TS_CR_TSPY_GND (1 << 7) | |
55 | #define UCB_TS_CR_MODE_INT (0 << 8) | |
56 | #define UCB_TS_CR_MODE_PRES (1 << 8) | |
57 | #define UCB_TS_CR_MODE_POS (2 << 8) | |
58 | #define UCB_TS_CR_BIAS_ENA (1 << 11) | |
59 | #define UCB_TS_CR_TSPX_LOW (1 << 12) | |
60 | #define UCB_TS_CR_TSMX_LOW (1 << 13) | |
61 | ||
62 | #define UCB_ADC_CR 0x66 | |
63 | #define UCB_ADC_SYNC_ENA (1 << 0) | |
64 | #define UCB_ADC_VREFBYP_CON (1 << 1) | |
65 | #define UCB_ADC_INP_TSPX (0 << 2) | |
66 | #define UCB_ADC_INP_TSMX (1 << 2) | |
67 | #define UCB_ADC_INP_TSPY (2 << 2) | |
68 | #define UCB_ADC_INP_TSMY (3 << 2) | |
69 | #define UCB_ADC_INP_AD0 (4 << 2) | |
70 | #define UCB_ADC_INP_AD1 (5 << 2) | |
71 | #define UCB_ADC_INP_AD2 (6 << 2) | |
72 | #define UCB_ADC_INP_AD3 (7 << 2) | |
73 | #define UCB_ADC_EXT_REF (1 << 5) | |
74 | #define UCB_ADC_START (1 << 7) | |
75 | #define UCB_ADC_ENA (1 << 15) | |
76 | ||
77 | #define UCB_ADC_DATA 0x68 | |
78 | #define UCB_ADC_DAT_VALID (1 << 15) | |
79 | #define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff) | |
80 | ||
81 | #define UCB_ID 0x7e | |
82 | #define UCB_ID_1400 0x4304 | |
83 | ||
84 | ||
85 | struct ucb1400 { | |
86 | ac97_t *ac97; | |
87 | struct input_dev *ts_idev; | |
88 | ||
89 | int irq; | |
90 | ||
91 | wait_queue_head_t ts_wait; | |
92 | struct task_struct *ts_task; | |
93 | ||
94 | unsigned int irq_pending; /* not bit field shared */ | |
95 | unsigned int ts_restart:1; | |
96 | unsigned int adcsync:1; | |
97 | }; | |
98 | ||
99 | static int adcsync; | |
100 | ||
101 | static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg) | |
102 | { | |
103 | return ucb->ac97->bus->ops->read(ucb->ac97, reg); | |
104 | } | |
105 | ||
106 | static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val) | |
107 | { | |
108 | ucb->ac97->bus->ops->write(ucb->ac97, reg, val); | |
109 | } | |
110 | ||
111 | static inline void ucb1400_adc_enable(struct ucb1400 *ucb) | |
112 | { | |
113 | ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); | |
114 | } | |
115 | ||
116 | static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel) | |
117 | { | |
118 | unsigned int val; | |
119 | ||
120 | if (ucb->adcsync) | |
121 | adc_channel |= UCB_ADC_SYNC_ENA; | |
122 | ||
123 | ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel); | |
124 | ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START); | |
125 | ||
126 | for (;;) { | |
127 | val = ucb1400_reg_read(ucb, UCB_ADC_DATA); | |
128 | if (val & UCB_ADC_DAT_VALID) | |
129 | break; | |
130 | /* yield to other processes */ | |
131 | set_current_state(TASK_INTERRUPTIBLE); | |
132 | schedule_timeout(1); | |
133 | } | |
134 | ||
135 | return UCB_ADC_DAT_VALUE(val); | |
136 | } | |
137 | ||
138 | static inline void ucb1400_adc_disable(struct ucb1400 *ucb) | |
139 | { | |
140 | ucb1400_reg_write(ucb, UCB_ADC_CR, 0); | |
141 | } | |
142 | ||
143 | /* Switch to interrupt mode. */ | |
144 | static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb) | |
145 | { | |
146 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
147 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | | |
148 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | |
149 | UCB_TS_CR_MODE_INT); | |
150 | } | |
151 | ||
152 | /* | |
153 | * Switch to pressure mode, and read pressure. We don't need to wait | |
154 | * here, since both plates are being driven. | |
155 | */ | |
156 | static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb) | |
157 | { | |
158 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
159 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | | |
160 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | |
161 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
162 | return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); | |
163 | } | |
164 | ||
165 | /* | |
166 | * Switch to X position mode and measure Y plate. We switch the plate | |
167 | * configuration in pressure mode, then switch to position mode. This | |
168 | * gives a faster response time. Even so, we need to wait about 55us | |
169 | * for things to stabilise. | |
170 | */ | |
171 | static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb) | |
172 | { | |
173 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
174 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | |
175 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
176 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
177 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | |
178 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
179 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
180 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | |
181 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | |
182 | ||
183 | udelay(55); | |
184 | ||
185 | return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); | |
186 | } | |
187 | ||
188 | /* | |
189 | * Switch to Y position mode and measure X plate. We switch the plate | |
190 | * configuration in pressure mode, then switch to position mode. This | |
191 | * gives a faster response time. Even so, we need to wait about 55us | |
192 | * for things to stabilise. | |
193 | */ | |
194 | static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb) | |
195 | { | |
196 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
197 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | |
198 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
199 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
200 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | |
201 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
202 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
203 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | |
204 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | |
205 | ||
206 | udelay(55); | |
207 | ||
208 | return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX); | |
209 | } | |
210 | ||
211 | /* | |
212 | * Switch to X plate resistance mode. Set MX to ground, PX to | |
213 | * supply. Measure current. | |
214 | */ | |
215 | static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb) | |
216 | { | |
217 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
218 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | | |
219 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
220 | return ucb1400_adc_read(ucb, 0); | |
221 | } | |
222 | ||
223 | /* | |
224 | * Switch to Y plate resistance mode. Set MY to ground, PY to | |
225 | * supply. Measure current. | |
226 | */ | |
227 | static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb) | |
228 | { | |
229 | ucb1400_reg_write(ucb, UCB_TS_CR, | |
230 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | | |
231 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
232 | return ucb1400_adc_read(ucb, 0); | |
233 | } | |
234 | ||
235 | static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb) | |
236 | { | |
237 | unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR); | |
238 | return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); | |
239 | } | |
240 | ||
241 | static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb) | |
242 | { | |
243 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX); | |
244 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
245 | ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX); | |
246 | } | |
247 | ||
248 | static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb) | |
249 | { | |
250 | ucb1400_reg_write(ucb, UCB_IE_FAL, 0); | |
251 | } | |
252 | ||
253 | static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) | |
254 | { | |
255 | input_report_abs(idev, ABS_X, x); | |
256 | input_report_abs(idev, ABS_Y, y); | |
257 | input_report_abs(idev, ABS_PRESSURE, pressure); | |
258 | input_sync(idev); | |
259 | } | |
260 | ||
261 | static void ucb1400_ts_event_release(struct input_dev *idev) | |
262 | { | |
263 | input_report_abs(idev, ABS_PRESSURE, 0); | |
264 | input_sync(idev); | |
265 | } | |
266 | ||
267 | static void ucb1400_handle_pending_irq(struct ucb1400 *ucb) | |
268 | { | |
269 | unsigned int isr; | |
270 | ||
271 | isr = ucb1400_reg_read(ucb, UCB_IE_STATUS); | |
272 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr); | |
273 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
274 | ||
275 | if (isr & UCB_IE_TSPX) | |
276 | ucb1400_ts_irq_disable(ucb); | |
277 | else | |
278 | printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr); | |
279 | ||
280 | enable_irq(ucb->irq); | |
281 | } | |
282 | ||
283 | static int ucb1400_ts_thread(void *_ucb) | |
284 | { | |
285 | struct ucb1400 *ucb = _ucb; | |
286 | struct task_struct *tsk = current; | |
287 | int valid = 0; | |
288 | ||
289 | tsk->policy = SCHED_FIFO; | |
290 | tsk->rt_priority = 1; | |
291 | ||
292 | while (!kthread_should_stop()) { | |
293 | unsigned int x, y, p; | |
294 | long timeout; | |
295 | ||
296 | ucb->ts_restart = 0; | |
297 | ||
298 | if (ucb->irq_pending) { | |
299 | ucb->irq_pending = 0; | |
300 | ucb1400_handle_pending_irq(ucb); | |
301 | } | |
302 | ||
303 | ucb1400_adc_enable(ucb); | |
304 | x = ucb1400_ts_read_xpos(ucb); | |
305 | y = ucb1400_ts_read_ypos(ucb); | |
306 | p = ucb1400_ts_read_pressure(ucb); | |
307 | ucb1400_adc_disable(ucb); | |
308 | ||
309 | /* Switch back to interrupt mode. */ | |
310 | ucb1400_ts_mode_int(ucb); | |
311 | ||
312 | msleep(10); | |
313 | ||
314 | if (ucb1400_ts_pen_down(ucb)) { | |
315 | ucb1400_ts_irq_enable(ucb); | |
316 | ||
317 | /* | |
318 | * If we spat out a valid sample set last time, | |
319 | * spit out a "pen off" sample here. | |
320 | */ | |
321 | if (valid) { | |
322 | ucb1400_ts_event_release(ucb->ts_idev); | |
323 | valid = 0; | |
324 | } | |
325 | ||
326 | timeout = MAX_SCHEDULE_TIMEOUT; | |
327 | } else { | |
328 | valid = 1; | |
329 | ucb1400_ts_evt_add(ucb->ts_idev, p, x, y); | |
330 | timeout = msecs_to_jiffies(10); | |
331 | } | |
332 | ||
333 | wait_event_interruptible_timeout(ucb->ts_wait, | |
334 | ucb->irq_pending || ucb->ts_restart || kthread_should_stop(), | |
335 | timeout); | |
336 | try_to_freeze(); | |
337 | } | |
338 | ||
339 | /* Send the "pen off" if we are stopping with the pen still active */ | |
340 | if (valid) | |
341 | ucb1400_ts_event_release(ucb->ts_idev); | |
342 | ||
343 | ucb->ts_task = NULL; | |
344 | return 0; | |
345 | } | |
346 | ||
347 | /* | |
348 | * A restriction with interrupts exists when using the ucb1400, as | |
349 | * the codec read/write routines may sleep while waiting for codec | |
350 | * access completion and uses semaphores for access control to the | |
351 | * AC97 bus. A complete codec read cycle could take anywhere from | |
352 | * 60 to 100uSec so we *definitely* don't want to spin inside the | |
353 | * interrupt handler waiting for codec access. So, we handle the | |
354 | * interrupt by scheduling a RT kernel thread to run in process | |
355 | * context instead of interrupt context. | |
356 | */ | |
357 | static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) | |
358 | { | |
359 | struct ucb1400 *ucb = devid; | |
360 | ||
361 | if (irqnr == ucb->irq) { | |
362 | disable_irq(ucb->irq); | |
363 | ucb->irq_pending = 1; | |
364 | wake_up(&ucb->ts_wait); | |
365 | return IRQ_HANDLED; | |
366 | } | |
367 | return IRQ_NONE; | |
368 | } | |
369 | ||
370 | static int ucb1400_ts_open(struct input_dev *idev) | |
371 | { | |
372 | struct ucb1400 *ucb = idev->private; | |
373 | int ret = 0; | |
374 | ||
375 | BUG_ON(ucb->ts_task); | |
376 | ||
377 | ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts"); | |
378 | if (IS_ERR(ucb->ts_task)) { | |
379 | ret = PTR_ERR(ucb->ts_task); | |
380 | ucb->ts_task = NULL; | |
381 | } | |
382 | ||
383 | return ret; | |
384 | } | |
385 | ||
386 | static void ucb1400_ts_close(struct input_dev *idev) | |
387 | { | |
388 | struct ucb1400 *ucb = idev->private; | |
389 | ||
390 | if (ucb->ts_task) | |
391 | kthread_stop(ucb->ts_task); | |
392 | ||
393 | ucb1400_ts_irq_disable(ucb); | |
394 | ucb1400_reg_write(ucb, UCB_TS_CR, 0); | |
395 | } | |
396 | ||
397 | #ifdef CONFIG_PM | |
398 | static int ucb1400_ts_resume(struct device *dev) | |
399 | { | |
400 | struct ucb1400 *ucb = dev_get_drvdata(dev); | |
401 | ||
402 | if (ucb->ts_task) { | |
403 | /* | |
404 | * Restart the TS thread to ensure the | |
405 | * TS interrupt mode is set up again | |
406 | * after sleep. | |
407 | */ | |
408 | ucb->ts_restart = 1; | |
409 | wake_up(&ucb->ts_wait); | |
410 | } | |
411 | return 0; | |
412 | } | |
413 | #else | |
414 | #define ucb1400_ts_resume NULL | |
415 | #endif | |
416 | ||
417 | #ifndef NO_IRQ | |
418 | #define NO_IRQ 0 | |
419 | #endif | |
420 | ||
421 | /* | |
422 | * Try to probe our interrupt, rather than relying on lots of | |
423 | * hard-coded machine dependencies. | |
424 | */ | |
425 | static int ucb1400_detect_irq(struct ucb1400 *ucb) | |
426 | { | |
427 | unsigned long mask, timeout; | |
428 | ||
429 | mask = probe_irq_on(); | |
430 | if (!mask) { | |
431 | probe_irq_off(mask); | |
432 | return -EBUSY; | |
433 | } | |
434 | ||
435 | /* Enable the ADC interrupt. */ | |
436 | ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); | |
437 | ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); | |
438 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); | |
439 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
440 | ||
441 | /* Cause an ADC interrupt. */ | |
442 | ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); | |
443 | ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); | |
444 | ||
445 | /* Wait for the conversion to complete. */ | |
446 | timeout = jiffies + HZ/2; | |
447 | while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) { | |
448 | cpu_relax(); | |
449 | if (time_after(jiffies, timeout)) { | |
450 | printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); | |
451 | probe_irq_off(mask); | |
452 | return -ENODEV; | |
453 | } | |
454 | } | |
455 | ucb1400_reg_write(ucb, UCB_ADC_CR, 0); | |
456 | ||
457 | /* Disable and clear interrupt. */ | |
458 | ucb1400_reg_write(ucb, UCB_IE_RIS, 0); | |
459 | ucb1400_reg_write(ucb, UCB_IE_FAL, 0); | |
460 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); | |
461 | ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
462 | ||
463 | /* Read triggered interrupt. */ | |
464 | ucb->irq = probe_irq_off(mask); | |
465 | if (ucb->irq < 0 || ucb->irq == NO_IRQ) | |
466 | return -ENODEV; | |
467 | ||
468 | return 0; | |
469 | } | |
470 | ||
471 | static int ucb1400_ts_probe(struct device *dev) | |
472 | { | |
473 | struct ucb1400 *ucb; | |
474 | struct input_dev *idev; | |
475 | int error, id, x_res, y_res; | |
476 | ||
477 | ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); | |
478 | idev = input_allocate_device(); | |
479 | if (!ucb || !idev) { | |
480 | error = -ENOMEM; | |
481 | goto err_free_devs; | |
482 | } | |
483 | ||
484 | ucb->ts_idev = idev; | |
485 | ucb->adcsync = adcsync; | |
486 | ucb->ac97 = to_ac97_t(dev); | |
487 | init_waitqueue_head(&ucb->ts_wait); | |
488 | ||
489 | id = ucb1400_reg_read(ucb, UCB_ID); | |
490 | if (id != UCB_ID_1400) { | |
491 | error = -ENODEV; | |
492 | goto err_free_devs; | |
493 | } | |
494 | ||
495 | error = ucb1400_detect_irq(ucb); | |
496 | if (error) { | |
497 | printk(KERN_ERR "UCB1400: IRQ probe failed\n"); | |
498 | goto err_free_devs; | |
499 | } | |
500 | ||
501 | error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, | |
502 | "UCB1400", ucb); | |
503 | if (error) { | |
504 | printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n", | |
505 | ucb->irq, error); | |
506 | goto err_free_devs; | |
507 | } | |
508 | printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); | |
509 | ||
510 | idev->private = ucb; | |
511 | idev->cdev.dev = dev; | |
512 | idev->name = "UCB1400 touchscreen interface"; | |
513 | idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1); | |
514 | idev->id.product = id; | |
515 | idev->open = ucb1400_ts_open; | |
516 | idev->close = ucb1400_ts_close; | |
517 | idev->evbit[0] = BIT(EV_ABS); | |
518 | ||
519 | ucb1400_adc_enable(ucb); | |
520 | x_res = ucb1400_ts_read_xres(ucb); | |
521 | y_res = ucb1400_ts_read_yres(ucb); | |
522 | ucb1400_adc_disable(ucb); | |
523 | printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); | |
524 | ||
525 | input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0); | |
526 | input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0); | |
527 | input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0); | |
528 | ||
529 | error = input_register_device(idev); | |
530 | if (error) | |
531 | goto err_free_irq; | |
532 | ||
533 | dev_set_drvdata(dev, ucb); | |
534 | return 0; | |
535 | ||
536 | err_free_irq: | |
537 | free_irq(ucb->irq, ucb); | |
538 | err_free_devs: | |
539 | input_free_device(idev); | |
540 | kfree(ucb); | |
541 | return error; | |
542 | } | |
543 | ||
544 | static int ucb1400_ts_remove(struct device *dev) | |
545 | { | |
546 | struct ucb1400 *ucb = dev_get_drvdata(dev); | |
547 | ||
548 | free_irq(ucb->irq, ucb); | |
549 | input_unregister_device(ucb->ts_idev); | |
550 | dev_set_drvdata(dev, NULL); | |
551 | kfree(ucb); | |
552 | return 0; | |
553 | } | |
554 | ||
555 | static struct device_driver ucb1400_ts_driver = { | |
556 | .owner = THIS_MODULE, | |
557 | .bus = &ac97_bus_type, | |
558 | .probe = ucb1400_ts_probe, | |
559 | .remove = ucb1400_ts_remove, | |
560 | .resume = ucb1400_ts_resume, | |
561 | }; | |
562 | ||
563 | static int __init ucb1400_ts_init(void) | |
564 | { | |
565 | return driver_register(&ucb1400_ts_driver); | |
566 | } | |
567 | ||
568 | static void __exit ucb1400_ts_exit(void) | |
569 | { | |
570 | driver_unregister(&ucb1400_ts_driver); | |
571 | } | |
572 | ||
573 | module_param(adcsync, int, 0444); | |
574 | ||
575 | module_init(ucb1400_ts_init); | |
576 | module_exit(ucb1400_ts_exit); | |
577 | ||
578 | MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); | |
579 | MODULE_LICENSE("GPL"); |