Commit | Line | Data |
---|---|---|
f40219bf NP |
1 | /* |
2 | * Philips UCB1400 touchscreen driver | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: September 25, 2006 | |
6 | * Copyright: MontaVista Software, Inc. | |
7 | * | |
d9105c2b | 8 | * Spliting done by: Marek Vasut <marek.vasut@gmail.com> |
25985edc | 9 | * If something doesn't work and it worked before spliting, e-mail me, |
d9105c2b MV |
10 | * dont bother Nicolas please ;-) |
11 | * | |
f40219bf NP |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This code is heavily based on ucb1x00-*.c copyrighted by Russell King | |
17 | * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has | |
18 | * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
f40219bf | 22 | #include <linux/init.h> |
f40219bf NP |
23 | #include <linux/completion.h> |
24 | #include <linux/delay.h> | |
25 | #include <linux/input.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/suspend.h> | |
f40219bf | 29 | #include <linux/kthread.h> |
bff19b1d | 30 | #include <linux/freezer.h> |
d9105c2b | 31 | #include <linux/ucb1400.h> |
f40219bf NP |
32 | |
33 | static int adcsync; | |
b5b16c52 CB |
34 | static int ts_delay = 55; /* us */ |
35 | static int ts_delay_pressure; /* us */ | |
f40219bf | 36 | |
f40219bf | 37 | /* Switch to interrupt mode. */ |
d9105c2b | 38 | static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97) |
f40219bf | 39 | { |
d9105c2b | 40 | ucb1400_reg_write(ac97, UCB_TS_CR, |
f40219bf NP |
41 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
42 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | |
43 | UCB_TS_CR_MODE_INT); | |
44 | } | |
45 | ||
46 | /* | |
47 | * Switch to pressure mode, and read pressure. We don't need to wait | |
48 | * here, since both plates are being driven. | |
49 | */ | |
d9105c2b | 50 | static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb) |
f40219bf | 51 | { |
d9105c2b | 52 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
53 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
54 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | | |
55 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
b5b16c52 | 56 | udelay(ts_delay_pressure); |
d9105c2b | 57 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); |
f40219bf NP |
58 | } |
59 | ||
60 | /* | |
61 | * Switch to X position mode and measure Y plate. We switch the plate | |
62 | * configuration in pressure mode, then switch to position mode. This | |
63 | * gives a faster response time. Even so, we need to wait about 55us | |
64 | * for things to stabilise. | |
65 | */ | |
d9105c2b | 66 | static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb) |
f40219bf | 67 | { |
d9105c2b | 68 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
69 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
70 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 71 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
72 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
73 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 74 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
75 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
76 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | |
77 | ||
b5b16c52 | 78 | udelay(ts_delay); |
f40219bf | 79 | |
d9105c2b | 80 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); |
f40219bf NP |
81 | } |
82 | ||
83 | /* | |
84 | * Switch to Y position mode and measure X plate. We switch the plate | |
85 | * configuration in pressure mode, then switch to position mode. This | |
86 | * gives a faster response time. Even so, we need to wait about 55us | |
87 | * for things to stabilise. | |
88 | */ | |
d9105c2b | 89 | static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb) |
f40219bf | 90 | { |
d9105c2b | 91 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
92 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
93 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 94 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
95 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
96 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 97 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
98 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
99 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); | |
100 | ||
b5b16c52 | 101 | udelay(ts_delay); |
f40219bf | 102 | |
d9105c2b | 103 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync); |
f40219bf NP |
104 | } |
105 | ||
106 | /* | |
107 | * Switch to X plate resistance mode. Set MX to ground, PX to | |
108 | * supply. Measure current. | |
109 | */ | |
d9105c2b | 110 | static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb) |
f40219bf | 111 | { |
d9105c2b | 112 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
113 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
114 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 115 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); |
f40219bf NP |
116 | } |
117 | ||
118 | /* | |
119 | * Switch to Y plate resistance mode. Set MY to ground, PY to | |
120 | * supply. Measure current. | |
121 | */ | |
d9105c2b | 122 | static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb) |
f40219bf | 123 | { |
d9105c2b | 124 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
f40219bf NP |
125 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
126 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); | |
d9105c2b | 127 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); |
f40219bf NP |
128 | } |
129 | ||
f9c22736 | 130 | static inline int ucb1400_ts_pen_up(struct snd_ac97 *ac97) |
f40219bf | 131 | { |
d9105c2b | 132 | unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR); |
f9c22736 | 133 | |
d9105c2b | 134 | return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW); |
f40219bf NP |
135 | } |
136 | ||
d9105c2b | 137 | static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97) |
f40219bf | 138 | { |
d9105c2b MV |
139 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX); |
140 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0); | |
141 | ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX); | |
f40219bf NP |
142 | } |
143 | ||
d9105c2b | 144 | static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97) |
f40219bf | 145 | { |
d9105c2b | 146 | ucb1400_reg_write(ac97, UCB_IE_FAL, 0); |
f40219bf NP |
147 | } |
148 | ||
149 | static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) | |
150 | { | |
151 | input_report_abs(idev, ABS_X, x); | |
152 | input_report_abs(idev, ABS_Y, y); | |
153 | input_report_abs(idev, ABS_PRESSURE, pressure); | |
cd2d64b1 | 154 | input_report_key(idev, BTN_TOUCH, 1); |
f40219bf NP |
155 | input_sync(idev); |
156 | } | |
157 | ||
158 | static void ucb1400_ts_event_release(struct input_dev *idev) | |
159 | { | |
160 | input_report_abs(idev, ABS_PRESSURE, 0); | |
cd2d64b1 | 161 | input_report_key(idev, BTN_TOUCH, 0); |
f40219bf NP |
162 | input_sync(idev); |
163 | } | |
164 | ||
d9105c2b | 165 | static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb) |
f40219bf NP |
166 | { |
167 | unsigned int isr; | |
168 | ||
d9105c2b MV |
169 | isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS); |
170 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr); | |
171 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
f40219bf | 172 | |
9b2fb2da | 173 | if (isr & UCB_IE_TSPX) |
d9105c2b | 174 | ucb1400_ts_irq_disable(ucb->ac97); |
9b2fb2da PR |
175 | else |
176 | dev_dbg(&ucb->ts_idev->dev, "ucb1400: unexpected IE_STATUS = %#x\n", isr); | |
177 | enable_irq(ucb->irq); | |
f40219bf NP |
178 | } |
179 | ||
180 | static int ucb1400_ts_thread(void *_ucb) | |
181 | { | |
d9105c2b | 182 | struct ucb1400_ts *ucb = _ucb; |
f40219bf NP |
183 | struct task_struct *tsk = current; |
184 | int valid = 0; | |
c130bdba | 185 | struct sched_param param = { .sched_priority = 1 }; |
f40219bf | 186 | |
c130bdba | 187 | sched_setscheduler(tsk, SCHED_FIFO, ¶m); |
f40219bf | 188 | |
83144186 | 189 | set_freezable(); |
f40219bf NP |
190 | while (!kthread_should_stop()) { |
191 | unsigned int x, y, p; | |
192 | long timeout; | |
193 | ||
194 | ucb->ts_restart = 0; | |
195 | ||
196 | if (ucb->irq_pending) { | |
197 | ucb->irq_pending = 0; | |
198 | ucb1400_handle_pending_irq(ucb); | |
199 | } | |
200 | ||
d9105c2b | 201 | ucb1400_adc_enable(ucb->ac97); |
f40219bf NP |
202 | x = ucb1400_ts_read_xpos(ucb); |
203 | y = ucb1400_ts_read_ypos(ucb); | |
204 | p = ucb1400_ts_read_pressure(ucb); | |
d9105c2b | 205 | ucb1400_adc_disable(ucb->ac97); |
f40219bf NP |
206 | |
207 | /* Switch back to interrupt mode. */ | |
d9105c2b | 208 | ucb1400_ts_mode_int(ucb->ac97); |
f40219bf NP |
209 | |
210 | msleep(10); | |
211 | ||
f9c22736 | 212 | if (ucb1400_ts_pen_up(ucb->ac97)) { |
d9105c2b | 213 | ucb1400_ts_irq_enable(ucb->ac97); |
f40219bf NP |
214 | |
215 | /* | |
216 | * If we spat out a valid sample set last time, | |
217 | * spit out a "pen off" sample here. | |
218 | */ | |
219 | if (valid) { | |
220 | ucb1400_ts_event_release(ucb->ts_idev); | |
221 | valid = 0; | |
222 | } | |
223 | ||
224 | timeout = MAX_SCHEDULE_TIMEOUT; | |
225 | } else { | |
226 | valid = 1; | |
227 | ucb1400_ts_evt_add(ucb->ts_idev, p, x, y); | |
228 | timeout = msecs_to_jiffies(10); | |
229 | } | |
230 | ||
e42837bc | 231 | wait_event_freezable_timeout(ucb->ts_wait, |
d9105c2b MV |
232 | ucb->irq_pending || ucb->ts_restart || |
233 | kthread_should_stop(), timeout); | |
f40219bf NP |
234 | } |
235 | ||
236 | /* Send the "pen off" if we are stopping with the pen still active */ | |
237 | if (valid) | |
238 | ucb1400_ts_event_release(ucb->ts_idev); | |
239 | ||
240 | ucb->ts_task = NULL; | |
241 | return 0; | |
242 | } | |
243 | ||
244 | /* | |
245 | * A restriction with interrupts exists when using the ucb1400, as | |
246 | * the codec read/write routines may sleep while waiting for codec | |
247 | * access completion and uses semaphores for access control to the | |
248 | * AC97 bus. A complete codec read cycle could take anywhere from | |
249 | * 60 to 100uSec so we *definitely* don't want to spin inside the | |
250 | * interrupt handler waiting for codec access. So, we handle the | |
251 | * interrupt by scheduling a RT kernel thread to run in process | |
252 | * context instead of interrupt context. | |
253 | */ | |
254 | static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) | |
255 | { | |
d9105c2b | 256 | struct ucb1400_ts *ucb = devid; |
f40219bf NP |
257 | |
258 | if (irqnr == ucb->irq) { | |
3deb649e | 259 | disable_irq_nosync(ucb->irq); |
f40219bf NP |
260 | ucb->irq_pending = 1; |
261 | wake_up(&ucb->ts_wait); | |
262 | return IRQ_HANDLED; | |
263 | } | |
264 | return IRQ_NONE; | |
265 | } | |
266 | ||
267 | static int ucb1400_ts_open(struct input_dev *idev) | |
268 | { | |
d9105c2b | 269 | struct ucb1400_ts *ucb = input_get_drvdata(idev); |
f40219bf NP |
270 | int ret = 0; |
271 | ||
272 | BUG_ON(ucb->ts_task); | |
273 | ||
274 | ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts"); | |
275 | if (IS_ERR(ucb->ts_task)) { | |
276 | ret = PTR_ERR(ucb->ts_task); | |
277 | ucb->ts_task = NULL; | |
278 | } | |
279 | ||
280 | return ret; | |
281 | } | |
282 | ||
283 | static void ucb1400_ts_close(struct input_dev *idev) | |
284 | { | |
d9105c2b | 285 | struct ucb1400_ts *ucb = input_get_drvdata(idev); |
f40219bf NP |
286 | |
287 | if (ucb->ts_task) | |
288 | kthread_stop(ucb->ts_task); | |
289 | ||
d9105c2b MV |
290 | ucb1400_ts_irq_disable(ucb->ac97); |
291 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0); | |
f40219bf | 292 | } |
f40219bf NP |
293 | |
294 | #ifndef NO_IRQ | |
295 | #define NO_IRQ 0 | |
296 | #endif | |
297 | ||
298 | /* | |
299 | * Try to probe our interrupt, rather than relying on lots of | |
300 | * hard-coded machine dependencies. | |
301 | */ | |
9fea9291 | 302 | static int __devinit ucb1400_ts_detect_irq(struct ucb1400_ts *ucb) |
f40219bf NP |
303 | { |
304 | unsigned long mask, timeout; | |
305 | ||
306 | mask = probe_irq_on(); | |
f40219bf NP |
307 | |
308 | /* Enable the ADC interrupt. */ | |
d9105c2b MV |
309 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC); |
310 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC); | |
311 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | |
312 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
f40219bf NP |
313 | |
314 | /* Cause an ADC interrupt. */ | |
d9105c2b MV |
315 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA); |
316 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); | |
f40219bf NP |
317 | |
318 | /* Wait for the conversion to complete. */ | |
319 | timeout = jiffies + HZ/2; | |
d9105c2b MV |
320 | while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) & |
321 | UCB_ADC_DAT_VALID)) { | |
f40219bf NP |
322 | cpu_relax(); |
323 | if (time_after(jiffies, timeout)) { | |
324 | printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); | |
325 | probe_irq_off(mask); | |
326 | return -ENODEV; | |
327 | } | |
328 | } | |
d9105c2b | 329 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0); |
f40219bf NP |
330 | |
331 | /* Disable and clear interrupt. */ | |
d9105c2b MV |
332 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0); |
333 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); | |
334 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | |
335 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
f40219bf NP |
336 | |
337 | /* Read triggered interrupt. */ | |
338 | ucb->irq = probe_irq_off(mask); | |
339 | if (ucb->irq < 0 || ucb->irq == NO_IRQ) | |
340 | return -ENODEV; | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
9fea9291 | 345 | static int __devinit ucb1400_ts_probe(struct platform_device *dev) |
f40219bf | 346 | { |
d9105c2b | 347 | int error, x_res, y_res; |
1700f5fd | 348 | u16 fcsr; |
d9105c2b | 349 | struct ucb1400_ts *ucb = dev->dev.platform_data; |
f40219bf | 350 | |
d9105c2b MV |
351 | ucb->ts_idev = input_allocate_device(); |
352 | if (!ucb->ts_idev) { | |
f40219bf | 353 | error = -ENOMEM; |
d9105c2b | 354 | goto err; |
f40219bf NP |
355 | } |
356 | ||
fb141597 MV |
357 | /* Only in case the IRQ line wasn't supplied, try detecting it */ |
358 | if (ucb->irq < 0) { | |
359 | error = ucb1400_ts_detect_irq(ucb); | |
360 | if (error) { | |
361 | printk(KERN_ERR "UCB1400: IRQ probe failed\n"); | |
362 | goto err_free_devs; | |
363 | } | |
f40219bf NP |
364 | } |
365 | ||
d9105c2b MV |
366 | init_waitqueue_head(&ucb->ts_wait); |
367 | ||
f40219bf NP |
368 | error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, |
369 | "UCB1400", ucb); | |
370 | if (error) { | |
371 | printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n", | |
372 | ucb->irq, error); | |
373 | goto err_free_devs; | |
374 | } | |
375 | printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); | |
376 | ||
d9105c2b | 377 | input_set_drvdata(ucb->ts_idev, ucb); |
40b9b0b8 | 378 | |
d9105c2b MV |
379 | ucb->ts_idev->dev.parent = &dev->dev; |
380 | ucb->ts_idev->name = "UCB1400 touchscreen interface"; | |
381 | ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97, | |
382 | AC97_VENDOR_ID1); | |
383 | ucb->ts_idev->id.product = ucb->id; | |
384 | ucb->ts_idev->open = ucb1400_ts_open; | |
385 | ucb->ts_idev->close = ucb1400_ts_close; | |
cd2d64b1 MR |
386 | ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY); |
387 | ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); | |
f40219bf | 388 | |
1700f5fd MV |
389 | /* |
390 | * Enable ADC filter to prevent horrible jitter on Colibri. | |
391 | * This also further reduces jitter on boards where ADCSYNC | |
392 | * pin is connected. | |
393 | */ | |
394 | fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR); | |
395 | ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE); | |
396 | ||
d9105c2b | 397 | ucb1400_adc_enable(ucb->ac97); |
f40219bf NP |
398 | x_res = ucb1400_ts_read_xres(ucb); |
399 | y_res = ucb1400_ts_read_yres(ucb); | |
d9105c2b | 400 | ucb1400_adc_disable(ucb->ac97); |
f40219bf NP |
401 | printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); |
402 | ||
d9105c2b MV |
403 | input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0); |
404 | input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0); | |
405 | input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0); | |
f40219bf | 406 | |
d9105c2b | 407 | error = input_register_device(ucb->ts_idev); |
f40219bf NP |
408 | if (error) |
409 | goto err_free_irq; | |
410 | ||
f40219bf NP |
411 | return 0; |
412 | ||
d9105c2b | 413 | err_free_irq: |
f40219bf | 414 | free_irq(ucb->irq, ucb); |
d9105c2b MV |
415 | err_free_devs: |
416 | input_free_device(ucb->ts_idev); | |
417 | err: | |
f40219bf NP |
418 | return error; |
419 | } | |
420 | ||
9fea9291 | 421 | static int __devexit ucb1400_ts_remove(struct platform_device *dev) |
f40219bf | 422 | { |
d9105c2b | 423 | struct ucb1400_ts *ucb = dev->dev.platform_data; |
f40219bf NP |
424 | |
425 | free_irq(ucb->irq, ucb); | |
426 | input_unregister_device(ucb->ts_idev); | |
9fea9291 | 427 | |
f40219bf NP |
428 | return 0; |
429 | } | |
430 | ||
3db8a537 DT |
431 | #ifdef CONFIG_PM_SLEEP |
432 | static int ucb1400_ts_resume(struct device *dev) | |
d9105c2b | 433 | { |
3db8a537 | 434 | struct ucb1400_ts *ucb = dev->platform_data; |
d9105c2b MV |
435 | |
436 | if (ucb->ts_task) { | |
437 | /* | |
438 | * Restart the TS thread to ensure the | |
439 | * TS interrupt mode is set up again | |
440 | * after sleep. | |
441 | */ | |
442 | ucb->ts_restart = 1; | |
443 | wake_up(&ucb->ts_wait); | |
444 | } | |
445 | return 0; | |
446 | } | |
d9105c2b MV |
447 | #endif |
448 | ||
3db8a537 DT |
449 | static SIMPLE_DEV_PM_OPS(ucb1400_ts_pm_ops, NULL, ucb1400_ts_resume); |
450 | ||
d9105c2b MV |
451 | static struct platform_driver ucb1400_ts_driver = { |
452 | .probe = ucb1400_ts_probe, | |
9fea9291 | 453 | .remove = __devexit_p(ucb1400_ts_remove), |
d9105c2b MV |
454 | .driver = { |
455 | .name = "ucb1400_ts", | |
8028e938 | 456 | .owner = THIS_MODULE, |
3db8a537 | 457 | .pm = &ucb1400_ts_pm_ops, |
d9105c2b | 458 | }, |
f40219bf | 459 | }; |
cdcc96e2 | 460 | module_platform_driver(ucb1400_ts_driver); |
f40219bf | 461 | |
b5b16c52 CB |
462 | module_param(adcsync, bool, 0444); |
463 | MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); | |
464 | ||
465 | module_param(ts_delay, int, 0444); | |
d9105c2b MV |
466 | MODULE_PARM_DESC(ts_delay, "Delay between panel setup and" |
467 | " position read. Default = 55us."); | |
b5b16c52 CB |
468 | |
469 | module_param(ts_delay_pressure, int, 0444); | |
470 | MODULE_PARM_DESC(ts_delay_pressure, | |
d9105c2b MV |
471 | "delay between panel setup and pressure read." |
472 | " Default = 0us."); | |
f40219bf | 473 | |
f40219bf NP |
474 | MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); |
475 | MODULE_LICENSE("GPL"); |