Commit | Line | Data |
---|---|---|
1b8be32e RP |
1 | /* |
2 | * TI Touch Screen driver | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation version 2. | |
9 | * | |
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
11 | * kind, whether express or implied; without even the implied warranty | |
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | ||
1b8be32e RP |
17 | #include <linux/kernel.h> |
18 | #include <linux/err.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/input.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
1b8be32e | 26 | #include <linux/delay.h> |
0396310b | 27 | #include <linux/of.h> |
83edfdf3 | 28 | #include <linux/sort.h> |
7a39915b | 29 | #include <linux/pm_wakeirq.h> |
1b8be32e | 30 | |
2b99bafa | 31 | #include <linux/mfd/ti_am335x_tscadc.h> |
33f5cc60 PR |
32 | |
33 | #define ADCFSM_STEPID 0x10 | |
1b8be32e | 34 | #define SEQ_SETTLE 275 |
1b8be32e | 35 | #define MAX_12BIT ((1 << 12) - 1) |
1b8be32e | 36 | |
46850420 GS |
37 | #define TSC_IRQENB_MASK (IRQENB_FIFO0THRES | IRQENB_EOS | IRQENB_HW_PEN) |
38 | ||
bb76dc09 PR |
39 | static const int config_pins[] = { |
40 | STEPCONFIG_XPP, | |
41 | STEPCONFIG_XNN, | |
42 | STEPCONFIG_YPP, | |
43 | STEPCONFIG_YNN, | |
44 | }; | |
45 | ||
55c04de5 | 46 | struct titsc { |
1b8be32e | 47 | struct input_dev *input; |
2b99bafa | 48 | struct ti_tscadc_dev *mfd_tscadc; |
333e07ec | 49 | struct device *dev; |
1b8be32e RP |
50 | unsigned int irq; |
51 | unsigned int wires; | |
52 | unsigned int x_plate_resistance; | |
53 | bool pen_down; | |
0396310b | 54 | int coordinate_readouts; |
bb76dc09 PR |
55 | u32 config_inp[4]; |
56 | u32 bit_xp, bit_xn, bit_yp, bit_yn; | |
57 | u32 inp_xp, inp_xn, inp_yp, inp_yn; | |
baee5399 | 58 | u32 step_mask; |
bf223612 | 59 | u32 charge_delay; |
1b8be32e RP |
60 | }; |
61 | ||
55c04de5 | 62 | static unsigned int titsc_readl(struct titsc *ts, unsigned int reg) |
1b8be32e | 63 | { |
2b99bafa | 64 | return readl(ts->mfd_tscadc->tscadc_base + reg); |
1b8be32e RP |
65 | } |
66 | ||
55c04de5 | 67 | static void titsc_writel(struct titsc *tsc, unsigned int reg, |
1b8be32e RP |
68 | unsigned int val) |
69 | { | |
2b99bafa | 70 | writel(val, tsc->mfd_tscadc->tscadc_base + reg); |
1b8be32e RP |
71 | } |
72 | ||
bb76dc09 PR |
73 | static int titsc_config_wires(struct titsc *ts_dev) |
74 | { | |
75 | u32 analog_line[4]; | |
76 | u32 wire_order[4]; | |
77 | int i, bit_cfg; | |
78 | ||
79 | for (i = 0; i < 4; i++) { | |
80 | /* | |
81 | * Get the order in which TSC wires are attached | |
82 | * w.r.t. each of the analog input lines on the EVM. | |
83 | */ | |
84 | analog_line[i] = (ts_dev->config_inp[i] & 0xF0) >> 4; | |
85 | wire_order[i] = ts_dev->config_inp[i] & 0x0F; | |
86 | if (WARN_ON(analog_line[i] > 7)) | |
87 | return -EINVAL; | |
88 | if (WARN_ON(wire_order[i] > ARRAY_SIZE(config_pins))) | |
89 | return -EINVAL; | |
90 | } | |
91 | ||
92 | for (i = 0; i < 4; i++) { | |
93 | int an_line; | |
94 | int wi_order; | |
95 | ||
96 | an_line = analog_line[i]; | |
97 | wi_order = wire_order[i]; | |
98 | bit_cfg = config_pins[wi_order]; | |
99 | if (bit_cfg == 0) | |
100 | return -EINVAL; | |
101 | switch (wi_order) { | |
102 | case 0: | |
103 | ts_dev->bit_xp = bit_cfg; | |
104 | ts_dev->inp_xp = an_line; | |
105 | break; | |
106 | ||
107 | case 1: | |
108 | ts_dev->bit_xn = bit_cfg; | |
109 | ts_dev->inp_xn = an_line; | |
110 | break; | |
111 | ||
112 | case 2: | |
113 | ts_dev->bit_yp = bit_cfg; | |
114 | ts_dev->inp_yp = an_line; | |
115 | break; | |
116 | case 3: | |
117 | ts_dev->bit_yn = bit_cfg; | |
118 | ts_dev->inp_yn = an_line; | |
119 | break; | |
120 | } | |
121 | } | |
122 | return 0; | |
123 | } | |
124 | ||
55c04de5 | 125 | static void titsc_step_config(struct titsc *ts_dev) |
1b8be32e RP |
126 | { |
127 | unsigned int config; | |
23dee6c6 | 128 | int i, n; |
3a59684c | 129 | int end_step, first_step, tsc_steps; |
8c896308 | 130 | u32 stepenable; |
1b8be32e RP |
131 | |
132 | config = STEPCONFIG_MODE_HWSYNC | | |
73cca71a DB |
133 | STEPCONFIG_AVG_16 | ts_dev->bit_xp | |
134 | STEPCONFIG_INM_ADCREFM; | |
1b8be32e RP |
135 | switch (ts_dev->wires) { |
136 | case 4: | |
bb76dc09 | 137 | config |= STEPCONFIG_INP(ts_dev->inp_yp) | ts_dev->bit_xn; |
1b8be32e RP |
138 | break; |
139 | case 5: | |
bb76dc09 PR |
140 | config |= ts_dev->bit_yn | |
141 | STEPCONFIG_INP_AN4 | ts_dev->bit_xn | | |
142 | ts_dev->bit_yp; | |
1b8be32e RP |
143 | break; |
144 | case 8: | |
bb76dc09 | 145 | config |= STEPCONFIG_INP(ts_dev->inp_yp) | ts_dev->bit_xn; |
1b8be32e RP |
146 | break; |
147 | } | |
148 | ||
3a59684c BG |
149 | tsc_steps = ts_dev->coordinate_readouts * 2 + 2; |
150 | first_step = TOTAL_STEPS - tsc_steps; | |
151 | /* Steps 16 to 16-coordinate_readouts is for X */ | |
152 | end_step = first_step + tsc_steps; | |
23dee6c6 | 153 | n = 0; |
3a59684c | 154 | for (i = end_step - ts_dev->coordinate_readouts; i < end_step; i++) { |
55c04de5 | 155 | titsc_writel(ts_dev, REG_STEPCONFIG(i), config); |
23dee6c6 DB |
156 | titsc_writel(ts_dev, REG_STEPDELAY(i), |
157 | n++ == 0 ? STEPCONFIG_OPENDLY : 0); | |
1b8be32e RP |
158 | } |
159 | ||
1b8be32e | 160 | config = STEPCONFIG_MODE_HWSYNC | |
bb76dc09 | 161 | STEPCONFIG_AVG_16 | ts_dev->bit_yn | |
8c896308 | 162 | STEPCONFIG_INM_ADCREFM; |
1b8be32e RP |
163 | switch (ts_dev->wires) { |
164 | case 4: | |
bb76dc09 | 165 | config |= ts_dev->bit_yp | STEPCONFIG_INP(ts_dev->inp_xp); |
1b8be32e RP |
166 | break; |
167 | case 5: | |
bb76dc09 | 168 | config |= ts_dev->bit_xp | STEPCONFIG_INP_AN4 | |
cf5dd489 | 169 | STEPCONFIG_XNP | STEPCONFIG_YPN; |
1b8be32e RP |
170 | break; |
171 | case 8: | |
bb76dc09 | 172 | config |= ts_dev->bit_yp | STEPCONFIG_INP(ts_dev->inp_xp); |
1b8be32e RP |
173 | break; |
174 | } | |
175 | ||
3a59684c BG |
176 | /* 1 ... coordinate_readouts is for Y */ |
177 | end_step = first_step + ts_dev->coordinate_readouts; | |
23dee6c6 | 178 | n = 0; |
3a59684c | 179 | for (i = first_step; i < end_step; i++) { |
55c04de5 | 180 | titsc_writel(ts_dev, REG_STEPCONFIG(i), config); |
23dee6c6 DB |
181 | titsc_writel(ts_dev, REG_STEPDELAY(i), |
182 | n++ == 0 ? STEPCONFIG_OPENDLY : 0); | |
1b8be32e RP |
183 | } |
184 | ||
344d635b | 185 | /* Make CHARGECONFIG same as IDLECONFIG */ |
1b8be32e | 186 | |
344d635b | 187 | config = titsc_readl(ts_dev, REG_IDLECONFIG); |
55c04de5 | 188 | titsc_writel(ts_dev, REG_CHARGECONFIG, config); |
bf223612 | 189 | titsc_writel(ts_dev, REG_CHARGEDELAY, ts_dev->charge_delay); |
1b8be32e | 190 | |
3a59684c | 191 | /* coordinate_readouts + 1 ... coordinate_readouts + 2 is for Z */ |
1b8be32e | 192 | config = STEPCONFIG_MODE_HWSYNC | |
bb76dc09 PR |
193 | STEPCONFIG_AVG_16 | ts_dev->bit_yp | |
194 | ts_dev->bit_xn | STEPCONFIG_INM_ADCREFM | | |
195 | STEPCONFIG_INP(ts_dev->inp_xp); | |
8c896308 SAS |
196 | titsc_writel(ts_dev, REG_STEPCONFIG(end_step), config); |
197 | titsc_writel(ts_dev, REG_STEPDELAY(end_step), | |
d1fb5743 | 198 | STEPCONFIG_OPENDLY); |
1b8be32e | 199 | |
8c896308 | 200 | end_step++; |
6bfeb6c2 DB |
201 | config = STEPCONFIG_MODE_HWSYNC | |
202 | STEPCONFIG_AVG_16 | ts_dev->bit_yp | | |
203 | ts_dev->bit_xn | STEPCONFIG_INM_ADCREFM | | |
204 | STEPCONFIG_INP(ts_dev->inp_yn); | |
8c896308 SAS |
205 | titsc_writel(ts_dev, REG_STEPCONFIG(end_step), config); |
206 | titsc_writel(ts_dev, REG_STEPDELAY(end_step), | |
d1fb5743 | 207 | STEPCONFIG_OPENDLY); |
1b8be32e | 208 | |
3a59684c BG |
209 | /* The steps end ... end - readouts * 2 + 2 and bit 0 for TS_Charge */ |
210 | stepenable = 1; | |
211 | for (i = 0; i < tsc_steps; i++) | |
212 | stepenable |= 1 << (first_step + i + 1); | |
213 | ||
baee5399 | 214 | ts_dev->step_mask = stepenable; |
7e170c6e | 215 | am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, ts_dev->step_mask); |
1b8be32e RP |
216 | } |
217 | ||
83edfdf3 V |
218 | static int titsc_cmp_coord(const void *a, const void *b) |
219 | { | |
220 | return *(int *)a - *(int *)b; | |
221 | } | |
222 | ||
55c04de5 | 223 | static void titsc_read_coordinates(struct titsc *ts_dev, |
8c896308 | 224 | u32 *x, u32 *y, u32 *z1, u32 *z2) |
1b8be32e | 225 | { |
83edfdf3 V |
226 | unsigned int yvals[7], xvals[7]; |
227 | unsigned int i, xsum = 0, ysum = 0; | |
8c896308 | 228 | unsigned int creads = ts_dev->coordinate_readouts; |
1b8be32e | 229 | |
83edfdf3 V |
230 | for (i = 0; i < creads; i++) { |
231 | yvals[i] = titsc_readl(ts_dev, REG_FIFO0); | |
232 | yvals[i] &= 0xfff; | |
233 | } | |
1b8be32e | 234 | |
83edfdf3 V |
235 | *z1 = titsc_readl(ts_dev, REG_FIFO0); |
236 | *z1 &= 0xfff; | |
237 | *z2 = titsc_readl(ts_dev, REG_FIFO0); | |
238 | *z2 &= 0xfff; | |
3a59684c | 239 | |
83edfdf3 V |
240 | for (i = 0; i < creads; i++) { |
241 | xvals[i] = titsc_readl(ts_dev, REG_FIFO0); | |
242 | xvals[i] &= 0xfff; | |
243 | } | |
3a59684c | 244 | |
83edfdf3 V |
245 | /* |
246 | * If co-ordinates readouts is less than 4 then | |
247 | * report the average. In case of 4 or more | |
248 | * readouts, sort the co-ordinate samples, drop | |
249 | * min and max values and report the average of | |
250 | * remaining values. | |
251 | */ | |
252 | if (creads <= 3) { | |
253 | for (i = 0; i < creads; i++) { | |
254 | ysum += yvals[i]; | |
255 | xsum += xvals[i]; | |
1b8be32e | 256 | } |
83edfdf3 V |
257 | ysum /= creads; |
258 | xsum /= creads; | |
259 | } else { | |
260 | sort(yvals, creads, sizeof(unsigned int), | |
261 | titsc_cmp_coord, NULL); | |
262 | sort(xvals, creads, sizeof(unsigned int), | |
263 | titsc_cmp_coord, NULL); | |
264 | for (i = 1; i < creads - 1; i++) { | |
265 | ysum += yvals[i]; | |
266 | xsum += xvals[i]; | |
267 | } | |
268 | ysum /= creads - 2; | |
269 | xsum /= creads - 2; | |
1b8be32e | 270 | } |
83edfdf3 V |
271 | *y = ysum; |
272 | *x = xsum; | |
1b8be32e RP |
273 | } |
274 | ||
55c04de5 | 275 | static irqreturn_t titsc_irq(int irq, void *dev) |
1b8be32e | 276 | { |
55c04de5 | 277 | struct titsc *ts_dev = dev; |
1b8be32e | 278 | struct input_dev *input_dev = ts_dev->input; |
344d635b | 279 | unsigned int fsm, status, irqclr = 0; |
1b8be32e RP |
280 | unsigned int x = 0, y = 0; |
281 | unsigned int z1, z2, z; | |
1b8be32e | 282 | |
344d635b BG |
283 | status = titsc_readl(ts_dev, REG_RAWIRQSTATUS); |
284 | if (status & IRQENB_HW_PEN) { | |
285 | ts_dev->pen_down = true; | |
344d635b | 286 | irqclr |= IRQENB_HW_PEN; |
333e07ec | 287 | pm_stay_awake(ts_dev->dev); |
344d635b BG |
288 | } |
289 | ||
290 | if (status & IRQENB_PENUP) { | |
291 | fsm = titsc_readl(ts_dev, REG_ADCFSM); | |
292 | if (fsm == ADCFSM_STEPID) { | |
293 | ts_dev->pen_down = false; | |
294 | input_report_key(input_dev, BTN_TOUCH, 0); | |
295 | input_report_abs(input_dev, ABS_PRESSURE, 0); | |
296 | input_sync(input_dev); | |
333e07ec | 297 | pm_relax(ts_dev->dev); |
344d635b BG |
298 | } else { |
299 | ts_dev->pen_down = true; | |
300 | } | |
301 | irqclr |= IRQENB_PENUP; | |
302 | } | |
303 | ||
304 | if (status & IRQENB_EOS) | |
305 | irqclr |= IRQENB_EOS; | |
306 | ||
baee5399 ZL |
307 | /* |
308 | * ADC and touchscreen share the IRQ line. | |
309 | * FIFO1 interrupts are used by ADC. Handle FIFO0 IRQs here only | |
310 | */ | |
30af55f9 | 311 | if (status & IRQENB_FIFO0THRES) { |
1b8be32e | 312 | |
8c896308 | 313 | titsc_read_coordinates(ts_dev, &x, &y, &z1, &z2); |
2b99bafa | 314 | |
1b8be32e RP |
315 | if (ts_dev->pen_down && z1 != 0 && z2 != 0) { |
316 | /* | |
317 | * Calculate pressure using formula | |
318 | * Resistance(touch) = x plate resistance * | |
b6e43ddd | 319 | * x position/4096 * ((z2 / z1) - 1) |
1b8be32e | 320 | */ |
8c896308 | 321 | z = z1 - z2; |
1b8be32e RP |
322 | z *= x; |
323 | z *= ts_dev->x_plate_resistance; | |
8c896308 | 324 | z /= z2; |
1b8be32e RP |
325 | z = (z + 2047) >> 12; |
326 | ||
327 | if (z <= MAX_12BIT) { | |
328 | input_report_abs(input_dev, ABS_X, x); | |
329 | input_report_abs(input_dev, ABS_Y, y); | |
330 | input_report_abs(input_dev, ABS_PRESSURE, z); | |
331 | input_report_key(input_dev, BTN_TOUCH, 1); | |
332 | input_sync(input_dev); | |
333 | } | |
334 | } | |
30af55f9 | 335 | irqclr |= IRQENB_FIFO0THRES; |
1b8be32e | 336 | } |
9a28b883 SAS |
337 | if (irqclr) { |
338 | titsc_writel(ts_dev, REG_IRQSTATUS, irqclr); | |
344d635b BG |
339 | if (status & IRQENB_EOS) |
340 | am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, | |
341 | ts_dev->step_mask); | |
9a28b883 SAS |
342 | return IRQ_HANDLED; |
343 | } | |
344 | return IRQ_NONE; | |
1b8be32e RP |
345 | } |
346 | ||
0396310b PR |
347 | static int titsc_parse_dt(struct platform_device *pdev, |
348 | struct titsc *ts_dev) | |
349 | { | |
350 | struct device_node *node = pdev->dev.of_node; | |
351 | int err; | |
352 | ||
353 | if (!node) | |
354 | return -EINVAL; | |
355 | ||
356 | err = of_property_read_u32(node, "ti,wires", &ts_dev->wires); | |
357 | if (err < 0) | |
358 | return err; | |
359 | switch (ts_dev->wires) { | |
360 | case 4: | |
361 | case 5: | |
362 | case 8: | |
363 | break; | |
364 | default: | |
365 | return -EINVAL; | |
366 | } | |
367 | ||
368 | err = of_property_read_u32(node, "ti,x-plate-resistance", | |
369 | &ts_dev->x_plate_resistance); | |
370 | if (err < 0) | |
371 | return err; | |
372 | ||
c9aeb249 FB |
373 | /* |
374 | * Try with the new binding first. If it fails, try again with | |
375 | * bogus, miss-spelled version. | |
376 | */ | |
377 | err = of_property_read_u32(node, "ti,coordinate-readouts", | |
0396310b | 378 | &ts_dev->coordinate_readouts); |
31972f6e FB |
379 | if (err < 0) { |
380 | dev_warn(&pdev->dev, "please use 'ti,coordinate-readouts' instead\n"); | |
c9aeb249 FB |
381 | err = of_property_read_u32(node, "ti,coordiante-readouts", |
382 | &ts_dev->coordinate_readouts); | |
31972f6e FB |
383 | } |
384 | ||
0396310b PR |
385 | if (err < 0) |
386 | return err; | |
387 | ||
83edfdf3 V |
388 | if (ts_dev->coordinate_readouts <= 0) { |
389 | dev_warn(&pdev->dev, | |
390 | "invalid co-ordinate readouts, resetting it to 5\n"); | |
391 | ts_dev->coordinate_readouts = 5; | |
392 | } | |
393 | ||
bf223612 V |
394 | err = of_property_read_u32(node, "ti,charge-delay", |
395 | &ts_dev->charge_delay); | |
396 | /* | |
397 | * If ti,charge-delay value is not specified, then use | |
398 | * CHARGEDLY_OPENDLY as the default value. | |
399 | */ | |
400 | if (err < 0) { | |
401 | ts_dev->charge_delay = CHARGEDLY_OPENDLY; | |
402 | dev_warn(&pdev->dev, "ti,charge-delay not specified\n"); | |
403 | } | |
404 | ||
0396310b PR |
405 | return of_property_read_u32_array(node, "ti,wire-config", |
406 | ts_dev->config_inp, ARRAY_SIZE(ts_dev->config_inp)); | |
1b8be32e RP |
407 | } |
408 | ||
409 | /* | |
410 | * The functions for inserting/removing driver as a module. | |
411 | */ | |
412 | ||
31564cbd | 413 | static int titsc_probe(struct platform_device *pdev) |
1b8be32e | 414 | { |
55c04de5 | 415 | struct titsc *ts_dev; |
1b8be32e | 416 | struct input_dev *input_dev; |
a9bce1b0 | 417 | struct ti_tscadc_dev *tscadc_dev = ti_tscadc_dev_get(pdev); |
1b8be32e | 418 | int err; |
1b8be32e | 419 | |
1b8be32e | 420 | /* Allocate memory for device */ |
520d8267 | 421 | ts_dev = kzalloc(sizeof(*ts_dev), GFP_KERNEL); |
1b8be32e RP |
422 | input_dev = input_allocate_device(); |
423 | if (!ts_dev || !input_dev) { | |
424 | dev_err(&pdev->dev, "failed to allocate memory.\n"); | |
425 | err = -ENOMEM; | |
426 | goto err_free_mem; | |
427 | } | |
428 | ||
2b99bafa PR |
429 | tscadc_dev->tsc = ts_dev; |
430 | ts_dev->mfd_tscadc = tscadc_dev; | |
1b8be32e | 431 | ts_dev->input = input_dev; |
2b99bafa | 432 | ts_dev->irq = tscadc_dev->irq; |
333e07ec | 433 | ts_dev->dev = &pdev->dev; |
0396310b | 434 | |
b9194fdf | 435 | err = titsc_parse_dt(pdev, ts_dev); |
0396310b PR |
436 | if (err) { |
437 | dev_err(&pdev->dev, "Could not find valid DT data.\n"); | |
438 | goto err_free_mem; | |
439 | } | |
1b8be32e | 440 | |
55c04de5 | 441 | err = request_irq(ts_dev->irq, titsc_irq, |
baee5399 | 442 | IRQF_SHARED, pdev->dev.driver->name, ts_dev); |
1b8be32e RP |
443 | if (err) { |
444 | dev_err(&pdev->dev, "failed to allocate irq.\n"); | |
2b99bafa | 445 | goto err_free_mem; |
1b8be32e | 446 | } |
1b8be32e | 447 | |
333e07ec | 448 | device_init_wakeup(&pdev->dev, true); |
7a39915b V |
449 | err = dev_pm_set_wake_irq(&pdev->dev, ts_dev->irq); |
450 | if (err) | |
451 | dev_err(&pdev->dev, "irq wake enable failed.\n"); | |
333e07ec | 452 | |
46850420 | 453 | titsc_writel(ts_dev, REG_IRQSTATUS, TSC_IRQENB_MASK); |
55c04de5 | 454 | titsc_writel(ts_dev, REG_IRQENABLE, IRQENB_FIFO0THRES); |
344d635b | 455 | titsc_writel(ts_dev, REG_IRQENABLE, IRQENB_EOS); |
bb76dc09 PR |
456 | err = titsc_config_wires(ts_dev); |
457 | if (err) { | |
458 | dev_err(&pdev->dev, "wrong i/p wire configuration\n"); | |
459 | goto err_free_irq; | |
460 | } | |
55c04de5 | 461 | titsc_step_config(ts_dev); |
8c896308 SAS |
462 | titsc_writel(ts_dev, REG_FIFO0THR, |
463 | ts_dev->coordinate_readouts * 2 + 2 - 1); | |
1b8be32e | 464 | |
2b99bafa | 465 | input_dev->name = "ti-tsc"; |
1b8be32e RP |
466 | input_dev->dev.parent = &pdev->dev; |
467 | ||
468 | input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); | |
469 | input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); | |
470 | ||
471 | input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0); | |
472 | input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0); | |
473 | input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0); | |
474 | ||
475 | /* register to the input system */ | |
476 | err = input_register_device(input_dev); | |
477 | if (err) | |
2b99bafa | 478 | goto err_free_irq; |
1b8be32e RP |
479 | |
480 | platform_set_drvdata(pdev, ts_dev); | |
481 | return 0; | |
482 | ||
1b8be32e | 483 | err_free_irq: |
7a39915b | 484 | dev_pm_clear_wake_irq(&pdev->dev); |
333e07ec | 485 | device_init_wakeup(&pdev->dev, false); |
1b8be32e | 486 | free_irq(ts_dev->irq, ts_dev); |
1b8be32e RP |
487 | err_free_mem: |
488 | input_free_device(input_dev); | |
489 | kfree(ts_dev); | |
490 | return err; | |
491 | } | |
492 | ||
d722a702 | 493 | static void titsc_remove(struct platform_device *pdev) |
1b8be32e | 494 | { |
a9bce1b0 SAS |
495 | struct titsc *ts_dev = platform_get_drvdata(pdev); |
496 | u32 steps; | |
1b8be32e | 497 | |
7a39915b | 498 | dev_pm_clear_wake_irq(&pdev->dev); |
333e07ec | 499 | device_init_wakeup(&pdev->dev, false); |
1b8be32e RP |
500 | free_irq(ts_dev->irq, ts_dev); |
501 | ||
abeccee4 | 502 | /* total steps followed by the enable mask */ |
0396310b | 503 | steps = 2 * ts_dev->coordinate_readouts + 2; |
abeccee4 PR |
504 | steps = (1 << steps) - 1; |
505 | am335x_tsc_se_clr(ts_dev->mfd_tscadc, steps); | |
506 | ||
1b8be32e RP |
507 | input_unregister_device(ts_dev->input); |
508 | ||
2b99bafa | 509 | kfree(ts_dev); |
2b99bafa | 510 | } |
1b8be32e | 511 | |
f8401643 | 512 | static int titsc_suspend(struct device *dev) |
2b99bafa | 513 | { |
a9bce1b0 | 514 | struct titsc *ts_dev = dev_get_drvdata(dev); |
2b99bafa PR |
515 | unsigned int idle; |
516 | ||
333e07ec | 517 | if (device_may_wakeup(dev)) { |
46850420 | 518 | titsc_writel(ts_dev, REG_IRQSTATUS, TSC_IRQENB_MASK); |
2b99bafa PR |
519 | idle = titsc_readl(ts_dev, REG_IRQENABLE); |
520 | titsc_writel(ts_dev, REG_IRQENABLE, | |
521 | (idle | IRQENB_HW_PEN)); | |
522 | titsc_writel(ts_dev, REG_IRQWAKEUP, IRQWKUP_ENB); | |
523 | } | |
524 | return 0; | |
525 | } | |
1b8be32e | 526 | |
f8401643 | 527 | static int titsc_resume(struct device *dev) |
2b99bafa | 528 | { |
a9bce1b0 | 529 | struct titsc *ts_dev = dev_get_drvdata(dev); |
1b8be32e | 530 | |
333e07ec | 531 | if (device_may_wakeup(dev)) { |
2b99bafa PR |
532 | titsc_writel(ts_dev, REG_IRQWAKEUP, |
533 | 0x00); | |
534 | titsc_writel(ts_dev, REG_IRQCLR, IRQENB_HW_PEN); | |
333e07ec | 535 | pm_relax(dev); |
2b99bafa PR |
536 | } |
537 | titsc_step_config(ts_dev); | |
538 | titsc_writel(ts_dev, REG_FIFO0THR, | |
8c896308 | 539 | ts_dev->coordinate_readouts * 2 + 2 - 1); |
1b8be32e RP |
540 | return 0; |
541 | } | |
542 | ||
f8401643 | 543 | static DEFINE_SIMPLE_DEV_PM_OPS(titsc_pm_ops, titsc_suspend, titsc_resume); |
2b99bafa | 544 | |
0396310b PR |
545 | static const struct of_device_id ti_tsc_dt_ids[] = { |
546 | { .compatible = "ti,am3359-tsc", }, | |
547 | { } | |
548 | }; | |
549 | MODULE_DEVICE_TABLE(of, ti_tsc_dt_ids); | |
550 | ||
1b8be32e | 551 | static struct platform_driver ti_tsc_driver = { |
55c04de5 | 552 | .probe = titsc_probe, |
2c19d015 | 553 | .remove = titsc_remove, |
1b8be32e | 554 | .driver = { |
2c19d015 | 555 | .name = "TI-am335x-tsc", |
f8401643 | 556 | .pm = pm_sleep_ptr(&titsc_pm_ops), |
8e6146bf | 557 | .of_match_table = ti_tsc_dt_ids, |
1b8be32e RP |
558 | }, |
559 | }; | |
560 | module_platform_driver(ti_tsc_driver); | |
561 | ||
562 | MODULE_DESCRIPTION("TI touchscreen controller driver"); | |
563 | MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); | |
564 | MODULE_LICENSE("GPL"); |