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9a436d52 HC |
1 | /* |
2 | * Freescale i.MX6UL touchscreen controller driver | |
3 | * | |
4 | * Copyright (C) 2015 Freescale Semiconductor, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/errno.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/gpio/consumer.h> | |
15 | #include <linux/input.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/completion.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/of.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/clk.h> | |
23 | #include <linux/io.h> | |
24 | ||
25 | /* ADC configuration registers field define */ | |
26 | #define ADC_AIEN (0x1 << 7) | |
27 | #define ADC_CONV_DISABLE 0x1F | |
28 | #define ADC_CAL (0x1 << 7) | |
29 | #define ADC_CALF 0x2 | |
30 | #define ADC_12BIT_MODE (0x2 << 2) | |
31 | #define ADC_IPG_CLK 0x00 | |
32 | #define ADC_CLK_DIV_8 (0x03 << 5) | |
33 | #define ADC_SHORT_SAMPLE_MODE (0x0 << 4) | |
34 | #define ADC_HARDWARE_TRIGGER (0x1 << 13) | |
35 | #define SELECT_CHANNEL_4 0x04 | |
36 | #define SELECT_CHANNEL_1 0x01 | |
37 | #define DISABLE_CONVERSION_INT (0x0 << 7) | |
38 | ||
39 | /* ADC registers */ | |
40 | #define REG_ADC_HC0 0x00 | |
41 | #define REG_ADC_HC1 0x04 | |
42 | #define REG_ADC_HC2 0x08 | |
43 | #define REG_ADC_HC3 0x0C | |
44 | #define REG_ADC_HC4 0x10 | |
45 | #define REG_ADC_HS 0x14 | |
46 | #define REG_ADC_R0 0x18 | |
47 | #define REG_ADC_CFG 0x2C | |
48 | #define REG_ADC_GC 0x30 | |
49 | #define REG_ADC_GS 0x34 | |
50 | ||
51 | #define ADC_TIMEOUT msecs_to_jiffies(100) | |
52 | ||
53 | /* TSC registers */ | |
54 | #define REG_TSC_BASIC_SETING 0x00 | |
55 | #define REG_TSC_PRE_CHARGE_TIME 0x10 | |
56 | #define REG_TSC_FLOW_CONTROL 0x20 | |
57 | #define REG_TSC_MEASURE_VALUE 0x30 | |
58 | #define REG_TSC_INT_EN 0x40 | |
59 | #define REG_TSC_INT_SIG_EN 0x50 | |
60 | #define REG_TSC_INT_STATUS 0x60 | |
61 | #define REG_TSC_DEBUG_MODE 0x70 | |
62 | #define REG_TSC_DEBUG_MODE2 0x80 | |
63 | ||
64 | /* TSC configuration registers field define */ | |
65 | #define DETECT_4_WIRE_MODE (0x0 << 4) | |
66 | #define AUTO_MEASURE 0x1 | |
67 | #define MEASURE_SIGNAL 0x1 | |
68 | #define DETECT_SIGNAL (0x1 << 4) | |
69 | #define VALID_SIGNAL (0x1 << 8) | |
70 | #define MEASURE_INT_EN 0x1 | |
71 | #define MEASURE_SIG_EN 0x1 | |
72 | #define VALID_SIG_EN (0x1 << 8) | |
73 | #define DE_GLITCH_2 (0x2 << 29) | |
74 | #define START_SENSE (0x1 << 12) | |
75 | #define TSC_DISABLE (0x1 << 16) | |
76 | #define DETECT_MODE 0x2 | |
77 | ||
78 | struct imx6ul_tsc { | |
79 | struct device *dev; | |
80 | struct input_dev *input; | |
81 | void __iomem *tsc_regs; | |
82 | void __iomem *adc_regs; | |
83 | struct clk *tsc_clk; | |
84 | struct clk *adc_clk; | |
85 | struct gpio_desc *xnur_gpio; | |
86 | ||
87 | int measure_delay_time; | |
88 | int pre_charge_time; | |
89 | ||
90 | struct completion completion; | |
91 | }; | |
92 | ||
93 | /* | |
94 | * TSC module need ADC to get the measure value. So | |
95 | * before config TSC, we should initialize ADC module. | |
96 | */ | |
6cc527b0 | 97 | static int imx6ul_adc_init(struct imx6ul_tsc *tsc) |
9a436d52 HC |
98 | { |
99 | int adc_hc = 0; | |
100 | int adc_gc; | |
101 | int adc_gs; | |
102 | int adc_cfg; | |
103 | int timeout; | |
104 | ||
105 | reinit_completion(&tsc->completion); | |
106 | ||
107 | adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); | |
108 | adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK; | |
109 | adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE; | |
110 | adc_cfg &= ~ADC_HARDWARE_TRIGGER; | |
111 | writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); | |
112 | ||
113 | /* enable calibration interrupt */ | |
114 | adc_hc |= ADC_AIEN; | |
115 | adc_hc |= ADC_CONV_DISABLE; | |
116 | writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); | |
117 | ||
118 | /* start ADC calibration */ | |
119 | adc_gc = readl(tsc->adc_regs + REG_ADC_GC); | |
120 | adc_gc |= ADC_CAL; | |
121 | writel(adc_gc, tsc->adc_regs + REG_ADC_GC); | |
122 | ||
123 | timeout = wait_for_completion_timeout | |
124 | (&tsc->completion, ADC_TIMEOUT); | |
6cc527b0 | 125 | if (timeout == 0) { |
9a436d52 | 126 | dev_err(tsc->dev, "Timeout for adc calibration\n"); |
6cc527b0 FE |
127 | return -ETIMEDOUT; |
128 | } | |
9a436d52 HC |
129 | |
130 | adc_gs = readl(tsc->adc_regs + REG_ADC_GS); | |
6cc527b0 | 131 | if (adc_gs & ADC_CALF) { |
9a436d52 | 132 | dev_err(tsc->dev, "ADC calibration failed\n"); |
6cc527b0 FE |
133 | return -EINVAL; |
134 | } | |
9a436d52 HC |
135 | |
136 | /* TSC need the ADC work in hardware trigger */ | |
137 | adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); | |
138 | adc_cfg |= ADC_HARDWARE_TRIGGER; | |
139 | writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); | |
6cc527b0 FE |
140 | |
141 | return 0; | |
9a436d52 HC |
142 | } |
143 | ||
144 | /* | |
145 | * This is a TSC workaround. Currently TSC misconnect two | |
146 | * ADC channels, this function remap channel configure for | |
147 | * hardware trigger. | |
148 | */ | |
149 | static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc) | |
150 | { | |
151 | int adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4; | |
152 | ||
153 | adc_hc0 = DISABLE_CONVERSION_INT; | |
154 | writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0); | |
155 | ||
156 | adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4; | |
157 | writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1); | |
158 | ||
159 | adc_hc2 = DISABLE_CONVERSION_INT; | |
160 | writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2); | |
161 | ||
162 | adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1; | |
163 | writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3); | |
164 | ||
165 | adc_hc4 = DISABLE_CONVERSION_INT; | |
166 | writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4); | |
167 | } | |
168 | ||
169 | /* | |
170 | * TSC setting, confige the pre-charge time and measure delay time. | |
171 | * different touch screen may need different pre-charge time and | |
172 | * measure delay time. | |
173 | */ | |
174 | static void imx6ul_tsc_set(struct imx6ul_tsc *tsc) | |
175 | { | |
176 | int basic_setting = 0; | |
177 | int start; | |
178 | ||
179 | basic_setting |= tsc->measure_delay_time << 8; | |
180 | basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE; | |
181 | writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING); | |
182 | ||
183 | writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2); | |
184 | ||
185 | writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME); | |
186 | writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN); | |
187 | writel(MEASURE_SIG_EN | VALID_SIG_EN, | |
188 | tsc->tsc_regs + REG_TSC_INT_SIG_EN); | |
189 | ||
190 | /* start sense detection */ | |
191 | start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
192 | start |= START_SENSE; | |
193 | start &= ~TSC_DISABLE; | |
194 | writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
195 | } | |
196 | ||
6cc527b0 | 197 | static int imx6ul_tsc_init(struct imx6ul_tsc *tsc) |
9a436d52 | 198 | { |
6cc527b0 FE |
199 | int err; |
200 | ||
201 | err = imx6ul_adc_init(tsc); | |
202 | if (err) | |
203 | return err; | |
9a436d52 HC |
204 | imx6ul_tsc_channel_config(tsc); |
205 | imx6ul_tsc_set(tsc); | |
6cc527b0 FE |
206 | |
207 | return 0; | |
9a436d52 HC |
208 | } |
209 | ||
210 | static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc) | |
211 | { | |
212 | int tsc_flow; | |
213 | int adc_cfg; | |
214 | ||
215 | /* TSC controller enters to idle status */ | |
216 | tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
217 | tsc_flow |= TSC_DISABLE; | |
218 | writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
219 | ||
220 | /* ADC controller enters to stop mode */ | |
221 | adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0); | |
222 | adc_cfg |= ADC_CONV_DISABLE; | |
223 | writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0); | |
224 | } | |
225 | ||
226 | /* Delay some time (max 2ms), wait the pre-charge done. */ | |
227 | static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc) | |
228 | { | |
229 | unsigned long timeout = jiffies + msecs_to_jiffies(2); | |
230 | int state_machine; | |
231 | int debug_mode2; | |
232 | ||
233 | do { | |
234 | if (time_after(jiffies, timeout)) | |
235 | return false; | |
236 | ||
237 | usleep_range(200, 400); | |
238 | debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2); | |
239 | state_machine = (debug_mode2 >> 20) & 0x7; | |
240 | } while (state_machine != DETECT_MODE); | |
241 | ||
242 | usleep_range(200, 400); | |
243 | return true; | |
244 | } | |
245 | ||
246 | static irqreturn_t tsc_irq_fn(int irq, void *dev_id) | |
247 | { | |
248 | struct imx6ul_tsc *tsc = dev_id; | |
249 | int status; | |
250 | int value; | |
251 | int x, y; | |
252 | int start; | |
253 | ||
254 | status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS); | |
255 | ||
256 | /* write 1 to clear the bit measure-signal */ | |
257 | writel(MEASURE_SIGNAL | DETECT_SIGNAL, | |
258 | tsc->tsc_regs + REG_TSC_INT_STATUS); | |
259 | ||
260 | /* It's a HW self-clean bit. Set this bit and start sense detection */ | |
261 | start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
262 | start |= START_SENSE; | |
263 | writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); | |
264 | ||
265 | if (status & MEASURE_SIGNAL) { | |
266 | value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE); | |
267 | x = (value >> 16) & 0x0fff; | |
268 | y = value & 0x0fff; | |
269 | ||
270 | /* | |
271 | * In detect mode, we can get the xnur gpio value, | |
272 | * otherwise assume contact is stiull active. | |
273 | */ | |
274 | if (!tsc_wait_detect_mode(tsc) || | |
275 | gpiod_get_value_cansleep(tsc->xnur_gpio)) { | |
276 | input_report_key(tsc->input, BTN_TOUCH, 1); | |
277 | input_report_abs(tsc->input, ABS_X, x); | |
278 | input_report_abs(tsc->input, ABS_Y, y); | |
279 | } else { | |
280 | input_report_key(tsc->input, BTN_TOUCH, 0); | |
281 | } | |
282 | ||
283 | input_sync(tsc->input); | |
284 | } | |
285 | ||
286 | return IRQ_HANDLED; | |
287 | } | |
288 | ||
289 | static irqreturn_t adc_irq_fn(int irq, void *dev_id) | |
290 | { | |
291 | struct imx6ul_tsc *tsc = dev_id; | |
292 | int coco; | |
293 | int value; | |
294 | ||
295 | coco = readl(tsc->adc_regs + REG_ADC_HS); | |
296 | if (coco & 0x01) { | |
297 | value = readl(tsc->adc_regs + REG_ADC_R0); | |
298 | complete(&tsc->completion); | |
299 | } | |
300 | ||
301 | return IRQ_HANDLED; | |
302 | } | |
303 | ||
304 | static int imx6ul_tsc_open(struct input_dev *input_dev) | |
305 | { | |
306 | struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); | |
307 | int err; | |
308 | ||
309 | err = clk_prepare_enable(tsc->adc_clk); | |
310 | if (err) { | |
311 | dev_err(tsc->dev, | |
312 | "Could not prepare or enable the adc clock: %d\n", | |
313 | err); | |
314 | return err; | |
315 | } | |
316 | ||
317 | err = clk_prepare_enable(tsc->tsc_clk); | |
318 | if (err) { | |
319 | dev_err(tsc->dev, | |
320 | "Could not prepare or enable the tsc clock: %d\n", | |
321 | err); | |
322 | clk_disable_unprepare(tsc->adc_clk); | |
323 | return err; | |
324 | } | |
325 | ||
6cc527b0 | 326 | return imx6ul_tsc_init(tsc); |
9a436d52 HC |
327 | } |
328 | ||
329 | static void imx6ul_tsc_close(struct input_dev *input_dev) | |
330 | { | |
331 | struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); | |
332 | ||
333 | imx6ul_tsc_disable(tsc); | |
334 | ||
335 | clk_disable_unprepare(tsc->tsc_clk); | |
336 | clk_disable_unprepare(tsc->adc_clk); | |
337 | } | |
338 | ||
339 | static int imx6ul_tsc_probe(struct platform_device *pdev) | |
340 | { | |
341 | struct device_node *np = pdev->dev.of_node; | |
342 | struct imx6ul_tsc *tsc; | |
343 | struct input_dev *input_dev; | |
344 | struct resource *tsc_mem; | |
345 | struct resource *adc_mem; | |
346 | int err; | |
347 | int tsc_irq; | |
348 | int adc_irq; | |
349 | ||
5eab3cf3 | 350 | tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL); |
9a436d52 HC |
351 | if (!tsc) |
352 | return -ENOMEM; | |
353 | ||
354 | input_dev = devm_input_allocate_device(&pdev->dev); | |
355 | if (!input_dev) | |
356 | return -ENOMEM; | |
357 | ||
002801fc | 358 | input_dev->name = "iMX6UL Touchscreen Controller"; |
9a436d52 HC |
359 | input_dev->id.bustype = BUS_HOST; |
360 | ||
361 | input_dev->open = imx6ul_tsc_open; | |
362 | input_dev->close = imx6ul_tsc_close; | |
363 | ||
364 | input_set_capability(input_dev, EV_KEY, BTN_TOUCH); | |
365 | input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0); | |
366 | input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0); | |
367 | ||
368 | input_set_drvdata(input_dev, tsc); | |
369 | ||
370 | tsc->dev = &pdev->dev; | |
371 | tsc->input = input_dev; | |
372 | init_completion(&tsc->completion); | |
373 | ||
374 | tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN); | |
375 | if (IS_ERR(tsc->xnur_gpio)) { | |
376 | err = PTR_ERR(tsc->xnur_gpio); | |
377 | dev_err(&pdev->dev, | |
378 | "failed to request GPIO tsc_X- (xnur): %d\n", err); | |
379 | return err; | |
380 | } | |
381 | ||
382 | tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
383 | tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem); | |
384 | if (IS_ERR(tsc->tsc_regs)) { | |
385 | err = PTR_ERR(tsc->tsc_regs); | |
386 | dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err); | |
387 | return err; | |
388 | } | |
389 | ||
390 | adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
391 | tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem); | |
392 | if (IS_ERR(tsc->adc_regs)) { | |
393 | err = PTR_ERR(tsc->adc_regs); | |
394 | dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err); | |
395 | return err; | |
396 | } | |
397 | ||
398 | tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc"); | |
399 | if (IS_ERR(tsc->tsc_clk)) { | |
400 | err = PTR_ERR(tsc->tsc_clk); | |
401 | dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err); | |
402 | return err; | |
403 | } | |
404 | ||
405 | tsc->adc_clk = devm_clk_get(&pdev->dev, "adc"); | |
406 | if (IS_ERR(tsc->adc_clk)) { | |
407 | err = PTR_ERR(tsc->adc_clk); | |
408 | dev_err(&pdev->dev, "failed getting adc clock: %d\n", err); | |
409 | return err; | |
410 | } | |
411 | ||
412 | tsc_irq = platform_get_irq(pdev, 0); | |
413 | if (tsc_irq < 0) { | |
414 | dev_err(&pdev->dev, "no tsc irq resource?\n"); | |
415 | return tsc_irq; | |
416 | } | |
417 | ||
418 | adc_irq = platform_get_irq(pdev, 1); | |
3905de62 | 419 | if (adc_irq < 0) { |
9a436d52 HC |
420 | dev_err(&pdev->dev, "no adc irq resource?\n"); |
421 | return adc_irq; | |
422 | } | |
423 | ||
424 | err = devm_request_threaded_irq(tsc->dev, tsc_irq, | |
425 | NULL, tsc_irq_fn, IRQF_ONESHOT, | |
426 | dev_name(&pdev->dev), tsc); | |
427 | if (err) { | |
428 | dev_err(&pdev->dev, | |
429 | "failed requesting tsc irq %d: %d\n", | |
430 | tsc_irq, err); | |
431 | return err; | |
432 | } | |
433 | ||
434 | err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0, | |
435 | dev_name(&pdev->dev), tsc); | |
436 | if (err) { | |
437 | dev_err(&pdev->dev, | |
438 | "failed requesting adc irq %d: %d\n", | |
439 | adc_irq, err); | |
440 | return err; | |
441 | } | |
442 | ||
443 | err = of_property_read_u32(np, "measure-delay-time", | |
444 | &tsc->measure_delay_time); | |
445 | if (err) | |
446 | tsc->measure_delay_time = 0xffff; | |
447 | ||
448 | err = of_property_read_u32(np, "pre-charge-time", | |
449 | &tsc->pre_charge_time); | |
450 | if (err) | |
451 | tsc->pre_charge_time = 0xfff; | |
452 | ||
453 | err = input_register_device(tsc->input); | |
454 | if (err) { | |
455 | dev_err(&pdev->dev, | |
456 | "failed to register input device: %d\n", err); | |
457 | return err; | |
458 | } | |
459 | ||
460 | platform_set_drvdata(pdev, tsc); | |
461 | return 0; | |
462 | } | |
463 | ||
464 | static int __maybe_unused imx6ul_tsc_suspend(struct device *dev) | |
465 | { | |
466 | struct platform_device *pdev = to_platform_device(dev); | |
467 | struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); | |
468 | struct input_dev *input_dev = tsc->input; | |
469 | ||
470 | mutex_lock(&input_dev->mutex); | |
471 | ||
472 | if (input_dev->users) { | |
473 | imx6ul_tsc_disable(tsc); | |
474 | ||
475 | clk_disable_unprepare(tsc->tsc_clk); | |
476 | clk_disable_unprepare(tsc->adc_clk); | |
477 | } | |
478 | ||
479 | mutex_unlock(&input_dev->mutex); | |
480 | ||
481 | return 0; | |
482 | } | |
483 | ||
484 | static int __maybe_unused imx6ul_tsc_resume(struct device *dev) | |
485 | { | |
486 | struct platform_device *pdev = to_platform_device(dev); | |
487 | struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); | |
488 | struct input_dev *input_dev = tsc->input; | |
489 | int retval = 0; | |
490 | ||
491 | mutex_lock(&input_dev->mutex); | |
492 | ||
493 | if (input_dev->users) { | |
494 | retval = clk_prepare_enable(tsc->adc_clk); | |
495 | if (retval) | |
496 | goto out; | |
497 | ||
498 | retval = clk_prepare_enable(tsc->tsc_clk); | |
499 | if (retval) { | |
500 | clk_disable_unprepare(tsc->adc_clk); | |
501 | goto out; | |
502 | } | |
503 | ||
6cc527b0 | 504 | retval = imx6ul_tsc_init(tsc); |
9a436d52 HC |
505 | } |
506 | ||
507 | out: | |
508 | mutex_unlock(&input_dev->mutex); | |
509 | return retval; | |
510 | } | |
511 | ||
512 | static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops, | |
513 | imx6ul_tsc_suspend, imx6ul_tsc_resume); | |
514 | ||
515 | static const struct of_device_id imx6ul_tsc_match[] = { | |
516 | { .compatible = "fsl,imx6ul-tsc", }, | |
517 | { /* sentinel */ } | |
518 | }; | |
519 | MODULE_DEVICE_TABLE(of, imx6ul_tsc_match); | |
520 | ||
521 | static struct platform_driver imx6ul_tsc_driver = { | |
522 | .driver = { | |
523 | .name = "imx6ul-tsc", | |
524 | .of_match_table = imx6ul_tsc_match, | |
525 | .pm = &imx6ul_tsc_pm_ops, | |
526 | }, | |
527 | .probe = imx6ul_tsc_probe, | |
528 | }; | |
529 | module_platform_driver(imx6ul_tsc_driver); | |
530 | ||
531 | MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>"); | |
532 | MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver"); | |
533 | MODULE_LICENSE("GPL v2"); |