[linux-2.6-block.git] / drivers / input / serio / i8042-unicore32io.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Code specific to PKUnity SoC and UniCore ISA
 *
 *	Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
 *	Copyright (C) 2001-2011 Guan Xuetao
 */
#ifndef _I8042_UNICORE32_H
#define _I8042_UNICORE32_H

#include <mach/hardware.h>

/*
 * Names.
 */
#define I8042_KBD_PHYS_DESC "isa0060/serio0"
#define I8042_AUX_PHYS_DESC "isa0060/serio1"
#define I8042_MUX_PHYS_DESC "isa0060/serio%d"

/*
 * IRQs.
 */
#define I8042_KBD_IRQ           IRQ_PS2_KBD
#define I8042_AUX_IRQ           IRQ_PS2_AUX

/*
 * Register numbers.
 */
#define I8042_COMMAND_REG	PS2_COMMAND
#define I8042_STATUS_REG	PS2_STATUS
#define I8042_DATA_REG		PS2_DATA

#define I8042_REGION_START	(resource_size_t)(PS2_DATA)
#define I8042_REGION_SIZE	(resource_size_t)(16)

static inline int i8042_read_data(void)
{
	return readb(I8042_DATA_REG);
}

static inline int i8042_read_status(void)
{
	return readb(I8042_STATUS_REG);
}

static inline void i8042_write_data(int val)
{
	writeb(val, I8042_DATA_REG);
}

static inline void i8042_write_command(int val)
{
	writeb(val, I8042_COMMAND_REG);
}

static inline int i8042_platform_init(void)
{
	if (!request_mem_region(I8042_REGION_START, I8042_REGION_SIZE, "i8042"))
		return -EBUSY;

	i8042_reset = I8042_RESET_ALWAYS;
	return 0;
}

static inline void i8042_platform_exit(void)
{
	release_mem_region(I8042_REGION_START, I8042_REGION_SIZE);
}

#endif /* _I8042_UNICORE32_H */
Commit	Line	Data
d2912cb1	1	/* SPDX-License-Identifier: GPL-2.0-only */
425ad52b G	2	/*
	3	* Code specific to PKUnity SoC and UniCore ISA
	4	*
	5	* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
	6	* Copyright (C) 2001-2011 Guan Xuetao
425ad52b G	7	*/
	8	#ifndef _I8042_UNICORE32_H
	9	#define _I8042_UNICORE32_H
	10
	11	#include <mach/hardware.h>
	12
	13	/*
	14	* Names.
	15	*/
	16	#define I8042_KBD_PHYS_DESC "isa0060/serio0"
	17	#define I8042_AUX_PHYS_DESC "isa0060/serio1"
	18	#define I8042_MUX_PHYS_DESC "isa0060/serio%d"
	19
	20	/*
	21	* IRQs.
	22	*/
	23	#define I8042_KBD_IRQ IRQ_PS2_KBD
	24	#define I8042_AUX_IRQ IRQ_PS2_AUX
	25
	26	/*
	27	* Register numbers.
	28	*/
e5abf78b G	29	#define I8042_COMMAND_REG PS2_COMMAND
	30	#define I8042_STATUS_REG PS2_STATUS
	31	#define I8042_DATA_REG PS2_DATA
3838b82c	32
e5abf78b	33	#define I8042_REGION_START (resource_size_t)(PS2_DATA)
3838b82c	34	#define I8042_REGION_SIZE (resource_size_t)(16)
425ad52b G	35
	36	static inline int i8042_read_data(void)
	37	{
3838b82c	38	return readb(I8042_DATA_REG);
425ad52b G	39	}
	40
	41	static inline int i8042_read_status(void)
	42	{
3838b82c	43	return readb(I8042_STATUS_REG);
425ad52b G	44	}
	45
	46	static inline void i8042_write_data(int val)
	47	{
3838b82c	48	writeb(val, I8042_DATA_REG);
425ad52b G	49	}
	50
	51	static inline void i8042_write_command(int val)
	52	{
3838b82c	53	writeb(val, I8042_COMMAND_REG);
425ad52b G	54	}
	55
	56	static inline int i8042_platform_init(void)
	57	{
4517366d	58	if (!request_mem_region(I8042_REGION_START, I8042_REGION_SIZE, "i8042"))
425ad52b G	59	return -EBUSY;
425ad52b G	60
930e1924	61	i8042_reset = I8042_RESET_ALWAYS;
425ad52b G	62	return 0;
	63	}
	64
	65	static inline void i8042_platform_exit(void)
	66	{
4517366d	67	release_mem_region(I8042_REGION_START, I8042_REGION_SIZE);
425ad52b G	68	}
	69
	70	#endif /* _I8042_UNICORE32_H */