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1da177e4 LT |
1 | /* |
2 | * HIL MLC state machine and serio interface driver | |
3 | * | |
4 | * Copyright (c) 2001 Brian S. Julin | |
5 | * All rights reserved. | |
6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions, and the following disclaimer, | |
12 | * without modification. | |
13 | * 2. The name of the author may not be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * Alternatively, this software may be distributed under the terms of the | |
17 | * GNU General Public License ("GPL"). | |
18 | * | |
19 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | |
23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
28 | * | |
29 | * References: | |
30 | * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A | |
31 | * | |
32 | * | |
33 | * Driver theory of operation: | |
34 | * | |
35 | * Some access methods and an ISR is defined by the sub-driver | |
36 | * (e.g. hp_sdc_mlc.c). These methods are expected to provide a | |
37 | * few bits of logic in addition to raw access to the HIL MLC, | |
38 | * specifically, the ISR, which is entirely registered by the | |
39 | * sub-driver and invoked directly, must check for record | |
40 | * termination or packet match, at which point a semaphore must | |
41 | * be cleared and then the hil_mlcs_tasklet must be scheduled. | |
42 | * | |
43 | * The hil_mlcs_tasklet processes the state machine for all MLCs | |
44 | * each time it runs, checking each MLC's progress at the current | |
45 | * node in the state machine, and moving the MLC to subsequent nodes | |
46 | * in the state machine when appropriate. It will reschedule | |
47 | * itself if output is pending. (This rescheduling should be replaced | |
48 | * at some point with a sub-driver-specific mechanism.) | |
49 | * | |
50 | * A timer task prods the tasklet once per second to prevent | |
51 | * hangups when attached devices do not return expected data | |
52 | * and to initiate probes of the loop for new devices. | |
53 | */ | |
54 | ||
55 | #include <linux/hil_mlc.h> | |
56 | #include <linux/errno.h> | |
57 | #include <linux/kernel.h> | |
58 | #include <linux/module.h> | |
59 | #include <linux/init.h> | |
60 | #include <linux/interrupt.h> | |
61 | #include <linux/timer.h> | |
1da177e4 LT |
62 | #include <linux/list.h> |
63 | ||
64 | MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); | |
65 | MODULE_DESCRIPTION("HIL MLC serio"); | |
66 | MODULE_LICENSE("Dual BSD/GPL"); | |
67 | ||
68 | EXPORT_SYMBOL(hil_mlc_register); | |
69 | EXPORT_SYMBOL(hil_mlc_unregister); | |
70 | ||
71 | #define PREFIX "HIL MLC: " | |
72 | ||
73 | static LIST_HEAD(hil_mlcs); | |
74 | static DEFINE_RWLOCK(hil_mlcs_lock); | |
75 | static struct timer_list hil_mlcs_kicker; | |
76 | static int hil_mlcs_probe; | |
77 | ||
78 | static void hil_mlcs_process(unsigned long unused); | |
79 | DECLARE_TASKLET_DISABLED(hil_mlcs_tasklet, hil_mlcs_process, 0); | |
80 | ||
81 | ||
82 | /* #define HIL_MLC_DEBUG */ | |
83 | ||
84 | /********************** Device info/instance management **********************/ | |
85 | ||
86 | static void hil_mlc_clear_di_map (hil_mlc *mlc, int val) { | |
87 | int j; | |
88 | for (j = val; j < 7 ; j++) { | |
89 | mlc->di_map[j] = -1; | |
90 | } | |
91 | } | |
92 | ||
93 | static void hil_mlc_clear_di_scratch (hil_mlc *mlc) { | |
94 | memset(&(mlc->di_scratch), 0, sizeof(mlc->di_scratch)); | |
95 | } | |
96 | ||
97 | static void hil_mlc_copy_di_scratch (hil_mlc *mlc, int idx) { | |
98 | memcpy(&(mlc->di[idx]), &(mlc->di_scratch), sizeof(mlc->di_scratch)); | |
99 | } | |
100 | ||
101 | static int hil_mlc_match_di_scratch (hil_mlc *mlc) { | |
102 | int idx; | |
103 | ||
104 | for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { | |
105 | int j, found; | |
106 | ||
107 | /* In-use slots are not eligible. */ | |
108 | found = 0; | |
109 | for (j = 0; j < 7 ; j++) { | |
110 | if (mlc->di_map[j] == idx) found++; | |
111 | } | |
112 | if (found) continue; | |
113 | if (!memcmp(mlc->di + idx, | |
114 | &(mlc->di_scratch), | |
115 | sizeof(mlc->di_scratch))) break; | |
116 | } | |
117 | return((idx >= HIL_MLC_DEVMEM) ? -1 : idx); | |
118 | } | |
119 | ||
120 | static int hil_mlc_find_free_di(hil_mlc *mlc) { | |
121 | int idx; | |
122 | /* TODO: Pick all-zero slots first, failing that, | |
123 | * randomize the slot picked among those eligible. | |
124 | */ | |
125 | for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { | |
126 | int j, found; | |
127 | found = 0; | |
128 | for (j = 0; j < 7 ; j++) { | |
129 | if (mlc->di_map[j] == idx) found++; | |
130 | } | |
131 | if (!found) break; | |
132 | } | |
133 | return(idx); /* Note: It is guaranteed at least one above will match */ | |
134 | } | |
135 | ||
136 | static inline void hil_mlc_clean_serio_map(hil_mlc *mlc) { | |
137 | int idx; | |
138 | for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) { | |
139 | int j, found; | |
140 | found = 0; | |
141 | for (j = 0; j < 7 ; j++) { | |
142 | if (mlc->di_map[j] == idx) found++; | |
143 | } | |
144 | if (!found) mlc->serio_map[idx].di_revmap = -1; | |
145 | } | |
146 | } | |
147 | ||
148 | static void hil_mlc_send_polls(hil_mlc *mlc) { | |
149 | int did, i, cnt; | |
150 | struct serio *serio; | |
151 | struct serio_driver *drv; | |
152 | ||
153 | i = cnt = 0; | |
154 | did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8; | |
155 | serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL; | |
156 | drv = (serio != NULL) ? serio->drv : NULL; | |
157 | ||
158 | while (mlc->icount < 15 - i) { | |
159 | hil_packet p; | |
160 | p = mlc->ipacket[i]; | |
161 | if (did != (p & HIL_PKT_ADDR_MASK) >> 8) { | |
162 | if (drv == NULL || drv->interrupt == NULL) goto skip; | |
163 | ||
be577a52 MW |
164 | drv->interrupt(serio, 0, 0); |
165 | drv->interrupt(serio, HIL_ERR_INT >> 16, 0); | |
166 | drv->interrupt(serio, HIL_PKT_CMD >> 8, 0); | |
167 | drv->interrupt(serio, HIL_CMD_POL + cnt, 0); | |
1da177e4 LT |
168 | skip: |
169 | did = (p & HIL_PKT_ADDR_MASK) >> 8; | |
170 | serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL; | |
171 | drv = (serio != NULL) ? serio->drv : NULL; | |
172 | cnt = 0; | |
173 | } | |
174 | cnt++; i++; | |
175 | if (drv == NULL || drv->interrupt == NULL) continue; | |
be577a52 MW |
176 | drv->interrupt(serio, (p >> 24), 0); |
177 | drv->interrupt(serio, (p >> 16) & 0xff, 0); | |
178 | drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0); | |
179 | drv->interrupt(serio, p & 0xff, 0); | |
1da177e4 LT |
180 | } |
181 | } | |
182 | ||
183 | /*************************** State engine *********************************/ | |
184 | ||
185 | #define HILSEN_SCHED 0x000100 /* Schedule the tasklet */ | |
186 | #define HILSEN_BREAK 0x000200 /* Wait until next pass */ | |
187 | #define HILSEN_UP 0x000400 /* relative node#, decrement */ | |
188 | #define HILSEN_DOWN 0x000800 /* relative node#, increment */ | |
189 | #define HILSEN_FOLLOW 0x001000 /* use retval as next node# */ | |
190 | ||
191 | #define HILSEN_MASK 0x0000ff | |
192 | #define HILSEN_START 0 | |
193 | #define HILSEN_RESTART 1 | |
194 | #define HILSEN_DHR 9 | |
195 | #define HILSEN_DHR2 10 | |
196 | #define HILSEN_IFC 14 | |
197 | #define HILSEN_HEAL0 16 | |
198 | #define HILSEN_HEAL 18 | |
199 | #define HILSEN_ACF 21 | |
200 | #define HILSEN_ACF2 22 | |
201 | #define HILSEN_DISC0 25 | |
202 | #define HILSEN_DISC 27 | |
203 | #define HILSEN_MATCH 40 | |
204 | #define HILSEN_OPERATE 41 | |
205 | #define HILSEN_PROBE 44 | |
206 | #define HILSEN_DSR 52 | |
207 | #define HILSEN_REPOLL 55 | |
208 | #define HILSEN_IFCACF 58 | |
209 | #define HILSEN_END 60 | |
210 | ||
211 | #define HILSEN_NEXT (HILSEN_DOWN | 1) | |
212 | #define HILSEN_SAME (HILSEN_DOWN | 0) | |
213 | #define HILSEN_LAST (HILSEN_UP | 1) | |
214 | ||
215 | #define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK) | |
216 | #define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK) | |
217 | ||
218 | static int hilse_match(hil_mlc *mlc, int unused) { | |
219 | int rc; | |
220 | rc = hil_mlc_match_di_scratch(mlc); | |
221 | if (rc == -1) { | |
222 | rc = hil_mlc_find_free_di(mlc); | |
223 | if (rc == -1) goto err; | |
224 | #ifdef HIL_MLC_DEBUG | |
225 | printk(KERN_DEBUG PREFIX "new in slot %i\n", rc); | |
226 | #endif | |
227 | hil_mlc_copy_di_scratch(mlc, rc); | |
228 | mlc->di_map[mlc->ddi] = rc; | |
229 | mlc->serio_map[rc].di_revmap = mlc->ddi; | |
230 | hil_mlc_clean_serio_map(mlc); | |
231 | serio_rescan(mlc->serio[rc]); | |
232 | return -1; | |
233 | } | |
234 | mlc->di_map[mlc->ddi] = rc; | |
235 | #ifdef HIL_MLC_DEBUG | |
236 | printk(KERN_DEBUG PREFIX "same in slot %i\n", rc); | |
237 | #endif | |
238 | mlc->serio_map[rc].di_revmap = mlc->ddi; | |
239 | hil_mlc_clean_serio_map(mlc); | |
240 | return 0; | |
241 | err: | |
242 | printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n"); | |
243 | return 1; | |
244 | } | |
245 | ||
246 | /* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */ | |
247 | static int hilse_init_lcv(hil_mlc *mlc, int unused) { | |
248 | struct timeval tv; | |
249 | ||
250 | do_gettimeofday(&tv); | |
251 | ||
252 | if(mlc->lcv == 0) goto restart; /* First init, no need to dally */ | |
253 | if(tv.tv_sec - mlc->lcv_tv.tv_sec < 5) return -1; | |
254 | restart: | |
255 | mlc->lcv_tv = tv; | |
256 | mlc->lcv = 0; | |
257 | return 0; | |
258 | } | |
259 | ||
260 | static int hilse_inc_lcv(hil_mlc *mlc, int lim) { | |
261 | if (mlc->lcv++ >= lim) return -1; | |
262 | return 0; | |
263 | } | |
264 | ||
265 | #if 0 | |
266 | static int hilse_set_lcv(hil_mlc *mlc, int val) { | |
267 | mlc->lcv = val; | |
268 | return 0; | |
269 | } | |
270 | #endif | |
271 | ||
272 | /* Management of the discovered device index (zero based, -1 means no devs) */ | |
273 | static int hilse_set_ddi(hil_mlc *mlc, int val) { | |
274 | mlc->ddi = val; | |
275 | hil_mlc_clear_di_map(mlc, val + 1); | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int hilse_dec_ddi(hil_mlc *mlc, int unused) { | |
280 | mlc->ddi--; | |
281 | if (mlc->ddi <= -1) { | |
282 | mlc->ddi = -1; | |
283 | hil_mlc_clear_di_map(mlc, 0); | |
284 | return -1; | |
285 | } | |
286 | hil_mlc_clear_di_map(mlc, mlc->ddi + 1); | |
287 | return 0; | |
288 | } | |
289 | ||
290 | static int hilse_inc_ddi(hil_mlc *mlc, int unused) { | |
291 | if (mlc->ddi >= 6) { | |
292 | BUG(); | |
293 | return -1; | |
294 | } | |
295 | mlc->ddi++; | |
296 | return 0; | |
297 | } | |
298 | ||
299 | static int hilse_take_idd(hil_mlc *mlc, int unused) { | |
300 | int i; | |
301 | ||
302 | /* Help the state engine: | |
303 | * Is this a real IDD response or just an echo? | |
304 | * | |
305 | * Real IDD response does not start with a command. | |
306 | */ | |
307 | if (mlc->ipacket[0] & HIL_PKT_CMD) goto bail; | |
308 | /* Should have the command echoed further down. */ | |
309 | for (i = 1; i < 16; i++) { | |
310 | if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) == | |
311 | (mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) && | |
312 | (mlc->ipacket[i] & HIL_PKT_CMD) && | |
313 | ((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD)) | |
314 | break; | |
315 | } | |
316 | if (i > 15) goto bail; | |
317 | /* And the rest of the packets should still be clear. */ | |
318 | while (++i < 16) { | |
319 | if (mlc->ipacket[i]) break; | |
320 | } | |
321 | if (i < 16) goto bail; | |
322 | for (i = 0; i < 16; i++) { | |
323 | mlc->di_scratch.idd[i] = | |
324 | mlc->ipacket[i] & HIL_PKT_DATA_MASK; | |
325 | } | |
326 | /* Next step is to see if RSC supported */ | |
327 | if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC) | |
328 | return HILSEN_NEXT; | |
329 | if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD) | |
330 | return HILSEN_DOWN | 4; | |
331 | return 0; | |
332 | bail: | |
333 | mlc->ddi--; | |
334 | return -1; /* This should send us off to ACF */ | |
335 | } | |
336 | ||
337 | static int hilse_take_rsc(hil_mlc *mlc, int unused) { | |
338 | int i; | |
339 | ||
340 | for (i = 0; i < 16; i++) { | |
341 | mlc->di_scratch.rsc[i] = | |
342 | mlc->ipacket[i] & HIL_PKT_DATA_MASK; | |
343 | } | |
344 | /* Next step is to see if EXD supported (IDD has already been read) */ | |
345 | if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD) | |
346 | return HILSEN_NEXT; | |
347 | return 0; | |
348 | } | |
349 | ||
350 | static int hilse_take_exd(hil_mlc *mlc, int unused) { | |
351 | int i; | |
352 | ||
353 | for (i = 0; i < 16; i++) { | |
354 | mlc->di_scratch.exd[i] = | |
355 | mlc->ipacket[i] & HIL_PKT_DATA_MASK; | |
356 | } | |
357 | /* Next step is to see if RNM supported. */ | |
358 | if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM) | |
359 | return HILSEN_NEXT; | |
360 | return 0; | |
361 | } | |
362 | ||
363 | static int hilse_take_rnm(hil_mlc *mlc, int unused) { | |
364 | int i; | |
365 | ||
366 | for (i = 0; i < 16; i++) { | |
367 | mlc->di_scratch.rnm[i] = | |
368 | mlc->ipacket[i] & HIL_PKT_DATA_MASK; | |
369 | } | |
370 | do { | |
371 | char nam[17]; | |
372 | snprintf(nam, 16, "%s", mlc->di_scratch.rnm); | |
373 | nam[16] = '\0'; | |
374 | printk(KERN_INFO PREFIX "Device name gotten: %s\n", nam); | |
375 | } while (0); | |
376 | return 0; | |
377 | } | |
378 | ||
379 | static int hilse_operate(hil_mlc *mlc, int repoll) { | |
380 | ||
381 | if (mlc->opercnt == 0) hil_mlcs_probe = 0; | |
382 | mlc->opercnt = 1; | |
383 | ||
384 | hil_mlc_send_polls(mlc); | |
385 | ||
386 | if (!hil_mlcs_probe) return 0; | |
387 | hil_mlcs_probe = 0; | |
388 | mlc->opercnt = 0; | |
389 | return 1; | |
390 | } | |
391 | ||
392 | #define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \ | |
6ce6b3ae | 393 | { HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc }, |
1da177e4 | 394 | #define OUT(pack) \ |
6ce6b3ae | 395 | { HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 }, |
1da177e4 | 396 | #define CTS \ |
6ce6b3ae | 397 | { HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 }, |
1da177e4 | 398 | #define EXPECT(comp, to, got, got_wrong, timed_out) \ |
6ce6b3ae | 399 | { HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out }, |
1da177e4 | 400 | #define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \ |
6ce6b3ae | 401 | { HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out }, |
1da177e4 | 402 | #define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \ |
6ce6b3ae | 403 | { HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out }, |
1da177e4 | 404 | #define IN(to, got, got_error, timed_out) \ |
6ce6b3ae | 405 | { HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out }, |
1da177e4 | 406 | #define OUT_DISC(pack) \ |
6ce6b3ae | 407 | { HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 }, |
1da177e4 | 408 | #define OUT_LAST(pack) \ |
6ce6b3ae | 409 | { HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 }, |
1da177e4 LT |
410 | |
411 | struct hilse_node hil_mlc_se[HILSEN_END] = { | |
412 | ||
413 | /* 0 HILSEN_START */ | |
414 | FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0) | |
415 | ||
416 | /* 1 HILSEN_RESTART */ | |
417 | FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) | |
418 | OUT(HIL_CTRL_ONLY) /* Disable APE */ | |
419 | CTS | |
420 | ||
421 | #define TEST_PACKET(x) \ | |
422 | (HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x) | |
423 | ||
424 | OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5)) | |
425 | EXPECT(HIL_ERR_INT | TEST_PACKET(0x5), | |
426 | 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART) | |
427 | OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa)) | |
428 | EXPECT(HIL_ERR_INT | TEST_PACKET(0xa), | |
429 | 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART) | |
430 | OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */ | |
431 | ||
432 | /* 9 HILSEN_DHR */ | |
433 | FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0) | |
434 | ||
435 | /* 10 HILSEN_DHR2 */ | |
436 | FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) | |
437 | FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0) | |
438 | OUT(HIL_PKT_CMD | HIL_CMD_DHR) | |
439 | IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT) | |
440 | ||
441 | /* 14 HILSEN_IFC */ | |
442 | OUT(HIL_PKT_CMD | HIL_CMD_IFC) | |
443 | EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT, | |
444 | 20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT ) | |
445 | ||
446 | /* If devices are there, they weren't in PUP or other loopback mode. | |
447 | * We're more concerned at this point with restoring operation | |
448 | * to devices than discovering new ones, so we try to salvage | |
449 | * the loop configuration by closing off the loop. | |
450 | */ | |
451 | ||
452 | /* 16 HILSEN_HEAL0 */ | |
453 | FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0) | |
454 | FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0) | |
455 | ||
456 | /* 18 HILSEN_HEAL */ | |
457 | OUT_LAST(HIL_CMD_ELB) | |
458 | EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT, | |
459 | 20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT) | |
460 | FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0) | |
461 | ||
462 | /* 21 HILSEN_ACF */ | |
463 | FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0) | |
464 | ||
465 | /* 22 HILSEN_ACF2 */ | |
466 | FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0) | |
467 | OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1) | |
468 | IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) | |
469 | ||
470 | /* 25 HILSEN_DISC0 */ | |
471 | OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB) | |
472 | EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT, | |
473 | 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) | |
474 | ||
475 | /* Only enter here if response just received */ | |
476 | /* 27 HILSEN_DISC */ | |
477 | OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD) | |
478 | EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT, | |
479 | 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START) | |
480 | FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0) | |
481 | FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW) | |
482 | OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC) | |
483 | EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT, | |
484 | 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) | |
485 | FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW) | |
486 | OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD) | |
487 | EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT, | |
488 | 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) | |
489 | FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW) | |
490 | OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM) | |
491 | EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT, | |
492 | 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR) | |
493 | FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0) | |
494 | ||
495 | /* 40 HILSEN_MATCH */ | |
496 | FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0) | |
497 | ||
498 | /* 41 HILSEN_OPERATE */ | |
499 | OUT(HIL_PKT_CMD | HIL_CMD_POL) | |
500 | EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT, | |
501 | 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) | |
502 | FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT) | |
503 | ||
504 | /* 44 HILSEN_PROBE */ | |
505 | OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT) | |
506 | IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT) | |
507 | OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB) | |
508 | IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT) | |
509 | OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1) | |
510 | IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT) | |
511 | OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB) | |
512 | IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR) | |
513 | ||
514 | /* 52 HILSEN_DSR */ | |
515 | FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0) | |
516 | OUT(HIL_PKT_CMD | HIL_CMD_DSR) | |
517 | IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC) | |
518 | ||
519 | /* 55 HILSEN_REPOLL */ | |
520 | OUT(HIL_PKT_CMD | HIL_CMD_RPL) | |
521 | EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT, | |
522 | 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT) | |
523 | FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE) | |
524 | ||
525 | /* 58 HILSEN_IFCACF */ | |
526 | OUT(HIL_PKT_CMD | HIL_CMD_IFC) | |
527 | EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT, | |
528 | 20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL) | |
529 | ||
530 | /* 60 HILSEN_END */ | |
531 | }; | |
532 | ||
533 | static inline void hilse_setup_input(hil_mlc *mlc, struct hilse_node *node) { | |
534 | ||
535 | switch (node->act) { | |
536 | case HILSE_EXPECT_DISC: | |
537 | mlc->imatch = node->object.packet; | |
538 | mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT); | |
539 | break; | |
540 | case HILSE_EXPECT_LAST: | |
541 | mlc->imatch = node->object.packet; | |
542 | mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT); | |
543 | break; | |
544 | case HILSE_EXPECT: | |
545 | mlc->imatch = node->object.packet; | |
546 | break; | |
547 | case HILSE_IN: | |
548 | mlc->imatch = 0; | |
549 | break; | |
550 | default: | |
551 | BUG(); | |
552 | } | |
553 | mlc->istarted = 1; | |
554 | mlc->intimeout = node->arg; | |
555 | do_gettimeofday(&(mlc->instart)); | |
556 | mlc->icount = 15; | |
557 | memset(mlc->ipacket, 0, 16 * sizeof(hil_packet)); | |
b1eecf7e | 558 | BUG_ON(down_trylock(&(mlc->isem))); |
1da177e4 LT |
559 | |
560 | return; | |
561 | } | |
562 | ||
563 | #ifdef HIL_MLC_DEBUG | |
564 | static int doze = 0; | |
565 | static int seidx; /* For debug */ | |
566 | static int kick = 1; | |
567 | #endif | |
568 | ||
569 | static int hilse_donode (hil_mlc *mlc) { | |
570 | struct hilse_node *node; | |
571 | int nextidx = 0; | |
572 | int sched_long = 0; | |
573 | unsigned long flags; | |
574 | ||
575 | #ifdef HIL_MLC_DEBUG | |
576 | if (mlc->seidx && (mlc->seidx != seidx) && mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) { | |
577 | printk(KERN_DEBUG PREFIX "z%i \n%s {%i}", doze, kick ? "K" : "", mlc->seidx); | |
578 | doze = 0; | |
579 | } | |
580 | kick = 0; | |
581 | ||
582 | seidx = mlc->seidx; | |
583 | #endif | |
584 | node = hil_mlc_se + mlc->seidx; | |
585 | ||
586 | switch (node->act) { | |
587 | int rc; | |
588 | hil_packet pack; | |
589 | ||
590 | case HILSE_FUNC: | |
591 | if (node->object.func == NULL) break; | |
592 | rc = node->object.func(mlc, node->arg); | |
593 | nextidx = (rc > 0) ? node->ugly : | |
594 | ((rc < 0) ? node->bad : node->good); | |
595 | if (nextidx == HILSEN_FOLLOW) nextidx = rc; | |
596 | break; | |
597 | case HILSE_EXPECT_LAST: | |
598 | case HILSE_EXPECT_DISC: | |
599 | case HILSE_EXPECT: | |
600 | case HILSE_IN: | |
601 | /* Already set up from previous HILSE_OUT_* */ | |
602 | write_lock_irqsave(&(mlc->lock), flags); | |
603 | rc = mlc->in(mlc, node->arg); | |
604 | if (rc == 2) { | |
605 | nextidx = HILSEN_DOZE; | |
606 | sched_long = 1; | |
607 | write_unlock_irqrestore(&(mlc->lock), flags); | |
608 | break; | |
609 | } | |
610 | if (rc == 1) nextidx = node->ugly; | |
611 | else if (rc == 0) nextidx = node->good; | |
612 | else nextidx = node->bad; | |
613 | mlc->istarted = 0; | |
614 | write_unlock_irqrestore(&(mlc->lock), flags); | |
615 | break; | |
616 | case HILSE_OUT_LAST: | |
617 | write_lock_irqsave(&(mlc->lock), flags); | |
618 | pack = node->object.packet; | |
619 | pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT); | |
620 | goto out; | |
621 | case HILSE_OUT_DISC: | |
622 | write_lock_irqsave(&(mlc->lock), flags); | |
623 | pack = node->object.packet; | |
624 | pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT); | |
625 | goto out; | |
626 | case HILSE_OUT: | |
627 | write_lock_irqsave(&(mlc->lock), flags); | |
628 | pack = node->object.packet; | |
629 | out: | |
630 | if (mlc->istarted) goto out2; | |
631 | /* Prepare to receive input */ | |
632 | if ((node + 1)->act & HILSE_IN) | |
633 | hilse_setup_input(mlc, node + 1); | |
634 | ||
635 | out2: | |
636 | write_unlock_irqrestore(&(mlc->lock), flags); | |
637 | ||
638 | if (down_trylock(&mlc->osem)) { | |
639 | nextidx = HILSEN_DOZE; | |
640 | break; | |
641 | } | |
642 | up(&mlc->osem); | |
643 | ||
644 | write_lock_irqsave(&(mlc->lock), flags); | |
645 | if (!(mlc->ostarted)) { | |
646 | mlc->ostarted = 1; | |
647 | mlc->opacket = pack; | |
648 | mlc->out(mlc); | |
649 | nextidx = HILSEN_DOZE; | |
650 | write_unlock_irqrestore(&(mlc->lock), flags); | |
651 | break; | |
652 | } | |
653 | mlc->ostarted = 0; | |
654 | do_gettimeofday(&(mlc->instart)); | |
655 | write_unlock_irqrestore(&(mlc->lock), flags); | |
656 | nextidx = HILSEN_NEXT; | |
657 | break; | |
658 | case HILSE_CTS: | |
659 | nextidx = mlc->cts(mlc) ? node->bad : node->good; | |
660 | break; | |
661 | default: | |
662 | BUG(); | |
663 | nextidx = 0; | |
664 | break; | |
665 | } | |
666 | ||
667 | #ifdef HIL_MLC_DEBUG | |
668 | if (nextidx == HILSEN_DOZE) doze++; | |
669 | #endif | |
670 | ||
671 | while (nextidx & HILSEN_SCHED) { | |
672 | struct timeval tv; | |
673 | ||
674 | if (!sched_long) goto sched; | |
675 | ||
676 | do_gettimeofday(&tv); | |
677 | tv.tv_usec += 1000000 * (tv.tv_sec - mlc->instart.tv_sec); | |
678 | tv.tv_usec -= mlc->instart.tv_usec; | |
679 | if (tv.tv_usec >= mlc->intimeout) goto sched; | |
680 | tv.tv_usec = (mlc->intimeout - tv.tv_usec) * HZ / 1000000; | |
681 | if (!tv.tv_usec) goto sched; | |
682 | mod_timer(&hil_mlcs_kicker, jiffies + tv.tv_usec); | |
683 | break; | |
684 | sched: | |
685 | tasklet_schedule(&hil_mlcs_tasklet); | |
686 | break; | |
687 | } | |
688 | if (nextidx & HILSEN_DOWN) mlc->seidx += nextidx & HILSEN_MASK; | |
689 | else if (nextidx & HILSEN_UP) mlc->seidx -= nextidx & HILSEN_MASK; | |
690 | else mlc->seidx = nextidx & HILSEN_MASK; | |
691 | ||
692 | if (nextidx & HILSEN_BREAK) return 1; | |
693 | return 0; | |
694 | } | |
695 | ||
696 | /******************** tasklet context functions **************************/ | |
697 | static void hil_mlcs_process(unsigned long unused) { | |
698 | struct list_head *tmp; | |
699 | ||
700 | read_lock(&hil_mlcs_lock); | |
701 | list_for_each(tmp, &hil_mlcs) { | |
702 | struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list); | |
703 | while (hilse_donode(mlc) == 0) { | |
704 | #ifdef HIL_MLC_DEBUG | |
705 | if (mlc->seidx != 41 && | |
706 | mlc->seidx != 42 && | |
707 | mlc->seidx != 43) | |
708 | printk(KERN_DEBUG PREFIX " + "); | |
709 | #endif | |
710 | }; | |
711 | } | |
712 | read_unlock(&hil_mlcs_lock); | |
713 | } | |
714 | ||
715 | /************************* Keepalive timer task *********************/ | |
716 | ||
717 | void hil_mlcs_timer (unsigned long data) { | |
718 | hil_mlcs_probe = 1; | |
719 | tasklet_schedule(&hil_mlcs_tasklet); | |
720 | /* Re-insert the periodic task. */ | |
721 | if (!timer_pending(&hil_mlcs_kicker)) | |
722 | mod_timer(&hil_mlcs_kicker, jiffies + HZ); | |
723 | } | |
724 | ||
725 | /******************** user/kernel context functions **********************/ | |
726 | ||
727 | static int hil_mlc_serio_write(struct serio *serio, unsigned char c) { | |
728 | struct hil_mlc_serio_map *map; | |
729 | struct hil_mlc *mlc; | |
730 | struct serio_driver *drv; | |
731 | uint8_t *idx, *last; | |
732 | ||
733 | map = serio->port_data; | |
734 | if (map == NULL) { | |
735 | BUG(); | |
736 | return -EIO; | |
737 | } | |
738 | mlc = map->mlc; | |
739 | if (mlc == NULL) { | |
740 | BUG(); | |
741 | return -EIO; | |
742 | } | |
743 | mlc->serio_opacket[map->didx] |= | |
744 | ((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx])); | |
745 | ||
746 | if (mlc->serio_oidx[map->didx] >= 3) { | |
747 | /* for now only commands */ | |
748 | if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD)) | |
749 | return -EIO; | |
750 | switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) { | |
751 | case HIL_CMD_IDD: | |
752 | idx = mlc->di[map->didx].idd; | |
753 | goto emu; | |
754 | case HIL_CMD_RSC: | |
755 | idx = mlc->di[map->didx].rsc; | |
756 | goto emu; | |
757 | case HIL_CMD_EXD: | |
758 | idx = mlc->di[map->didx].exd; | |
759 | goto emu; | |
760 | case HIL_CMD_RNM: | |
761 | idx = mlc->di[map->didx].rnm; | |
762 | goto emu; | |
763 | default: | |
764 | break; | |
765 | } | |
766 | mlc->serio_oidx[map->didx] = 0; | |
767 | mlc->serio_opacket[map->didx] = 0; | |
768 | } | |
769 | ||
770 | mlc->serio_oidx[map->didx]++; | |
771 | return -EIO; | |
772 | emu: | |
773 | drv = serio->drv; | |
774 | if (drv == NULL) { | |
775 | BUG(); | |
776 | return -EIO; | |
777 | } | |
778 | last = idx + 15; | |
779 | while ((last != idx) && (*last == 0)) last--; | |
780 | ||
781 | while (idx != last) { | |
be577a52 MW |
782 | drv->interrupt(serio, 0, 0); |
783 | drv->interrupt(serio, HIL_ERR_INT >> 16, 0); | |
784 | drv->interrupt(serio, 0, 0); | |
785 | drv->interrupt(serio, *idx, 0); | |
1da177e4 LT |
786 | idx++; |
787 | } | |
be577a52 MW |
788 | drv->interrupt(serio, 0, 0); |
789 | drv->interrupt(serio, HIL_ERR_INT >> 16, 0); | |
790 | drv->interrupt(serio, HIL_PKT_CMD >> 8, 0); | |
791 | drv->interrupt(serio, *idx, 0); | |
1da177e4 LT |
792 | |
793 | mlc->serio_oidx[map->didx] = 0; | |
794 | mlc->serio_opacket[map->didx] = 0; | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
799 | static int hil_mlc_serio_open(struct serio *serio) { | |
800 | struct hil_mlc_serio_map *map; | |
801 | struct hil_mlc *mlc; | |
802 | ||
6ab0f5cd MW |
803 | if (serio_get_drvdata(serio) != NULL) |
804 | return -EBUSY; | |
1da177e4 LT |
805 | |
806 | map = serio->port_data; | |
807 | if (map == NULL) { | |
808 | BUG(); | |
809 | return -ENODEV; | |
810 | } | |
811 | mlc = map->mlc; | |
812 | if (mlc == NULL) { | |
813 | BUG(); | |
814 | return -ENODEV; | |
815 | } | |
816 | ||
817 | return 0; | |
818 | } | |
819 | ||
820 | static void hil_mlc_serio_close(struct serio *serio) { | |
821 | struct hil_mlc_serio_map *map; | |
822 | struct hil_mlc *mlc; | |
823 | ||
824 | map = serio->port_data; | |
825 | if (map == NULL) { | |
826 | BUG(); | |
827 | return; | |
828 | } | |
829 | mlc = map->mlc; | |
830 | if (mlc == NULL) { | |
831 | BUG(); | |
832 | return; | |
833 | } | |
834 | ||
6ab0f5cd | 835 | serio_set_drvdata(serio, NULL); |
1da177e4 LT |
836 | serio->drv = NULL; |
837 | /* TODO wake up interruptable */ | |
838 | } | |
839 | ||
6ab0f5cd MW |
840 | static struct serio_device_id hil_mlc_serio_id = { |
841 | .type = SERIO_HIL_MLC, | |
842 | .proto = SERIO_HIL, | |
843 | .extra = SERIO_ANY, | |
844 | .id = SERIO_ANY, | |
845 | }; | |
846 | ||
1da177e4 LT |
847 | int hil_mlc_register(hil_mlc *mlc) { |
848 | int i; | |
849 | unsigned long flags; | |
850 | ||
851 | if (mlc == NULL) { | |
852 | return -EINVAL; | |
853 | } | |
854 | ||
855 | mlc->istarted = 0; | |
856 | mlc->ostarted = 0; | |
857 | ||
858 | rwlock_init(&mlc->lock); | |
859 | init_MUTEX(&(mlc->osem)); | |
860 | ||
861 | init_MUTEX(&(mlc->isem)); | |
862 | mlc->icount = -1; | |
863 | mlc->imatch = 0; | |
864 | ||
865 | mlc->opercnt = 0; | |
866 | ||
867 | init_MUTEX_LOCKED(&(mlc->csem)); | |
868 | ||
869 | hil_mlc_clear_di_scratch(mlc); | |
870 | hil_mlc_clear_di_map(mlc, 0); | |
871 | for (i = 0; i < HIL_MLC_DEVMEM; i++) { | |
872 | struct serio *mlc_serio; | |
873 | hil_mlc_copy_di_scratch(mlc, i); | |
b39787a9 | 874 | mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL); |
1da177e4 | 875 | mlc->serio[i] = mlc_serio; |
6ab0f5cd | 876 | mlc_serio->id = hil_mlc_serio_id; |
1da177e4 LT |
877 | mlc_serio->write = hil_mlc_serio_write; |
878 | mlc_serio->open = hil_mlc_serio_open; | |
879 | mlc_serio->close = hil_mlc_serio_close; | |
880 | mlc_serio->port_data = &(mlc->serio_map[i]); | |
881 | mlc->serio_map[i].mlc = mlc; | |
882 | mlc->serio_map[i].didx = i; | |
883 | mlc->serio_map[i].di_revmap = -1; | |
884 | mlc->serio_opacket[i] = 0; | |
885 | mlc->serio_oidx[i] = 0; | |
886 | serio_register_port(mlc_serio); | |
887 | } | |
888 | ||
889 | mlc->tasklet = &hil_mlcs_tasklet; | |
890 | ||
891 | write_lock_irqsave(&hil_mlcs_lock, flags); | |
892 | list_add_tail(&mlc->list, &hil_mlcs); | |
893 | mlc->seidx = HILSEN_START; | |
894 | write_unlock_irqrestore(&hil_mlcs_lock, flags); | |
895 | ||
896 | tasklet_schedule(&hil_mlcs_tasklet); | |
897 | return 0; | |
898 | } | |
899 | ||
900 | int hil_mlc_unregister(hil_mlc *mlc) { | |
901 | struct list_head *tmp; | |
902 | unsigned long flags; | |
903 | int i; | |
904 | ||
905 | if (mlc == NULL) | |
906 | return -EINVAL; | |
907 | ||
908 | write_lock_irqsave(&hil_mlcs_lock, flags); | |
909 | list_for_each(tmp, &hil_mlcs) { | |
910 | if (list_entry(tmp, hil_mlc, list) == mlc) | |
911 | goto found; | |
912 | } | |
913 | ||
914 | /* not found in list */ | |
915 | write_unlock_irqrestore(&hil_mlcs_lock, flags); | |
916 | tasklet_schedule(&hil_mlcs_tasklet); | |
917 | return -ENODEV; | |
918 | ||
919 | found: | |
920 | list_del(tmp); | |
921 | write_unlock_irqrestore(&hil_mlcs_lock, flags); | |
922 | ||
923 | for (i = 0; i < HIL_MLC_DEVMEM; i++) { | |
924 | serio_unregister_port(mlc->serio[i]); | |
925 | mlc->serio[i] = NULL; | |
926 | } | |
927 | ||
928 | tasklet_schedule(&hil_mlcs_tasklet); | |
929 | return 0; | |
930 | } | |
931 | ||
932 | /**************************** Module interface *************************/ | |
933 | ||
934 | static int __init hil_mlc_init(void) | |
935 | { | |
936 | init_timer(&hil_mlcs_kicker); | |
937 | hil_mlcs_kicker.expires = jiffies + HZ; | |
938 | hil_mlcs_kicker.function = &hil_mlcs_timer; | |
939 | add_timer(&hil_mlcs_kicker); | |
940 | ||
941 | tasklet_enable(&hil_mlcs_tasklet); | |
942 | ||
943 | return 0; | |
944 | } | |
945 | ||
946 | static void __exit hil_mlc_exit(void) | |
947 | { | |
948 | del_timer(&hil_mlcs_kicker); | |
949 | ||
950 | tasklet_disable(&hil_mlcs_tasklet); | |
951 | tasklet_kill(&hil_mlcs_tasklet); | |
952 | } | |
953 | ||
954 | module_init(hil_mlc_init); | |
955 | module_exit(hil_mlc_exit); |