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80503b23 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e27c7292 MH |
2 | /* |
3 | * ADXL345/346 Three-Axis Digital Accelerometers | |
4 | * | |
5 | * Enter bugs at http://blackfin.uclinux.org/ | |
6 | * | |
7 | * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc. | |
e27c7292 MH |
8 | */ |
9 | ||
10 | #include <linux/device.h> | |
e27c7292 MH |
11 | #include <linux/delay.h> |
12 | #include <linux/input.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/irq.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/workqueue.h> | |
17 | #include <linux/input/adxl34x.h> | |
d2d8442d | 18 | #include <linux/module.h> |
e27c7292 MH |
19 | |
20 | #include "adxl34x.h" | |
21 | ||
22 | /* ADXL345/6 Register Map */ | |
23 | #define DEVID 0x00 /* R Device ID */ | |
24 | #define THRESH_TAP 0x1D /* R/W Tap threshold */ | |
25 | #define OFSX 0x1E /* R/W X-axis offset */ | |
26 | #define OFSY 0x1F /* R/W Y-axis offset */ | |
27 | #define OFSZ 0x20 /* R/W Z-axis offset */ | |
28 | #define DUR 0x21 /* R/W Tap duration */ | |
29 | #define LATENT 0x22 /* R/W Tap latency */ | |
30 | #define WINDOW 0x23 /* R/W Tap window */ | |
31 | #define THRESH_ACT 0x24 /* R/W Activity threshold */ | |
32 | #define THRESH_INACT 0x25 /* R/W Inactivity threshold */ | |
33 | #define TIME_INACT 0x26 /* R/W Inactivity time */ | |
34 | #define ACT_INACT_CTL 0x27 /* R/W Axis enable control for activity and */ | |
35 | /* inactivity detection */ | |
36 | #define THRESH_FF 0x28 /* R/W Free-fall threshold */ | |
37 | #define TIME_FF 0x29 /* R/W Free-fall time */ | |
38 | #define TAP_AXES 0x2A /* R/W Axis control for tap/double tap */ | |
39 | #define ACT_TAP_STATUS 0x2B /* R Source of tap/double tap */ | |
40 | #define BW_RATE 0x2C /* R/W Data rate and power mode control */ | |
41 | #define POWER_CTL 0x2D /* R/W Power saving features control */ | |
42 | #define INT_ENABLE 0x2E /* R/W Interrupt enable control */ | |
43 | #define INT_MAP 0x2F /* R/W Interrupt mapping control */ | |
44 | #define INT_SOURCE 0x30 /* R Source of interrupts */ | |
45 | #define DATA_FORMAT 0x31 /* R/W Data format control */ | |
46 | #define DATAX0 0x32 /* R X-Axis Data 0 */ | |
47 | #define DATAX1 0x33 /* R X-Axis Data 1 */ | |
48 | #define DATAY0 0x34 /* R Y-Axis Data 0 */ | |
49 | #define DATAY1 0x35 /* R Y-Axis Data 1 */ | |
50 | #define DATAZ0 0x36 /* R Z-Axis Data 0 */ | |
51 | #define DATAZ1 0x37 /* R Z-Axis Data 1 */ | |
52 | #define FIFO_CTL 0x38 /* R/W FIFO control */ | |
53 | #define FIFO_STATUS 0x39 /* R FIFO status */ | |
54 | #define TAP_SIGN 0x3A /* R Sign and source for tap/double tap */ | |
55 | /* Orientation ADXL346 only */ | |
56 | #define ORIENT_CONF 0x3B /* R/W Orientation configuration */ | |
57 | #define ORIENT 0x3C /* R Orientation status */ | |
58 | ||
59 | /* DEVIDs */ | |
60 | #define ID_ADXL345 0xE5 | |
61 | #define ID_ADXL346 0xE6 | |
62 | ||
63 | /* INT_ENABLE/INT_MAP/INT_SOURCE Bits */ | |
64 | #define DATA_READY (1 << 7) | |
65 | #define SINGLE_TAP (1 << 6) | |
66 | #define DOUBLE_TAP (1 << 5) | |
67 | #define ACTIVITY (1 << 4) | |
68 | #define INACTIVITY (1 << 3) | |
69 | #define FREE_FALL (1 << 2) | |
70 | #define WATERMARK (1 << 1) | |
71 | #define OVERRUN (1 << 0) | |
72 | ||
73 | /* ACT_INACT_CONTROL Bits */ | |
74 | #define ACT_ACDC (1 << 7) | |
75 | #define ACT_X_EN (1 << 6) | |
76 | #define ACT_Y_EN (1 << 5) | |
77 | #define ACT_Z_EN (1 << 4) | |
78 | #define INACT_ACDC (1 << 3) | |
79 | #define INACT_X_EN (1 << 2) | |
80 | #define INACT_Y_EN (1 << 1) | |
81 | #define INACT_Z_EN (1 << 0) | |
82 | ||
83 | /* TAP_AXES Bits */ | |
84 | #define SUPPRESS (1 << 3) | |
85 | #define TAP_X_EN (1 << 2) | |
86 | #define TAP_Y_EN (1 << 1) | |
87 | #define TAP_Z_EN (1 << 0) | |
88 | ||
89 | /* ACT_TAP_STATUS Bits */ | |
90 | #define ACT_X_SRC (1 << 6) | |
91 | #define ACT_Y_SRC (1 << 5) | |
92 | #define ACT_Z_SRC (1 << 4) | |
93 | #define ASLEEP (1 << 3) | |
94 | #define TAP_X_SRC (1 << 2) | |
95 | #define TAP_Y_SRC (1 << 1) | |
96 | #define TAP_Z_SRC (1 << 0) | |
97 | ||
98 | /* BW_RATE Bits */ | |
99 | #define LOW_POWER (1 << 4) | |
100 | #define RATE(x) ((x) & 0xF) | |
101 | ||
102 | /* POWER_CTL Bits */ | |
103 | #define PCTL_LINK (1 << 5) | |
104 | #define PCTL_AUTO_SLEEP (1 << 4) | |
105 | #define PCTL_MEASURE (1 << 3) | |
106 | #define PCTL_SLEEP (1 << 2) | |
107 | #define PCTL_WAKEUP(x) ((x) & 0x3) | |
108 | ||
109 | /* DATA_FORMAT Bits */ | |
110 | #define SELF_TEST (1 << 7) | |
111 | #define SPI (1 << 6) | |
112 | #define INT_INVERT (1 << 5) | |
113 | #define FULL_RES (1 << 3) | |
114 | #define JUSTIFY (1 << 2) | |
115 | #define RANGE(x) ((x) & 0x3) | |
116 | #define RANGE_PM_2g 0 | |
117 | #define RANGE_PM_4g 1 | |
118 | #define RANGE_PM_8g 2 | |
119 | #define RANGE_PM_16g 3 | |
120 | ||
121 | /* | |
122 | * Maximum value our axis may get in full res mode for the input device | |
123 | * (signed 13 bits) | |
124 | */ | |
125 | #define ADXL_FULLRES_MAX_VAL 4096 | |
126 | ||
127 | /* | |
128 | * Maximum value our axis may get in fixed res mode for the input device | |
129 | * (signed 10 bits) | |
130 | */ | |
131 | #define ADXL_FIXEDRES_MAX_VAL 512 | |
132 | ||
133 | /* FIFO_CTL Bits */ | |
134 | #define FIFO_MODE(x) (((x) & 0x3) << 6) | |
135 | #define FIFO_BYPASS 0 | |
136 | #define FIFO_FIFO 1 | |
137 | #define FIFO_STREAM 2 | |
138 | #define FIFO_TRIGGER 3 | |
139 | #define TRIGGER (1 << 5) | |
140 | #define SAMPLES(x) ((x) & 0x1F) | |
141 | ||
142 | /* FIFO_STATUS Bits */ | |
143 | #define FIFO_TRIG (1 << 7) | |
144 | #define ENTRIES(x) ((x) & 0x3F) | |
145 | ||
146 | /* TAP_SIGN Bits ADXL346 only */ | |
147 | #define XSIGN (1 << 6) | |
148 | #define YSIGN (1 << 5) | |
149 | #define ZSIGN (1 << 4) | |
150 | #define XTAP (1 << 3) | |
151 | #define YTAP (1 << 2) | |
152 | #define ZTAP (1 << 1) | |
153 | ||
154 | /* ORIENT_CONF ADXL346 only */ | |
155 | #define ORIENT_DEADZONE(x) (((x) & 0x7) << 4) | |
156 | #define ORIENT_DIVISOR(x) ((x) & 0x7) | |
157 | ||
158 | /* ORIENT ADXL346 only */ | |
159 | #define ADXL346_2D_VALID (1 << 6) | |
241ecf1c | 160 | #define ADXL346_2D_ORIENT(x) (((x) & 0x30) >> 4) |
e27c7292 MH |
161 | #define ADXL346_3D_VALID (1 << 3) |
162 | #define ADXL346_3D_ORIENT(x) ((x) & 0x7) | |
163 | #define ADXL346_2D_PORTRAIT_POS 0 /* +X */ | |
164 | #define ADXL346_2D_PORTRAIT_NEG 1 /* -X */ | |
165 | #define ADXL346_2D_LANDSCAPE_POS 2 /* +Y */ | |
166 | #define ADXL346_2D_LANDSCAPE_NEG 3 /* -Y */ | |
167 | ||
168 | #define ADXL346_3D_FRONT 3 /* +X */ | |
169 | #define ADXL346_3D_BACK 4 /* -X */ | |
170 | #define ADXL346_3D_RIGHT 2 /* +Y */ | |
171 | #define ADXL346_3D_LEFT 5 /* -Y */ | |
172 | #define ADXL346_3D_TOP 1 /* +Z */ | |
173 | #define ADXL346_3D_BOTTOM 6 /* -Z */ | |
174 | ||
175 | #undef ADXL_DEBUG | |
176 | ||
177 | #define ADXL_X_AXIS 0 | |
178 | #define ADXL_Y_AXIS 1 | |
179 | #define ADXL_Z_AXIS 2 | |
180 | ||
181 | #define AC_READ(ac, reg) ((ac)->bops->read((ac)->dev, reg)) | |
182 | #define AC_WRITE(ac, reg, val) ((ac)->bops->write((ac)->dev, reg, val)) | |
183 | ||
184 | struct axis_triple { | |
185 | int x; | |
186 | int y; | |
187 | int z; | |
188 | }; | |
189 | ||
190 | struct adxl34x { | |
191 | struct device *dev; | |
192 | struct input_dev *input; | |
193 | struct mutex mutex; /* reentrant protection for struct */ | |
194 | struct adxl34x_platform_data pdata; | |
195 | struct axis_triple swcal; | |
196 | struct axis_triple hwcal; | |
197 | struct axis_triple saved; | |
198 | char phys[32]; | |
671386bb MH |
199 | unsigned orient2d_saved; |
200 | unsigned orient3d_saved; | |
e27c7292 MH |
201 | bool disabled; /* P: mutex */ |
202 | bool opened; /* P: mutex */ | |
af6e1d99 | 203 | bool suspended; /* P: mutex */ |
e27c7292 MH |
204 | bool fifo_delay; |
205 | int irq; | |
206 | unsigned model; | |
207 | unsigned int_mask; | |
208 | ||
209 | const struct adxl34x_bus_ops *bops; | |
210 | }; | |
211 | ||
212 | static const struct adxl34x_platform_data adxl34x_default_init = { | |
213 | .tap_threshold = 35, | |
214 | .tap_duration = 3, | |
215 | .tap_latency = 20, | |
216 | .tap_window = 20, | |
217 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | |
218 | .act_axis_control = 0xFF, | |
219 | .activity_threshold = 6, | |
220 | .inactivity_threshold = 4, | |
221 | .inactivity_time = 3, | |
222 | .free_fall_threshold = 8, | |
223 | .free_fall_time = 0x20, | |
224 | .data_rate = 8, | |
225 | .data_range = ADXL_FULL_RES, | |
226 | ||
227 | .ev_type = EV_ABS, | |
228 | .ev_code_x = ABS_X, /* EV_REL */ | |
229 | .ev_code_y = ABS_Y, /* EV_REL */ | |
230 | .ev_code_z = ABS_Z, /* EV_REL */ | |
231 | ||
232 | .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY {x,y,z} */ | |
233 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | |
03c86ee1 | 234 | .fifo_mode = ADXL_FIFO_STREAM, |
e27c7292 MH |
235 | .watermark = 0, |
236 | }; | |
237 | ||
238 | static void adxl34x_get_triple(struct adxl34x *ac, struct axis_triple *axis) | |
239 | { | |
804f354a | 240 | __le16 buf[3]; |
e27c7292 MH |
241 | |
242 | ac->bops->read_block(ac->dev, DATAX0, DATAZ1 - DATAX0 + 1, buf); | |
243 | ||
9b924739 DT |
244 | guard(mutex)(&ac->mutex); |
245 | ||
e27c7292 MH |
246 | ac->saved.x = (s16) le16_to_cpu(buf[0]); |
247 | axis->x = ac->saved.x; | |
248 | ||
249 | ac->saved.y = (s16) le16_to_cpu(buf[1]); | |
250 | axis->y = ac->saved.y; | |
251 | ||
252 | ac->saved.z = (s16) le16_to_cpu(buf[2]); | |
253 | axis->z = ac->saved.z; | |
e27c7292 MH |
254 | } |
255 | ||
256 | static void adxl34x_service_ev_fifo(struct adxl34x *ac) | |
257 | { | |
258 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
259 | struct axis_triple axis; | |
260 | ||
261 | adxl34x_get_triple(ac, &axis); | |
262 | ||
263 | input_event(ac->input, pdata->ev_type, pdata->ev_code_x, | |
264 | axis.x - ac->swcal.x); | |
265 | input_event(ac->input, pdata->ev_type, pdata->ev_code_y, | |
266 | axis.y - ac->swcal.y); | |
267 | input_event(ac->input, pdata->ev_type, pdata->ev_code_z, | |
268 | axis.z - ac->swcal.z); | |
269 | } | |
270 | ||
271 | static void adxl34x_report_key_single(struct input_dev *input, int key) | |
272 | { | |
273 | input_report_key(input, key, true); | |
274 | input_sync(input); | |
275 | input_report_key(input, key, false); | |
276 | } | |
277 | ||
278 | static void adxl34x_send_key_events(struct adxl34x *ac, | |
279 | struct adxl34x_platform_data *pdata, int status, int press) | |
280 | { | |
281 | int i; | |
282 | ||
283 | for (i = ADXL_X_AXIS; i <= ADXL_Z_AXIS; i++) { | |
284 | if (status & (1 << (ADXL_Z_AXIS - i))) | |
285 | input_report_key(ac->input, | |
286 | pdata->ev_code_tap[i], press); | |
287 | } | |
288 | } | |
289 | ||
290 | static void adxl34x_do_tap(struct adxl34x *ac, | |
291 | struct adxl34x_platform_data *pdata, int status) | |
292 | { | |
293 | adxl34x_send_key_events(ac, pdata, status, true); | |
294 | input_sync(ac->input); | |
295 | adxl34x_send_key_events(ac, pdata, status, false); | |
296 | } | |
297 | ||
298 | static irqreturn_t adxl34x_irq(int irq, void *handle) | |
299 | { | |
300 | struct adxl34x *ac = handle; | |
301 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
671386bb | 302 | int int_stat, tap_stat, samples, orient, orient_code; |
e27c7292 MH |
303 | |
304 | /* | |
305 | * ACT_TAP_STATUS should be read before clearing the interrupt | |
306 | * Avoid reading ACT_TAP_STATUS in case TAP detection is disabled | |
307 | */ | |
308 | ||
309 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
310 | tap_stat = AC_READ(ac, ACT_TAP_STATUS); | |
311 | else | |
312 | tap_stat = 0; | |
313 | ||
314 | int_stat = AC_READ(ac, INT_SOURCE); | |
315 | ||
316 | if (int_stat & FREE_FALL) | |
317 | adxl34x_report_key_single(ac->input, pdata->ev_code_ff); | |
318 | ||
319 | if (int_stat & OVERRUN) | |
320 | dev_dbg(ac->dev, "OVERRUN\n"); | |
321 | ||
322 | if (int_stat & (SINGLE_TAP | DOUBLE_TAP)) { | |
323 | adxl34x_do_tap(ac, pdata, tap_stat); | |
324 | ||
325 | if (int_stat & DOUBLE_TAP) | |
326 | adxl34x_do_tap(ac, pdata, tap_stat); | |
327 | } | |
328 | ||
329 | if (pdata->ev_code_act_inactivity) { | |
330 | if (int_stat & ACTIVITY) | |
331 | input_report_key(ac->input, | |
332 | pdata->ev_code_act_inactivity, 1); | |
333 | if (int_stat & INACTIVITY) | |
334 | input_report_key(ac->input, | |
335 | pdata->ev_code_act_inactivity, 0); | |
336 | } | |
337 | ||
671386bb MH |
338 | /* |
339 | * ORIENTATION SENSING ADXL346 only | |
340 | */ | |
341 | if (pdata->orientation_enable) { | |
342 | orient = AC_READ(ac, ORIENT); | |
343 | if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_2D) && | |
344 | (orient & ADXL346_2D_VALID)) { | |
345 | ||
346 | orient_code = ADXL346_2D_ORIENT(orient); | |
347 | /* Report orientation only when it changes */ | |
348 | if (ac->orient2d_saved != orient_code) { | |
349 | ac->orient2d_saved = orient_code; | |
350 | adxl34x_report_key_single(ac->input, | |
351 | pdata->ev_codes_orient_2d[orient_code]); | |
352 | } | |
353 | } | |
354 | ||
355 | if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_3D) && | |
356 | (orient & ADXL346_3D_VALID)) { | |
357 | ||
358 | orient_code = ADXL346_3D_ORIENT(orient) - 1; | |
359 | /* Report orientation only when it changes */ | |
360 | if (ac->orient3d_saved != orient_code) { | |
361 | ac->orient3d_saved = orient_code; | |
362 | adxl34x_report_key_single(ac->input, | |
363 | pdata->ev_codes_orient_3d[orient_code]); | |
364 | } | |
365 | } | |
366 | } | |
367 | ||
e27c7292 MH |
368 | if (int_stat & (DATA_READY | WATERMARK)) { |
369 | ||
370 | if (pdata->fifo_mode) | |
371 | samples = ENTRIES(AC_READ(ac, FIFO_STATUS)) + 1; | |
372 | else | |
373 | samples = 1; | |
374 | ||
375 | for (; samples > 0; samples--) { | |
376 | adxl34x_service_ev_fifo(ac); | |
377 | /* | |
378 | * To ensure that the FIFO has | |
379 | * completely popped, there must be at least 5 us between | |
380 | * the end of reading the data registers, signified by the | |
381 | * transition to register 0x38 from 0x37 or the CS pin | |
382 | * going high, and the start of new reads of the FIFO or | |
383 | * reading the FIFO_STATUS register. For SPI operation at | |
384 | * 1.5 MHz or lower, the register addressing portion of the | |
385 | * transmission is sufficient delay to ensure the FIFO has | |
386 | * completely popped. It is necessary for SPI operation | |
387 | * greater than 1.5 MHz to de-assert the CS pin to ensure a | |
388 | * total of 5 us, which is at most 3.4 us at 5 MHz | |
389 | * operation. | |
390 | */ | |
391 | if (ac->fifo_delay && (samples > 1)) | |
392 | udelay(3); | |
393 | } | |
394 | } | |
395 | ||
396 | input_sync(ac->input); | |
397 | ||
398 | return IRQ_HANDLED; | |
399 | } | |
400 | ||
401 | static void __adxl34x_disable(struct adxl34x *ac) | |
402 | { | |
af6e1d99 DT |
403 | /* |
404 | * A '0' places the ADXL34x into standby mode | |
405 | * with minimum power consumption. | |
406 | */ | |
407 | AC_WRITE(ac, POWER_CTL, 0); | |
e27c7292 MH |
408 | } |
409 | ||
410 | static void __adxl34x_enable(struct adxl34x *ac) | |
411 | { | |
af6e1d99 | 412 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); |
e27c7292 MH |
413 | } |
414 | ||
40be0646 | 415 | static int adxl34x_suspend(struct device *dev) |
e27c7292 | 416 | { |
40be0646 JC |
417 | struct adxl34x *ac = dev_get_drvdata(dev); |
418 | ||
9b924739 | 419 | guard(mutex)(&ac->mutex); |
af6e1d99 DT |
420 | |
421 | if (!ac->suspended && !ac->disabled && ac->opened) | |
422 | __adxl34x_disable(ac); | |
423 | ||
424 | ac->suspended = true; | |
425 | ||
40be0646 | 426 | return 0; |
e27c7292 | 427 | } |
e27c7292 | 428 | |
40be0646 | 429 | static int adxl34x_resume(struct device *dev) |
e27c7292 | 430 | { |
40be0646 JC |
431 | struct adxl34x *ac = dev_get_drvdata(dev); |
432 | ||
9b924739 | 433 | guard(mutex)(&ac->mutex); |
af6e1d99 DT |
434 | |
435 | if (ac->suspended && !ac->disabled && ac->opened) | |
436 | __adxl34x_enable(ac); | |
437 | ||
f1cba532 | 438 | ac->suspended = false; |
af6e1d99 | 439 | |
40be0646 | 440 | return 0; |
e27c7292 | 441 | } |
e27c7292 MH |
442 | |
443 | static ssize_t adxl34x_disable_show(struct device *dev, | |
444 | struct device_attribute *attr, char *buf) | |
445 | { | |
446 | struct adxl34x *ac = dev_get_drvdata(dev); | |
447 | ||
448 | return sprintf(buf, "%u\n", ac->disabled); | |
449 | } | |
450 | ||
451 | static ssize_t adxl34x_disable_store(struct device *dev, | |
452 | struct device_attribute *attr, | |
453 | const char *buf, size_t count) | |
454 | { | |
455 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 456 | unsigned int val; |
e27c7292 MH |
457 | int error; |
458 | ||
76496e7a | 459 | error = kstrtouint(buf, 10, &val); |
e27c7292 MH |
460 | if (error) |
461 | return error; | |
462 | ||
9b924739 | 463 | guard(mutex)(&ac->mutex); |
af6e1d99 DT |
464 | |
465 | if (!ac->suspended && ac->opened) { | |
466 | if (val) { | |
467 | if (!ac->disabled) | |
468 | __adxl34x_disable(ac); | |
469 | } else { | |
470 | if (ac->disabled) | |
471 | __adxl34x_enable(ac); | |
472 | } | |
473 | } | |
474 | ||
475 | ac->disabled = !!val; | |
476 | ||
e27c7292 MH |
477 | return count; |
478 | } | |
479 | ||
480 | static DEVICE_ATTR(disable, 0664, adxl34x_disable_show, adxl34x_disable_store); | |
481 | ||
482 | static ssize_t adxl34x_calibrate_show(struct device *dev, | |
483 | struct device_attribute *attr, char *buf) | |
484 | { | |
485 | struct adxl34x *ac = dev_get_drvdata(dev); | |
e27c7292 | 486 | |
9b924739 | 487 | guard(mutex)(&ac->mutex); |
e27c7292 | 488 | |
9b924739 DT |
489 | return sprintf(buf, "%d,%d,%d\n", |
490 | ac->hwcal.x * 4 + ac->swcal.x, | |
491 | ac->hwcal.y * 4 + ac->swcal.y, | |
492 | ac->hwcal.z * 4 + ac->swcal.z); | |
e27c7292 MH |
493 | } |
494 | ||
495 | static ssize_t adxl34x_calibrate_store(struct device *dev, | |
496 | struct device_attribute *attr, | |
497 | const char *buf, size_t count) | |
498 | { | |
499 | struct adxl34x *ac = dev_get_drvdata(dev); | |
500 | ||
501 | /* | |
502 | * Hardware offset calibration has a resolution of 15.6 mg/LSB. | |
503 | * We use HW calibration and handle the remaining bits in SW. (4mg/LSB) | |
504 | */ | |
505 | ||
9b924739 DT |
506 | guard(mutex)(&ac->mutex); |
507 | ||
e27c7292 MH |
508 | ac->hwcal.x -= (ac->saved.x / 4); |
509 | ac->swcal.x = ac->saved.x % 4; | |
510 | ||
511 | ac->hwcal.y -= (ac->saved.y / 4); | |
512 | ac->swcal.y = ac->saved.y % 4; | |
513 | ||
514 | ac->hwcal.z -= (ac->saved.z / 4); | |
515 | ac->swcal.z = ac->saved.z % 4; | |
516 | ||
517 | AC_WRITE(ac, OFSX, (s8) ac->hwcal.x); | |
518 | AC_WRITE(ac, OFSY, (s8) ac->hwcal.y); | |
519 | AC_WRITE(ac, OFSZ, (s8) ac->hwcal.z); | |
e27c7292 MH |
520 | |
521 | return count; | |
522 | } | |
523 | ||
524 | static DEVICE_ATTR(calibrate, 0664, | |
525 | adxl34x_calibrate_show, adxl34x_calibrate_store); | |
526 | ||
527 | static ssize_t adxl34x_rate_show(struct device *dev, | |
528 | struct device_attribute *attr, char *buf) | |
529 | { | |
530 | struct adxl34x *ac = dev_get_drvdata(dev); | |
531 | ||
532 | return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate)); | |
533 | } | |
534 | ||
535 | static ssize_t adxl34x_rate_store(struct device *dev, | |
536 | struct device_attribute *attr, | |
537 | const char *buf, size_t count) | |
538 | { | |
539 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 540 | unsigned char val; |
e27c7292 MH |
541 | int error; |
542 | ||
76496e7a | 543 | error = kstrtou8(buf, 10, &val); |
e27c7292 MH |
544 | if (error) |
545 | return error; | |
546 | ||
9b924739 | 547 | guard(mutex)(&ac->mutex); |
e27c7292 MH |
548 | |
549 | ac->pdata.data_rate = RATE(val); | |
550 | AC_WRITE(ac, BW_RATE, | |
551 | ac->pdata.data_rate | | |
552 | (ac->pdata.low_power_mode ? LOW_POWER : 0)); | |
553 | ||
e27c7292 MH |
554 | return count; |
555 | } | |
556 | ||
557 | static DEVICE_ATTR(rate, 0664, adxl34x_rate_show, adxl34x_rate_store); | |
558 | ||
559 | static ssize_t adxl34x_autosleep_show(struct device *dev, | |
560 | struct device_attribute *attr, char *buf) | |
561 | { | |
562 | struct adxl34x *ac = dev_get_drvdata(dev); | |
563 | ||
564 | return sprintf(buf, "%u\n", | |
565 | ac->pdata.power_mode & (PCTL_AUTO_SLEEP | PCTL_LINK) ? 1 : 0); | |
566 | } | |
567 | ||
568 | static ssize_t adxl34x_autosleep_store(struct device *dev, | |
569 | struct device_attribute *attr, | |
570 | const char *buf, size_t count) | |
571 | { | |
572 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 573 | unsigned int val; |
e27c7292 MH |
574 | int error; |
575 | ||
76496e7a | 576 | error = kstrtouint(buf, 10, &val); |
e27c7292 MH |
577 | if (error) |
578 | return error; | |
579 | ||
9b924739 | 580 | guard(mutex)(&ac->mutex); |
e27c7292 MH |
581 | |
582 | if (val) | |
583 | ac->pdata.power_mode |= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
584 | else | |
585 | ac->pdata.power_mode &= ~(PCTL_AUTO_SLEEP | PCTL_LINK); | |
586 | ||
af6e1d99 | 587 | if (!ac->disabled && !ac->suspended && ac->opened) |
e27c7292 MH |
588 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); |
589 | ||
e27c7292 MH |
590 | return count; |
591 | } | |
592 | ||
593 | static DEVICE_ATTR(autosleep, 0664, | |
594 | adxl34x_autosleep_show, adxl34x_autosleep_store); | |
595 | ||
596 | static ssize_t adxl34x_position_show(struct device *dev, | |
597 | struct device_attribute *attr, char *buf) | |
598 | { | |
599 | struct adxl34x *ac = dev_get_drvdata(dev); | |
e27c7292 | 600 | |
9b924739 | 601 | guard(mutex)(&ac->mutex); |
e27c7292 | 602 | |
9b924739 DT |
603 | return sprintf(buf, "(%d, %d, %d)\n", |
604 | ac->saved.x, ac->saved.y, ac->saved.z); | |
e27c7292 MH |
605 | } |
606 | ||
607 | static DEVICE_ATTR(position, S_IRUGO, adxl34x_position_show, NULL); | |
608 | ||
609 | #ifdef ADXL_DEBUG | |
610 | static ssize_t adxl34x_write_store(struct device *dev, | |
611 | struct device_attribute *attr, | |
612 | const char *buf, size_t count) | |
613 | { | |
614 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 615 | unsigned int val; |
e27c7292 MH |
616 | int error; |
617 | ||
618 | /* | |
619 | * This allows basic ADXL register write access for debug purposes. | |
620 | */ | |
76496e7a | 621 | error = kstrtouint(buf, 16, &val); |
e27c7292 MH |
622 | if (error) |
623 | return error; | |
624 | ||
9b924739 | 625 | guard(mutex)(&ac->mutex); |
e27c7292 | 626 | AC_WRITE(ac, val >> 8, val & 0xFF); |
e27c7292 MH |
627 | |
628 | return count; | |
629 | } | |
630 | ||
631 | static DEVICE_ATTR(write, 0664, NULL, adxl34x_write_store); | |
632 | #endif | |
633 | ||
634 | static struct attribute *adxl34x_attributes[] = { | |
635 | &dev_attr_disable.attr, | |
636 | &dev_attr_calibrate.attr, | |
637 | &dev_attr_rate.attr, | |
638 | &dev_attr_autosleep.attr, | |
639 | &dev_attr_position.attr, | |
640 | #ifdef ADXL_DEBUG | |
641 | &dev_attr_write.attr, | |
642 | #endif | |
643 | NULL | |
644 | }; | |
645 | ||
646 | static const struct attribute_group adxl34x_attr_group = { | |
647 | .attrs = adxl34x_attributes, | |
648 | }; | |
649 | ||
6f7e4f81 DT |
650 | const struct attribute_group *adxl34x_groups[] = { |
651 | &adxl34x_attr_group, | |
652 | NULL | |
653 | }; | |
654 | EXPORT_SYMBOL_GPL(adxl34x_groups); | |
655 | ||
e27c7292 MH |
656 | static int adxl34x_input_open(struct input_dev *input) |
657 | { | |
658 | struct adxl34x *ac = input_get_drvdata(input); | |
659 | ||
9b924739 | 660 | guard(mutex)(&ac->mutex); |
af6e1d99 DT |
661 | |
662 | if (!ac->suspended && !ac->disabled) | |
663 | __adxl34x_enable(ac); | |
664 | ||
e27c7292 | 665 | ac->opened = true; |
af6e1d99 | 666 | |
e27c7292 MH |
667 | return 0; |
668 | } | |
669 | ||
670 | static void adxl34x_input_close(struct input_dev *input) | |
671 | { | |
672 | struct adxl34x *ac = input_get_drvdata(input); | |
673 | ||
9b924739 | 674 | guard(mutex)(&ac->mutex); |
af6e1d99 DT |
675 | |
676 | if (!ac->suspended && !ac->disabled) | |
677 | __adxl34x_disable(ac); | |
678 | ||
e27c7292 | 679 | ac->opened = false; |
e27c7292 MH |
680 | } |
681 | ||
682 | struct adxl34x *adxl34x_probe(struct device *dev, int irq, | |
683 | bool fifo_delay_default, | |
684 | const struct adxl34x_bus_ops *bops) | |
685 | { | |
686 | struct adxl34x *ac; | |
687 | struct input_dev *input_dev; | |
688 | const struct adxl34x_platform_data *pdata; | |
985addc1 | 689 | int error, range, i; |
33b6c39e | 690 | int revid; |
e27c7292 MH |
691 | |
692 | if (!irq) { | |
693 | dev_err(dev, "no IRQ?\n"); | |
985addc1 | 694 | return ERR_PTR(-ENODEV); |
e27c7292 MH |
695 | } |
696 | ||
985addc1 DT |
697 | ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL); |
698 | if (!ac) | |
699 | return ERR_PTR(-ENOMEM); | |
700 | ||
701 | input_dev = devm_input_allocate_device(dev); | |
702 | if (!input_dev) | |
703 | return ERR_PTR(-ENOMEM); | |
e27c7292 MH |
704 | |
705 | ac->fifo_delay = fifo_delay_default; | |
706 | ||
c838cb3d | 707 | pdata = dev_get_platdata(dev); |
e27c7292 MH |
708 | if (!pdata) { |
709 | dev_dbg(dev, | |
25985edc | 710 | "No platform data: Using default initialization\n"); |
e27c7292 MH |
711 | pdata = &adxl34x_default_init; |
712 | } | |
713 | ||
714 | ac->pdata = *pdata; | |
715 | pdata = &ac->pdata; | |
716 | ||
717 | ac->input = input_dev; | |
e27c7292 MH |
718 | ac->dev = dev; |
719 | ac->irq = irq; | |
720 | ac->bops = bops; | |
721 | ||
722 | mutex_init(&ac->mutex); | |
723 | ||
724 | input_dev->name = "ADXL34x accelerometer"; | |
ad4e58b0 | 725 | revid = AC_READ(ac, DEVID); |
e27c7292 MH |
726 | |
727 | switch (revid) { | |
728 | case ID_ADXL345: | |
729 | ac->model = 345; | |
730 | break; | |
731 | case ID_ADXL346: | |
732 | ac->model = 346; | |
733 | break; | |
734 | default: | |
735 | dev_err(dev, "Failed to probe %s\n", input_dev->name); | |
985addc1 | 736 | return ERR_PTR(-ENODEV); |
e27c7292 MH |
737 | } |
738 | ||
739 | snprintf(ac->phys, sizeof(ac->phys), "%s/input0", dev_name(dev)); | |
740 | ||
741 | input_dev->phys = ac->phys; | |
e27c7292 MH |
742 | input_dev->id.product = ac->model; |
743 | input_dev->id.bustype = bops->bustype; | |
744 | input_dev->open = adxl34x_input_open; | |
745 | input_dev->close = adxl34x_input_close; | |
746 | ||
747 | input_set_drvdata(input_dev, ac); | |
748 | ||
e27c7292 | 749 | if (ac->pdata.ev_type == EV_REL) { |
8f275fc7 DT |
750 | input_set_capability(input_dev, EV_REL, REL_X); |
751 | input_set_capability(input_dev, EV_REL, REL_Y); | |
752 | input_set_capability(input_dev, EV_REL, REL_Z); | |
e27c7292 MH |
753 | } else { |
754 | /* EV_ABS */ | |
e27c7292 MH |
755 | if (pdata->data_range & FULL_RES) |
756 | range = ADXL_FULLRES_MAX_VAL; /* Signed 13-bit */ | |
757 | else | |
758 | range = ADXL_FIXEDRES_MAX_VAL; /* Signed 10-bit */ | |
759 | ||
760 | input_set_abs_params(input_dev, ABS_X, -range, range, 3, 3); | |
761 | input_set_abs_params(input_dev, ABS_Y, -range, range, 3, 3); | |
762 | input_set_abs_params(input_dev, ABS_Z, -range, range, 3, 3); | |
763 | } | |
764 | ||
8f275fc7 DT |
765 | input_set_capability(input_dev, EV_KEY, pdata->ev_code_tap[ADXL_X_AXIS]); |
766 | input_set_capability(input_dev, EV_KEY, pdata->ev_code_tap[ADXL_Y_AXIS]); | |
767 | input_set_capability(input_dev, EV_KEY, pdata->ev_code_tap[ADXL_Z_AXIS]); | |
e27c7292 MH |
768 | |
769 | if (pdata->ev_code_ff) { | |
770 | ac->int_mask = FREE_FALL; | |
8f275fc7 | 771 | input_set_capability(input_dev, EV_KEY, pdata->ev_code_ff); |
e27c7292 MH |
772 | } |
773 | ||
774 | if (pdata->ev_code_act_inactivity) | |
8f275fc7 DT |
775 | input_set_capability(input_dev, EV_KEY, |
776 | pdata->ev_code_act_inactivity); | |
e27c7292 MH |
777 | |
778 | ac->int_mask |= ACTIVITY | INACTIVITY; | |
779 | ||
780 | if (pdata->watermark) { | |
781 | ac->int_mask |= WATERMARK; | |
1dbc080c | 782 | if (FIFO_MODE(pdata->fifo_mode) == FIFO_BYPASS) |
e27c7292 MH |
783 | ac->pdata.fifo_mode |= FIFO_STREAM; |
784 | } else { | |
785 | ac->int_mask |= DATA_READY; | |
786 | } | |
787 | ||
788 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
789 | ac->int_mask |= SINGLE_TAP | DOUBLE_TAP; | |
790 | ||
791 | if (FIFO_MODE(pdata->fifo_mode) == FIFO_BYPASS) | |
792 | ac->fifo_delay = false; | |
793 | ||
ad4e58b0 | 794 | AC_WRITE(ac, POWER_CTL, 0); |
e27c7292 | 795 | |
985addc1 DT |
796 | error = devm_request_threaded_irq(dev, ac->irq, NULL, adxl34x_irq, |
797 | IRQF_ONESHOT, dev_name(dev), ac); | |
798 | if (error) { | |
e27c7292 | 799 | dev_err(dev, "irq %d busy?\n", ac->irq); |
985addc1 | 800 | return ERR_PTR(error); |
e27c7292 MH |
801 | } |
802 | ||
985addc1 DT |
803 | error = input_register_device(input_dev); |
804 | if (error) | |
805 | return ERR_PTR(error); | |
e27c7292 | 806 | |
e27c7292 MH |
807 | AC_WRITE(ac, OFSX, pdata->x_axis_offset); |
808 | ac->hwcal.x = pdata->x_axis_offset; | |
809 | AC_WRITE(ac, OFSY, pdata->y_axis_offset); | |
810 | ac->hwcal.y = pdata->y_axis_offset; | |
811 | AC_WRITE(ac, OFSZ, pdata->z_axis_offset); | |
812 | ac->hwcal.z = pdata->z_axis_offset; | |
813 | AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold); | |
814 | AC_WRITE(ac, DUR, pdata->tap_duration); | |
815 | AC_WRITE(ac, LATENT, pdata->tap_latency); | |
816 | AC_WRITE(ac, WINDOW, pdata->tap_window); | |
817 | AC_WRITE(ac, THRESH_ACT, pdata->activity_threshold); | |
818 | AC_WRITE(ac, THRESH_INACT, pdata->inactivity_threshold); | |
819 | AC_WRITE(ac, TIME_INACT, pdata->inactivity_time); | |
820 | AC_WRITE(ac, THRESH_FF, pdata->free_fall_threshold); | |
821 | AC_WRITE(ac, TIME_FF, pdata->free_fall_time); | |
822 | AC_WRITE(ac, TAP_AXES, pdata->tap_axis_control); | |
823 | AC_WRITE(ac, ACT_INACT_CTL, pdata->act_axis_control); | |
824 | AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) | | |
825 | (pdata->low_power_mode ? LOW_POWER : 0)); | |
826 | AC_WRITE(ac, DATA_FORMAT, pdata->data_range); | |
827 | AC_WRITE(ac, FIFO_CTL, FIFO_MODE(pdata->fifo_mode) | | |
828 | SAMPLES(pdata->watermark)); | |
829 | ||
671386bb | 830 | if (pdata->use_int2) { |
e27c7292 MH |
831 | /* Map all INTs to INT2 */ |
832 | AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN); | |
671386bb | 833 | } else { |
e27c7292 MH |
834 | /* Map all INTs to INT1 */ |
835 | AC_WRITE(ac, INT_MAP, 0); | |
671386bb MH |
836 | } |
837 | ||
838 | if (ac->model == 346 && ac->pdata.orientation_enable) { | |
839 | AC_WRITE(ac, ORIENT_CONF, | |
840 | ORIENT_DEADZONE(ac->pdata.deadzone_angle) | | |
841 | ORIENT_DIVISOR(ac->pdata.divisor_length)); | |
842 | ||
843 | ac->orient2d_saved = 1234; | |
844 | ac->orient3d_saved = 1234; | |
845 | ||
846 | if (pdata->orientation_enable & ADXL_EN_ORIENTATION_3D) | |
847 | for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_3d); i++) | |
8f275fc7 DT |
848 | input_set_capability(input_dev, EV_KEY, |
849 | pdata->ev_codes_orient_3d[i]); | |
671386bb MH |
850 | |
851 | if (pdata->orientation_enable & ADXL_EN_ORIENTATION_2D) | |
852 | for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_2d); i++) | |
8f275fc7 DT |
853 | input_set_capability(input_dev, EV_KEY, |
854 | pdata->ev_codes_orient_2d[i]); | |
671386bb MH |
855 | } else { |
856 | ac->pdata.orientation_enable = 0; | |
857 | } | |
e27c7292 MH |
858 | |
859 | AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN); | |
860 | ||
861 | ac->pdata.power_mode &= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
862 | ||
863 | return ac; | |
e27c7292 MH |
864 | } |
865 | EXPORT_SYMBOL_GPL(adxl34x_probe); | |
866 | ||
40be0646 JC |
867 | EXPORT_GPL_SIMPLE_DEV_PM_OPS(adxl34x_pm, adxl34x_suspend, adxl34x_resume); |
868 | ||
e27c7292 MH |
869 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
870 | MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer Driver"); | |
871 | MODULE_LICENSE("GPL"); |