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e27c7292 MH |
1 | /* |
2 | * ADXL345/346 Three-Axis Digital Accelerometers | |
3 | * | |
4 | * Enter bugs at http://blackfin.uclinux.org/ | |
5 | * | |
6 | * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc. | |
7 | * Licensed under the GPL-2 or later. | |
8 | */ | |
9 | ||
10 | #include <linux/device.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/input.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/irq.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/workqueue.h> | |
18 | #include <linux/input/adxl34x.h> | |
19 | ||
20 | #include "adxl34x.h" | |
21 | ||
22 | /* ADXL345/6 Register Map */ | |
23 | #define DEVID 0x00 /* R Device ID */ | |
24 | #define THRESH_TAP 0x1D /* R/W Tap threshold */ | |
25 | #define OFSX 0x1E /* R/W X-axis offset */ | |
26 | #define OFSY 0x1F /* R/W Y-axis offset */ | |
27 | #define OFSZ 0x20 /* R/W Z-axis offset */ | |
28 | #define DUR 0x21 /* R/W Tap duration */ | |
29 | #define LATENT 0x22 /* R/W Tap latency */ | |
30 | #define WINDOW 0x23 /* R/W Tap window */ | |
31 | #define THRESH_ACT 0x24 /* R/W Activity threshold */ | |
32 | #define THRESH_INACT 0x25 /* R/W Inactivity threshold */ | |
33 | #define TIME_INACT 0x26 /* R/W Inactivity time */ | |
34 | #define ACT_INACT_CTL 0x27 /* R/W Axis enable control for activity and */ | |
35 | /* inactivity detection */ | |
36 | #define THRESH_FF 0x28 /* R/W Free-fall threshold */ | |
37 | #define TIME_FF 0x29 /* R/W Free-fall time */ | |
38 | #define TAP_AXES 0x2A /* R/W Axis control for tap/double tap */ | |
39 | #define ACT_TAP_STATUS 0x2B /* R Source of tap/double tap */ | |
40 | #define BW_RATE 0x2C /* R/W Data rate and power mode control */ | |
41 | #define POWER_CTL 0x2D /* R/W Power saving features control */ | |
42 | #define INT_ENABLE 0x2E /* R/W Interrupt enable control */ | |
43 | #define INT_MAP 0x2F /* R/W Interrupt mapping control */ | |
44 | #define INT_SOURCE 0x30 /* R Source of interrupts */ | |
45 | #define DATA_FORMAT 0x31 /* R/W Data format control */ | |
46 | #define DATAX0 0x32 /* R X-Axis Data 0 */ | |
47 | #define DATAX1 0x33 /* R X-Axis Data 1 */ | |
48 | #define DATAY0 0x34 /* R Y-Axis Data 0 */ | |
49 | #define DATAY1 0x35 /* R Y-Axis Data 1 */ | |
50 | #define DATAZ0 0x36 /* R Z-Axis Data 0 */ | |
51 | #define DATAZ1 0x37 /* R Z-Axis Data 1 */ | |
52 | #define FIFO_CTL 0x38 /* R/W FIFO control */ | |
53 | #define FIFO_STATUS 0x39 /* R FIFO status */ | |
54 | #define TAP_SIGN 0x3A /* R Sign and source for tap/double tap */ | |
55 | /* Orientation ADXL346 only */ | |
56 | #define ORIENT_CONF 0x3B /* R/W Orientation configuration */ | |
57 | #define ORIENT 0x3C /* R Orientation status */ | |
58 | ||
59 | /* DEVIDs */ | |
60 | #define ID_ADXL345 0xE5 | |
61 | #define ID_ADXL346 0xE6 | |
62 | ||
63 | /* INT_ENABLE/INT_MAP/INT_SOURCE Bits */ | |
64 | #define DATA_READY (1 << 7) | |
65 | #define SINGLE_TAP (1 << 6) | |
66 | #define DOUBLE_TAP (1 << 5) | |
67 | #define ACTIVITY (1 << 4) | |
68 | #define INACTIVITY (1 << 3) | |
69 | #define FREE_FALL (1 << 2) | |
70 | #define WATERMARK (1 << 1) | |
71 | #define OVERRUN (1 << 0) | |
72 | ||
73 | /* ACT_INACT_CONTROL Bits */ | |
74 | #define ACT_ACDC (1 << 7) | |
75 | #define ACT_X_EN (1 << 6) | |
76 | #define ACT_Y_EN (1 << 5) | |
77 | #define ACT_Z_EN (1 << 4) | |
78 | #define INACT_ACDC (1 << 3) | |
79 | #define INACT_X_EN (1 << 2) | |
80 | #define INACT_Y_EN (1 << 1) | |
81 | #define INACT_Z_EN (1 << 0) | |
82 | ||
83 | /* TAP_AXES Bits */ | |
84 | #define SUPPRESS (1 << 3) | |
85 | #define TAP_X_EN (1 << 2) | |
86 | #define TAP_Y_EN (1 << 1) | |
87 | #define TAP_Z_EN (1 << 0) | |
88 | ||
89 | /* ACT_TAP_STATUS Bits */ | |
90 | #define ACT_X_SRC (1 << 6) | |
91 | #define ACT_Y_SRC (1 << 5) | |
92 | #define ACT_Z_SRC (1 << 4) | |
93 | #define ASLEEP (1 << 3) | |
94 | #define TAP_X_SRC (1 << 2) | |
95 | #define TAP_Y_SRC (1 << 1) | |
96 | #define TAP_Z_SRC (1 << 0) | |
97 | ||
98 | /* BW_RATE Bits */ | |
99 | #define LOW_POWER (1 << 4) | |
100 | #define RATE(x) ((x) & 0xF) | |
101 | ||
102 | /* POWER_CTL Bits */ | |
103 | #define PCTL_LINK (1 << 5) | |
104 | #define PCTL_AUTO_SLEEP (1 << 4) | |
105 | #define PCTL_MEASURE (1 << 3) | |
106 | #define PCTL_SLEEP (1 << 2) | |
107 | #define PCTL_WAKEUP(x) ((x) & 0x3) | |
108 | ||
109 | /* DATA_FORMAT Bits */ | |
110 | #define SELF_TEST (1 << 7) | |
111 | #define SPI (1 << 6) | |
112 | #define INT_INVERT (1 << 5) | |
113 | #define FULL_RES (1 << 3) | |
114 | #define JUSTIFY (1 << 2) | |
115 | #define RANGE(x) ((x) & 0x3) | |
116 | #define RANGE_PM_2g 0 | |
117 | #define RANGE_PM_4g 1 | |
118 | #define RANGE_PM_8g 2 | |
119 | #define RANGE_PM_16g 3 | |
120 | ||
121 | /* | |
122 | * Maximum value our axis may get in full res mode for the input device | |
123 | * (signed 13 bits) | |
124 | */ | |
125 | #define ADXL_FULLRES_MAX_VAL 4096 | |
126 | ||
127 | /* | |
128 | * Maximum value our axis may get in fixed res mode for the input device | |
129 | * (signed 10 bits) | |
130 | */ | |
131 | #define ADXL_FIXEDRES_MAX_VAL 512 | |
132 | ||
133 | /* FIFO_CTL Bits */ | |
134 | #define FIFO_MODE(x) (((x) & 0x3) << 6) | |
135 | #define FIFO_BYPASS 0 | |
136 | #define FIFO_FIFO 1 | |
137 | #define FIFO_STREAM 2 | |
138 | #define FIFO_TRIGGER 3 | |
139 | #define TRIGGER (1 << 5) | |
140 | #define SAMPLES(x) ((x) & 0x1F) | |
141 | ||
142 | /* FIFO_STATUS Bits */ | |
143 | #define FIFO_TRIG (1 << 7) | |
144 | #define ENTRIES(x) ((x) & 0x3F) | |
145 | ||
146 | /* TAP_SIGN Bits ADXL346 only */ | |
147 | #define XSIGN (1 << 6) | |
148 | #define YSIGN (1 << 5) | |
149 | #define ZSIGN (1 << 4) | |
150 | #define XTAP (1 << 3) | |
151 | #define YTAP (1 << 2) | |
152 | #define ZTAP (1 << 1) | |
153 | ||
154 | /* ORIENT_CONF ADXL346 only */ | |
155 | #define ORIENT_DEADZONE(x) (((x) & 0x7) << 4) | |
156 | #define ORIENT_DIVISOR(x) ((x) & 0x7) | |
157 | ||
158 | /* ORIENT ADXL346 only */ | |
159 | #define ADXL346_2D_VALID (1 << 6) | |
160 | #define ADXL346_2D_ORIENT(x) (((x) & 0x3) >> 4) | |
161 | #define ADXL346_3D_VALID (1 << 3) | |
162 | #define ADXL346_3D_ORIENT(x) ((x) & 0x7) | |
163 | #define ADXL346_2D_PORTRAIT_POS 0 /* +X */ | |
164 | #define ADXL346_2D_PORTRAIT_NEG 1 /* -X */ | |
165 | #define ADXL346_2D_LANDSCAPE_POS 2 /* +Y */ | |
166 | #define ADXL346_2D_LANDSCAPE_NEG 3 /* -Y */ | |
167 | ||
168 | #define ADXL346_3D_FRONT 3 /* +X */ | |
169 | #define ADXL346_3D_BACK 4 /* -X */ | |
170 | #define ADXL346_3D_RIGHT 2 /* +Y */ | |
171 | #define ADXL346_3D_LEFT 5 /* -Y */ | |
172 | #define ADXL346_3D_TOP 1 /* +Z */ | |
173 | #define ADXL346_3D_BOTTOM 6 /* -Z */ | |
174 | ||
175 | #undef ADXL_DEBUG | |
176 | ||
177 | #define ADXL_X_AXIS 0 | |
178 | #define ADXL_Y_AXIS 1 | |
179 | #define ADXL_Z_AXIS 2 | |
180 | ||
181 | #define AC_READ(ac, reg) ((ac)->bops->read((ac)->dev, reg)) | |
182 | #define AC_WRITE(ac, reg, val) ((ac)->bops->write((ac)->dev, reg, val)) | |
183 | ||
184 | struct axis_triple { | |
185 | int x; | |
186 | int y; | |
187 | int z; | |
188 | }; | |
189 | ||
190 | struct adxl34x { | |
191 | struct device *dev; | |
192 | struct input_dev *input; | |
193 | struct mutex mutex; /* reentrant protection for struct */ | |
194 | struct adxl34x_platform_data pdata; | |
195 | struct axis_triple swcal; | |
196 | struct axis_triple hwcal; | |
197 | struct axis_triple saved; | |
198 | char phys[32]; | |
199 | bool disabled; /* P: mutex */ | |
200 | bool opened; /* P: mutex */ | |
201 | bool fifo_delay; | |
202 | int irq; | |
203 | unsigned model; | |
204 | unsigned int_mask; | |
205 | ||
206 | const struct adxl34x_bus_ops *bops; | |
207 | }; | |
208 | ||
209 | static const struct adxl34x_platform_data adxl34x_default_init = { | |
210 | .tap_threshold = 35, | |
211 | .tap_duration = 3, | |
212 | .tap_latency = 20, | |
213 | .tap_window = 20, | |
214 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | |
215 | .act_axis_control = 0xFF, | |
216 | .activity_threshold = 6, | |
217 | .inactivity_threshold = 4, | |
218 | .inactivity_time = 3, | |
219 | .free_fall_threshold = 8, | |
220 | .free_fall_time = 0x20, | |
221 | .data_rate = 8, | |
222 | .data_range = ADXL_FULL_RES, | |
223 | ||
224 | .ev_type = EV_ABS, | |
225 | .ev_code_x = ABS_X, /* EV_REL */ | |
226 | .ev_code_y = ABS_Y, /* EV_REL */ | |
227 | .ev_code_z = ABS_Z, /* EV_REL */ | |
228 | ||
229 | .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY {x,y,z} */ | |
230 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | |
231 | .fifo_mode = FIFO_STREAM, | |
232 | .watermark = 0, | |
233 | }; | |
234 | ||
235 | static void adxl34x_get_triple(struct adxl34x *ac, struct axis_triple *axis) | |
236 | { | |
237 | short buf[3]; | |
238 | ||
239 | ac->bops->read_block(ac->dev, DATAX0, DATAZ1 - DATAX0 + 1, buf); | |
240 | ||
241 | mutex_lock(&ac->mutex); | |
242 | ac->saved.x = (s16) le16_to_cpu(buf[0]); | |
243 | axis->x = ac->saved.x; | |
244 | ||
245 | ac->saved.y = (s16) le16_to_cpu(buf[1]); | |
246 | axis->y = ac->saved.y; | |
247 | ||
248 | ac->saved.z = (s16) le16_to_cpu(buf[2]); | |
249 | axis->z = ac->saved.z; | |
250 | mutex_unlock(&ac->mutex); | |
251 | } | |
252 | ||
253 | static void adxl34x_service_ev_fifo(struct adxl34x *ac) | |
254 | { | |
255 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
256 | struct axis_triple axis; | |
257 | ||
258 | adxl34x_get_triple(ac, &axis); | |
259 | ||
260 | input_event(ac->input, pdata->ev_type, pdata->ev_code_x, | |
261 | axis.x - ac->swcal.x); | |
262 | input_event(ac->input, pdata->ev_type, pdata->ev_code_y, | |
263 | axis.y - ac->swcal.y); | |
264 | input_event(ac->input, pdata->ev_type, pdata->ev_code_z, | |
265 | axis.z - ac->swcal.z); | |
266 | } | |
267 | ||
268 | static void adxl34x_report_key_single(struct input_dev *input, int key) | |
269 | { | |
270 | input_report_key(input, key, true); | |
271 | input_sync(input); | |
272 | input_report_key(input, key, false); | |
273 | } | |
274 | ||
275 | static void adxl34x_send_key_events(struct adxl34x *ac, | |
276 | struct adxl34x_platform_data *pdata, int status, int press) | |
277 | { | |
278 | int i; | |
279 | ||
280 | for (i = ADXL_X_AXIS; i <= ADXL_Z_AXIS; i++) { | |
281 | if (status & (1 << (ADXL_Z_AXIS - i))) | |
282 | input_report_key(ac->input, | |
283 | pdata->ev_code_tap[i], press); | |
284 | } | |
285 | } | |
286 | ||
287 | static void adxl34x_do_tap(struct adxl34x *ac, | |
288 | struct adxl34x_platform_data *pdata, int status) | |
289 | { | |
290 | adxl34x_send_key_events(ac, pdata, status, true); | |
291 | input_sync(ac->input); | |
292 | adxl34x_send_key_events(ac, pdata, status, false); | |
293 | } | |
294 | ||
295 | static irqreturn_t adxl34x_irq(int irq, void *handle) | |
296 | { | |
297 | struct adxl34x *ac = handle; | |
298 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
299 | int int_stat, tap_stat, samples; | |
300 | ||
301 | /* | |
302 | * ACT_TAP_STATUS should be read before clearing the interrupt | |
303 | * Avoid reading ACT_TAP_STATUS in case TAP detection is disabled | |
304 | */ | |
305 | ||
306 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
307 | tap_stat = AC_READ(ac, ACT_TAP_STATUS); | |
308 | else | |
309 | tap_stat = 0; | |
310 | ||
311 | int_stat = AC_READ(ac, INT_SOURCE); | |
312 | ||
313 | if (int_stat & FREE_FALL) | |
314 | adxl34x_report_key_single(ac->input, pdata->ev_code_ff); | |
315 | ||
316 | if (int_stat & OVERRUN) | |
317 | dev_dbg(ac->dev, "OVERRUN\n"); | |
318 | ||
319 | if (int_stat & (SINGLE_TAP | DOUBLE_TAP)) { | |
320 | adxl34x_do_tap(ac, pdata, tap_stat); | |
321 | ||
322 | if (int_stat & DOUBLE_TAP) | |
323 | adxl34x_do_tap(ac, pdata, tap_stat); | |
324 | } | |
325 | ||
326 | if (pdata->ev_code_act_inactivity) { | |
327 | if (int_stat & ACTIVITY) | |
328 | input_report_key(ac->input, | |
329 | pdata->ev_code_act_inactivity, 1); | |
330 | if (int_stat & INACTIVITY) | |
331 | input_report_key(ac->input, | |
332 | pdata->ev_code_act_inactivity, 0); | |
333 | } | |
334 | ||
335 | if (int_stat & (DATA_READY | WATERMARK)) { | |
336 | ||
337 | if (pdata->fifo_mode) | |
338 | samples = ENTRIES(AC_READ(ac, FIFO_STATUS)) + 1; | |
339 | else | |
340 | samples = 1; | |
341 | ||
342 | for (; samples > 0; samples--) { | |
343 | adxl34x_service_ev_fifo(ac); | |
344 | /* | |
345 | * To ensure that the FIFO has | |
346 | * completely popped, there must be at least 5 us between | |
347 | * the end of reading the data registers, signified by the | |
348 | * transition to register 0x38 from 0x37 or the CS pin | |
349 | * going high, and the start of new reads of the FIFO or | |
350 | * reading the FIFO_STATUS register. For SPI operation at | |
351 | * 1.5 MHz or lower, the register addressing portion of the | |
352 | * transmission is sufficient delay to ensure the FIFO has | |
353 | * completely popped. It is necessary for SPI operation | |
354 | * greater than 1.5 MHz to de-assert the CS pin to ensure a | |
355 | * total of 5 us, which is at most 3.4 us at 5 MHz | |
356 | * operation. | |
357 | */ | |
358 | if (ac->fifo_delay && (samples > 1)) | |
359 | udelay(3); | |
360 | } | |
361 | } | |
362 | ||
363 | input_sync(ac->input); | |
364 | ||
365 | return IRQ_HANDLED; | |
366 | } | |
367 | ||
368 | static void __adxl34x_disable(struct adxl34x *ac) | |
369 | { | |
370 | if (!ac->disabled && ac->opened) { | |
371 | /* | |
372 | * A '0' places the ADXL34x into standby mode | |
373 | * with minimum power consumption. | |
374 | */ | |
375 | AC_WRITE(ac, POWER_CTL, 0); | |
376 | ||
377 | ac->disabled = true; | |
378 | } | |
379 | } | |
380 | ||
381 | static void __adxl34x_enable(struct adxl34x *ac) | |
382 | { | |
383 | if (ac->disabled && ac->opened) { | |
384 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); | |
385 | ac->disabled = false; | |
386 | } | |
387 | } | |
388 | ||
389 | void adxl34x_disable(struct adxl34x *ac) | |
390 | { | |
391 | mutex_lock(&ac->mutex); | |
392 | __adxl34x_disable(ac); | |
393 | mutex_unlock(&ac->mutex); | |
394 | } | |
395 | EXPORT_SYMBOL_GPL(adxl34x_disable); | |
396 | ||
397 | void adxl34x_enable(struct adxl34x *ac) | |
398 | { | |
399 | mutex_lock(&ac->mutex); | |
400 | __adxl34x_enable(ac); | |
401 | mutex_unlock(&ac->mutex); | |
402 | } | |
403 | ||
404 | EXPORT_SYMBOL_GPL(adxl34x_enable); | |
405 | ||
406 | static ssize_t adxl34x_disable_show(struct device *dev, | |
407 | struct device_attribute *attr, char *buf) | |
408 | { | |
409 | struct adxl34x *ac = dev_get_drvdata(dev); | |
410 | ||
411 | return sprintf(buf, "%u\n", ac->disabled); | |
412 | } | |
413 | ||
414 | static ssize_t adxl34x_disable_store(struct device *dev, | |
415 | struct device_attribute *attr, | |
416 | const char *buf, size_t count) | |
417 | { | |
418 | struct adxl34x *ac = dev_get_drvdata(dev); | |
419 | unsigned long val; | |
420 | int error; | |
421 | ||
422 | error = strict_strtoul(buf, 10, &val); | |
423 | if (error) | |
424 | return error; | |
425 | ||
426 | if (val) | |
427 | adxl34x_disable(ac); | |
428 | else | |
429 | adxl34x_enable(ac); | |
430 | ||
431 | return count; | |
432 | } | |
433 | ||
434 | static DEVICE_ATTR(disable, 0664, adxl34x_disable_show, adxl34x_disable_store); | |
435 | ||
436 | static ssize_t adxl34x_calibrate_show(struct device *dev, | |
437 | struct device_attribute *attr, char *buf) | |
438 | { | |
439 | struct adxl34x *ac = dev_get_drvdata(dev); | |
440 | ssize_t count; | |
441 | ||
442 | mutex_lock(&ac->mutex); | |
443 | count = sprintf(buf, "%d,%d,%d\n", | |
444 | ac->hwcal.x * 4 + ac->swcal.x, | |
445 | ac->hwcal.y * 4 + ac->swcal.y, | |
446 | ac->hwcal.z * 4 + ac->swcal.z); | |
447 | mutex_unlock(&ac->mutex); | |
448 | ||
449 | return count; | |
450 | } | |
451 | ||
452 | static ssize_t adxl34x_calibrate_store(struct device *dev, | |
453 | struct device_attribute *attr, | |
454 | const char *buf, size_t count) | |
455 | { | |
456 | struct adxl34x *ac = dev_get_drvdata(dev); | |
457 | ||
458 | /* | |
459 | * Hardware offset calibration has a resolution of 15.6 mg/LSB. | |
460 | * We use HW calibration and handle the remaining bits in SW. (4mg/LSB) | |
461 | */ | |
462 | ||
463 | mutex_lock(&ac->mutex); | |
464 | ac->hwcal.x -= (ac->saved.x / 4); | |
465 | ac->swcal.x = ac->saved.x % 4; | |
466 | ||
467 | ac->hwcal.y -= (ac->saved.y / 4); | |
468 | ac->swcal.y = ac->saved.y % 4; | |
469 | ||
470 | ac->hwcal.z -= (ac->saved.z / 4); | |
471 | ac->swcal.z = ac->saved.z % 4; | |
472 | ||
473 | AC_WRITE(ac, OFSX, (s8) ac->hwcal.x); | |
474 | AC_WRITE(ac, OFSY, (s8) ac->hwcal.y); | |
475 | AC_WRITE(ac, OFSZ, (s8) ac->hwcal.z); | |
476 | mutex_unlock(&ac->mutex); | |
477 | ||
478 | return count; | |
479 | } | |
480 | ||
481 | static DEVICE_ATTR(calibrate, 0664, | |
482 | adxl34x_calibrate_show, adxl34x_calibrate_store); | |
483 | ||
484 | static ssize_t adxl34x_rate_show(struct device *dev, | |
485 | struct device_attribute *attr, char *buf) | |
486 | { | |
487 | struct adxl34x *ac = dev_get_drvdata(dev); | |
488 | ||
489 | return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate)); | |
490 | } | |
491 | ||
492 | static ssize_t adxl34x_rate_store(struct device *dev, | |
493 | struct device_attribute *attr, | |
494 | const char *buf, size_t count) | |
495 | { | |
496 | struct adxl34x *ac = dev_get_drvdata(dev); | |
497 | unsigned long val; | |
498 | int error; | |
499 | ||
500 | error = strict_strtoul(buf, 10, &val); | |
501 | if (error) | |
502 | return error; | |
503 | ||
504 | mutex_lock(&ac->mutex); | |
505 | ||
506 | ac->pdata.data_rate = RATE(val); | |
507 | AC_WRITE(ac, BW_RATE, | |
508 | ac->pdata.data_rate | | |
509 | (ac->pdata.low_power_mode ? LOW_POWER : 0)); | |
510 | ||
511 | mutex_unlock(&ac->mutex); | |
512 | ||
513 | return count; | |
514 | } | |
515 | ||
516 | static DEVICE_ATTR(rate, 0664, adxl34x_rate_show, adxl34x_rate_store); | |
517 | ||
518 | static ssize_t adxl34x_autosleep_show(struct device *dev, | |
519 | struct device_attribute *attr, char *buf) | |
520 | { | |
521 | struct adxl34x *ac = dev_get_drvdata(dev); | |
522 | ||
523 | return sprintf(buf, "%u\n", | |
524 | ac->pdata.power_mode & (PCTL_AUTO_SLEEP | PCTL_LINK) ? 1 : 0); | |
525 | } | |
526 | ||
527 | static ssize_t adxl34x_autosleep_store(struct device *dev, | |
528 | struct device_attribute *attr, | |
529 | const char *buf, size_t count) | |
530 | { | |
531 | struct adxl34x *ac = dev_get_drvdata(dev); | |
532 | unsigned long val; | |
533 | int error; | |
534 | ||
535 | error = strict_strtoul(buf, 10, &val); | |
536 | if (error) | |
537 | return error; | |
538 | ||
539 | mutex_lock(&ac->mutex); | |
540 | ||
541 | if (val) | |
542 | ac->pdata.power_mode |= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
543 | else | |
544 | ac->pdata.power_mode &= ~(PCTL_AUTO_SLEEP | PCTL_LINK); | |
545 | ||
546 | if (!ac->disabled && ac->opened) | |
547 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); | |
548 | ||
549 | mutex_unlock(&ac->mutex); | |
550 | ||
551 | return count; | |
552 | } | |
553 | ||
554 | static DEVICE_ATTR(autosleep, 0664, | |
555 | adxl34x_autosleep_show, adxl34x_autosleep_store); | |
556 | ||
557 | static ssize_t adxl34x_position_show(struct device *dev, | |
558 | struct device_attribute *attr, char *buf) | |
559 | { | |
560 | struct adxl34x *ac = dev_get_drvdata(dev); | |
561 | ssize_t count; | |
562 | ||
563 | mutex_lock(&ac->mutex); | |
564 | count = sprintf(buf, "(%d, %d, %d)\n", | |
565 | ac->saved.x, ac->saved.y, ac->saved.z); | |
566 | mutex_unlock(&ac->mutex); | |
567 | ||
568 | return count; | |
569 | } | |
570 | ||
571 | static DEVICE_ATTR(position, S_IRUGO, adxl34x_position_show, NULL); | |
572 | ||
573 | #ifdef ADXL_DEBUG | |
574 | static ssize_t adxl34x_write_store(struct device *dev, | |
575 | struct device_attribute *attr, | |
576 | const char *buf, size_t count) | |
577 | { | |
578 | struct adxl34x *ac = dev_get_drvdata(dev); | |
579 | unsigned long val; | |
580 | int error; | |
581 | ||
582 | /* | |
583 | * This allows basic ADXL register write access for debug purposes. | |
584 | */ | |
585 | error = strict_strtoul(buf, 16, &val); | |
586 | if (error) | |
587 | return error; | |
588 | ||
589 | mutex_lock(&ac->mutex); | |
590 | AC_WRITE(ac, val >> 8, val & 0xFF); | |
591 | mutex_unlock(&ac->mutex); | |
592 | ||
593 | return count; | |
594 | } | |
595 | ||
596 | static DEVICE_ATTR(write, 0664, NULL, adxl34x_write_store); | |
597 | #endif | |
598 | ||
599 | static struct attribute *adxl34x_attributes[] = { | |
600 | &dev_attr_disable.attr, | |
601 | &dev_attr_calibrate.attr, | |
602 | &dev_attr_rate.attr, | |
603 | &dev_attr_autosleep.attr, | |
604 | &dev_attr_position.attr, | |
605 | #ifdef ADXL_DEBUG | |
606 | &dev_attr_write.attr, | |
607 | #endif | |
608 | NULL | |
609 | }; | |
610 | ||
611 | static const struct attribute_group adxl34x_attr_group = { | |
612 | .attrs = adxl34x_attributes, | |
613 | }; | |
614 | ||
615 | static int adxl34x_input_open(struct input_dev *input) | |
616 | { | |
617 | struct adxl34x *ac = input_get_drvdata(input); | |
618 | ||
619 | mutex_lock(&ac->mutex); | |
620 | ac->opened = true; | |
621 | __adxl34x_enable(ac); | |
622 | mutex_unlock(&ac->mutex); | |
623 | ||
624 | return 0; | |
625 | } | |
626 | ||
627 | static void adxl34x_input_close(struct input_dev *input) | |
628 | { | |
629 | struct adxl34x *ac = input_get_drvdata(input); | |
630 | ||
631 | mutex_lock(&ac->mutex); | |
632 | __adxl34x_disable(ac); | |
633 | ac->opened = false; | |
634 | mutex_unlock(&ac->mutex); | |
635 | } | |
636 | ||
637 | struct adxl34x *adxl34x_probe(struct device *dev, int irq, | |
638 | bool fifo_delay_default, | |
639 | const struct adxl34x_bus_ops *bops) | |
640 | { | |
641 | struct adxl34x *ac; | |
642 | struct input_dev *input_dev; | |
643 | const struct adxl34x_platform_data *pdata; | |
644 | int err, range; | |
645 | unsigned char revid; | |
646 | ||
647 | if (!irq) { | |
648 | dev_err(dev, "no IRQ?\n"); | |
649 | err = -ENODEV; | |
650 | goto err_out; | |
651 | } | |
652 | ||
653 | ac = kzalloc(sizeof(*ac), GFP_KERNEL); | |
654 | input_dev = input_allocate_device(); | |
655 | if (!ac || !input_dev) { | |
656 | err = -ENOMEM; | |
657 | goto err_out; | |
658 | } | |
659 | ||
660 | ac->fifo_delay = fifo_delay_default; | |
661 | ||
662 | pdata = dev->platform_data; | |
663 | if (!pdata) { | |
664 | dev_dbg(dev, | |
665 | "No platfrom data: Using default initialization\n"); | |
666 | pdata = &adxl34x_default_init; | |
667 | } | |
668 | ||
669 | ac->pdata = *pdata; | |
670 | pdata = &ac->pdata; | |
671 | ||
672 | ac->input = input_dev; | |
673 | ac->disabled = true; | |
674 | ac->dev = dev; | |
675 | ac->irq = irq; | |
676 | ac->bops = bops; | |
677 | ||
678 | mutex_init(&ac->mutex); | |
679 | ||
680 | input_dev->name = "ADXL34x accelerometer"; | |
681 | revid = ac->bops->read(dev, DEVID); | |
682 | ||
683 | switch (revid) { | |
684 | case ID_ADXL345: | |
685 | ac->model = 345; | |
686 | break; | |
687 | case ID_ADXL346: | |
688 | ac->model = 346; | |
689 | break; | |
690 | default: | |
691 | dev_err(dev, "Failed to probe %s\n", input_dev->name); | |
692 | err = -ENODEV; | |
693 | goto err_free_mem; | |
694 | } | |
695 | ||
696 | snprintf(ac->phys, sizeof(ac->phys), "%s/input0", dev_name(dev)); | |
697 | ||
698 | input_dev->phys = ac->phys; | |
699 | input_dev->dev.parent = dev; | |
700 | input_dev->id.product = ac->model; | |
701 | input_dev->id.bustype = bops->bustype; | |
702 | input_dev->open = adxl34x_input_open; | |
703 | input_dev->close = adxl34x_input_close; | |
704 | ||
705 | input_set_drvdata(input_dev, ac); | |
706 | ||
707 | __set_bit(ac->pdata.ev_type, input_dev->evbit); | |
708 | ||
709 | if (ac->pdata.ev_type == EV_REL) { | |
710 | __set_bit(REL_X, input_dev->relbit); | |
711 | __set_bit(REL_Y, input_dev->relbit); | |
712 | __set_bit(REL_Z, input_dev->relbit); | |
713 | } else { | |
714 | /* EV_ABS */ | |
715 | __set_bit(ABS_X, input_dev->absbit); | |
716 | __set_bit(ABS_Y, input_dev->absbit); | |
717 | __set_bit(ABS_Z, input_dev->absbit); | |
718 | ||
719 | if (pdata->data_range & FULL_RES) | |
720 | range = ADXL_FULLRES_MAX_VAL; /* Signed 13-bit */ | |
721 | else | |
722 | range = ADXL_FIXEDRES_MAX_VAL; /* Signed 10-bit */ | |
723 | ||
724 | input_set_abs_params(input_dev, ABS_X, -range, range, 3, 3); | |
725 | input_set_abs_params(input_dev, ABS_Y, -range, range, 3, 3); | |
726 | input_set_abs_params(input_dev, ABS_Z, -range, range, 3, 3); | |
727 | } | |
728 | ||
729 | __set_bit(EV_KEY, input_dev->evbit); | |
730 | __set_bit(pdata->ev_code_tap[ADXL_X_AXIS], input_dev->keybit); | |
731 | __set_bit(pdata->ev_code_tap[ADXL_Y_AXIS], input_dev->keybit); | |
732 | __set_bit(pdata->ev_code_tap[ADXL_Z_AXIS], input_dev->keybit); | |
733 | ||
734 | if (pdata->ev_code_ff) { | |
735 | ac->int_mask = FREE_FALL; | |
736 | __set_bit(pdata->ev_code_ff, input_dev->keybit); | |
737 | } | |
738 | ||
739 | if (pdata->ev_code_act_inactivity) | |
740 | __set_bit(pdata->ev_code_act_inactivity, input_dev->keybit); | |
741 | ||
742 | ac->int_mask |= ACTIVITY | INACTIVITY; | |
743 | ||
744 | if (pdata->watermark) { | |
745 | ac->int_mask |= WATERMARK; | |
746 | if (!FIFO_MODE(pdata->fifo_mode)) | |
747 | ac->pdata.fifo_mode |= FIFO_STREAM; | |
748 | } else { | |
749 | ac->int_mask |= DATA_READY; | |
750 | } | |
751 | ||
752 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
753 | ac->int_mask |= SINGLE_TAP | DOUBLE_TAP; | |
754 | ||
755 | if (FIFO_MODE(pdata->fifo_mode) == FIFO_BYPASS) | |
756 | ac->fifo_delay = false; | |
757 | ||
758 | ac->bops->write(dev, POWER_CTL, 0); | |
759 | ||
760 | err = request_threaded_irq(ac->irq, NULL, adxl34x_irq, | |
761 | IRQF_TRIGGER_HIGH | IRQF_ONESHOT, | |
762 | dev_name(dev), ac); | |
763 | if (err) { | |
764 | dev_err(dev, "irq %d busy?\n", ac->irq); | |
765 | goto err_free_mem; | |
766 | } | |
767 | ||
768 | err = sysfs_create_group(&dev->kobj, &adxl34x_attr_group); | |
769 | if (err) | |
770 | goto err_free_irq; | |
771 | ||
772 | err = input_register_device(input_dev); | |
773 | if (err) | |
774 | goto err_remove_attr; | |
775 | ||
776 | AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold); | |
777 | AC_WRITE(ac, OFSX, pdata->x_axis_offset); | |
778 | ac->hwcal.x = pdata->x_axis_offset; | |
779 | AC_WRITE(ac, OFSY, pdata->y_axis_offset); | |
780 | ac->hwcal.y = pdata->y_axis_offset; | |
781 | AC_WRITE(ac, OFSZ, pdata->z_axis_offset); | |
782 | ac->hwcal.z = pdata->z_axis_offset; | |
783 | AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold); | |
784 | AC_WRITE(ac, DUR, pdata->tap_duration); | |
785 | AC_WRITE(ac, LATENT, pdata->tap_latency); | |
786 | AC_WRITE(ac, WINDOW, pdata->tap_window); | |
787 | AC_WRITE(ac, THRESH_ACT, pdata->activity_threshold); | |
788 | AC_WRITE(ac, THRESH_INACT, pdata->inactivity_threshold); | |
789 | AC_WRITE(ac, TIME_INACT, pdata->inactivity_time); | |
790 | AC_WRITE(ac, THRESH_FF, pdata->free_fall_threshold); | |
791 | AC_WRITE(ac, TIME_FF, pdata->free_fall_time); | |
792 | AC_WRITE(ac, TAP_AXES, pdata->tap_axis_control); | |
793 | AC_WRITE(ac, ACT_INACT_CTL, pdata->act_axis_control); | |
794 | AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) | | |
795 | (pdata->low_power_mode ? LOW_POWER : 0)); | |
796 | AC_WRITE(ac, DATA_FORMAT, pdata->data_range); | |
797 | AC_WRITE(ac, FIFO_CTL, FIFO_MODE(pdata->fifo_mode) | | |
798 | SAMPLES(pdata->watermark)); | |
799 | ||
800 | if (pdata->use_int2) | |
801 | /* Map all INTs to INT2 */ | |
802 | AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN); | |
803 | else | |
804 | /* Map all INTs to INT1 */ | |
805 | AC_WRITE(ac, INT_MAP, 0); | |
806 | ||
807 | AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN); | |
808 | ||
809 | ac->pdata.power_mode &= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
810 | ||
811 | return ac; | |
812 | ||
813 | err_remove_attr: | |
814 | sysfs_remove_group(&dev->kobj, &adxl34x_attr_group); | |
815 | err_free_irq: | |
816 | free_irq(ac->irq, ac); | |
817 | err_free_mem: | |
818 | input_free_device(input_dev); | |
819 | kfree(ac); | |
820 | err_out: | |
821 | return ERR_PTR(err); | |
822 | } | |
823 | EXPORT_SYMBOL_GPL(adxl34x_probe); | |
824 | ||
825 | int adxl34x_remove(struct adxl34x *ac) | |
826 | { | |
827 | adxl34x_disable(ac); | |
828 | sysfs_remove_group(&ac->dev->kobj, &adxl34x_attr_group); | |
829 | free_irq(ac->irq, ac); | |
830 | input_unregister_device(ac->input); | |
831 | kfree(ac); | |
832 | ||
833 | dev_dbg(ac->dev, "unregistered accelerometer\n"); | |
834 | return 0; | |
835 | } | |
836 | EXPORT_SYMBOL_GPL(adxl34x_remove); | |
837 | ||
838 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
839 | MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer Driver"); | |
840 | MODULE_LICENSE("GPL"); |