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e27c7292 MH |
1 | /* |
2 | * ADXL345/346 Three-Axis Digital Accelerometers | |
3 | * | |
4 | * Enter bugs at http://blackfin.uclinux.org/ | |
5 | * | |
6 | * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc. | |
7 | * Licensed under the GPL-2 or later. | |
8 | */ | |
9 | ||
10 | #include <linux/device.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/input.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/irq.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/workqueue.h> | |
18 | #include <linux/input/adxl34x.h> | |
d2d8442d | 19 | #include <linux/module.h> |
e27c7292 MH |
20 | |
21 | #include "adxl34x.h" | |
22 | ||
23 | /* ADXL345/6 Register Map */ | |
24 | #define DEVID 0x00 /* R Device ID */ | |
25 | #define THRESH_TAP 0x1D /* R/W Tap threshold */ | |
26 | #define OFSX 0x1E /* R/W X-axis offset */ | |
27 | #define OFSY 0x1F /* R/W Y-axis offset */ | |
28 | #define OFSZ 0x20 /* R/W Z-axis offset */ | |
29 | #define DUR 0x21 /* R/W Tap duration */ | |
30 | #define LATENT 0x22 /* R/W Tap latency */ | |
31 | #define WINDOW 0x23 /* R/W Tap window */ | |
32 | #define THRESH_ACT 0x24 /* R/W Activity threshold */ | |
33 | #define THRESH_INACT 0x25 /* R/W Inactivity threshold */ | |
34 | #define TIME_INACT 0x26 /* R/W Inactivity time */ | |
35 | #define ACT_INACT_CTL 0x27 /* R/W Axis enable control for activity and */ | |
36 | /* inactivity detection */ | |
37 | #define THRESH_FF 0x28 /* R/W Free-fall threshold */ | |
38 | #define TIME_FF 0x29 /* R/W Free-fall time */ | |
39 | #define TAP_AXES 0x2A /* R/W Axis control for tap/double tap */ | |
40 | #define ACT_TAP_STATUS 0x2B /* R Source of tap/double tap */ | |
41 | #define BW_RATE 0x2C /* R/W Data rate and power mode control */ | |
42 | #define POWER_CTL 0x2D /* R/W Power saving features control */ | |
43 | #define INT_ENABLE 0x2E /* R/W Interrupt enable control */ | |
44 | #define INT_MAP 0x2F /* R/W Interrupt mapping control */ | |
45 | #define INT_SOURCE 0x30 /* R Source of interrupts */ | |
46 | #define DATA_FORMAT 0x31 /* R/W Data format control */ | |
47 | #define DATAX0 0x32 /* R X-Axis Data 0 */ | |
48 | #define DATAX1 0x33 /* R X-Axis Data 1 */ | |
49 | #define DATAY0 0x34 /* R Y-Axis Data 0 */ | |
50 | #define DATAY1 0x35 /* R Y-Axis Data 1 */ | |
51 | #define DATAZ0 0x36 /* R Z-Axis Data 0 */ | |
52 | #define DATAZ1 0x37 /* R Z-Axis Data 1 */ | |
53 | #define FIFO_CTL 0x38 /* R/W FIFO control */ | |
54 | #define FIFO_STATUS 0x39 /* R FIFO status */ | |
55 | #define TAP_SIGN 0x3A /* R Sign and source for tap/double tap */ | |
56 | /* Orientation ADXL346 only */ | |
57 | #define ORIENT_CONF 0x3B /* R/W Orientation configuration */ | |
58 | #define ORIENT 0x3C /* R Orientation status */ | |
59 | ||
60 | /* DEVIDs */ | |
61 | #define ID_ADXL345 0xE5 | |
62 | #define ID_ADXL346 0xE6 | |
63 | ||
64 | /* INT_ENABLE/INT_MAP/INT_SOURCE Bits */ | |
65 | #define DATA_READY (1 << 7) | |
66 | #define SINGLE_TAP (1 << 6) | |
67 | #define DOUBLE_TAP (1 << 5) | |
68 | #define ACTIVITY (1 << 4) | |
69 | #define INACTIVITY (1 << 3) | |
70 | #define FREE_FALL (1 << 2) | |
71 | #define WATERMARK (1 << 1) | |
72 | #define OVERRUN (1 << 0) | |
73 | ||
74 | /* ACT_INACT_CONTROL Bits */ | |
75 | #define ACT_ACDC (1 << 7) | |
76 | #define ACT_X_EN (1 << 6) | |
77 | #define ACT_Y_EN (1 << 5) | |
78 | #define ACT_Z_EN (1 << 4) | |
79 | #define INACT_ACDC (1 << 3) | |
80 | #define INACT_X_EN (1 << 2) | |
81 | #define INACT_Y_EN (1 << 1) | |
82 | #define INACT_Z_EN (1 << 0) | |
83 | ||
84 | /* TAP_AXES Bits */ | |
85 | #define SUPPRESS (1 << 3) | |
86 | #define TAP_X_EN (1 << 2) | |
87 | #define TAP_Y_EN (1 << 1) | |
88 | #define TAP_Z_EN (1 << 0) | |
89 | ||
90 | /* ACT_TAP_STATUS Bits */ | |
91 | #define ACT_X_SRC (1 << 6) | |
92 | #define ACT_Y_SRC (1 << 5) | |
93 | #define ACT_Z_SRC (1 << 4) | |
94 | #define ASLEEP (1 << 3) | |
95 | #define TAP_X_SRC (1 << 2) | |
96 | #define TAP_Y_SRC (1 << 1) | |
97 | #define TAP_Z_SRC (1 << 0) | |
98 | ||
99 | /* BW_RATE Bits */ | |
100 | #define LOW_POWER (1 << 4) | |
101 | #define RATE(x) ((x) & 0xF) | |
102 | ||
103 | /* POWER_CTL Bits */ | |
104 | #define PCTL_LINK (1 << 5) | |
105 | #define PCTL_AUTO_SLEEP (1 << 4) | |
106 | #define PCTL_MEASURE (1 << 3) | |
107 | #define PCTL_SLEEP (1 << 2) | |
108 | #define PCTL_WAKEUP(x) ((x) & 0x3) | |
109 | ||
110 | /* DATA_FORMAT Bits */ | |
111 | #define SELF_TEST (1 << 7) | |
112 | #define SPI (1 << 6) | |
113 | #define INT_INVERT (1 << 5) | |
114 | #define FULL_RES (1 << 3) | |
115 | #define JUSTIFY (1 << 2) | |
116 | #define RANGE(x) ((x) & 0x3) | |
117 | #define RANGE_PM_2g 0 | |
118 | #define RANGE_PM_4g 1 | |
119 | #define RANGE_PM_8g 2 | |
120 | #define RANGE_PM_16g 3 | |
121 | ||
122 | /* | |
123 | * Maximum value our axis may get in full res mode for the input device | |
124 | * (signed 13 bits) | |
125 | */ | |
126 | #define ADXL_FULLRES_MAX_VAL 4096 | |
127 | ||
128 | /* | |
129 | * Maximum value our axis may get in fixed res mode for the input device | |
130 | * (signed 10 bits) | |
131 | */ | |
132 | #define ADXL_FIXEDRES_MAX_VAL 512 | |
133 | ||
134 | /* FIFO_CTL Bits */ | |
135 | #define FIFO_MODE(x) (((x) & 0x3) << 6) | |
136 | #define FIFO_BYPASS 0 | |
137 | #define FIFO_FIFO 1 | |
138 | #define FIFO_STREAM 2 | |
139 | #define FIFO_TRIGGER 3 | |
140 | #define TRIGGER (1 << 5) | |
141 | #define SAMPLES(x) ((x) & 0x1F) | |
142 | ||
143 | /* FIFO_STATUS Bits */ | |
144 | #define FIFO_TRIG (1 << 7) | |
145 | #define ENTRIES(x) ((x) & 0x3F) | |
146 | ||
147 | /* TAP_SIGN Bits ADXL346 only */ | |
148 | #define XSIGN (1 << 6) | |
149 | #define YSIGN (1 << 5) | |
150 | #define ZSIGN (1 << 4) | |
151 | #define XTAP (1 << 3) | |
152 | #define YTAP (1 << 2) | |
153 | #define ZTAP (1 << 1) | |
154 | ||
155 | /* ORIENT_CONF ADXL346 only */ | |
156 | #define ORIENT_DEADZONE(x) (((x) & 0x7) << 4) | |
157 | #define ORIENT_DIVISOR(x) ((x) & 0x7) | |
158 | ||
159 | /* ORIENT ADXL346 only */ | |
160 | #define ADXL346_2D_VALID (1 << 6) | |
161 | #define ADXL346_2D_ORIENT(x) (((x) & 0x3) >> 4) | |
162 | #define ADXL346_3D_VALID (1 << 3) | |
163 | #define ADXL346_3D_ORIENT(x) ((x) & 0x7) | |
164 | #define ADXL346_2D_PORTRAIT_POS 0 /* +X */ | |
165 | #define ADXL346_2D_PORTRAIT_NEG 1 /* -X */ | |
166 | #define ADXL346_2D_LANDSCAPE_POS 2 /* +Y */ | |
167 | #define ADXL346_2D_LANDSCAPE_NEG 3 /* -Y */ | |
168 | ||
169 | #define ADXL346_3D_FRONT 3 /* +X */ | |
170 | #define ADXL346_3D_BACK 4 /* -X */ | |
171 | #define ADXL346_3D_RIGHT 2 /* +Y */ | |
172 | #define ADXL346_3D_LEFT 5 /* -Y */ | |
173 | #define ADXL346_3D_TOP 1 /* +Z */ | |
174 | #define ADXL346_3D_BOTTOM 6 /* -Z */ | |
175 | ||
176 | #undef ADXL_DEBUG | |
177 | ||
178 | #define ADXL_X_AXIS 0 | |
179 | #define ADXL_Y_AXIS 1 | |
180 | #define ADXL_Z_AXIS 2 | |
181 | ||
182 | #define AC_READ(ac, reg) ((ac)->bops->read((ac)->dev, reg)) | |
183 | #define AC_WRITE(ac, reg, val) ((ac)->bops->write((ac)->dev, reg, val)) | |
184 | ||
185 | struct axis_triple { | |
186 | int x; | |
187 | int y; | |
188 | int z; | |
189 | }; | |
190 | ||
191 | struct adxl34x { | |
192 | struct device *dev; | |
193 | struct input_dev *input; | |
194 | struct mutex mutex; /* reentrant protection for struct */ | |
195 | struct adxl34x_platform_data pdata; | |
196 | struct axis_triple swcal; | |
197 | struct axis_triple hwcal; | |
198 | struct axis_triple saved; | |
199 | char phys[32]; | |
671386bb MH |
200 | unsigned orient2d_saved; |
201 | unsigned orient3d_saved; | |
e27c7292 MH |
202 | bool disabled; /* P: mutex */ |
203 | bool opened; /* P: mutex */ | |
af6e1d99 | 204 | bool suspended; /* P: mutex */ |
e27c7292 MH |
205 | bool fifo_delay; |
206 | int irq; | |
207 | unsigned model; | |
208 | unsigned int_mask; | |
209 | ||
210 | const struct adxl34x_bus_ops *bops; | |
211 | }; | |
212 | ||
213 | static const struct adxl34x_platform_data adxl34x_default_init = { | |
214 | .tap_threshold = 35, | |
215 | .tap_duration = 3, | |
216 | .tap_latency = 20, | |
217 | .tap_window = 20, | |
218 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | |
219 | .act_axis_control = 0xFF, | |
220 | .activity_threshold = 6, | |
221 | .inactivity_threshold = 4, | |
222 | .inactivity_time = 3, | |
223 | .free_fall_threshold = 8, | |
224 | .free_fall_time = 0x20, | |
225 | .data_rate = 8, | |
226 | .data_range = ADXL_FULL_RES, | |
227 | ||
228 | .ev_type = EV_ABS, | |
229 | .ev_code_x = ABS_X, /* EV_REL */ | |
230 | .ev_code_y = ABS_Y, /* EV_REL */ | |
231 | .ev_code_z = ABS_Z, /* EV_REL */ | |
232 | ||
233 | .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY {x,y,z} */ | |
234 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | |
235 | .fifo_mode = FIFO_STREAM, | |
236 | .watermark = 0, | |
237 | }; | |
238 | ||
239 | static void adxl34x_get_triple(struct adxl34x *ac, struct axis_triple *axis) | |
240 | { | |
241 | short buf[3]; | |
242 | ||
243 | ac->bops->read_block(ac->dev, DATAX0, DATAZ1 - DATAX0 + 1, buf); | |
244 | ||
245 | mutex_lock(&ac->mutex); | |
246 | ac->saved.x = (s16) le16_to_cpu(buf[0]); | |
247 | axis->x = ac->saved.x; | |
248 | ||
249 | ac->saved.y = (s16) le16_to_cpu(buf[1]); | |
250 | axis->y = ac->saved.y; | |
251 | ||
252 | ac->saved.z = (s16) le16_to_cpu(buf[2]); | |
253 | axis->z = ac->saved.z; | |
254 | mutex_unlock(&ac->mutex); | |
255 | } | |
256 | ||
257 | static void adxl34x_service_ev_fifo(struct adxl34x *ac) | |
258 | { | |
259 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
260 | struct axis_triple axis; | |
261 | ||
262 | adxl34x_get_triple(ac, &axis); | |
263 | ||
264 | input_event(ac->input, pdata->ev_type, pdata->ev_code_x, | |
265 | axis.x - ac->swcal.x); | |
266 | input_event(ac->input, pdata->ev_type, pdata->ev_code_y, | |
267 | axis.y - ac->swcal.y); | |
268 | input_event(ac->input, pdata->ev_type, pdata->ev_code_z, | |
269 | axis.z - ac->swcal.z); | |
270 | } | |
271 | ||
272 | static void adxl34x_report_key_single(struct input_dev *input, int key) | |
273 | { | |
274 | input_report_key(input, key, true); | |
275 | input_sync(input); | |
276 | input_report_key(input, key, false); | |
277 | } | |
278 | ||
279 | static void adxl34x_send_key_events(struct adxl34x *ac, | |
280 | struct adxl34x_platform_data *pdata, int status, int press) | |
281 | { | |
282 | int i; | |
283 | ||
284 | for (i = ADXL_X_AXIS; i <= ADXL_Z_AXIS; i++) { | |
285 | if (status & (1 << (ADXL_Z_AXIS - i))) | |
286 | input_report_key(ac->input, | |
287 | pdata->ev_code_tap[i], press); | |
288 | } | |
289 | } | |
290 | ||
291 | static void adxl34x_do_tap(struct adxl34x *ac, | |
292 | struct adxl34x_platform_data *pdata, int status) | |
293 | { | |
294 | adxl34x_send_key_events(ac, pdata, status, true); | |
295 | input_sync(ac->input); | |
296 | adxl34x_send_key_events(ac, pdata, status, false); | |
297 | } | |
298 | ||
299 | static irqreturn_t adxl34x_irq(int irq, void *handle) | |
300 | { | |
301 | struct adxl34x *ac = handle; | |
302 | struct adxl34x_platform_data *pdata = &ac->pdata; | |
671386bb | 303 | int int_stat, tap_stat, samples, orient, orient_code; |
e27c7292 MH |
304 | |
305 | /* | |
306 | * ACT_TAP_STATUS should be read before clearing the interrupt | |
307 | * Avoid reading ACT_TAP_STATUS in case TAP detection is disabled | |
308 | */ | |
309 | ||
310 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
311 | tap_stat = AC_READ(ac, ACT_TAP_STATUS); | |
312 | else | |
313 | tap_stat = 0; | |
314 | ||
315 | int_stat = AC_READ(ac, INT_SOURCE); | |
316 | ||
317 | if (int_stat & FREE_FALL) | |
318 | adxl34x_report_key_single(ac->input, pdata->ev_code_ff); | |
319 | ||
320 | if (int_stat & OVERRUN) | |
321 | dev_dbg(ac->dev, "OVERRUN\n"); | |
322 | ||
323 | if (int_stat & (SINGLE_TAP | DOUBLE_TAP)) { | |
324 | adxl34x_do_tap(ac, pdata, tap_stat); | |
325 | ||
326 | if (int_stat & DOUBLE_TAP) | |
327 | adxl34x_do_tap(ac, pdata, tap_stat); | |
328 | } | |
329 | ||
330 | if (pdata->ev_code_act_inactivity) { | |
331 | if (int_stat & ACTIVITY) | |
332 | input_report_key(ac->input, | |
333 | pdata->ev_code_act_inactivity, 1); | |
334 | if (int_stat & INACTIVITY) | |
335 | input_report_key(ac->input, | |
336 | pdata->ev_code_act_inactivity, 0); | |
337 | } | |
338 | ||
671386bb MH |
339 | /* |
340 | * ORIENTATION SENSING ADXL346 only | |
341 | */ | |
342 | if (pdata->orientation_enable) { | |
343 | orient = AC_READ(ac, ORIENT); | |
344 | if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_2D) && | |
345 | (orient & ADXL346_2D_VALID)) { | |
346 | ||
347 | orient_code = ADXL346_2D_ORIENT(orient); | |
348 | /* Report orientation only when it changes */ | |
349 | if (ac->orient2d_saved != orient_code) { | |
350 | ac->orient2d_saved = orient_code; | |
351 | adxl34x_report_key_single(ac->input, | |
352 | pdata->ev_codes_orient_2d[orient_code]); | |
353 | } | |
354 | } | |
355 | ||
356 | if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_3D) && | |
357 | (orient & ADXL346_3D_VALID)) { | |
358 | ||
359 | orient_code = ADXL346_3D_ORIENT(orient) - 1; | |
360 | /* Report orientation only when it changes */ | |
361 | if (ac->orient3d_saved != orient_code) { | |
362 | ac->orient3d_saved = orient_code; | |
363 | adxl34x_report_key_single(ac->input, | |
364 | pdata->ev_codes_orient_3d[orient_code]); | |
365 | } | |
366 | } | |
367 | } | |
368 | ||
e27c7292 MH |
369 | if (int_stat & (DATA_READY | WATERMARK)) { |
370 | ||
371 | if (pdata->fifo_mode) | |
372 | samples = ENTRIES(AC_READ(ac, FIFO_STATUS)) + 1; | |
373 | else | |
374 | samples = 1; | |
375 | ||
376 | for (; samples > 0; samples--) { | |
377 | adxl34x_service_ev_fifo(ac); | |
378 | /* | |
379 | * To ensure that the FIFO has | |
380 | * completely popped, there must be at least 5 us between | |
381 | * the end of reading the data registers, signified by the | |
382 | * transition to register 0x38 from 0x37 or the CS pin | |
383 | * going high, and the start of new reads of the FIFO or | |
384 | * reading the FIFO_STATUS register. For SPI operation at | |
385 | * 1.5 MHz or lower, the register addressing portion of the | |
386 | * transmission is sufficient delay to ensure the FIFO has | |
387 | * completely popped. It is necessary for SPI operation | |
388 | * greater than 1.5 MHz to de-assert the CS pin to ensure a | |
389 | * total of 5 us, which is at most 3.4 us at 5 MHz | |
390 | * operation. | |
391 | */ | |
392 | if (ac->fifo_delay && (samples > 1)) | |
393 | udelay(3); | |
394 | } | |
395 | } | |
396 | ||
397 | input_sync(ac->input); | |
398 | ||
399 | return IRQ_HANDLED; | |
400 | } | |
401 | ||
402 | static void __adxl34x_disable(struct adxl34x *ac) | |
403 | { | |
af6e1d99 DT |
404 | /* |
405 | * A '0' places the ADXL34x into standby mode | |
406 | * with minimum power consumption. | |
407 | */ | |
408 | AC_WRITE(ac, POWER_CTL, 0); | |
e27c7292 MH |
409 | } |
410 | ||
411 | static void __adxl34x_enable(struct adxl34x *ac) | |
412 | { | |
af6e1d99 | 413 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); |
e27c7292 MH |
414 | } |
415 | ||
af6e1d99 | 416 | void adxl34x_suspend(struct adxl34x *ac) |
e27c7292 MH |
417 | { |
418 | mutex_lock(&ac->mutex); | |
af6e1d99 DT |
419 | |
420 | if (!ac->suspended && !ac->disabled && ac->opened) | |
421 | __adxl34x_disable(ac); | |
422 | ||
423 | ac->suspended = true; | |
424 | ||
e27c7292 MH |
425 | mutex_unlock(&ac->mutex); |
426 | } | |
af6e1d99 | 427 | EXPORT_SYMBOL_GPL(adxl34x_suspend); |
e27c7292 | 428 | |
af6e1d99 | 429 | void adxl34x_resume(struct adxl34x *ac) |
e27c7292 MH |
430 | { |
431 | mutex_lock(&ac->mutex); | |
af6e1d99 DT |
432 | |
433 | if (ac->suspended && !ac->disabled && ac->opened) | |
434 | __adxl34x_enable(ac); | |
435 | ||
f1cba532 | 436 | ac->suspended = false; |
af6e1d99 | 437 | |
e27c7292 MH |
438 | mutex_unlock(&ac->mutex); |
439 | } | |
af6e1d99 | 440 | EXPORT_SYMBOL_GPL(adxl34x_resume); |
e27c7292 MH |
441 | |
442 | static ssize_t adxl34x_disable_show(struct device *dev, | |
443 | struct device_attribute *attr, char *buf) | |
444 | { | |
445 | struct adxl34x *ac = dev_get_drvdata(dev); | |
446 | ||
447 | return sprintf(buf, "%u\n", ac->disabled); | |
448 | } | |
449 | ||
450 | static ssize_t adxl34x_disable_store(struct device *dev, | |
451 | struct device_attribute *attr, | |
452 | const char *buf, size_t count) | |
453 | { | |
454 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 455 | unsigned int val; |
e27c7292 MH |
456 | int error; |
457 | ||
76496e7a | 458 | error = kstrtouint(buf, 10, &val); |
e27c7292 MH |
459 | if (error) |
460 | return error; | |
461 | ||
af6e1d99 DT |
462 | mutex_lock(&ac->mutex); |
463 | ||
464 | if (!ac->suspended && ac->opened) { | |
465 | if (val) { | |
466 | if (!ac->disabled) | |
467 | __adxl34x_disable(ac); | |
468 | } else { | |
469 | if (ac->disabled) | |
470 | __adxl34x_enable(ac); | |
471 | } | |
472 | } | |
473 | ||
474 | ac->disabled = !!val; | |
475 | ||
476 | mutex_unlock(&ac->mutex); | |
e27c7292 MH |
477 | |
478 | return count; | |
479 | } | |
480 | ||
481 | static DEVICE_ATTR(disable, 0664, adxl34x_disable_show, adxl34x_disable_store); | |
482 | ||
483 | static ssize_t adxl34x_calibrate_show(struct device *dev, | |
484 | struct device_attribute *attr, char *buf) | |
485 | { | |
486 | struct adxl34x *ac = dev_get_drvdata(dev); | |
487 | ssize_t count; | |
488 | ||
489 | mutex_lock(&ac->mutex); | |
490 | count = sprintf(buf, "%d,%d,%d\n", | |
491 | ac->hwcal.x * 4 + ac->swcal.x, | |
492 | ac->hwcal.y * 4 + ac->swcal.y, | |
493 | ac->hwcal.z * 4 + ac->swcal.z); | |
494 | mutex_unlock(&ac->mutex); | |
495 | ||
496 | return count; | |
497 | } | |
498 | ||
499 | static ssize_t adxl34x_calibrate_store(struct device *dev, | |
500 | struct device_attribute *attr, | |
501 | const char *buf, size_t count) | |
502 | { | |
503 | struct adxl34x *ac = dev_get_drvdata(dev); | |
504 | ||
505 | /* | |
506 | * Hardware offset calibration has a resolution of 15.6 mg/LSB. | |
507 | * We use HW calibration and handle the remaining bits in SW. (4mg/LSB) | |
508 | */ | |
509 | ||
510 | mutex_lock(&ac->mutex); | |
511 | ac->hwcal.x -= (ac->saved.x / 4); | |
512 | ac->swcal.x = ac->saved.x % 4; | |
513 | ||
514 | ac->hwcal.y -= (ac->saved.y / 4); | |
515 | ac->swcal.y = ac->saved.y % 4; | |
516 | ||
517 | ac->hwcal.z -= (ac->saved.z / 4); | |
518 | ac->swcal.z = ac->saved.z % 4; | |
519 | ||
520 | AC_WRITE(ac, OFSX, (s8) ac->hwcal.x); | |
521 | AC_WRITE(ac, OFSY, (s8) ac->hwcal.y); | |
522 | AC_WRITE(ac, OFSZ, (s8) ac->hwcal.z); | |
523 | mutex_unlock(&ac->mutex); | |
524 | ||
525 | return count; | |
526 | } | |
527 | ||
528 | static DEVICE_ATTR(calibrate, 0664, | |
529 | adxl34x_calibrate_show, adxl34x_calibrate_store); | |
530 | ||
531 | static ssize_t adxl34x_rate_show(struct device *dev, | |
532 | struct device_attribute *attr, char *buf) | |
533 | { | |
534 | struct adxl34x *ac = dev_get_drvdata(dev); | |
535 | ||
536 | return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate)); | |
537 | } | |
538 | ||
539 | static ssize_t adxl34x_rate_store(struct device *dev, | |
540 | struct device_attribute *attr, | |
541 | const char *buf, size_t count) | |
542 | { | |
543 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 544 | unsigned char val; |
e27c7292 MH |
545 | int error; |
546 | ||
76496e7a | 547 | error = kstrtou8(buf, 10, &val); |
e27c7292 MH |
548 | if (error) |
549 | return error; | |
550 | ||
551 | mutex_lock(&ac->mutex); | |
552 | ||
553 | ac->pdata.data_rate = RATE(val); | |
554 | AC_WRITE(ac, BW_RATE, | |
555 | ac->pdata.data_rate | | |
556 | (ac->pdata.low_power_mode ? LOW_POWER : 0)); | |
557 | ||
558 | mutex_unlock(&ac->mutex); | |
559 | ||
560 | return count; | |
561 | } | |
562 | ||
563 | static DEVICE_ATTR(rate, 0664, adxl34x_rate_show, adxl34x_rate_store); | |
564 | ||
565 | static ssize_t adxl34x_autosleep_show(struct device *dev, | |
566 | struct device_attribute *attr, char *buf) | |
567 | { | |
568 | struct adxl34x *ac = dev_get_drvdata(dev); | |
569 | ||
570 | return sprintf(buf, "%u\n", | |
571 | ac->pdata.power_mode & (PCTL_AUTO_SLEEP | PCTL_LINK) ? 1 : 0); | |
572 | } | |
573 | ||
574 | static ssize_t adxl34x_autosleep_store(struct device *dev, | |
575 | struct device_attribute *attr, | |
576 | const char *buf, size_t count) | |
577 | { | |
578 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 579 | unsigned int val; |
e27c7292 MH |
580 | int error; |
581 | ||
76496e7a | 582 | error = kstrtouint(buf, 10, &val); |
e27c7292 MH |
583 | if (error) |
584 | return error; | |
585 | ||
586 | mutex_lock(&ac->mutex); | |
587 | ||
588 | if (val) | |
589 | ac->pdata.power_mode |= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
590 | else | |
591 | ac->pdata.power_mode &= ~(PCTL_AUTO_SLEEP | PCTL_LINK); | |
592 | ||
af6e1d99 | 593 | if (!ac->disabled && !ac->suspended && ac->opened) |
e27c7292 MH |
594 | AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE); |
595 | ||
596 | mutex_unlock(&ac->mutex); | |
597 | ||
598 | return count; | |
599 | } | |
600 | ||
601 | static DEVICE_ATTR(autosleep, 0664, | |
602 | adxl34x_autosleep_show, adxl34x_autosleep_store); | |
603 | ||
604 | static ssize_t adxl34x_position_show(struct device *dev, | |
605 | struct device_attribute *attr, char *buf) | |
606 | { | |
607 | struct adxl34x *ac = dev_get_drvdata(dev); | |
608 | ssize_t count; | |
609 | ||
610 | mutex_lock(&ac->mutex); | |
611 | count = sprintf(buf, "(%d, %d, %d)\n", | |
612 | ac->saved.x, ac->saved.y, ac->saved.z); | |
613 | mutex_unlock(&ac->mutex); | |
614 | ||
615 | return count; | |
616 | } | |
617 | ||
618 | static DEVICE_ATTR(position, S_IRUGO, adxl34x_position_show, NULL); | |
619 | ||
620 | #ifdef ADXL_DEBUG | |
621 | static ssize_t adxl34x_write_store(struct device *dev, | |
622 | struct device_attribute *attr, | |
623 | const char *buf, size_t count) | |
624 | { | |
625 | struct adxl34x *ac = dev_get_drvdata(dev); | |
76496e7a | 626 | unsigned int val; |
e27c7292 MH |
627 | int error; |
628 | ||
629 | /* | |
630 | * This allows basic ADXL register write access for debug purposes. | |
631 | */ | |
76496e7a | 632 | error = kstrtouint(buf, 16, &val); |
e27c7292 MH |
633 | if (error) |
634 | return error; | |
635 | ||
636 | mutex_lock(&ac->mutex); | |
637 | AC_WRITE(ac, val >> 8, val & 0xFF); | |
638 | mutex_unlock(&ac->mutex); | |
639 | ||
640 | return count; | |
641 | } | |
642 | ||
643 | static DEVICE_ATTR(write, 0664, NULL, adxl34x_write_store); | |
644 | #endif | |
645 | ||
646 | static struct attribute *adxl34x_attributes[] = { | |
647 | &dev_attr_disable.attr, | |
648 | &dev_attr_calibrate.attr, | |
649 | &dev_attr_rate.attr, | |
650 | &dev_attr_autosleep.attr, | |
651 | &dev_attr_position.attr, | |
652 | #ifdef ADXL_DEBUG | |
653 | &dev_attr_write.attr, | |
654 | #endif | |
655 | NULL | |
656 | }; | |
657 | ||
658 | static const struct attribute_group adxl34x_attr_group = { | |
659 | .attrs = adxl34x_attributes, | |
660 | }; | |
661 | ||
662 | static int adxl34x_input_open(struct input_dev *input) | |
663 | { | |
664 | struct adxl34x *ac = input_get_drvdata(input); | |
665 | ||
666 | mutex_lock(&ac->mutex); | |
af6e1d99 DT |
667 | |
668 | if (!ac->suspended && !ac->disabled) | |
669 | __adxl34x_enable(ac); | |
670 | ||
e27c7292 | 671 | ac->opened = true; |
af6e1d99 | 672 | |
e27c7292 MH |
673 | mutex_unlock(&ac->mutex); |
674 | ||
675 | return 0; | |
676 | } | |
677 | ||
678 | static void adxl34x_input_close(struct input_dev *input) | |
679 | { | |
680 | struct adxl34x *ac = input_get_drvdata(input); | |
681 | ||
682 | mutex_lock(&ac->mutex); | |
af6e1d99 DT |
683 | |
684 | if (!ac->suspended && !ac->disabled) | |
685 | __adxl34x_disable(ac); | |
686 | ||
e27c7292 | 687 | ac->opened = false; |
af6e1d99 | 688 | |
e27c7292 MH |
689 | mutex_unlock(&ac->mutex); |
690 | } | |
691 | ||
692 | struct adxl34x *adxl34x_probe(struct device *dev, int irq, | |
693 | bool fifo_delay_default, | |
694 | const struct adxl34x_bus_ops *bops) | |
695 | { | |
696 | struct adxl34x *ac; | |
697 | struct input_dev *input_dev; | |
698 | const struct adxl34x_platform_data *pdata; | |
671386bb | 699 | int err, range, i; |
e27c7292 MH |
700 | unsigned char revid; |
701 | ||
702 | if (!irq) { | |
703 | dev_err(dev, "no IRQ?\n"); | |
704 | err = -ENODEV; | |
705 | goto err_out; | |
706 | } | |
707 | ||
708 | ac = kzalloc(sizeof(*ac), GFP_KERNEL); | |
709 | input_dev = input_allocate_device(); | |
710 | if (!ac || !input_dev) { | |
711 | err = -ENOMEM; | |
f1cba532 | 712 | goto err_free_mem; |
e27c7292 MH |
713 | } |
714 | ||
715 | ac->fifo_delay = fifo_delay_default; | |
716 | ||
717 | pdata = dev->platform_data; | |
718 | if (!pdata) { | |
719 | dev_dbg(dev, | |
25985edc | 720 | "No platform data: Using default initialization\n"); |
e27c7292 MH |
721 | pdata = &adxl34x_default_init; |
722 | } | |
723 | ||
724 | ac->pdata = *pdata; | |
725 | pdata = &ac->pdata; | |
726 | ||
727 | ac->input = input_dev; | |
e27c7292 MH |
728 | ac->dev = dev; |
729 | ac->irq = irq; | |
730 | ac->bops = bops; | |
731 | ||
732 | mutex_init(&ac->mutex); | |
733 | ||
734 | input_dev->name = "ADXL34x accelerometer"; | |
735 | revid = ac->bops->read(dev, DEVID); | |
736 | ||
737 | switch (revid) { | |
738 | case ID_ADXL345: | |
739 | ac->model = 345; | |
740 | break; | |
741 | case ID_ADXL346: | |
742 | ac->model = 346; | |
743 | break; | |
744 | default: | |
745 | dev_err(dev, "Failed to probe %s\n", input_dev->name); | |
746 | err = -ENODEV; | |
747 | goto err_free_mem; | |
748 | } | |
749 | ||
750 | snprintf(ac->phys, sizeof(ac->phys), "%s/input0", dev_name(dev)); | |
751 | ||
752 | input_dev->phys = ac->phys; | |
753 | input_dev->dev.parent = dev; | |
754 | input_dev->id.product = ac->model; | |
755 | input_dev->id.bustype = bops->bustype; | |
756 | input_dev->open = adxl34x_input_open; | |
757 | input_dev->close = adxl34x_input_close; | |
758 | ||
759 | input_set_drvdata(input_dev, ac); | |
760 | ||
761 | __set_bit(ac->pdata.ev_type, input_dev->evbit); | |
762 | ||
763 | if (ac->pdata.ev_type == EV_REL) { | |
764 | __set_bit(REL_X, input_dev->relbit); | |
765 | __set_bit(REL_Y, input_dev->relbit); | |
766 | __set_bit(REL_Z, input_dev->relbit); | |
767 | } else { | |
768 | /* EV_ABS */ | |
769 | __set_bit(ABS_X, input_dev->absbit); | |
770 | __set_bit(ABS_Y, input_dev->absbit); | |
771 | __set_bit(ABS_Z, input_dev->absbit); | |
772 | ||
773 | if (pdata->data_range & FULL_RES) | |
774 | range = ADXL_FULLRES_MAX_VAL; /* Signed 13-bit */ | |
775 | else | |
776 | range = ADXL_FIXEDRES_MAX_VAL; /* Signed 10-bit */ | |
777 | ||
778 | input_set_abs_params(input_dev, ABS_X, -range, range, 3, 3); | |
779 | input_set_abs_params(input_dev, ABS_Y, -range, range, 3, 3); | |
780 | input_set_abs_params(input_dev, ABS_Z, -range, range, 3, 3); | |
781 | } | |
782 | ||
783 | __set_bit(EV_KEY, input_dev->evbit); | |
784 | __set_bit(pdata->ev_code_tap[ADXL_X_AXIS], input_dev->keybit); | |
785 | __set_bit(pdata->ev_code_tap[ADXL_Y_AXIS], input_dev->keybit); | |
786 | __set_bit(pdata->ev_code_tap[ADXL_Z_AXIS], input_dev->keybit); | |
787 | ||
788 | if (pdata->ev_code_ff) { | |
789 | ac->int_mask = FREE_FALL; | |
790 | __set_bit(pdata->ev_code_ff, input_dev->keybit); | |
791 | } | |
792 | ||
793 | if (pdata->ev_code_act_inactivity) | |
794 | __set_bit(pdata->ev_code_act_inactivity, input_dev->keybit); | |
795 | ||
796 | ac->int_mask |= ACTIVITY | INACTIVITY; | |
797 | ||
798 | if (pdata->watermark) { | |
799 | ac->int_mask |= WATERMARK; | |
800 | if (!FIFO_MODE(pdata->fifo_mode)) | |
801 | ac->pdata.fifo_mode |= FIFO_STREAM; | |
802 | } else { | |
803 | ac->int_mask |= DATA_READY; | |
804 | } | |
805 | ||
806 | if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN)) | |
807 | ac->int_mask |= SINGLE_TAP | DOUBLE_TAP; | |
808 | ||
809 | if (FIFO_MODE(pdata->fifo_mode) == FIFO_BYPASS) | |
810 | ac->fifo_delay = false; | |
811 | ||
812 | ac->bops->write(dev, POWER_CTL, 0); | |
813 | ||
814 | err = request_threaded_irq(ac->irq, NULL, adxl34x_irq, | |
815 | IRQF_TRIGGER_HIGH | IRQF_ONESHOT, | |
816 | dev_name(dev), ac); | |
817 | if (err) { | |
818 | dev_err(dev, "irq %d busy?\n", ac->irq); | |
819 | goto err_free_mem; | |
820 | } | |
821 | ||
822 | err = sysfs_create_group(&dev->kobj, &adxl34x_attr_group); | |
823 | if (err) | |
824 | goto err_free_irq; | |
825 | ||
826 | err = input_register_device(input_dev); | |
827 | if (err) | |
828 | goto err_remove_attr; | |
829 | ||
830 | AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold); | |
831 | AC_WRITE(ac, OFSX, pdata->x_axis_offset); | |
832 | ac->hwcal.x = pdata->x_axis_offset; | |
833 | AC_WRITE(ac, OFSY, pdata->y_axis_offset); | |
834 | ac->hwcal.y = pdata->y_axis_offset; | |
835 | AC_WRITE(ac, OFSZ, pdata->z_axis_offset); | |
836 | ac->hwcal.z = pdata->z_axis_offset; | |
837 | AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold); | |
838 | AC_WRITE(ac, DUR, pdata->tap_duration); | |
839 | AC_WRITE(ac, LATENT, pdata->tap_latency); | |
840 | AC_WRITE(ac, WINDOW, pdata->tap_window); | |
841 | AC_WRITE(ac, THRESH_ACT, pdata->activity_threshold); | |
842 | AC_WRITE(ac, THRESH_INACT, pdata->inactivity_threshold); | |
843 | AC_WRITE(ac, TIME_INACT, pdata->inactivity_time); | |
844 | AC_WRITE(ac, THRESH_FF, pdata->free_fall_threshold); | |
845 | AC_WRITE(ac, TIME_FF, pdata->free_fall_time); | |
846 | AC_WRITE(ac, TAP_AXES, pdata->tap_axis_control); | |
847 | AC_WRITE(ac, ACT_INACT_CTL, pdata->act_axis_control); | |
848 | AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) | | |
849 | (pdata->low_power_mode ? LOW_POWER : 0)); | |
850 | AC_WRITE(ac, DATA_FORMAT, pdata->data_range); | |
851 | AC_WRITE(ac, FIFO_CTL, FIFO_MODE(pdata->fifo_mode) | | |
852 | SAMPLES(pdata->watermark)); | |
853 | ||
671386bb | 854 | if (pdata->use_int2) { |
e27c7292 MH |
855 | /* Map all INTs to INT2 */ |
856 | AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN); | |
671386bb | 857 | } else { |
e27c7292 MH |
858 | /* Map all INTs to INT1 */ |
859 | AC_WRITE(ac, INT_MAP, 0); | |
671386bb MH |
860 | } |
861 | ||
862 | if (ac->model == 346 && ac->pdata.orientation_enable) { | |
863 | AC_WRITE(ac, ORIENT_CONF, | |
864 | ORIENT_DEADZONE(ac->pdata.deadzone_angle) | | |
865 | ORIENT_DIVISOR(ac->pdata.divisor_length)); | |
866 | ||
867 | ac->orient2d_saved = 1234; | |
868 | ac->orient3d_saved = 1234; | |
869 | ||
870 | if (pdata->orientation_enable & ADXL_EN_ORIENTATION_3D) | |
871 | for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_3d); i++) | |
872 | __set_bit(pdata->ev_codes_orient_3d[i], | |
873 | input_dev->keybit); | |
874 | ||
875 | if (pdata->orientation_enable & ADXL_EN_ORIENTATION_2D) | |
876 | for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_2d); i++) | |
877 | __set_bit(pdata->ev_codes_orient_2d[i], | |
878 | input_dev->keybit); | |
879 | } else { | |
880 | ac->pdata.orientation_enable = 0; | |
881 | } | |
e27c7292 MH |
882 | |
883 | AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN); | |
884 | ||
885 | ac->pdata.power_mode &= (PCTL_AUTO_SLEEP | PCTL_LINK); | |
886 | ||
887 | return ac; | |
888 | ||
889 | err_remove_attr: | |
890 | sysfs_remove_group(&dev->kobj, &adxl34x_attr_group); | |
891 | err_free_irq: | |
892 | free_irq(ac->irq, ac); | |
893 | err_free_mem: | |
894 | input_free_device(input_dev); | |
895 | kfree(ac); | |
896 | err_out: | |
897 | return ERR_PTR(err); | |
898 | } | |
899 | EXPORT_SYMBOL_GPL(adxl34x_probe); | |
900 | ||
901 | int adxl34x_remove(struct adxl34x *ac) | |
902 | { | |
e27c7292 MH |
903 | sysfs_remove_group(&ac->dev->kobj, &adxl34x_attr_group); |
904 | free_irq(ac->irq, ac); | |
905 | input_unregister_device(ac->input); | |
f1cba532 | 906 | dev_dbg(ac->dev, "unregistered accelerometer\n"); |
e27c7292 MH |
907 | kfree(ac); |
908 | ||
e27c7292 MH |
909 | return 0; |
910 | } | |
911 | EXPORT_SYMBOL_GPL(adxl34x_remove); | |
912 | ||
913 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
914 | MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer Driver"); | |
915 | MODULE_LICENSE("GPL"); |