Commit | Line | Data |
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11f5b30d RI |
1 | /* |
2 | * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix | |
3 | * keyboard controller | |
4 | * | |
5 | * Copyright (c) 2009-2011, NVIDIA Corporation. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/input.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/clk.h> | |
29 | #include <linux/slab.h> | |
30 | #include <mach/clk.h> | |
31 | #include <mach/kbc.h> | |
32 | ||
33 | #define KBC_MAX_DEBOUNCE_CNT 0x3ffu | |
34 | ||
35 | /* KBC row scan time and delay for beginning the row scan. */ | |
36 | #define KBC_ROW_SCAN_TIME 16 | |
37 | #define KBC_ROW_SCAN_DLY 5 | |
38 | ||
39 | /* KBC uses a 32KHz clock so a cycle = 1/32Khz */ | |
40 | #define KBC_CYCLE_USEC 32 | |
41 | ||
42 | /* KBC Registers */ | |
43 | ||
44 | /* KBC Control Register */ | |
45 | #define KBC_CONTROL_0 0x0 | |
46 | #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14) | |
47 | #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4) | |
48 | #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3) | |
49 | #define KBC_CONTROL_KBC_EN (1 << 0) | |
50 | ||
51 | /* KBC Interrupt Register */ | |
52 | #define KBC_INT_0 0x4 | |
53 | #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2) | |
54 | ||
55 | #define KBC_ROW_CFG0_0 0x8 | |
56 | #define KBC_COL_CFG0_0 0x18 | |
57 | #define KBC_INIT_DLY_0 0x28 | |
58 | #define KBC_RPT_DLY_0 0x2c | |
59 | #define KBC_KP_ENT0_0 0x30 | |
60 | #define KBC_KP_ENT1_0 0x34 | |
61 | #define KBC_ROW0_MASK_0 0x38 | |
62 | ||
63 | #define KBC_ROW_SHIFT 3 | |
64 | ||
65 | struct tegra_kbc { | |
66 | void __iomem *mmio; | |
67 | struct input_dev *idev; | |
68 | unsigned int irq; | |
69 | unsigned int wake_enable_rows; | |
70 | unsigned int wake_enable_cols; | |
71 | spinlock_t lock; | |
72 | unsigned int repoll_dly; | |
73 | unsigned long cp_dly_jiffies; | |
4e8b65f6 | 74 | bool use_fn_map; |
34abeeb2 | 75 | bool use_ghost_filter; |
11f5b30d | 76 | const struct tegra_kbc_platform_data *pdata; |
4e8b65f6 | 77 | unsigned short keycode[KBC_MAX_KEY * 2]; |
11f5b30d RI |
78 | unsigned short current_keys[KBC_MAX_KPENT]; |
79 | unsigned int num_pressed_keys; | |
80 | struct timer_list timer; | |
81 | struct clk *clk; | |
82 | }; | |
83 | ||
84 | static const u32 tegra_kbc_default_keymap[] = { | |
85 | KEY(0, 2, KEY_W), | |
86 | KEY(0, 3, KEY_S), | |
87 | KEY(0, 4, KEY_A), | |
88 | KEY(0, 5, KEY_Z), | |
89 | KEY(0, 7, KEY_FN), | |
90 | ||
e7acc84a | 91 | KEY(1, 7, KEY_LEFTMETA), |
11f5b30d RI |
92 | |
93 | KEY(2, 6, KEY_RIGHTALT), | |
94 | KEY(2, 7, KEY_LEFTALT), | |
95 | ||
96 | KEY(3, 0, KEY_5), | |
97 | KEY(3, 1, KEY_4), | |
98 | KEY(3, 2, KEY_R), | |
99 | KEY(3, 3, KEY_E), | |
100 | KEY(3, 4, KEY_F), | |
101 | KEY(3, 5, KEY_D), | |
102 | KEY(3, 6, KEY_X), | |
103 | ||
104 | KEY(4, 0, KEY_7), | |
105 | KEY(4, 1, KEY_6), | |
106 | KEY(4, 2, KEY_T), | |
107 | KEY(4, 3, KEY_H), | |
108 | KEY(4, 4, KEY_G), | |
109 | KEY(4, 5, KEY_V), | |
110 | KEY(4, 6, KEY_C), | |
111 | KEY(4, 7, KEY_SPACE), | |
112 | ||
113 | KEY(5, 0, KEY_9), | |
114 | KEY(5, 1, KEY_8), | |
115 | KEY(5, 2, KEY_U), | |
116 | KEY(5, 3, KEY_Y), | |
117 | KEY(5, 4, KEY_J), | |
118 | KEY(5, 5, KEY_N), | |
119 | KEY(5, 6, KEY_B), | |
120 | KEY(5, 7, KEY_BACKSLASH), | |
121 | ||
122 | KEY(6, 0, KEY_MINUS), | |
123 | KEY(6, 1, KEY_0), | |
124 | KEY(6, 2, KEY_O), | |
125 | KEY(6, 3, KEY_I), | |
126 | KEY(6, 4, KEY_L), | |
127 | KEY(6, 5, KEY_K), | |
128 | KEY(6, 6, KEY_COMMA), | |
129 | KEY(6, 7, KEY_M), | |
130 | ||
131 | KEY(7, 1, KEY_EQUAL), | |
132 | KEY(7, 2, KEY_RIGHTBRACE), | |
133 | KEY(7, 3, KEY_ENTER), | |
134 | KEY(7, 7, KEY_MENU), | |
135 | ||
136 | KEY(8, 4, KEY_RIGHTSHIFT), | |
137 | KEY(8, 5, KEY_LEFTSHIFT), | |
138 | ||
139 | KEY(9, 5, KEY_RIGHTCTRL), | |
140 | KEY(9, 7, KEY_LEFTCTRL), | |
141 | ||
142 | KEY(11, 0, KEY_LEFTBRACE), | |
143 | KEY(11, 1, KEY_P), | |
144 | KEY(11, 2, KEY_APOSTROPHE), | |
145 | KEY(11, 3, KEY_SEMICOLON), | |
146 | KEY(11, 4, KEY_SLASH), | |
147 | KEY(11, 5, KEY_DOT), | |
148 | ||
149 | KEY(12, 0, KEY_F10), | |
150 | KEY(12, 1, KEY_F9), | |
151 | KEY(12, 2, KEY_BACKSPACE), | |
152 | KEY(12, 3, KEY_3), | |
153 | KEY(12, 4, KEY_2), | |
154 | KEY(12, 5, KEY_UP), | |
155 | KEY(12, 6, KEY_PRINT), | |
156 | KEY(12, 7, KEY_PAUSE), | |
157 | ||
158 | KEY(13, 0, KEY_INSERT), | |
159 | KEY(13, 1, KEY_DELETE), | |
160 | KEY(13, 3, KEY_PAGEUP), | |
161 | KEY(13, 4, KEY_PAGEDOWN), | |
162 | KEY(13, 5, KEY_RIGHT), | |
163 | KEY(13, 6, KEY_DOWN), | |
164 | KEY(13, 7, KEY_LEFT), | |
165 | ||
166 | KEY(14, 0, KEY_F11), | |
167 | KEY(14, 1, KEY_F12), | |
168 | KEY(14, 2, KEY_F8), | |
169 | KEY(14, 3, KEY_Q), | |
170 | KEY(14, 4, KEY_F4), | |
171 | KEY(14, 5, KEY_F3), | |
172 | KEY(14, 6, KEY_1), | |
173 | KEY(14, 7, KEY_F7), | |
174 | ||
175 | KEY(15, 0, KEY_ESC), | |
176 | KEY(15, 1, KEY_GRAVE), | |
177 | KEY(15, 2, KEY_F5), | |
178 | KEY(15, 3, KEY_TAB), | |
179 | KEY(15, 4, KEY_F1), | |
180 | KEY(15, 5, KEY_F2), | |
181 | KEY(15, 6, KEY_CAPSLOCK), | |
182 | KEY(15, 7, KEY_F6), | |
4e8b65f6 RI |
183 | |
184 | /* Software Handled Function Keys */ | |
185 | KEY(20, 0, KEY_KP7), | |
186 | ||
187 | KEY(21, 0, KEY_KP9), | |
188 | KEY(21, 1, KEY_KP8), | |
189 | KEY(21, 2, KEY_KP4), | |
190 | KEY(21, 4, KEY_KP1), | |
191 | ||
192 | KEY(22, 1, KEY_KPSLASH), | |
193 | KEY(22, 2, KEY_KP6), | |
194 | KEY(22, 3, KEY_KP5), | |
195 | KEY(22, 4, KEY_KP3), | |
196 | KEY(22, 5, KEY_KP2), | |
197 | KEY(22, 7, KEY_KP0), | |
198 | ||
199 | KEY(27, 1, KEY_KPASTERISK), | |
200 | KEY(27, 3, KEY_KPMINUS), | |
201 | KEY(27, 4, KEY_KPPLUS), | |
202 | KEY(27, 5, KEY_KPDOT), | |
203 | ||
204 | KEY(28, 5, KEY_VOLUMEUP), | |
205 | ||
206 | KEY(29, 3, KEY_HOME), | |
207 | KEY(29, 4, KEY_END), | |
208 | KEY(29, 5, KEY_BRIGHTNESSDOWN), | |
209 | KEY(29, 6, KEY_VOLUMEDOWN), | |
210 | KEY(29, 7, KEY_BRIGHTNESSUP), | |
211 | ||
212 | KEY(30, 0, KEY_NUMLOCK), | |
213 | KEY(30, 1, KEY_SCROLLLOCK), | |
214 | KEY(30, 2, KEY_MUTE), | |
215 | ||
216 | KEY(31, 4, KEY_HELP), | |
11f5b30d RI |
217 | }; |
218 | ||
219 | static const struct matrix_keymap_data tegra_kbc_default_keymap_data = { | |
220 | .keymap = tegra_kbc_default_keymap, | |
221 | .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap), | |
222 | }; | |
223 | ||
224 | static void tegra_kbc_report_released_keys(struct input_dev *input, | |
225 | unsigned short old_keycodes[], | |
226 | unsigned int old_num_keys, | |
227 | unsigned short new_keycodes[], | |
228 | unsigned int new_num_keys) | |
229 | { | |
230 | unsigned int i, j; | |
231 | ||
232 | for (i = 0; i < old_num_keys; i++) { | |
233 | for (j = 0; j < new_num_keys; j++) | |
234 | if (old_keycodes[i] == new_keycodes[j]) | |
235 | break; | |
236 | ||
237 | if (j == new_num_keys) | |
238 | input_report_key(input, old_keycodes[i], 0); | |
239 | } | |
240 | } | |
241 | ||
242 | static void tegra_kbc_report_pressed_keys(struct input_dev *input, | |
243 | unsigned char scancodes[], | |
244 | unsigned short keycodes[], | |
245 | unsigned int num_pressed_keys) | |
246 | { | |
247 | unsigned int i; | |
248 | ||
249 | for (i = 0; i < num_pressed_keys; i++) { | |
250 | input_event(input, EV_MSC, MSC_SCAN, scancodes[i]); | |
251 | input_report_key(input, keycodes[i], 1); | |
252 | } | |
253 | } | |
254 | ||
255 | static void tegra_kbc_report_keys(struct tegra_kbc *kbc) | |
256 | { | |
257 | unsigned char scancodes[KBC_MAX_KPENT]; | |
258 | unsigned short keycodes[KBC_MAX_KPENT]; | |
259 | u32 val = 0; | |
260 | unsigned int i; | |
261 | unsigned int num_down = 0; | |
262 | unsigned long flags; | |
4e8b65f6 | 263 | bool fn_keypress = false; |
34abeeb2 RI |
264 | bool key_in_same_row = false; |
265 | bool key_in_same_col = false; | |
11f5b30d RI |
266 | |
267 | spin_lock_irqsave(&kbc->lock, flags); | |
268 | for (i = 0; i < KBC_MAX_KPENT; i++) { | |
269 | if ((i % 4) == 0) | |
270 | val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); | |
271 | ||
272 | if (val & 0x80) { | |
273 | unsigned int col = val & 0x07; | |
274 | unsigned int row = (val >> 3) & 0x0f; | |
275 | unsigned char scancode = | |
276 | MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT); | |
277 | ||
278 | scancodes[num_down] = scancode; | |
4e8b65f6 RI |
279 | keycodes[num_down] = kbc->keycode[scancode]; |
280 | /* If driver uses Fn map, do not report the Fn key. */ | |
281 | if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) | |
282 | fn_keypress = true; | |
283 | else | |
284 | num_down++; | |
11f5b30d RI |
285 | } |
286 | ||
287 | val >>= 8; | |
288 | } | |
4e8b65f6 | 289 | |
34abeeb2 RI |
290 | /* |
291 | * Matrix keyboard designs are prone to keyboard ghosting. | |
292 | * Ghosting occurs if there are 3 keys such that - | |
293 | * any 2 of the 3 keys share a row, and any 2 of them share a column. | |
294 | * If so ignore the key presses for this iteration. | |
295 | */ | |
296 | if ((kbc->use_ghost_filter) && (num_down >= 3)) { | |
297 | for (i = 0; i < num_down; i++) { | |
298 | unsigned int j; | |
299 | u8 curr_col = scancodes[i] & 0x07; | |
300 | u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT; | |
301 | ||
302 | /* | |
303 | * Find 2 keys such that one key is in the same row | |
304 | * and the other is in the same column as the i-th key. | |
305 | */ | |
306 | for (j = i + 1; j < num_down; j++) { | |
307 | u8 col = scancodes[j] & 0x07; | |
308 | u8 row = scancodes[j] >> KBC_ROW_SHIFT; | |
309 | ||
310 | if (col == curr_col) | |
311 | key_in_same_col = true; | |
312 | if (row == curr_row) | |
313 | key_in_same_row = true; | |
314 | } | |
315 | } | |
316 | } | |
317 | ||
4e8b65f6 RI |
318 | /* |
319 | * If the platform uses Fn keymaps, translate keys on a Fn keypress. | |
320 | * Function keycodes are KBC_MAX_KEY apart from the plain keycodes. | |
321 | */ | |
322 | if (fn_keypress) { | |
323 | for (i = 0; i < num_down; i++) { | |
324 | scancodes[i] += KBC_MAX_KEY; | |
325 | keycodes[i] = kbc->keycode[scancodes[i]]; | |
326 | } | |
327 | } | |
328 | ||
11f5b30d RI |
329 | spin_unlock_irqrestore(&kbc->lock, flags); |
330 | ||
34abeeb2 RI |
331 | /* Ignore the key presses for this iteration? */ |
332 | if (key_in_same_col && key_in_same_row) | |
333 | return; | |
334 | ||
11f5b30d RI |
335 | tegra_kbc_report_released_keys(kbc->idev, |
336 | kbc->current_keys, kbc->num_pressed_keys, | |
337 | keycodes, num_down); | |
338 | tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down); | |
339 | input_sync(kbc->idev); | |
340 | ||
341 | memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys)); | |
342 | kbc->num_pressed_keys = num_down; | |
343 | } | |
344 | ||
345 | static void tegra_kbc_keypress_timer(unsigned long data) | |
346 | { | |
347 | struct tegra_kbc *kbc = (struct tegra_kbc *)data; | |
348 | unsigned long flags; | |
349 | u32 val; | |
350 | unsigned int i; | |
351 | ||
352 | val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf; | |
353 | if (val) { | |
354 | unsigned long dly; | |
355 | ||
356 | tegra_kbc_report_keys(kbc); | |
357 | ||
358 | /* | |
359 | * If more than one keys are pressed we need not wait | |
360 | * for the repoll delay. | |
361 | */ | |
362 | dly = (val == 1) ? kbc->repoll_dly : 1; | |
363 | mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly)); | |
364 | } else { | |
365 | /* Release any pressed keys and exit the polling loop */ | |
366 | for (i = 0; i < kbc->num_pressed_keys; i++) | |
367 | input_report_key(kbc->idev, kbc->current_keys[i], 0); | |
368 | input_sync(kbc->idev); | |
369 | ||
370 | kbc->num_pressed_keys = 0; | |
371 | ||
372 | /* All keys are released so enable the keypress interrupt */ | |
373 | spin_lock_irqsave(&kbc->lock, flags); | |
374 | val = readl(kbc->mmio + KBC_CONTROL_0); | |
375 | val |= KBC_CONTROL_FIFO_CNT_INT_EN; | |
376 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
377 | spin_unlock_irqrestore(&kbc->lock, flags); | |
378 | } | |
379 | } | |
380 | ||
381 | static irqreturn_t tegra_kbc_isr(int irq, void *args) | |
382 | { | |
383 | struct tegra_kbc *kbc = args; | |
384 | u32 val, ctl; | |
385 | ||
386 | /* | |
387 | * Until all keys are released, defer further processing to | |
388 | * the polling loop in tegra_kbc_keypress_timer | |
389 | */ | |
390 | ctl = readl(kbc->mmio + KBC_CONTROL_0); | |
391 | ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN; | |
392 | writel(ctl, kbc->mmio + KBC_CONTROL_0); | |
393 | ||
394 | /* | |
395 | * Quickly bail out & reenable interrupts if the fifo threshold | |
396 | * count interrupt wasn't the interrupt source | |
397 | */ | |
398 | val = readl(kbc->mmio + KBC_INT_0); | |
399 | writel(val, kbc->mmio + KBC_INT_0); | |
400 | ||
401 | if (val & KBC_INT_FIFO_CNT_INT_STATUS) { | |
402 | /* | |
403 | * Schedule timer to run when hardware is in continuous | |
404 | * polling mode. | |
405 | */ | |
406 | mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies); | |
407 | } else { | |
408 | ctl |= KBC_CONTROL_FIFO_CNT_INT_EN; | |
409 | writel(ctl, kbc->mmio + KBC_CONTROL_0); | |
410 | } | |
411 | ||
412 | return IRQ_HANDLED; | |
413 | } | |
414 | ||
415 | static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) | |
416 | { | |
417 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
418 | int i; | |
419 | unsigned int rst_val; | |
420 | ||
421 | BUG_ON(pdata->wake_cnt > KBC_MAX_KEY); | |
422 | rst_val = (filter && pdata->wake_cnt) ? ~0 : 0; | |
423 | ||
424 | for (i = 0; i < KBC_MAX_ROW; i++) | |
425 | writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); | |
426 | ||
427 | if (filter) { | |
428 | for (i = 0; i < pdata->wake_cnt; i++) { | |
429 | u32 val, addr; | |
430 | addr = pdata->wake_cfg[i].row * 4 + KBC_ROW0_MASK_0; | |
431 | val = readl(kbc->mmio + addr); | |
432 | val &= ~(1 << pdata->wake_cfg[i].col); | |
433 | writel(val, kbc->mmio + addr); | |
434 | } | |
435 | } | |
436 | } | |
437 | ||
438 | static void tegra_kbc_config_pins(struct tegra_kbc *kbc) | |
439 | { | |
440 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
441 | int i; | |
442 | ||
443 | for (i = 0; i < KBC_MAX_GPIO; i++) { | |
444 | u32 r_shft = 5 * (i % 6); | |
445 | u32 c_shft = 4 * (i % 8); | |
7530c4a1 RI |
446 | u32 r_mask = 0x1f << r_shft; |
447 | u32 c_mask = 0x0f << c_shft; | |
11f5b30d RI |
448 | u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0; |
449 | u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0; | |
450 | u32 row_cfg = readl(kbc->mmio + r_offs); | |
451 | u32 col_cfg = readl(kbc->mmio + c_offs); | |
452 | ||
453 | row_cfg &= ~r_mask; | |
454 | col_cfg &= ~c_mask; | |
455 | ||
456 | if (pdata->pin_cfg[i].is_row) | |
457 | row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; | |
458 | else | |
459 | col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; | |
460 | ||
461 | writel(row_cfg, kbc->mmio + r_offs); | |
462 | writel(col_cfg, kbc->mmio + c_offs); | |
463 | } | |
464 | } | |
465 | ||
466 | static int tegra_kbc_start(struct tegra_kbc *kbc) | |
467 | { | |
468 | const struct tegra_kbc_platform_data *pdata = kbc->pdata; | |
469 | unsigned long flags; | |
470 | unsigned int debounce_cnt; | |
471 | u32 val = 0; | |
472 | ||
473 | clk_enable(kbc->clk); | |
474 | ||
475 | /* Reset the KBC controller to clear all previous status.*/ | |
476 | tegra_periph_reset_assert(kbc->clk); | |
477 | udelay(100); | |
478 | tegra_periph_reset_deassert(kbc->clk); | |
479 | udelay(100); | |
480 | ||
481 | tegra_kbc_config_pins(kbc); | |
482 | tegra_kbc_setup_wakekeys(kbc, false); | |
483 | ||
484 | writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); | |
485 | ||
486 | /* Keyboard debounce count is maximum of 12 bits. */ | |
487 | debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); | |
488 | val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt); | |
489 | val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */ | |
490 | val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */ | |
491 | val |= KBC_CONTROL_KBC_EN; /* enable */ | |
492 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
493 | ||
494 | /* | |
495 | * Compute the delay(ns) from interrupt mode to continuous polling | |
496 | * mode so the timer routine is scheduled appropriately. | |
497 | */ | |
498 | val = readl(kbc->mmio + KBC_INIT_DLY_0); | |
499 | kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32); | |
500 | ||
501 | kbc->num_pressed_keys = 0; | |
502 | ||
503 | /* | |
504 | * Atomically clear out any remaining entries in the key FIFO | |
505 | * and enable keyboard interrupts. | |
506 | */ | |
507 | spin_lock_irqsave(&kbc->lock, flags); | |
508 | while (1) { | |
509 | val = readl(kbc->mmio + KBC_INT_0); | |
510 | val >>= 4; | |
511 | if (!val) | |
512 | break; | |
513 | ||
514 | val = readl(kbc->mmio + KBC_KP_ENT0_0); | |
515 | val = readl(kbc->mmio + KBC_KP_ENT1_0); | |
516 | } | |
517 | writel(0x7, kbc->mmio + KBC_INT_0); | |
518 | spin_unlock_irqrestore(&kbc->lock, flags); | |
519 | ||
520 | enable_irq(kbc->irq); | |
521 | ||
522 | return 0; | |
523 | } | |
524 | ||
525 | static void tegra_kbc_stop(struct tegra_kbc *kbc) | |
526 | { | |
527 | unsigned long flags; | |
528 | u32 val; | |
529 | ||
530 | spin_lock_irqsave(&kbc->lock, flags); | |
531 | val = readl(kbc->mmio + KBC_CONTROL_0); | |
532 | val &= ~1; | |
533 | writel(val, kbc->mmio + KBC_CONTROL_0); | |
534 | spin_unlock_irqrestore(&kbc->lock, flags); | |
535 | ||
536 | disable_irq(kbc->irq); | |
537 | del_timer_sync(&kbc->timer); | |
538 | ||
539 | clk_disable(kbc->clk); | |
540 | } | |
541 | ||
542 | static int tegra_kbc_open(struct input_dev *dev) | |
543 | { | |
544 | struct tegra_kbc *kbc = input_get_drvdata(dev); | |
545 | ||
546 | return tegra_kbc_start(kbc); | |
547 | } | |
548 | ||
549 | static void tegra_kbc_close(struct input_dev *dev) | |
550 | { | |
551 | struct tegra_kbc *kbc = input_get_drvdata(dev); | |
552 | ||
553 | return tegra_kbc_stop(kbc); | |
554 | } | |
555 | ||
556 | static bool __devinit | |
557 | tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata, | |
558 | struct device *dev, unsigned int *num_rows) | |
559 | { | |
560 | int i; | |
561 | ||
562 | *num_rows = 0; | |
563 | ||
564 | for (i = 0; i < KBC_MAX_GPIO; i++) { | |
565 | const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; | |
566 | ||
567 | if (pin_cfg->is_row) { | |
568 | if (pin_cfg->num >= KBC_MAX_ROW) { | |
569 | dev_err(dev, | |
570 | "pin_cfg[%d]: invalid row number %d\n", | |
571 | i, pin_cfg->num); | |
572 | return false; | |
573 | } | |
574 | (*num_rows)++; | |
575 | } else { | |
576 | if (pin_cfg->num >= KBC_MAX_COL) { | |
577 | dev_err(dev, | |
578 | "pin_cfg[%d]: invalid column number %d\n", | |
579 | i, pin_cfg->num); | |
580 | return false; | |
581 | } | |
582 | } | |
583 | } | |
584 | ||
585 | return true; | |
586 | } | |
587 | ||
588 | static int __devinit tegra_kbc_probe(struct platform_device *pdev) | |
589 | { | |
590 | const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data; | |
591 | const struct matrix_keymap_data *keymap_data; | |
592 | struct tegra_kbc *kbc; | |
593 | struct input_dev *input_dev; | |
594 | struct resource *res; | |
595 | int irq; | |
596 | int err; | |
597 | int i; | |
598 | int num_rows = 0; | |
599 | unsigned int debounce_cnt; | |
600 | unsigned int scan_time_rows; | |
601 | ||
602 | if (!pdata) | |
603 | return -EINVAL; | |
604 | ||
605 | if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) | |
606 | return -EINVAL; | |
607 | ||
608 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
609 | if (!res) { | |
610 | dev_err(&pdev->dev, "failed to get I/O memory\n"); | |
611 | return -ENXIO; | |
612 | } | |
613 | ||
614 | irq = platform_get_irq(pdev, 0); | |
615 | if (irq < 0) { | |
616 | dev_err(&pdev->dev, "failed to get keyboard IRQ\n"); | |
617 | return -ENXIO; | |
618 | } | |
619 | ||
620 | kbc = kzalloc(sizeof(*kbc), GFP_KERNEL); | |
621 | input_dev = input_allocate_device(); | |
622 | if (!kbc || !input_dev) { | |
623 | err = -ENOMEM; | |
624 | goto err_free_mem; | |
625 | } | |
626 | ||
627 | kbc->pdata = pdata; | |
628 | kbc->idev = input_dev; | |
629 | kbc->irq = irq; | |
630 | spin_lock_init(&kbc->lock); | |
631 | setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc); | |
632 | ||
633 | res = request_mem_region(res->start, resource_size(res), pdev->name); | |
634 | if (!res) { | |
635 | dev_err(&pdev->dev, "failed to request I/O memory\n"); | |
636 | err = -EBUSY; | |
637 | goto err_free_mem; | |
638 | } | |
639 | ||
640 | kbc->mmio = ioremap(res->start, resource_size(res)); | |
641 | if (!kbc->mmio) { | |
642 | dev_err(&pdev->dev, "failed to remap I/O memory\n"); | |
643 | err = -ENXIO; | |
644 | goto err_free_mem_region; | |
645 | } | |
646 | ||
647 | kbc->clk = clk_get(&pdev->dev, NULL); | |
648 | if (IS_ERR(kbc->clk)) { | |
649 | dev_err(&pdev->dev, "failed to get keyboard clock\n"); | |
650 | err = PTR_ERR(kbc->clk); | |
651 | goto err_iounmap; | |
652 | } | |
653 | ||
654 | kbc->wake_enable_rows = 0; | |
655 | kbc->wake_enable_cols = 0; | |
656 | for (i = 0; i < pdata->wake_cnt; i++) { | |
657 | kbc->wake_enable_rows |= (1 << pdata->wake_cfg[i].row); | |
658 | kbc->wake_enable_cols |= (1 << pdata->wake_cfg[i].col); | |
659 | } | |
660 | ||
661 | /* | |
662 | * The time delay between two consecutive reads of the FIFO is | |
663 | * the sum of the repeat time and the time taken for scanning | |
664 | * the rows. There is an additional delay before the row scanning | |
665 | * starts. The repoll delay is computed in milliseconds. | |
666 | */ | |
667 | debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); | |
668 | scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows; | |
669 | kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt; | |
670 | kbc->repoll_dly = ((kbc->repoll_dly * KBC_CYCLE_USEC) + 999) / 1000; | |
671 | ||
672 | input_dev->name = pdev->name; | |
673 | input_dev->id.bustype = BUS_HOST; | |
674 | input_dev->dev.parent = &pdev->dev; | |
675 | input_dev->open = tegra_kbc_open; | |
676 | input_dev->close = tegra_kbc_close; | |
677 | ||
678 | input_set_drvdata(input_dev, kbc); | |
679 | ||
680 | input_dev->evbit[0] = BIT_MASK(EV_KEY); | |
681 | input_set_capability(input_dev, EV_MSC, MSC_SCAN); | |
682 | ||
683 | input_dev->keycode = kbc->keycode; | |
684 | input_dev->keycodesize = sizeof(kbc->keycode[0]); | |
4e8b65f6 RI |
685 | input_dev->keycodemax = KBC_MAX_KEY; |
686 | if (pdata->use_fn_map) | |
687 | input_dev->keycodemax *= 2; | |
11f5b30d | 688 | |
4e8b65f6 | 689 | kbc->use_fn_map = pdata->use_fn_map; |
34abeeb2 | 690 | kbc->use_ghost_filter = pdata->use_ghost_filter; |
11f5b30d RI |
691 | keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data; |
692 | matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT, | |
693 | input_dev->keycode, input_dev->keybit); | |
694 | ||
695 | err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH, | |
696 | pdev->name, kbc); | |
697 | if (err) { | |
698 | dev_err(&pdev->dev, "failed to request keyboard IRQ\n"); | |
699 | goto err_put_clk; | |
700 | } | |
701 | ||
702 | disable_irq(kbc->irq); | |
703 | ||
704 | err = input_register_device(kbc->idev); | |
705 | if (err) { | |
706 | dev_err(&pdev->dev, "failed to register input device\n"); | |
707 | goto err_free_irq; | |
708 | } | |
709 | ||
710 | platform_set_drvdata(pdev, kbc); | |
711 | device_init_wakeup(&pdev->dev, pdata->wakeup); | |
712 | ||
713 | return 0; | |
714 | ||
715 | err_free_irq: | |
716 | free_irq(kbc->irq, pdev); | |
717 | err_put_clk: | |
718 | clk_put(kbc->clk); | |
719 | err_iounmap: | |
720 | iounmap(kbc->mmio); | |
721 | err_free_mem_region: | |
722 | release_mem_region(res->start, resource_size(res)); | |
723 | err_free_mem: | |
724 | input_free_device(kbc->idev); | |
725 | kfree(kbc); | |
726 | ||
727 | return err; | |
728 | } | |
729 | ||
730 | static int __devexit tegra_kbc_remove(struct platform_device *pdev) | |
731 | { | |
732 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
733 | struct resource *res; | |
734 | ||
735 | free_irq(kbc->irq, pdev); | |
736 | clk_put(kbc->clk); | |
737 | ||
738 | input_unregister_device(kbc->idev); | |
739 | iounmap(kbc->mmio); | |
740 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
741 | release_mem_region(res->start, resource_size(res)); | |
742 | ||
743 | kfree(kbc); | |
744 | ||
745 | platform_set_drvdata(pdev, NULL); | |
746 | ||
747 | return 0; | |
748 | } | |
749 | ||
750 | #ifdef CONFIG_PM_SLEEP | |
751 | static int tegra_kbc_suspend(struct device *dev) | |
752 | { | |
753 | struct platform_device *pdev = to_platform_device(dev); | |
754 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
755 | ||
756 | if (device_may_wakeup(&pdev->dev)) { | |
757 | tegra_kbc_setup_wakekeys(kbc, true); | |
758 | enable_irq_wake(kbc->irq); | |
759 | /* Forcefully clear the interrupt status */ | |
760 | writel(0x7, kbc->mmio + KBC_INT_0); | |
761 | msleep(30); | |
762 | } else { | |
763 | mutex_lock(&kbc->idev->mutex); | |
764 | if (kbc->idev->users) | |
765 | tegra_kbc_stop(kbc); | |
766 | mutex_unlock(&kbc->idev->mutex); | |
767 | } | |
768 | ||
769 | return 0; | |
770 | } | |
771 | ||
772 | static int tegra_kbc_resume(struct device *dev) | |
773 | { | |
774 | struct platform_device *pdev = to_platform_device(dev); | |
775 | struct tegra_kbc *kbc = platform_get_drvdata(pdev); | |
776 | int err = 0; | |
777 | ||
778 | if (device_may_wakeup(&pdev->dev)) { | |
779 | disable_irq_wake(kbc->irq); | |
780 | tegra_kbc_setup_wakekeys(kbc, false); | |
781 | } else { | |
782 | mutex_lock(&kbc->idev->mutex); | |
783 | if (kbc->idev->users) | |
784 | err = tegra_kbc_start(kbc); | |
785 | mutex_unlock(&kbc->idev->mutex); | |
786 | } | |
787 | ||
788 | return err; | |
789 | } | |
790 | #endif | |
791 | ||
792 | static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume); | |
793 | ||
794 | static struct platform_driver tegra_kbc_driver = { | |
795 | .probe = tegra_kbc_probe, | |
796 | .remove = __devexit_p(tegra_kbc_remove), | |
797 | .driver = { | |
798 | .name = "tegra-kbc", | |
799 | .owner = THIS_MODULE, | |
800 | .pm = &tegra_kbc_pm_ops, | |
801 | }, | |
802 | }; | |
803 | ||
804 | static void __exit tegra_kbc_exit(void) | |
805 | { | |
806 | platform_driver_unregister(&tegra_kbc_driver); | |
807 | } | |
808 | module_exit(tegra_kbc_exit); | |
809 | ||
810 | static int __init tegra_kbc_init(void) | |
811 | { | |
812 | return platform_driver_register(&tegra_kbc_driver); | |
813 | } | |
814 | module_init(tegra_kbc_init); | |
815 | ||
816 | MODULE_LICENSE("GPL"); | |
817 | MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>"); | |
818 | MODULE_DESCRIPTION("Tegra matrix keyboard controller driver"); | |
819 | MODULE_ALIAS("platform:tegra-kbc"); |