Commit | Line | Data |
---|---|---|
9d2e1736 | 1 | /* |
3f48e735 | 2 | * Description: keypad driver for ADP5589, ADP5585 |
9d2e1736 MH |
3 | * I2C QWERTY Keypad and IO Expander |
4 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
5 | * | |
6 | * Copyright (C) 2010-2011 Analog Devices Inc. | |
7 | * Licensed under the GPL-2. | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
9d2e1736 MH |
11 | #include <linux/interrupt.h> |
12 | #include <linux/irq.h> | |
13 | #include <linux/workqueue.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/pm.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/input.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/gpio.h> | |
20 | #include <linux/slab.h> | |
21 | ||
22 | #include <linux/input/adp5589.h> | |
23 | ||
3f48e735 MH |
24 | /* ADP5589/ADP5585 Common Registers */ |
25 | #define ADP5589_5_ID 0x00 | |
26 | #define ADP5589_5_INT_STATUS 0x01 | |
27 | #define ADP5589_5_STATUS 0x02 | |
28 | #define ADP5589_5_FIFO_1 0x03 | |
29 | #define ADP5589_5_FIFO_2 0x04 | |
30 | #define ADP5589_5_FIFO_3 0x05 | |
31 | #define ADP5589_5_FIFO_4 0x06 | |
32 | #define ADP5589_5_FIFO_5 0x07 | |
33 | #define ADP5589_5_FIFO_6 0x08 | |
34 | #define ADP5589_5_FIFO_7 0x09 | |
35 | #define ADP5589_5_FIFO_8 0x0A | |
36 | #define ADP5589_5_FIFO_9 0x0B | |
37 | #define ADP5589_5_FIFO_10 0x0C | |
38 | #define ADP5589_5_FIFO_11 0x0D | |
39 | #define ADP5589_5_FIFO_12 0x0E | |
40 | #define ADP5589_5_FIFO_13 0x0F | |
41 | #define ADP5589_5_FIFO_14 0x10 | |
42 | #define ADP5589_5_FIFO_15 0x11 | |
43 | #define ADP5589_5_FIFO_16 0x12 | |
44 | #define ADP5589_5_GPI_INT_STAT_A 0x13 | |
45 | #define ADP5589_5_GPI_INT_STAT_B 0x14 | |
46 | ||
47 | /* ADP5589 Registers */ | |
48 | #define ADP5589_GPI_INT_STAT_C 0x15 | |
49 | #define ADP5589_GPI_STATUS_A 0x16 | |
50 | #define ADP5589_GPI_STATUS_B 0x17 | |
51 | #define ADP5589_GPI_STATUS_C 0x18 | |
52 | #define ADP5589_RPULL_CONFIG_A 0x19 | |
53 | #define ADP5589_RPULL_CONFIG_B 0x1A | |
54 | #define ADP5589_RPULL_CONFIG_C 0x1B | |
55 | #define ADP5589_RPULL_CONFIG_D 0x1C | |
56 | #define ADP5589_RPULL_CONFIG_E 0x1D | |
57 | #define ADP5589_GPI_INT_LEVEL_A 0x1E | |
58 | #define ADP5589_GPI_INT_LEVEL_B 0x1F | |
59 | #define ADP5589_GPI_INT_LEVEL_C 0x20 | |
60 | #define ADP5589_GPI_EVENT_EN_A 0x21 | |
61 | #define ADP5589_GPI_EVENT_EN_B 0x22 | |
62 | #define ADP5589_GPI_EVENT_EN_C 0x23 | |
63 | #define ADP5589_GPI_INTERRUPT_EN_A 0x24 | |
64 | #define ADP5589_GPI_INTERRUPT_EN_B 0x25 | |
65 | #define ADP5589_GPI_INTERRUPT_EN_C 0x26 | |
66 | #define ADP5589_DEBOUNCE_DIS_A 0x27 | |
67 | #define ADP5589_DEBOUNCE_DIS_B 0x28 | |
68 | #define ADP5589_DEBOUNCE_DIS_C 0x29 | |
69 | #define ADP5589_GPO_DATA_OUT_A 0x2A | |
70 | #define ADP5589_GPO_DATA_OUT_B 0x2B | |
71 | #define ADP5589_GPO_DATA_OUT_C 0x2C | |
72 | #define ADP5589_GPO_OUT_MODE_A 0x2D | |
73 | #define ADP5589_GPO_OUT_MODE_B 0x2E | |
74 | #define ADP5589_GPO_OUT_MODE_C 0x2F | |
75 | #define ADP5589_GPIO_DIRECTION_A 0x30 | |
76 | #define ADP5589_GPIO_DIRECTION_B 0x31 | |
77 | #define ADP5589_GPIO_DIRECTION_C 0x32 | |
78 | #define ADP5589_UNLOCK1 0x33 | |
79 | #define ADP5589_UNLOCK2 0x34 | |
80 | #define ADP5589_EXT_LOCK_EVENT 0x35 | |
81 | #define ADP5589_UNLOCK_TIMERS 0x36 | |
82 | #define ADP5589_LOCK_CFG 0x37 | |
83 | #define ADP5589_RESET1_EVENT_A 0x38 | |
84 | #define ADP5589_RESET1_EVENT_B 0x39 | |
85 | #define ADP5589_RESET1_EVENT_C 0x3A | |
86 | #define ADP5589_RESET2_EVENT_A 0x3B | |
87 | #define ADP5589_RESET2_EVENT_B 0x3C | |
88 | #define ADP5589_RESET_CFG 0x3D | |
89 | #define ADP5589_PWM_OFFT_LOW 0x3E | |
90 | #define ADP5589_PWM_OFFT_HIGH 0x3F | |
91 | #define ADP5589_PWM_ONT_LOW 0x40 | |
92 | #define ADP5589_PWM_ONT_HIGH 0x41 | |
93 | #define ADP5589_PWM_CFG 0x42 | |
94 | #define ADP5589_CLOCK_DIV_CFG 0x43 | |
95 | #define ADP5589_LOGIC_1_CFG 0x44 | |
96 | #define ADP5589_LOGIC_2_CFG 0x45 | |
97 | #define ADP5589_LOGIC_FF_CFG 0x46 | |
98 | #define ADP5589_LOGIC_INT_EVENT_EN 0x47 | |
99 | #define ADP5589_POLL_PTIME_CFG 0x48 | |
100 | #define ADP5589_PIN_CONFIG_A 0x49 | |
101 | #define ADP5589_PIN_CONFIG_B 0x4A | |
102 | #define ADP5589_PIN_CONFIG_C 0x4B | |
103 | #define ADP5589_PIN_CONFIG_D 0x4C | |
104 | #define ADP5589_GENERAL_CFG 0x4D | |
105 | #define ADP5589_INT_EN 0x4E | |
106 | ||
107 | /* ADP5585 Registers */ | |
108 | #define ADP5585_GPI_STATUS_A 0x15 | |
109 | #define ADP5585_GPI_STATUS_B 0x16 | |
110 | #define ADP5585_RPULL_CONFIG_A 0x17 | |
111 | #define ADP5585_RPULL_CONFIG_B 0x18 | |
112 | #define ADP5585_RPULL_CONFIG_C 0x19 | |
113 | #define ADP5585_RPULL_CONFIG_D 0x1A | |
114 | #define ADP5585_GPI_INT_LEVEL_A 0x1B | |
115 | #define ADP5585_GPI_INT_LEVEL_B 0x1C | |
116 | #define ADP5585_GPI_EVENT_EN_A 0x1D | |
117 | #define ADP5585_GPI_EVENT_EN_B 0x1E | |
118 | #define ADP5585_GPI_INTERRUPT_EN_A 0x1F | |
119 | #define ADP5585_GPI_INTERRUPT_EN_B 0x20 | |
120 | #define ADP5585_DEBOUNCE_DIS_A 0x21 | |
121 | #define ADP5585_DEBOUNCE_DIS_B 0x22 | |
122 | #define ADP5585_GPO_DATA_OUT_A 0x23 | |
123 | #define ADP5585_GPO_DATA_OUT_B 0x24 | |
124 | #define ADP5585_GPO_OUT_MODE_A 0x25 | |
125 | #define ADP5585_GPO_OUT_MODE_B 0x26 | |
126 | #define ADP5585_GPIO_DIRECTION_A 0x27 | |
127 | #define ADP5585_GPIO_DIRECTION_B 0x28 | |
128 | #define ADP5585_RESET1_EVENT_A 0x29 | |
129 | #define ADP5585_RESET1_EVENT_B 0x2A | |
130 | #define ADP5585_RESET1_EVENT_C 0x2B | |
131 | #define ADP5585_RESET2_EVENT_A 0x2C | |
132 | #define ADP5585_RESET2_EVENT_B 0x2D | |
133 | #define ADP5585_RESET_CFG 0x2E | |
134 | #define ADP5585_PWM_OFFT_LOW 0x2F | |
135 | #define ADP5585_PWM_OFFT_HIGH 0x30 | |
136 | #define ADP5585_PWM_ONT_LOW 0x31 | |
137 | #define ADP5585_PWM_ONT_HIGH 0x32 | |
138 | #define ADP5585_PWM_CFG 0x33 | |
139 | #define ADP5585_LOGIC_CFG 0x34 | |
140 | #define ADP5585_LOGIC_FF_CFG 0x35 | |
141 | #define ADP5585_LOGIC_INT_EVENT_EN 0x36 | |
142 | #define ADP5585_POLL_PTIME_CFG 0x37 | |
143 | #define ADP5585_PIN_CONFIG_A 0x38 | |
144 | #define ADP5585_PIN_CONFIG_B 0x39 | |
145 | #define ADP5585_PIN_CONFIG_D 0x3A | |
146 | #define ADP5585_GENERAL_CFG 0x3B | |
147 | #define ADP5585_INT_EN 0x3C | |
148 | ||
149 | /* ID Register */ | |
150 | #define ADP5589_5_DEVICE_ID_MASK 0xF | |
151 | #define ADP5589_5_MAN_ID_MASK 0xF | |
152 | #define ADP5589_5_MAN_ID_SHIFT 4 | |
153 | #define ADP5589_5_MAN_ID 0x02 | |
154 | ||
9d2e1736 MH |
155 | /* GENERAL_CFG Register */ |
156 | #define OSC_EN (1 << 7) | |
157 | #define CORE_CLK(x) (((x) & 0x3) << 5) | |
3f48e735 MH |
158 | #define LCK_TRK_LOGIC (1 << 4) /* ADP5589 only */ |
159 | #define LCK_TRK_GPI (1 << 3) /* ADP5589 only */ | |
9d2e1736 MH |
160 | #define INT_CFG (1 << 1) |
161 | #define RST_CFG (1 << 0) | |
162 | ||
163 | /* INT_EN Register */ | |
3f48e735 | 164 | #define LOGIC2_IEN (1 << 5) /* ADP5589 only */ |
9d2e1736 | 165 | #define LOGIC1_IEN (1 << 4) |
3f48e735 | 166 | #define LOCK_IEN (1 << 3) /* ADP5589 only */ |
9d2e1736 MH |
167 | #define OVRFLOW_IEN (1 << 2) |
168 | #define GPI_IEN (1 << 1) | |
169 | #define EVENT_IEN (1 << 0) | |
170 | ||
171 | /* Interrupt Status Register */ | |
3f48e735 | 172 | #define LOGIC2_INT (1 << 5) /* ADP5589 only */ |
9d2e1736 | 173 | #define LOGIC1_INT (1 << 4) |
3f48e735 | 174 | #define LOCK_INT (1 << 3) /* ADP5589 only */ |
9d2e1736 MH |
175 | #define OVRFLOW_INT (1 << 2) |
176 | #define GPI_INT (1 << 1) | |
177 | #define EVENT_INT (1 << 0) | |
178 | ||
179 | /* STATUS Register */ | |
3f48e735 | 180 | #define LOGIC2_STAT (1 << 7) /* ADP5589 only */ |
9d2e1736 | 181 | #define LOGIC1_STAT (1 << 6) |
3f48e735 | 182 | #define LOCK_STAT (1 << 5) /* ADP5589 only */ |
9d2e1736 MH |
183 | #define KEC 0xF |
184 | ||
185 | /* PIN_CONFIG_D Register */ | |
186 | #define C4_EXTEND_CFG (1 << 6) /* RESET2 */ | |
187 | #define R4_EXTEND_CFG (1 << 5) /* RESET1 */ | |
188 | ||
189 | /* LOCK_CFG */ | |
190 | #define LOCK_EN (1 << 0) | |
191 | ||
192 | #define PTIME_MASK 0x3 | |
3f48e735 | 193 | #define LTIME_MASK 0x3 /* ADP5589 only */ |
9d2e1736 MH |
194 | |
195 | /* Key Event Register xy */ | |
196 | #define KEY_EV_PRESSED (1 << 7) | |
197 | #define KEY_EV_MASK (0x7F) | |
198 | ||
199 | #define KEYP_MAX_EVENT 16 | |
3f48e735 MH |
200 | #define ADP5589_MAXGPIO 19 |
201 | #define ADP5585_MAXGPIO 11 /* 10 on the ADP5585-01, 11 on ADP5585-02 */ | |
9d2e1736 | 202 | |
3f48e735 MH |
203 | enum { |
204 | ADP5589, | |
205 | ADP5585_01, | |
206 | ADP5585_02 | |
207 | }; | |
208 | ||
209 | struct adp_constants { | |
210 | u8 maxgpio; | |
211 | u8 keymapsize; | |
212 | u8 gpi_pin_row_base; | |
213 | u8 gpi_pin_row_end; | |
214 | u8 gpi_pin_col_base; | |
215 | u8 gpi_pin_base; | |
216 | u8 gpi_pin_end; | |
217 | u8 gpimapsize_max; | |
218 | u8 max_row_num; | |
219 | u8 max_col_num; | |
220 | u8 row_mask; | |
221 | u8 col_mask; | |
222 | u8 col_shift; | |
223 | u8 c4_extend_cfg; | |
224 | u8 (*bank) (u8 offset); | |
225 | u8 (*bit) (u8 offset); | |
226 | u8 (*reg) (u8 reg); | |
227 | }; | |
9d2e1736 MH |
228 | |
229 | struct adp5589_kpad { | |
230 | struct i2c_client *client; | |
231 | struct input_dev *input; | |
3f48e735 | 232 | const struct adp_constants *var; |
9d2e1736 MH |
233 | unsigned short keycode[ADP5589_KEYMAPSIZE]; |
234 | const struct adp5589_gpi_map *gpimap; | |
235 | unsigned short gpimapsize; | |
236 | unsigned extend_cfg; | |
3f48e735 MH |
237 | bool is_adp5585; |
238 | bool adp5585_support_row5; | |
9d2e1736 | 239 | #ifdef CONFIG_GPIOLIB |
3f48e735 | 240 | unsigned char gpiomap[ADP5589_MAXGPIO]; |
9d2e1736 MH |
241 | bool export_gpio; |
242 | struct gpio_chip gc; | |
243 | struct mutex gpio_lock; /* Protect cached dir, dat_out */ | |
244 | u8 dat_out[3]; | |
245 | u8 dir[3]; | |
246 | #endif | |
247 | }; | |
248 | ||
3f48e735 MH |
249 | /* |
250 | * ADP5589 / ADP5585 derivative / variant handling | |
251 | */ | |
252 | ||
253 | ||
254 | /* ADP5589 */ | |
255 | ||
256 | static unsigned char adp5589_bank(unsigned char offset) | |
257 | { | |
258 | return offset >> 3; | |
259 | } | |
260 | ||
261 | static unsigned char adp5589_bit(unsigned char offset) | |
262 | { | |
263 | return 1u << (offset & 0x7); | |
264 | } | |
265 | ||
266 | static unsigned char adp5589_reg(unsigned char reg) | |
267 | { | |
268 | return reg; | |
269 | } | |
270 | ||
271 | static const struct adp_constants const_adp5589 = { | |
272 | .maxgpio = ADP5589_MAXGPIO, | |
273 | .keymapsize = ADP5589_KEYMAPSIZE, | |
274 | .gpi_pin_row_base = ADP5589_GPI_PIN_ROW_BASE, | |
275 | .gpi_pin_row_end = ADP5589_GPI_PIN_ROW_END, | |
276 | .gpi_pin_col_base = ADP5589_GPI_PIN_COL_BASE, | |
277 | .gpi_pin_base = ADP5589_GPI_PIN_BASE, | |
278 | .gpi_pin_end = ADP5589_GPI_PIN_END, | |
279 | .gpimapsize_max = ADP5589_GPIMAPSIZE_MAX, | |
280 | .c4_extend_cfg = 12, | |
281 | .max_row_num = ADP5589_MAX_ROW_NUM, | |
282 | .max_col_num = ADP5589_MAX_COL_NUM, | |
283 | .row_mask = ADP5589_ROW_MASK, | |
284 | .col_mask = ADP5589_COL_MASK, | |
285 | .col_shift = ADP5589_COL_SHIFT, | |
286 | .bank = adp5589_bank, | |
287 | .bit = adp5589_bit, | |
288 | .reg = adp5589_reg, | |
289 | }; | |
290 | ||
291 | /* ADP5585 */ | |
292 | ||
293 | static unsigned char adp5585_bank(unsigned char offset) | |
294 | { | |
295 | return offset > ADP5585_MAX_ROW_NUM; | |
296 | } | |
297 | ||
298 | static unsigned char adp5585_bit(unsigned char offset) | |
299 | { | |
300 | return (offset > ADP5585_MAX_ROW_NUM) ? | |
301 | 1u << (offset - ADP5585_COL_SHIFT) : 1u << offset; | |
302 | } | |
303 | ||
304 | static const unsigned char adp5585_reg_lut[] = { | |
305 | [ADP5589_GPI_STATUS_A] = ADP5585_GPI_STATUS_A, | |
306 | [ADP5589_GPI_STATUS_B] = ADP5585_GPI_STATUS_B, | |
307 | [ADP5589_RPULL_CONFIG_A] = ADP5585_RPULL_CONFIG_A, | |
308 | [ADP5589_RPULL_CONFIG_B] = ADP5585_RPULL_CONFIG_B, | |
309 | [ADP5589_RPULL_CONFIG_C] = ADP5585_RPULL_CONFIG_C, | |
310 | [ADP5589_RPULL_CONFIG_D] = ADP5585_RPULL_CONFIG_D, | |
311 | [ADP5589_GPI_INT_LEVEL_A] = ADP5585_GPI_INT_LEVEL_A, | |
312 | [ADP5589_GPI_INT_LEVEL_B] = ADP5585_GPI_INT_LEVEL_B, | |
313 | [ADP5589_GPI_EVENT_EN_A] = ADP5585_GPI_EVENT_EN_A, | |
314 | [ADP5589_GPI_EVENT_EN_B] = ADP5585_GPI_EVENT_EN_B, | |
315 | [ADP5589_GPI_INTERRUPT_EN_A] = ADP5585_GPI_INTERRUPT_EN_A, | |
316 | [ADP5589_GPI_INTERRUPT_EN_B] = ADP5585_GPI_INTERRUPT_EN_B, | |
317 | [ADP5589_DEBOUNCE_DIS_A] = ADP5585_DEBOUNCE_DIS_A, | |
318 | [ADP5589_DEBOUNCE_DIS_B] = ADP5585_DEBOUNCE_DIS_B, | |
319 | [ADP5589_GPO_DATA_OUT_A] = ADP5585_GPO_DATA_OUT_A, | |
320 | [ADP5589_GPO_DATA_OUT_B] = ADP5585_GPO_DATA_OUT_B, | |
321 | [ADP5589_GPO_OUT_MODE_A] = ADP5585_GPO_OUT_MODE_A, | |
322 | [ADP5589_GPO_OUT_MODE_B] = ADP5585_GPO_OUT_MODE_B, | |
323 | [ADP5589_GPIO_DIRECTION_A] = ADP5585_GPIO_DIRECTION_A, | |
324 | [ADP5589_GPIO_DIRECTION_B] = ADP5585_GPIO_DIRECTION_B, | |
325 | [ADP5589_RESET1_EVENT_A] = ADP5585_RESET1_EVENT_A, | |
326 | [ADP5589_RESET1_EVENT_B] = ADP5585_RESET1_EVENT_B, | |
327 | [ADP5589_RESET1_EVENT_C] = ADP5585_RESET1_EVENT_C, | |
328 | [ADP5589_RESET2_EVENT_A] = ADP5585_RESET2_EVENT_A, | |
329 | [ADP5589_RESET2_EVENT_B] = ADP5585_RESET2_EVENT_B, | |
330 | [ADP5589_RESET_CFG] = ADP5585_RESET_CFG, | |
331 | [ADP5589_PWM_OFFT_LOW] = ADP5585_PWM_OFFT_LOW, | |
332 | [ADP5589_PWM_OFFT_HIGH] = ADP5585_PWM_OFFT_HIGH, | |
333 | [ADP5589_PWM_ONT_LOW] = ADP5585_PWM_ONT_LOW, | |
334 | [ADP5589_PWM_ONT_HIGH] = ADP5585_PWM_ONT_HIGH, | |
335 | [ADP5589_PWM_CFG] = ADP5585_PWM_CFG, | |
336 | [ADP5589_LOGIC_1_CFG] = ADP5585_LOGIC_CFG, | |
337 | [ADP5589_LOGIC_FF_CFG] = ADP5585_LOGIC_FF_CFG, | |
338 | [ADP5589_LOGIC_INT_EVENT_EN] = ADP5585_LOGIC_INT_EVENT_EN, | |
339 | [ADP5589_POLL_PTIME_CFG] = ADP5585_POLL_PTIME_CFG, | |
340 | [ADP5589_PIN_CONFIG_A] = ADP5585_PIN_CONFIG_A, | |
341 | [ADP5589_PIN_CONFIG_B] = ADP5585_PIN_CONFIG_B, | |
342 | [ADP5589_PIN_CONFIG_D] = ADP5585_PIN_CONFIG_D, | |
343 | [ADP5589_GENERAL_CFG] = ADP5585_GENERAL_CFG, | |
344 | [ADP5589_INT_EN] = ADP5585_INT_EN, | |
345 | }; | |
346 | ||
347 | static unsigned char adp5585_reg(unsigned char reg) | |
348 | { | |
349 | return adp5585_reg_lut[reg]; | |
350 | } | |
351 | ||
352 | static const struct adp_constants const_adp5585 = { | |
353 | .maxgpio = ADP5585_MAXGPIO, | |
354 | .keymapsize = ADP5585_KEYMAPSIZE, | |
355 | .gpi_pin_row_base = ADP5585_GPI_PIN_ROW_BASE, | |
356 | .gpi_pin_row_end = ADP5585_GPI_PIN_ROW_END, | |
357 | .gpi_pin_col_base = ADP5585_GPI_PIN_COL_BASE, | |
358 | .gpi_pin_base = ADP5585_GPI_PIN_BASE, | |
359 | .gpi_pin_end = ADP5585_GPI_PIN_END, | |
360 | .gpimapsize_max = ADP5585_GPIMAPSIZE_MAX, | |
361 | .c4_extend_cfg = 10, | |
362 | .max_row_num = ADP5585_MAX_ROW_NUM, | |
363 | .max_col_num = ADP5585_MAX_COL_NUM, | |
364 | .row_mask = ADP5585_ROW_MASK, | |
365 | .col_mask = ADP5585_COL_MASK, | |
366 | .col_shift = ADP5585_COL_SHIFT, | |
367 | .bank = adp5585_bank, | |
368 | .bit = adp5585_bit, | |
369 | .reg = adp5585_reg, | |
370 | }; | |
371 | ||
9d2e1736 MH |
372 | static int adp5589_read(struct i2c_client *client, u8 reg) |
373 | { | |
374 | int ret = i2c_smbus_read_byte_data(client, reg); | |
375 | ||
376 | if (ret < 0) | |
377 | dev_err(&client->dev, "Read Error\n"); | |
378 | ||
379 | return ret; | |
380 | } | |
381 | ||
382 | static int adp5589_write(struct i2c_client *client, u8 reg, u8 val) | |
383 | { | |
384 | return i2c_smbus_write_byte_data(client, reg, val); | |
385 | } | |
386 | ||
387 | #ifdef CONFIG_GPIOLIB | |
388 | static int adp5589_gpio_get_value(struct gpio_chip *chip, unsigned off) | |
389 | { | |
390 | struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); | |
3f48e735 MH |
391 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
392 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); | |
9d2e1736 | 393 | |
3f48e735 MH |
394 | return !!(adp5589_read(kpad->client, |
395 | kpad->var->reg(ADP5589_GPI_STATUS_A) + bank) & | |
396 | bit); | |
9d2e1736 MH |
397 | } |
398 | ||
399 | static void adp5589_gpio_set_value(struct gpio_chip *chip, | |
400 | unsigned off, int val) | |
401 | { | |
402 | struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); | |
3f48e735 MH |
403 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
404 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); | |
9d2e1736 MH |
405 | |
406 | mutex_lock(&kpad->gpio_lock); | |
407 | ||
408 | if (val) | |
409 | kpad->dat_out[bank] |= bit; | |
410 | else | |
411 | kpad->dat_out[bank] &= ~bit; | |
412 | ||
3f48e735 MH |
413 | adp5589_write(kpad->client, kpad->var->reg(ADP5589_GPO_DATA_OUT_A) + |
414 | bank, kpad->dat_out[bank]); | |
9d2e1736 MH |
415 | |
416 | mutex_unlock(&kpad->gpio_lock); | |
417 | } | |
418 | ||
419 | static int adp5589_gpio_direction_input(struct gpio_chip *chip, unsigned off) | |
420 | { | |
421 | struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); | |
3f48e735 MH |
422 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
423 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); | |
9d2e1736 MH |
424 | int ret; |
425 | ||
426 | mutex_lock(&kpad->gpio_lock); | |
427 | ||
428 | kpad->dir[bank] &= ~bit; | |
3f48e735 MH |
429 | ret = adp5589_write(kpad->client, |
430 | kpad->var->reg(ADP5589_GPIO_DIRECTION_A) + bank, | |
9d2e1736 MH |
431 | kpad->dir[bank]); |
432 | ||
433 | mutex_unlock(&kpad->gpio_lock); | |
434 | ||
435 | return ret; | |
436 | } | |
437 | ||
438 | static int adp5589_gpio_direction_output(struct gpio_chip *chip, | |
439 | unsigned off, int val) | |
440 | { | |
441 | struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); | |
3f48e735 MH |
442 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
443 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); | |
9d2e1736 MH |
444 | int ret; |
445 | ||
446 | mutex_lock(&kpad->gpio_lock); | |
447 | ||
448 | kpad->dir[bank] |= bit; | |
449 | ||
450 | if (val) | |
451 | kpad->dat_out[bank] |= bit; | |
452 | else | |
453 | kpad->dat_out[bank] &= ~bit; | |
454 | ||
3f48e735 MH |
455 | ret = adp5589_write(kpad->client, kpad->var->reg(ADP5589_GPO_DATA_OUT_A) |
456 | + bank, kpad->dat_out[bank]); | |
457 | ret |= adp5589_write(kpad->client, | |
458 | kpad->var->reg(ADP5589_GPIO_DIRECTION_A) + bank, | |
9d2e1736 MH |
459 | kpad->dir[bank]); |
460 | ||
461 | mutex_unlock(&kpad->gpio_lock); | |
462 | ||
463 | return ret; | |
464 | } | |
465 | ||
5298cc4c | 466 | static int adp5589_build_gpiomap(struct adp5589_kpad *kpad, |
9d2e1736 MH |
467 | const struct adp5589_kpad_platform_data *pdata) |
468 | { | |
3f48e735 | 469 | bool pin_used[ADP5589_MAXGPIO]; |
9d2e1736 MH |
470 | int n_unused = 0; |
471 | int i; | |
472 | ||
473 | memset(pin_used, false, sizeof(pin_used)); | |
474 | ||
3f48e735 | 475 | for (i = 0; i < kpad->var->maxgpio; i++) |
9d2e1736 MH |
476 | if (pdata->keypad_en_mask & (1 << i)) |
477 | pin_used[i] = true; | |
478 | ||
479 | for (i = 0; i < kpad->gpimapsize; i++) | |
3f48e735 | 480 | pin_used[kpad->gpimap[i].pin - kpad->var->gpi_pin_base] = true; |
9d2e1736 MH |
481 | |
482 | if (kpad->extend_cfg & R4_EXTEND_CFG) | |
483 | pin_used[4] = true; | |
484 | ||
485 | if (kpad->extend_cfg & C4_EXTEND_CFG) | |
3f48e735 MH |
486 | pin_used[kpad->var->c4_extend_cfg] = true; |
487 | ||
488 | if (!kpad->adp5585_support_row5) | |
489 | pin_used[5] = true; | |
9d2e1736 | 490 | |
3f48e735 | 491 | for (i = 0; i < kpad->var->maxgpio; i++) |
9d2e1736 MH |
492 | if (!pin_used[i]) |
493 | kpad->gpiomap[n_unused++] = i; | |
494 | ||
495 | return n_unused; | |
496 | } | |
497 | ||
5298cc4c | 498 | static int adp5589_gpio_add(struct adp5589_kpad *kpad) |
9d2e1736 MH |
499 | { |
500 | struct device *dev = &kpad->client->dev; | |
c838cb3d | 501 | const struct adp5589_kpad_platform_data *pdata = dev_get_platdata(dev); |
9d2e1736 MH |
502 | const struct adp5589_gpio_platform_data *gpio_data = pdata->gpio_data; |
503 | int i, error; | |
504 | ||
505 | if (!gpio_data) | |
506 | return 0; | |
507 | ||
508 | kpad->gc.ngpio = adp5589_build_gpiomap(kpad, pdata); | |
509 | if (kpad->gc.ngpio == 0) { | |
510 | dev_info(dev, "No unused gpios left to export\n"); | |
511 | return 0; | |
512 | } | |
513 | ||
514 | kpad->export_gpio = true; | |
515 | ||
516 | kpad->gc.direction_input = adp5589_gpio_direction_input; | |
517 | kpad->gc.direction_output = adp5589_gpio_direction_output; | |
518 | kpad->gc.get = adp5589_gpio_get_value; | |
519 | kpad->gc.set = adp5589_gpio_set_value; | |
520 | kpad->gc.can_sleep = 1; | |
521 | ||
522 | kpad->gc.base = gpio_data->gpio_start; | |
523 | kpad->gc.label = kpad->client->name; | |
524 | kpad->gc.owner = THIS_MODULE; | |
525 | ||
526 | mutex_init(&kpad->gpio_lock); | |
527 | ||
528 | error = gpiochip_add(&kpad->gc); | |
529 | if (error) { | |
530 | dev_err(dev, "gpiochip_add failed, err: %d\n", error); | |
531 | return error; | |
532 | } | |
533 | ||
3f48e735 MH |
534 | for (i = 0; i <= kpad->var->bank(kpad->var->maxgpio); i++) { |
535 | kpad->dat_out[i] = adp5589_read(kpad->client, kpad->var->reg( | |
536 | ADP5589_GPO_DATA_OUT_A) + i); | |
537 | kpad->dir[i] = adp5589_read(kpad->client, kpad->var->reg( | |
538 | ADP5589_GPIO_DIRECTION_A) + i); | |
9d2e1736 MH |
539 | } |
540 | ||
541 | if (gpio_data->setup) { | |
542 | error = gpio_data->setup(kpad->client, | |
543 | kpad->gc.base, kpad->gc.ngpio, | |
544 | gpio_data->context); | |
545 | if (error) | |
546 | dev_warn(dev, "setup failed, %d\n", error); | |
547 | } | |
548 | ||
549 | return 0; | |
550 | } | |
551 | ||
e2619cf7 | 552 | static void adp5589_gpio_remove(struct adp5589_kpad *kpad) |
9d2e1736 MH |
553 | { |
554 | struct device *dev = &kpad->client->dev; | |
c838cb3d | 555 | const struct adp5589_kpad_platform_data *pdata = dev_get_platdata(dev); |
9d2e1736 MH |
556 | const struct adp5589_gpio_platform_data *gpio_data = pdata->gpio_data; |
557 | int error; | |
558 | ||
559 | if (!kpad->export_gpio) | |
560 | return; | |
561 | ||
562 | if (gpio_data->teardown) { | |
563 | error = gpio_data->teardown(kpad->client, | |
564 | kpad->gc.base, kpad->gc.ngpio, | |
565 | gpio_data->context); | |
566 | if (error) | |
567 | dev_warn(dev, "teardown failed %d\n", error); | |
568 | } | |
569 | ||
88d5e520 | 570 | gpiochip_remove(&kpad->gc); |
9d2e1736 MH |
571 | } |
572 | #else | |
573 | static inline int adp5589_gpio_add(struct adp5589_kpad *kpad) | |
574 | { | |
575 | return 0; | |
576 | } | |
577 | ||
578 | static inline void adp5589_gpio_remove(struct adp5589_kpad *kpad) | |
579 | { | |
580 | } | |
581 | #endif | |
582 | ||
583 | static void adp5589_report_switches(struct adp5589_kpad *kpad, | |
584 | int key, int key_val) | |
585 | { | |
586 | int i; | |
587 | ||
588 | for (i = 0; i < kpad->gpimapsize; i++) { | |
589 | if (key_val == kpad->gpimap[i].pin) { | |
590 | input_report_switch(kpad->input, | |
591 | kpad->gpimap[i].sw_evt, | |
592 | key & KEY_EV_PRESSED); | |
593 | break; | |
594 | } | |
595 | } | |
596 | } | |
597 | ||
598 | static void adp5589_report_events(struct adp5589_kpad *kpad, int ev_cnt) | |
599 | { | |
600 | int i; | |
601 | ||
602 | for (i = 0; i < ev_cnt; i++) { | |
3f48e735 | 603 | int key = adp5589_read(kpad->client, ADP5589_5_FIFO_1 + i); |
9d2e1736 MH |
604 | int key_val = key & KEY_EV_MASK; |
605 | ||
3f48e735 MH |
606 | if (key_val >= kpad->var->gpi_pin_base && |
607 | key_val <= kpad->var->gpi_pin_end) { | |
9d2e1736 MH |
608 | adp5589_report_switches(kpad, key, key_val); |
609 | } else { | |
610 | input_report_key(kpad->input, | |
611 | kpad->keycode[key_val - 1], | |
612 | key & KEY_EV_PRESSED); | |
613 | } | |
614 | } | |
615 | } | |
616 | ||
617 | static irqreturn_t adp5589_irq(int irq, void *handle) | |
618 | { | |
619 | struct adp5589_kpad *kpad = handle; | |
620 | struct i2c_client *client = kpad->client; | |
621 | int status, ev_cnt; | |
622 | ||
3f48e735 | 623 | status = adp5589_read(client, ADP5589_5_INT_STATUS); |
9d2e1736 MH |
624 | |
625 | if (status & OVRFLOW_INT) /* Unlikely and should never happen */ | |
626 | dev_err(&client->dev, "Event Overflow Error\n"); | |
627 | ||
628 | if (status & EVENT_INT) { | |
3f48e735 | 629 | ev_cnt = adp5589_read(client, ADP5589_5_STATUS) & KEC; |
9d2e1736 MH |
630 | if (ev_cnt) { |
631 | adp5589_report_events(kpad, ev_cnt); | |
632 | input_sync(kpad->input); | |
633 | } | |
634 | } | |
635 | ||
3f48e735 | 636 | adp5589_write(client, ADP5589_5_INT_STATUS, status); /* Status is W1C */ |
9d2e1736 MH |
637 | |
638 | return IRQ_HANDLED; | |
639 | } | |
640 | ||
5298cc4c | 641 | static int adp5589_get_evcode(struct adp5589_kpad *kpad, unsigned short key) |
9d2e1736 MH |
642 | { |
643 | int i; | |
644 | ||
3f48e735 | 645 | for (i = 0; i < kpad->var->keymapsize; i++) |
9d2e1736 MH |
646 | if (key == kpad->keycode[i]) |
647 | return (i + 1) | KEY_EV_PRESSED; | |
648 | ||
649 | dev_err(&kpad->client->dev, "RESET/UNLOCK key not in keycode map\n"); | |
650 | ||
651 | return -EINVAL; | |
652 | } | |
653 | ||
5298cc4c | 654 | static int adp5589_setup(struct adp5589_kpad *kpad) |
9d2e1736 MH |
655 | { |
656 | struct i2c_client *client = kpad->client; | |
657 | const struct adp5589_kpad_platform_data *pdata = | |
c838cb3d | 658 | dev_get_platdata(&client->dev); |
3f48e735 | 659 | u8 (*reg) (u8) = kpad->var->reg; |
9d2e1736 MH |
660 | unsigned char evt_mode1 = 0, evt_mode2 = 0, evt_mode3 = 0; |
661 | unsigned char pull_mask = 0; | |
3f48e735 MH |
662 | int i, ret; |
663 | ||
664 | ret = adp5589_write(client, reg(ADP5589_PIN_CONFIG_A), | |
665 | pdata->keypad_en_mask & kpad->var->row_mask); | |
666 | ret |= adp5589_write(client, reg(ADP5589_PIN_CONFIG_B), | |
667 | (pdata->keypad_en_mask >> kpad->var->col_shift) & | |
668 | kpad->var->col_mask); | |
9d2e1736 | 669 | |
3f48e735 MH |
670 | if (!kpad->is_adp5585) |
671 | ret |= adp5589_write(client, ADP5589_PIN_CONFIG_C, | |
672 | (pdata->keypad_en_mask >> 16) & 0xFF); | |
9d2e1736 | 673 | |
3f48e735 | 674 | if (!kpad->is_adp5585 && pdata->en_keylock) { |
9d2e1736 MH |
675 | ret |= adp5589_write(client, ADP5589_UNLOCK1, |
676 | pdata->unlock_key1); | |
677 | ret |= adp5589_write(client, ADP5589_UNLOCK2, | |
678 | pdata->unlock_key2); | |
679 | ret |= adp5589_write(client, ADP5589_UNLOCK_TIMERS, | |
680 | pdata->unlock_timer & LTIME_MASK); | |
681 | ret |= adp5589_write(client, ADP5589_LOCK_CFG, LOCK_EN); | |
682 | } | |
683 | ||
684 | for (i = 0; i < KEYP_MAX_EVENT; i++) | |
3f48e735 | 685 | ret |= adp5589_read(client, ADP5589_5_FIFO_1 + i); |
9d2e1736 MH |
686 | |
687 | for (i = 0; i < pdata->gpimapsize; i++) { | |
688 | unsigned short pin = pdata->gpimap[i].pin; | |
689 | ||
3f48e735 MH |
690 | if (pin <= kpad->var->gpi_pin_row_end) { |
691 | evt_mode1 |= (1 << (pin - kpad->var->gpi_pin_row_base)); | |
9d2e1736 MH |
692 | } else { |
693 | evt_mode2 |= | |
3f48e735 MH |
694 | ((1 << (pin - kpad->var->gpi_pin_col_base)) & 0xFF); |
695 | if (!kpad->is_adp5585) | |
696 | evt_mode3 |= ((1 << (pin - | |
697 | kpad->var->gpi_pin_col_base)) >> 8); | |
9d2e1736 MH |
698 | } |
699 | } | |
700 | ||
701 | if (pdata->gpimapsize) { | |
3f48e735 MH |
702 | ret |= adp5589_write(client, reg(ADP5589_GPI_EVENT_EN_A), |
703 | evt_mode1); | |
704 | ret |= adp5589_write(client, reg(ADP5589_GPI_EVENT_EN_B), | |
705 | evt_mode2); | |
706 | if (!kpad->is_adp5585) | |
707 | ret |= adp5589_write(client, | |
708 | reg(ADP5589_GPI_EVENT_EN_C), | |
709 | evt_mode3); | |
9d2e1736 MH |
710 | } |
711 | ||
712 | if (pdata->pull_dis_mask & pdata->pullup_en_100k & | |
3f48e735 | 713 | pdata->pullup_en_300k & pdata->pulldown_en_300k) |
9d2e1736 MH |
714 | dev_warn(&client->dev, "Conflicting pull resistor config\n"); |
715 | ||
3f48e735 MH |
716 | for (i = 0; i <= kpad->var->max_row_num; i++) { |
717 | unsigned val = 0, bit = (1 << i); | |
718 | if (pdata->pullup_en_300k & bit) | |
719 | val = 0; | |
720 | else if (pdata->pulldown_en_300k & bit) | |
721 | val = 1; | |
722 | else if (pdata->pullup_en_100k & bit) | |
723 | val = 2; | |
724 | else if (pdata->pull_dis_mask & bit) | |
725 | val = 3; | |
726 | ||
727 | pull_mask |= val << (2 * (i & 0x3)); | |
728 | ||
729 | if (i == 3 || i == kpad->var->max_row_num) { | |
730 | ret |= adp5589_write(client, reg(ADP5585_RPULL_CONFIG_A) | |
731 | + (i >> 2), pull_mask); | |
732 | pull_mask = 0; | |
733 | } | |
734 | } | |
9d2e1736 | 735 | |
3f48e735 MH |
736 | for (i = 0; i <= kpad->var->max_col_num; i++) { |
737 | unsigned val = 0, bit = 1 << (i + kpad->var->col_shift); | |
738 | if (pdata->pullup_en_300k & bit) | |
9d2e1736 | 739 | val = 0; |
3f48e735 | 740 | else if (pdata->pulldown_en_300k & bit) |
9d2e1736 | 741 | val = 1; |
3f48e735 | 742 | else if (pdata->pullup_en_100k & bit) |
9d2e1736 | 743 | val = 2; |
3f48e735 | 744 | else if (pdata->pull_dis_mask & bit) |
9d2e1736 MH |
745 | val = 3; |
746 | ||
747 | pull_mask |= val << (2 * (i & 0x3)); | |
748 | ||
3f48e735 | 749 | if (i == 3 || i == kpad->var->max_col_num) { |
9d2e1736 | 750 | ret |= adp5589_write(client, |
3f48e735 MH |
751 | reg(ADP5585_RPULL_CONFIG_C) + |
752 | (i >> 2), pull_mask); | |
9d2e1736 MH |
753 | pull_mask = 0; |
754 | } | |
755 | } | |
756 | ||
757 | if (pdata->reset1_key_1 && pdata->reset1_key_2 && pdata->reset1_key_3) { | |
3f48e735 | 758 | ret |= adp5589_write(client, reg(ADP5589_RESET1_EVENT_A), |
9d2e1736 MH |
759 | adp5589_get_evcode(kpad, |
760 | pdata->reset1_key_1)); | |
3f48e735 | 761 | ret |= adp5589_write(client, reg(ADP5589_RESET1_EVENT_B), |
9d2e1736 MH |
762 | adp5589_get_evcode(kpad, |
763 | pdata->reset1_key_2)); | |
3f48e735 | 764 | ret |= adp5589_write(client, reg(ADP5589_RESET1_EVENT_C), |
9d2e1736 MH |
765 | adp5589_get_evcode(kpad, |
766 | pdata->reset1_key_3)); | |
767 | kpad->extend_cfg |= R4_EXTEND_CFG; | |
768 | } | |
769 | ||
770 | if (pdata->reset2_key_1 && pdata->reset2_key_2) { | |
3f48e735 | 771 | ret |= adp5589_write(client, reg(ADP5589_RESET2_EVENT_A), |
9d2e1736 MH |
772 | adp5589_get_evcode(kpad, |
773 | pdata->reset2_key_1)); | |
3f48e735 | 774 | ret |= adp5589_write(client, reg(ADP5589_RESET2_EVENT_B), |
9d2e1736 MH |
775 | adp5589_get_evcode(kpad, |
776 | pdata->reset2_key_2)); | |
777 | kpad->extend_cfg |= C4_EXTEND_CFG; | |
778 | } | |
779 | ||
780 | if (kpad->extend_cfg) { | |
3f48e735 | 781 | ret |= adp5589_write(client, reg(ADP5589_RESET_CFG), |
9d2e1736 | 782 | pdata->reset_cfg); |
3f48e735 | 783 | ret |= adp5589_write(client, reg(ADP5589_PIN_CONFIG_D), |
9d2e1736 MH |
784 | kpad->extend_cfg); |
785 | } | |
786 | ||
3f48e735 MH |
787 | ret |= adp5589_write(client, reg(ADP5589_DEBOUNCE_DIS_A), |
788 | pdata->debounce_dis_mask & kpad->var->row_mask); | |
9d2e1736 | 789 | |
3f48e735 MH |
790 | ret |= adp5589_write(client, reg(ADP5589_DEBOUNCE_DIS_B), |
791 | (pdata->debounce_dis_mask >> kpad->var->col_shift) | |
792 | & kpad->var->col_mask); | |
793 | ||
794 | if (!kpad->is_adp5585) | |
795 | ret |= adp5589_write(client, reg(ADP5589_DEBOUNCE_DIS_C), | |
796 | (pdata->debounce_dis_mask >> 16) & 0xFF); | |
797 | ||
798 | ret |= adp5589_write(client, reg(ADP5589_POLL_PTIME_CFG), | |
9d2e1736 | 799 | pdata->scan_cycle_time & PTIME_MASK); |
3f48e735 MH |
800 | ret |= adp5589_write(client, ADP5589_5_INT_STATUS, |
801 | (kpad->is_adp5585 ? 0 : LOGIC2_INT) | | |
802 | LOGIC1_INT | OVRFLOW_INT | | |
803 | (kpad->is_adp5585 ? 0 : LOCK_INT) | | |
9d2e1736 MH |
804 | GPI_INT | EVENT_INT); /* Status is W1C */ |
805 | ||
3f48e735 | 806 | ret |= adp5589_write(client, reg(ADP5589_GENERAL_CFG), |
9d2e1736 | 807 | INT_CFG | OSC_EN | CORE_CLK(3)); |
3f48e735 | 808 | ret |= adp5589_write(client, reg(ADP5589_INT_EN), |
9d2e1736 MH |
809 | OVRFLOW_IEN | GPI_IEN | EVENT_IEN); |
810 | ||
811 | if (ret < 0) { | |
812 | dev_err(&client->dev, "Write Error\n"); | |
813 | return ret; | |
814 | } | |
815 | ||
816 | return 0; | |
817 | } | |
818 | ||
5298cc4c | 819 | static void adp5589_report_switch_state(struct adp5589_kpad *kpad) |
9d2e1736 | 820 | { |
9d2e1736 MH |
821 | int gpi_stat_tmp, pin_loc; |
822 | int i; | |
3f48e735 MH |
823 | int gpi_stat1 = adp5589_read(kpad->client, |
824 | kpad->var->reg(ADP5589_GPI_STATUS_A)); | |
825 | int gpi_stat2 = adp5589_read(kpad->client, | |
826 | kpad->var->reg(ADP5589_GPI_STATUS_B)); | |
827 | int gpi_stat3 = !kpad->is_adp5585 ? | |
828 | adp5589_read(kpad->client, ADP5589_GPI_STATUS_C) : 0; | |
9d2e1736 MH |
829 | |
830 | for (i = 0; i < kpad->gpimapsize; i++) { | |
831 | unsigned short pin = kpad->gpimap[i].pin; | |
832 | ||
3f48e735 | 833 | if (pin <= kpad->var->gpi_pin_row_end) { |
9d2e1736 | 834 | gpi_stat_tmp = gpi_stat1; |
3f48e735 MH |
835 | pin_loc = pin - kpad->var->gpi_pin_row_base; |
836 | } else if ((pin - kpad->var->gpi_pin_col_base) < 8) { | |
9d2e1736 | 837 | gpi_stat_tmp = gpi_stat2; |
3f48e735 | 838 | pin_loc = pin - kpad->var->gpi_pin_col_base; |
9d2e1736 MH |
839 | } else { |
840 | gpi_stat_tmp = gpi_stat3; | |
3f48e735 | 841 | pin_loc = pin - kpad->var->gpi_pin_col_base - 8; |
9d2e1736 MH |
842 | } |
843 | ||
844 | if (gpi_stat_tmp < 0) { | |
845 | dev_err(&kpad->client->dev, | |
3f48e735 MH |
846 | "Can't read GPIO_DAT_STAT switch %d, default to OFF\n", |
847 | pin); | |
9d2e1736 MH |
848 | gpi_stat_tmp = 0; |
849 | } | |
850 | ||
851 | input_report_switch(kpad->input, | |
852 | kpad->gpimap[i].sw_evt, | |
853 | !(gpi_stat_tmp & (1 << pin_loc))); | |
854 | } | |
855 | ||
856 | input_sync(kpad->input); | |
857 | } | |
858 | ||
5298cc4c BP |
859 | static int adp5589_probe(struct i2c_client *client, |
860 | const struct i2c_device_id *id) | |
9d2e1736 MH |
861 | { |
862 | struct adp5589_kpad *kpad; | |
3f48e735 | 863 | const struct adp5589_kpad_platform_data *pdata = |
c838cb3d | 864 | dev_get_platdata(&client->dev); |
9d2e1736 MH |
865 | struct input_dev *input; |
866 | unsigned int revid; | |
867 | int ret, i; | |
868 | int error; | |
869 | ||
870 | if (!i2c_check_functionality(client->adapter, | |
871 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
872 | dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); | |
873 | return -EIO; | |
874 | } | |
875 | ||
9d2e1736 MH |
876 | if (!pdata) { |
877 | dev_err(&client->dev, "no platform data?\n"); | |
878 | return -EINVAL; | |
879 | } | |
880 | ||
3f48e735 MH |
881 | kpad = kzalloc(sizeof(*kpad), GFP_KERNEL); |
882 | if (!kpad) | |
883 | return -ENOMEM; | |
884 | ||
885 | switch (id->driver_data) { | |
886 | case ADP5585_02: | |
887 | kpad->adp5585_support_row5 = true; | |
888 | case ADP5585_01: | |
889 | kpad->is_adp5585 = true; | |
890 | kpad->var = &const_adp5585; | |
891 | break; | |
892 | case ADP5589: | |
893 | kpad->var = &const_adp5589; | |
894 | break; | |
895 | } | |
896 | ||
897 | if (!((pdata->keypad_en_mask & kpad->var->row_mask) && | |
898 | (pdata->keypad_en_mask >> kpad->var->col_shift)) || | |
899 | !pdata->keymap) { | |
9d2e1736 | 900 | dev_err(&client->dev, "no rows, cols or keymap from pdata\n"); |
3f48e735 MH |
901 | error = -EINVAL; |
902 | goto err_free_mem; | |
9d2e1736 MH |
903 | } |
904 | ||
3f48e735 | 905 | if (pdata->keymapsize != kpad->var->keymapsize) { |
9d2e1736 | 906 | dev_err(&client->dev, "invalid keymapsize\n"); |
3f48e735 MH |
907 | error = -EINVAL; |
908 | goto err_free_mem; | |
9d2e1736 MH |
909 | } |
910 | ||
911 | if (!pdata->gpimap && pdata->gpimapsize) { | |
912 | dev_err(&client->dev, "invalid gpimap from pdata\n"); | |
3f48e735 MH |
913 | error = -EINVAL; |
914 | goto err_free_mem; | |
9d2e1736 MH |
915 | } |
916 | ||
3f48e735 | 917 | if (pdata->gpimapsize > kpad->var->gpimapsize_max) { |
9d2e1736 | 918 | dev_err(&client->dev, "invalid gpimapsize\n"); |
3f48e735 MH |
919 | error = -EINVAL; |
920 | goto err_free_mem; | |
9d2e1736 MH |
921 | } |
922 | ||
923 | for (i = 0; i < pdata->gpimapsize; i++) { | |
924 | unsigned short pin = pdata->gpimap[i].pin; | |
925 | ||
3f48e735 MH |
926 | if (pin < kpad->var->gpi_pin_base || |
927 | pin > kpad->var->gpi_pin_end) { | |
9d2e1736 | 928 | dev_err(&client->dev, "invalid gpi pin data\n"); |
3f48e735 MH |
929 | error = -EINVAL; |
930 | goto err_free_mem; | |
9d2e1736 MH |
931 | } |
932 | ||
3f48e735 | 933 | if ((1 << (pin - kpad->var->gpi_pin_row_base)) & |
9d2e1736 MH |
934 | pdata->keypad_en_mask) { |
935 | dev_err(&client->dev, "invalid gpi row/col data\n"); | |
3f48e735 MH |
936 | error = -EINVAL; |
937 | goto err_free_mem; | |
9d2e1736 MH |
938 | } |
939 | } | |
940 | ||
941 | if (!client->irq) { | |
942 | dev_err(&client->dev, "no IRQ?\n"); | |
3f48e735 MH |
943 | error = -EINVAL; |
944 | goto err_free_mem; | |
9d2e1736 MH |
945 | } |
946 | ||
9d2e1736 | 947 | input = input_allocate_device(); |
3f48e735 | 948 | if (!input) { |
9d2e1736 MH |
949 | error = -ENOMEM; |
950 | goto err_free_mem; | |
951 | } | |
952 | ||
953 | kpad->client = client; | |
954 | kpad->input = input; | |
955 | ||
3f48e735 | 956 | ret = adp5589_read(client, ADP5589_5_ID); |
9d2e1736 MH |
957 | if (ret < 0) { |
958 | error = ret; | |
3f48e735 | 959 | goto err_free_input; |
9d2e1736 MH |
960 | } |
961 | ||
3f48e735 | 962 | revid = (u8) ret & ADP5589_5_DEVICE_ID_MASK; |
9d2e1736 MH |
963 | |
964 | input->name = client->name; | |
965 | input->phys = "adp5589-keys/input0"; | |
966 | input->dev.parent = &client->dev; | |
967 | ||
968 | input_set_drvdata(input, kpad); | |
969 | ||
970 | input->id.bustype = BUS_I2C; | |
971 | input->id.vendor = 0x0001; | |
972 | input->id.product = 0x0001; | |
973 | input->id.version = revid; | |
974 | ||
975 | input->keycodesize = sizeof(kpad->keycode[0]); | |
976 | input->keycodemax = pdata->keymapsize; | |
977 | input->keycode = kpad->keycode; | |
978 | ||
979 | memcpy(kpad->keycode, pdata->keymap, | |
980 | pdata->keymapsize * input->keycodesize); | |
981 | ||
982 | kpad->gpimap = pdata->gpimap; | |
983 | kpad->gpimapsize = pdata->gpimapsize; | |
984 | ||
985 | /* setup input device */ | |
986 | __set_bit(EV_KEY, input->evbit); | |
987 | ||
988 | if (pdata->repeat) | |
989 | __set_bit(EV_REP, input->evbit); | |
990 | ||
991 | for (i = 0; i < input->keycodemax; i++) | |
e4cfb034 AL |
992 | if (kpad->keycode[i] <= KEY_MAX) |
993 | __set_bit(kpad->keycode[i], input->keybit); | |
9d2e1736 MH |
994 | __clear_bit(KEY_RESERVED, input->keybit); |
995 | ||
996 | if (kpad->gpimapsize) | |
997 | __set_bit(EV_SW, input->evbit); | |
998 | for (i = 0; i < kpad->gpimapsize; i++) | |
999 | __set_bit(kpad->gpimap[i].sw_evt, input->swbit); | |
1000 | ||
1001 | error = input_register_device(input); | |
1002 | if (error) { | |
1003 | dev_err(&client->dev, "unable to register input device\n"); | |
3f48e735 | 1004 | goto err_free_input; |
9d2e1736 MH |
1005 | } |
1006 | ||
1007 | error = request_threaded_irq(client->irq, NULL, adp5589_irq, | |
1008 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | |
1009 | client->dev.driver->name, kpad); | |
1010 | if (error) { | |
1011 | dev_err(&client->dev, "irq %d busy?\n", client->irq); | |
1012 | goto err_unreg_dev; | |
1013 | } | |
1014 | ||
1015 | error = adp5589_setup(kpad); | |
1016 | if (error) | |
1017 | goto err_free_irq; | |
1018 | ||
1019 | if (kpad->gpimapsize) | |
1020 | adp5589_report_switch_state(kpad); | |
1021 | ||
1022 | error = adp5589_gpio_add(kpad); | |
1023 | if (error) | |
1024 | goto err_free_irq; | |
1025 | ||
1026 | device_init_wakeup(&client->dev, 1); | |
1027 | i2c_set_clientdata(client, kpad); | |
1028 | ||
1029 | dev_info(&client->dev, "Rev.%d keypad, irq %d\n", revid, client->irq); | |
1030 | return 0; | |
1031 | ||
1032 | err_free_irq: | |
1033 | free_irq(client->irq, kpad); | |
1034 | err_unreg_dev: | |
1035 | input_unregister_device(input); | |
1036 | input = NULL; | |
3f48e735 | 1037 | err_free_input: |
9d2e1736 | 1038 | input_free_device(input); |
3f48e735 | 1039 | err_free_mem: |
9d2e1736 MH |
1040 | kfree(kpad); |
1041 | ||
1042 | return error; | |
1043 | } | |
1044 | ||
e2619cf7 | 1045 | static int adp5589_remove(struct i2c_client *client) |
9d2e1736 MH |
1046 | { |
1047 | struct adp5589_kpad *kpad = i2c_get_clientdata(client); | |
1048 | ||
3f48e735 | 1049 | adp5589_write(client, kpad->var->reg(ADP5589_GENERAL_CFG), 0); |
9d2e1736 MH |
1050 | free_irq(client->irq, kpad); |
1051 | input_unregister_device(kpad->input); | |
1052 | adp5589_gpio_remove(kpad); | |
1053 | kfree(kpad); | |
1054 | ||
1055 | return 0; | |
1056 | } | |
1057 | ||
1058 | #ifdef CONFIG_PM_SLEEP | |
1059 | static int adp5589_suspend(struct device *dev) | |
1060 | { | |
1061 | struct adp5589_kpad *kpad = dev_get_drvdata(dev); | |
1062 | struct i2c_client *client = kpad->client; | |
1063 | ||
1064 | disable_irq(client->irq); | |
1065 | ||
1066 | if (device_may_wakeup(&client->dev)) | |
1067 | enable_irq_wake(client->irq); | |
1068 | ||
1069 | return 0; | |
1070 | } | |
1071 | ||
1072 | static int adp5589_resume(struct device *dev) | |
1073 | { | |
1074 | struct adp5589_kpad *kpad = dev_get_drvdata(dev); | |
1075 | struct i2c_client *client = kpad->client; | |
1076 | ||
1077 | if (device_may_wakeup(&client->dev)) | |
1078 | disable_irq_wake(client->irq); | |
1079 | ||
1080 | enable_irq(client->irq); | |
1081 | ||
1082 | return 0; | |
1083 | } | |
1084 | #endif | |
1085 | ||
1086 | static SIMPLE_DEV_PM_OPS(adp5589_dev_pm_ops, adp5589_suspend, adp5589_resume); | |
1087 | ||
1088 | static const struct i2c_device_id adp5589_id[] = { | |
3f48e735 MH |
1089 | {"adp5589-keys", ADP5589}, |
1090 | {"adp5585-keys", ADP5585_01}, | |
1091 | {"adp5585-02-keys", ADP5585_02}, /* Adds ROW5 to ADP5585 */ | |
9d2e1736 MH |
1092 | {} |
1093 | }; | |
1094 | ||
1095 | MODULE_DEVICE_TABLE(i2c, adp5589_id); | |
1096 | ||
1097 | static struct i2c_driver adp5589_driver = { | |
1098 | .driver = { | |
1099 | .name = KBUILD_MODNAME, | |
1100 | .owner = THIS_MODULE, | |
1101 | .pm = &adp5589_dev_pm_ops, | |
1102 | }, | |
1103 | .probe = adp5589_probe, | |
1cb0aa88 | 1104 | .remove = adp5589_remove, |
9d2e1736 MH |
1105 | .id_table = adp5589_id, |
1106 | }; | |
1107 | ||
1b92c1cf | 1108 | module_i2c_driver(adp5589_driver); |
9d2e1736 MH |
1109 | |
1110 | MODULE_LICENSE("GPL"); | |
1111 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
3f48e735 | 1112 | MODULE_DESCRIPTION("ADP5589/ADP5585 Keypad driver"); |