Commit | Line | Data |
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6461f64a OG |
1 | /* |
2 | * Copyright (c) 2004, 2005, 2006 Voltaire, Inc. All rights reserved. | |
3ee07d27 | 3 | * Copyright (c) 2013-2014 Mellanox Technologies. All rights reserved. |
6461f64a OG |
4 | * |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the | |
9 | * OpenIB.org BSD license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or | |
12 | * without modification, are permitted provided that the following | |
13 | * conditions are met: | |
14 | * | |
15 | * - Redistributions of source code must retain the above | |
16 | * copyright notice, this list of conditions and the following | |
17 | * disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above | |
20 | * copyright notice, this list of conditions and the following | |
21 | * disclaimer in the documentation and/or other materials | |
22 | * provided with the distribution. | |
23 | * | |
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
31 | * SOFTWARE. | |
6461f64a OG |
32 | */ |
33 | #include <linux/module.h> | |
34 | #include <linux/kernel.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/mm.h> | |
a1f8e7f7 | 37 | #include <linux/highmem.h> |
6461f64a OG |
38 | #include <linux/scatterlist.h> |
39 | ||
40 | #include "iscsi_iser.h" | |
41 | ||
48afbff6 SG |
42 | static struct iser_reg_ops fastreg_ops = { |
43 | .alloc_reg_res = iser_alloc_fastreg_pool, | |
44 | .free_reg_res = iser_free_fastreg_pool, | |
45 | .reg_rdma_mem = iser_reg_rdma_mem_fastreg, | |
46 | .unreg_rdma_mem = iser_unreg_mem_fastreg, | |
81722909 SG |
47 | .reg_desc_get = iser_reg_desc_get_fr, |
48 | .reg_desc_put = iser_reg_desc_put_fr, | |
48afbff6 SG |
49 | }; |
50 | ||
51 | static struct iser_reg_ops fmr_ops = { | |
52 | .alloc_reg_res = iser_alloc_fmr_pool, | |
53 | .free_reg_res = iser_free_fmr_pool, | |
54 | .reg_rdma_mem = iser_reg_rdma_mem_fmr, | |
55 | .unreg_rdma_mem = iser_unreg_mem_fmr, | |
81722909 SG |
56 | .reg_desc_get = iser_reg_desc_get_fmr, |
57 | .reg_desc_put = iser_reg_desc_put_fmr, | |
48afbff6 SG |
58 | }; |
59 | ||
60 | int iser_assign_reg_ops(struct iser_device *device) | |
61 | { | |
62 | struct ib_device_attr *dev_attr = &device->dev_attr; | |
63 | ||
64 | /* Assign function handles - based on FMR support */ | |
65 | if (device->ib_device->alloc_fmr && device->ib_device->dealloc_fmr && | |
66 | device->ib_device->map_phys_fmr && device->ib_device->unmap_fmr) { | |
67 | iser_info("FMR supported, using FMR for registration\n"); | |
68 | device->reg_ops = &fmr_ops; | |
69 | } else | |
70 | if (dev_attr->device_cap_flags & IB_DEVICE_MEM_MGT_EXTENSIONS) { | |
71 | iser_info("FastReg supported, using FastReg for registration\n"); | |
72 | device->reg_ops = &fastreg_ops; | |
73 | } else { | |
74 | iser_err("IB device does not support FMRs nor FastRegs, can't register memory\n"); | |
75 | return -1; | |
76 | } | |
77 | ||
78 | return 0; | |
79 | } | |
80 | ||
ba943fb2 SG |
81 | static void |
82 | iser_free_bounce_sg(struct iser_data_buf *data) | |
83 | { | |
84 | struct scatterlist *sg; | |
85 | int count; | |
86 | ||
87 | for_each_sg(data->sg, sg, data->size, count) | |
88 | __free_page(sg_page(sg)); | |
89 | ||
90 | kfree(data->sg); | |
91 | ||
92 | data->sg = data->orig_sg; | |
93 | data->size = data->orig_size; | |
94 | data->orig_sg = NULL; | |
95 | data->orig_size = 0; | |
96 | } | |
97 | ||
98 | static int | |
99 | iser_alloc_bounce_sg(struct iser_data_buf *data) | |
100 | { | |
101 | struct scatterlist *sg; | |
102 | struct page *page; | |
103 | unsigned long length = data->data_len; | |
104 | int i = 0, nents = DIV_ROUND_UP(length, PAGE_SIZE); | |
105 | ||
106 | sg = kcalloc(nents, sizeof(*sg), GFP_ATOMIC); | |
107 | if (!sg) | |
108 | goto err; | |
109 | ||
110 | sg_init_table(sg, nents); | |
111 | while (length) { | |
112 | u32 page_len = min_t(u32, length, PAGE_SIZE); | |
113 | ||
114 | page = alloc_page(GFP_ATOMIC); | |
115 | if (!page) | |
116 | goto err; | |
117 | ||
118 | sg_set_page(&sg[i], page, page_len, 0); | |
119 | length -= page_len; | |
120 | i++; | |
121 | } | |
122 | ||
123 | data->orig_sg = data->sg; | |
124 | data->orig_size = data->size; | |
125 | data->sg = sg; | |
126 | data->size = nents; | |
127 | ||
128 | return 0; | |
129 | ||
130 | err: | |
131 | for (; i > 0; i--) | |
132 | __free_page(sg_page(&sg[i - 1])); | |
133 | kfree(sg); | |
134 | ||
135 | return -ENOMEM; | |
136 | } | |
137 | ||
138 | static void | |
139 | iser_copy_bounce(struct iser_data_buf *data, bool to_buffer) | |
140 | { | |
141 | struct scatterlist *osg, *bsg = data->sg; | |
142 | void *oaddr, *baddr; | |
143 | unsigned int left = data->data_len; | |
144 | unsigned int bsg_off = 0; | |
145 | int i; | |
146 | ||
147 | for_each_sg(data->orig_sg, osg, data->orig_size, i) { | |
148 | unsigned int copy_len, osg_off = 0; | |
149 | ||
150 | oaddr = kmap_atomic(sg_page(osg)) + osg->offset; | |
151 | copy_len = min(left, osg->length); | |
152 | while (copy_len) { | |
153 | unsigned int len = min(copy_len, bsg->length - bsg_off); | |
154 | ||
155 | baddr = kmap_atomic(sg_page(bsg)) + bsg->offset; | |
156 | if (to_buffer) | |
157 | memcpy(baddr + bsg_off, oaddr + osg_off, len); | |
158 | else | |
159 | memcpy(oaddr + osg_off, baddr + bsg_off, len); | |
160 | ||
161 | kunmap_atomic(baddr - bsg->offset); | |
162 | osg_off += len; | |
163 | bsg_off += len; | |
164 | copy_len -= len; | |
165 | ||
166 | if (bsg_off >= bsg->length) { | |
167 | bsg = sg_next(bsg); | |
168 | bsg_off = 0; | |
169 | } | |
170 | } | |
171 | kunmap_atomic(oaddr - osg->offset); | |
172 | left -= osg_off; | |
173 | } | |
174 | } | |
175 | ||
176 | static inline void | |
177 | iser_copy_from_bounce(struct iser_data_buf *data) | |
178 | { | |
179 | iser_copy_bounce(data, false); | |
180 | } | |
181 | ||
182 | static inline void | |
183 | iser_copy_to_bounce(struct iser_data_buf *data) | |
184 | { | |
185 | iser_copy_bounce(data, true); | |
186 | } | |
8dfa0876 | 187 | |
5190cc26 | 188 | struct iser_fr_desc * |
81722909 | 189 | iser_reg_desc_get_fr(struct ib_conn *ib_conn) |
bd8b944e | 190 | { |
385ad87d | 191 | struct iser_fr_pool *fr_pool = &ib_conn->fr_pool; |
5190cc26 | 192 | struct iser_fr_desc *desc; |
bd8b944e SG |
193 | unsigned long flags; |
194 | ||
385ad87d | 195 | spin_lock_irqsave(&fr_pool->lock, flags); |
2b3bf958 | 196 | desc = list_first_entry(&fr_pool->list, |
5190cc26 | 197 | struct iser_fr_desc, list); |
bd8b944e | 198 | list_del(&desc->list); |
385ad87d | 199 | spin_unlock_irqrestore(&fr_pool->lock, flags); |
bd8b944e SG |
200 | |
201 | return desc; | |
202 | } | |
203 | ||
204 | void | |
81722909 SG |
205 | iser_reg_desc_put_fr(struct ib_conn *ib_conn, |
206 | struct iser_fr_desc *desc) | |
bd8b944e | 207 | { |
385ad87d | 208 | struct iser_fr_pool *fr_pool = &ib_conn->fr_pool; |
bd8b944e SG |
209 | unsigned long flags; |
210 | ||
385ad87d | 211 | spin_lock_irqsave(&fr_pool->lock, flags); |
2b3bf958 | 212 | list_add(&desc->list, &fr_pool->list); |
385ad87d | 213 | spin_unlock_irqrestore(&fr_pool->lock, flags); |
bd8b944e SG |
214 | } |
215 | ||
81722909 SG |
216 | struct iser_fr_desc * |
217 | iser_reg_desc_get_fmr(struct ib_conn *ib_conn) | |
218 | { | |
219 | struct iser_fr_pool *fr_pool = &ib_conn->fr_pool; | |
220 | ||
221 | return list_first_entry(&fr_pool->list, | |
222 | struct iser_fr_desc, list); | |
223 | } | |
224 | ||
225 | void | |
226 | iser_reg_desc_put_fmr(struct ib_conn *ib_conn, | |
227 | struct iser_fr_desc *desc) | |
228 | { | |
229 | } | |
230 | ||
6461f64a OG |
231 | /** |
232 | * iser_start_rdma_unaligned_sg | |
233 | */ | |
2261ec3d | 234 | static int iser_start_rdma_unaligned_sg(struct iscsi_iser_task *iser_task, |
5f588e3d | 235 | struct iser_data_buf *data, |
41179e2d | 236 | enum iser_data_dir cmd_dir) |
6461f64a | 237 | { |
a4ee3539 | 238 | struct ib_device *dev = iser_task->iser_conn->ib_conn.device->ib_device; |
ba943fb2 | 239 | int rc; |
6461f64a | 240 | |
ba943fb2 SG |
241 | rc = iser_alloc_bounce_sg(data); |
242 | if (rc) { | |
243 | iser_err("Failed to allocate bounce for data len %lu\n", | |
244 | data->data_len); | |
245 | return rc; | |
6461f64a OG |
246 | } |
247 | ||
ba943fb2 SG |
248 | if (cmd_dir == ISER_DIR_OUT) |
249 | iser_copy_to_bounce(data); | |
250 | ||
251 | data->dma_nents = ib_dma_map_sg(dev, data->sg, data->size, | |
252 | (cmd_dir == ISER_DIR_OUT) ? | |
253 | DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
254 | if (!data->dma_nents) { | |
255 | iser_err("Got dma_nents %d, something went wrong...\n", | |
256 | data->dma_nents); | |
257 | rc = -ENOMEM; | |
258 | goto err; | |
259 | } | |
5f588e3d | 260 | |
6461f64a | 261 | return 0; |
ba943fb2 SG |
262 | err: |
263 | iser_free_bounce_sg(data); | |
264 | return rc; | |
6461f64a OG |
265 | } |
266 | ||
267 | /** | |
268 | * iser_finalize_rdma_unaligned_sg | |
269 | */ | |
9a8b08fa | 270 | |
2261ec3d | 271 | void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task, |
9a8b08fa | 272 | struct iser_data_buf *data, |
9a8b08fa | 273 | enum iser_data_dir cmd_dir) |
6461f64a | 274 | { |
ba943fb2 | 275 | struct ib_device *dev = iser_task->iser_conn->ib_conn.device->ib_device; |
6461f64a | 276 | |
ba943fb2 | 277 | ib_dma_unmap_sg(dev, data->sg, data->size, |
5180311f RC |
278 | (cmd_dir == ISER_DIR_OUT) ? |
279 | DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
6461f64a | 280 | |
ba943fb2 SG |
281 | if (cmd_dir == ISER_DIR_IN) |
282 | iser_copy_from_bounce(data); | |
6461f64a | 283 | |
ba943fb2 | 284 | iser_free_bounce_sg(data); |
6461f64a OG |
285 | } |
286 | ||
c1ccaf24 OG |
287 | #define IS_4K_ALIGNED(addr) ((((unsigned long)addr) & ~MASK_4K) == 0) |
288 | ||
6461f64a OG |
289 | /** |
290 | * iser_sg_to_page_vec - Translates scatterlist entries to physical addresses | |
291 | * and returns the length of resulting physical address array (may be less than | |
292 | * the original due to possible compaction). | |
293 | * | |
294 | * we build a "page vec" under the assumption that the SG meets the RDMA | |
295 | * alignment requirements. Other then the first and last SG elements, all | |
296 | * the "internal" elements can be compacted into a list whose elements are | |
297 | * dma addresses of physical pages. The code supports also the weird case | |
298 | * where --few fragments of the same page-- are present in the SG as | |
299 | * consecutive elements. Also, it handles one entry SG. | |
300 | */ | |
c1ccaf24 | 301 | |
6461f64a | 302 | static int iser_sg_to_page_vec(struct iser_data_buf *data, |
919fc274 SG |
303 | struct ib_device *ibdev, u64 *pages, |
304 | int *offset, int *data_size) | |
6461f64a | 305 | { |
e3784bd1 | 306 | struct scatterlist *sg, *sgl = data->sg; |
c1ccaf24 | 307 | u64 start_addr, end_addr, page, chunk_start = 0; |
6461f64a | 308 | unsigned long total_sz = 0; |
c1ccaf24 OG |
309 | unsigned int dma_len; |
310 | int i, new_chunk, cur_page, last_ent = data->dma_nents - 1; | |
6461f64a OG |
311 | |
312 | /* compute the offset of first element */ | |
919fc274 | 313 | *offset = (u64) sgl[0].offset & ~MASK_4K; |
6461f64a | 314 | |
c1ccaf24 OG |
315 | new_chunk = 1; |
316 | cur_page = 0; | |
53d412fc | 317 | for_each_sg(sgl, sg, data->dma_nents, i) { |
c1ccaf24 OG |
318 | start_addr = ib_sg_dma_address(ibdev, sg); |
319 | if (new_chunk) | |
320 | chunk_start = start_addr; | |
321 | dma_len = ib_sg_dma_len(ibdev, sg); | |
322 | end_addr = start_addr + dma_len; | |
5180311f | 323 | total_sz += dma_len; |
6461f64a | 324 | |
c1ccaf24 OG |
325 | /* collect page fragments until aligned or end of SG list */ |
326 | if (!IS_4K_ALIGNED(end_addr) && i < last_ent) { | |
327 | new_chunk = 0; | |
328 | continue; | |
6461f64a | 329 | } |
c1ccaf24 OG |
330 | new_chunk = 1; |
331 | ||
332 | /* address of the first page in the contiguous chunk; | |
333 | masking relevant for the very first SG entry, | |
334 | which might be unaligned */ | |
335 | page = chunk_start & MASK_4K; | |
336 | do { | |
919fc274 | 337 | pages[cur_page++] = page; |
8dfa0876 | 338 | page += SIZE_4K; |
c1ccaf24 | 339 | } while (page < end_addr); |
6461f64a | 340 | } |
c1ccaf24 | 341 | |
919fc274 SG |
342 | *data_size = total_sz; |
343 | iser_dbg("page_vec->data_size:%d cur_page %d\n", | |
344 | *data_size, cur_page); | |
6461f64a OG |
345 | return cur_page; |
346 | } | |
347 | ||
6461f64a OG |
348 | |
349 | /** | |
350 | * iser_data_buf_aligned_len - Tries to determine the maximal correctly aligned | |
351 | * for RDMA sub-list of a scatter-gather list of memory buffers, and returns | |
352 | * the number of entries which are aligned correctly. Supports the case where | |
353 | * consecutive SG elements are actually fragments of the same physcial page. | |
354 | */ | |
c1ccaf24 OG |
355 | static int iser_data_buf_aligned_len(struct iser_data_buf *data, |
356 | struct ib_device *ibdev) | |
6461f64a | 357 | { |
e3784bd1 | 358 | struct scatterlist *sg, *sgl, *next_sg = NULL; |
c1ccaf24 OG |
359 | u64 start_addr, end_addr; |
360 | int i, ret_len, start_check = 0; | |
361 | ||
362 | if (data->dma_nents == 1) | |
363 | return 1; | |
6461f64a | 364 | |
e3784bd1 | 365 | sgl = data->sg; |
c1ccaf24 | 366 | start_addr = ib_sg_dma_address(ibdev, sgl); |
6461f64a | 367 | |
53d412fc | 368 | for_each_sg(sgl, sg, data->dma_nents, i) { |
c1ccaf24 OG |
369 | if (start_check && !IS_4K_ALIGNED(start_addr)) |
370 | break; | |
371 | ||
372 | next_sg = sg_next(sg); | |
373 | if (!next_sg) | |
374 | break; | |
375 | ||
376 | end_addr = start_addr + ib_sg_dma_len(ibdev, sg); | |
377 | start_addr = ib_sg_dma_address(ibdev, next_sg); | |
378 | ||
379 | if (end_addr == start_addr) { | |
380 | start_check = 0; | |
381 | continue; | |
382 | } else | |
383 | start_check = 1; | |
384 | ||
385 | if (!IS_4K_ALIGNED(end_addr)) | |
386 | break; | |
6461f64a | 387 | } |
c1ccaf24 | 388 | ret_len = (next_sg) ? i : i+1; |
ea18f5d7 SG |
389 | |
390 | if (unlikely(ret_len != data->dma_nents)) | |
391 | iser_warn("rdma alignment violation (%d/%d aligned)\n", | |
392 | ret_len, data->dma_nents); | |
393 | ||
6461f64a OG |
394 | return ret_len; |
395 | } | |
396 | ||
5180311f RC |
397 | static void iser_data_buf_dump(struct iser_data_buf *data, |
398 | struct ib_device *ibdev) | |
6461f64a | 399 | { |
53d412fc | 400 | struct scatterlist *sg; |
6461f64a OG |
401 | int i; |
402 | ||
e3784bd1 | 403 | for_each_sg(data->sg, sg, data->dma_nents, i) |
f91424cf | 404 | iser_dbg("sg[%d] dma_addr:0x%lX page:0x%p " |
e981f1d4 | 405 | "off:0x%x sz:0x%x dma_len:0x%x\n", |
53d412fc | 406 | i, (unsigned long)ib_sg_dma_address(ibdev, sg), |
45711f1a | 407 | sg_page(sg), sg->offset, |
53d412fc | 408 | sg->length, ib_sg_dma_len(ibdev, sg)); |
6461f64a OG |
409 | } |
410 | ||
411 | static void iser_dump_page_vec(struct iser_page_vec *page_vec) | |
412 | { | |
413 | int i; | |
414 | ||
415 | iser_err("page vec length %d data size %d\n", | |
416 | page_vec->length, page_vec->data_size); | |
417 | for (i = 0; i < page_vec->length; i++) | |
418 | iser_err("%d %lx\n",i,(unsigned long)page_vec->pages[i]); | |
419 | } | |
420 | ||
2261ec3d MC |
421 | int iser_dma_map_task_data(struct iscsi_iser_task *iser_task, |
422 | struct iser_data_buf *data, | |
423 | enum iser_data_dir iser_dir, | |
424 | enum dma_data_direction dma_dir) | |
74a20780 | 425 | { |
5180311f | 426 | struct ib_device *dev; |
74a20780 | 427 | |
2261ec3d | 428 | iser_task->dir[iser_dir] = 1; |
a4ee3539 | 429 | dev = iser_task->iser_conn->ib_conn.device->ib_device; |
74a20780 | 430 | |
e3784bd1 | 431 | data->dma_nents = ib_dma_map_sg(dev, data->sg, data->size, dma_dir); |
74a20780 EZ |
432 | if (data->dma_nents == 0) { |
433 | iser_err("dma_map_sg failed!!!\n"); | |
434 | return -EINVAL; | |
435 | } | |
436 | return 0; | |
437 | } | |
438 | ||
9a8b08fa | 439 | void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task, |
c6c95ef4 RD |
440 | struct iser_data_buf *data, |
441 | enum dma_data_direction dir) | |
74a20780 | 442 | { |
5180311f | 443 | struct ib_device *dev; |
74a20780 | 444 | |
a4ee3539 | 445 | dev = iser_task->iser_conn->ib_conn.device->ib_device; |
e3784bd1 | 446 | ib_dma_unmap_sg(dev, data->sg, data->size, dir); |
74a20780 EZ |
447 | } |
448 | ||
ad1e5672 SG |
449 | static int |
450 | iser_reg_dma(struct iser_device *device, struct iser_data_buf *mem, | |
451 | struct iser_mem_reg *reg) | |
452 | { | |
453 | struct scatterlist *sg = mem->sg; | |
454 | ||
455 | reg->sge.lkey = device->mr->lkey; | |
456 | reg->rkey = device->mr->rkey; | |
457 | reg->sge.addr = ib_sg_dma_address(device->ib_device, &sg[0]); | |
458 | reg->sge.length = ib_sg_dma_len(device->ib_device, &sg[0]); | |
459 | ||
460 | iser_dbg("Single DMA entry: lkey=0x%x, rkey=0x%x, addr=0x%llx," | |
461 | " length=0x%x\n", reg->sge.lkey, reg->rkey, | |
462 | reg->sge.addr, reg->sge.length); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
919fc274 | 467 | static int fall_to_bounce_buf(struct iscsi_iser_task *iser_task, |
5f588e3d | 468 | struct iser_data_buf *mem, |
ea18f5d7 | 469 | enum iser_data_dir cmd_dir) |
919fc274 | 470 | { |
56408325 SG |
471 | struct iscsi_conn *iscsi_conn = iser_task->iser_conn->iscsi_conn; |
472 | struct iser_device *device = iser_task->iser_conn->ib_conn.device; | |
919fc274 SG |
473 | |
474 | iscsi_conn->fmr_unalign_cnt++; | |
919fc274 SG |
475 | |
476 | if (iser_debug_level > 0) | |
56408325 | 477 | iser_data_buf_dump(mem, device->ib_device); |
919fc274 SG |
478 | |
479 | /* unmap the command data before accessing it */ | |
c6c95ef4 RD |
480 | iser_dma_unmap_task_data(iser_task, mem, |
481 | (cmd_dir == ISER_DIR_OUT) ? | |
482 | DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
919fc274 SG |
483 | |
484 | /* allocate copy buf, if we are writing, copy the */ | |
485 | /* unaligned scatterlist, dma map the copy */ | |
e3784bd1 | 486 | if (iser_start_rdma_unaligned_sg(iser_task, mem, cmd_dir) != 0) |
5f588e3d | 487 | return -ENOMEM; |
919fc274 SG |
488 | |
489 | return 0; | |
490 | } | |
491 | ||
d03e61d0 SG |
492 | /** |
493 | * iser_reg_page_vec - Register physical memory | |
494 | * | |
495 | * returns: 0 on success, errno code on failure | |
496 | */ | |
497 | static | |
7d0483c9 | 498 | int iser_fast_reg_fmr(struct iscsi_iser_task *iser_task, |
f0e35c27 | 499 | struct iser_data_buf *mem, |
2b3bf958 | 500 | struct iser_reg_resources *rsc, |
7d0483c9 | 501 | struct iser_mem_reg *reg) |
d03e61d0 | 502 | { |
f0e35c27 SG |
503 | struct ib_conn *ib_conn = &iser_task->iser_conn->ib_conn; |
504 | struct iser_device *device = ib_conn->device; | |
2b3bf958 AL |
505 | struct iser_page_vec *page_vec = rsc->page_vec; |
506 | struct ib_fmr_pool *fmr_pool = rsc->fmr_pool; | |
f0e35c27 SG |
507 | struct ib_pool_fmr *fmr; |
508 | int ret, plen; | |
509 | ||
510 | plen = iser_sg_to_page_vec(mem, device->ib_device, | |
511 | page_vec->pages, | |
512 | &page_vec->offset, | |
513 | &page_vec->data_size); | |
514 | page_vec->length = plen; | |
515 | if (plen * SIZE_4K < page_vec->data_size) { | |
516 | iser_err("page vec too short to hold this SG\n"); | |
517 | iser_data_buf_dump(mem, device->ib_device); | |
518 | iser_dump_page_vec(page_vec); | |
519 | return -EINVAL; | |
520 | } | |
d03e61d0 | 521 | |
2b3bf958 | 522 | fmr = ib_fmr_pool_map_phys(fmr_pool, |
f0e35c27 | 523 | page_vec->pages, |
d03e61d0 | 524 | page_vec->length, |
f0e35c27 SG |
525 | page_vec->pages[0]); |
526 | if (IS_ERR(fmr)) { | |
527 | ret = PTR_ERR(fmr); | |
528 | iser_err("ib_fmr_pool_map_phys failed: %d\n", ret); | |
529 | return ret; | |
d03e61d0 SG |
530 | } |
531 | ||
7d0483c9 SG |
532 | reg->sge.lkey = fmr->fmr->lkey; |
533 | reg->rkey = fmr->fmr->rkey; | |
534 | reg->sge.addr = page_vec->pages[0] + page_vec->offset; | |
535 | reg->sge.length = page_vec->data_size; | |
536 | reg->mem_h = fmr; | |
f0e35c27 | 537 | |
d03e61d0 SG |
538 | return 0; |
539 | } | |
540 | ||
541 | /** | |
542 | * Unregister (previosuly registered using FMR) memory. | |
543 | * If memory is non-FMR does nothing. | |
544 | */ | |
545 | void iser_unreg_mem_fmr(struct iscsi_iser_task *iser_task, | |
546 | enum iser_data_dir cmd_dir) | |
547 | { | |
b130eded | 548 | struct iser_mem_reg *reg = &iser_task->rdma_reg[cmd_dir]; |
d03e61d0 SG |
549 | int ret; |
550 | ||
551 | if (!reg->mem_h) | |
552 | return; | |
553 | ||
554 | iser_dbg("PHYSICAL Mem.Unregister mem_h %p\n", reg->mem_h); | |
555 | ||
556 | ret = ib_fmr_pool_unmap((struct ib_pool_fmr *)reg->mem_h); | |
557 | if (ret) | |
558 | iser_err("ib_fmr_pool_unmap failed %d\n", ret); | |
559 | ||
560 | reg->mem_h = NULL; | |
561 | } | |
562 | ||
563 | void iser_unreg_mem_fastreg(struct iscsi_iser_task *iser_task, | |
564 | enum iser_data_dir cmd_dir) | |
565 | { | |
81722909 | 566 | struct iser_device *device = iser_task->iser_conn->ib_conn.device; |
b130eded | 567 | struct iser_mem_reg *reg = &iser_task->rdma_reg[cmd_dir]; |
d03e61d0 | 568 | |
bd8b944e | 569 | if (!reg->mem_h) |
d03e61d0 SG |
570 | return; |
571 | ||
81722909 SG |
572 | device->reg_ops->reg_desc_put(&iser_task->iser_conn->ib_conn, |
573 | reg->mem_h); | |
d03e61d0 | 574 | reg->mem_h = NULL; |
d03e61d0 SG |
575 | } |
576 | ||
6461f64a | 577 | /** |
e657571b SG |
578 | * iser_reg_rdma_mem_fmr - Registers memory intended for RDMA, |
579 | * using FMR (if possible) obtaining rkey and va | |
6461f64a OG |
580 | * |
581 | * returns 0 on success, errno code on failure | |
582 | */ | |
e657571b SG |
583 | int iser_reg_rdma_mem_fmr(struct iscsi_iser_task *iser_task, |
584 | enum iser_data_dir cmd_dir) | |
6461f64a | 585 | { |
a4ee3539 SG |
586 | struct ib_conn *ib_conn = &iser_task->iser_conn->ib_conn; |
587 | struct iser_device *device = ib_conn->device; | |
5180311f | 588 | struct ib_device *ibdev = device->ib_device; |
2261ec3d | 589 | struct iser_data_buf *mem = &iser_task->data[cmd_dir]; |
b130eded | 590 | struct iser_mem_reg *mem_reg; |
6461f64a OG |
591 | int aligned_len; |
592 | int err; | |
e981f1d4 | 593 | int i; |
6461f64a | 594 | |
b130eded | 595 | mem_reg = &iser_task->rdma_reg[cmd_dir]; |
6461f64a | 596 | |
5180311f | 597 | aligned_len = iser_data_buf_aligned_len(mem, ibdev); |
5587856c | 598 | if (aligned_len != mem->dma_nents) { |
ea18f5d7 | 599 | err = fall_to_bounce_buf(iser_task, mem, cmd_dir); |
919fc274 SG |
600 | if (err) { |
601 | iser_err("failed to allocate bounce buffer\n"); | |
602 | return err; | |
603 | } | |
6461f64a OG |
604 | } |
605 | ||
d8111028 EZ |
606 | /* if there a single dma entry, FMR is not needed */ |
607 | if (mem->dma_nents == 1) { | |
ad1e5672 | 608 | return iser_reg_dma(device, mem, mem_reg); |
d8111028 | 609 | } else { /* use FMR for multiple dma entries */ |
2b3bf958 AL |
610 | struct iser_fr_desc *desc; |
611 | ||
81722909 | 612 | desc = device->reg_ops->reg_desc_get(ib_conn); |
7d0483c9 | 613 | err = iser_fast_reg_fmr(iser_task, mem, &desc->rsc, mem_reg); |
819a0873 | 614 | if (err && err != -EAGAIN) { |
5180311f | 615 | iser_data_buf_dump(mem, ibdev); |
2261ec3d MC |
616 | iser_err("mem->dma_nents = %d (dlength = 0x%x)\n", |
617 | mem->dma_nents, | |
618 | ntoh24(iser_task->desc.iscsi_header.dlength)); | |
d8111028 | 619 | iser_err("page_vec: data_size = 0x%x, length = %d, offset = 0x%x\n", |
2b3bf958 AL |
620 | desc->rsc.page_vec->data_size, |
621 | desc->rsc.page_vec->length, | |
622 | desc->rsc.page_vec->offset); | |
623 | for (i = 0; i < desc->rsc.page_vec->length; i++) | |
d8111028 | 624 | iser_err("page_vec[%d] = 0x%llx\n", i, |
2b3bf958 | 625 | (unsigned long long)desc->rsc.page_vec->pages[i]); |
e981f1d4 | 626 | } |
450d1e40 OG |
627 | if (err) |
628 | return err; | |
e981f1d4 | 629 | } |
6461f64a OG |
630 | return 0; |
631 | } | |
5587856c | 632 | |
5bb6e543 | 633 | static void |
92792c0a SG |
634 | iser_set_dif_domain(struct scsi_cmnd *sc, struct ib_sig_attrs *sig_attrs, |
635 | struct ib_sig_domain *domain) | |
636 | { | |
78eda2bb | 637 | domain->sig_type = IB_SIG_TYPE_T10_DIF; |
5bb6e543 SG |
638 | domain->sig.dif.pi_interval = scsi_prot_interval(sc); |
639 | domain->sig.dif.ref_tag = scsi_prot_ref_tag(sc); | |
78eda2bb SG |
640 | /* |
641 | * At the moment we hard code those, but in the future | |
642 | * we will take them from sc. | |
643 | */ | |
644 | domain->sig.dif.apptag_check_mask = 0xffff; | |
645 | domain->sig.dif.app_escape = true; | |
646 | domain->sig.dif.ref_escape = true; | |
5bb6e543 | 647 | if (sc->prot_flags & SCSI_PROT_REF_INCREMENT) |
78eda2bb | 648 | domain->sig.dif.ref_remap = true; |
92792c0a | 649 | }; |
177e31bd SG |
650 | |
651 | static int | |
652 | iser_set_sig_attrs(struct scsi_cmnd *sc, struct ib_sig_attrs *sig_attrs) | |
653 | { | |
177e31bd SG |
654 | switch (scsi_get_prot_op(sc)) { |
655 | case SCSI_PROT_WRITE_INSERT: | |
656 | case SCSI_PROT_READ_STRIP: | |
78eda2bb | 657 | sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; |
92792c0a | 658 | iser_set_dif_domain(sc, sig_attrs, &sig_attrs->wire); |
177e31bd | 659 | sig_attrs->wire.sig.dif.bg_type = IB_T10DIF_CRC; |
177e31bd SG |
660 | break; |
661 | case SCSI_PROT_READ_INSERT: | |
662 | case SCSI_PROT_WRITE_STRIP: | |
78eda2bb | 663 | sig_attrs->wire.sig_type = IB_SIG_TYPE_NONE; |
92792c0a | 664 | iser_set_dif_domain(sc, sig_attrs, &sig_attrs->mem); |
5bb6e543 SG |
665 | sig_attrs->mem.sig.dif.bg_type = sc->prot_flags & SCSI_PROT_IP_CHECKSUM ? |
666 | IB_T10DIF_CSUM : IB_T10DIF_CRC; | |
177e31bd SG |
667 | break; |
668 | case SCSI_PROT_READ_PASS: | |
669 | case SCSI_PROT_WRITE_PASS: | |
92792c0a | 670 | iser_set_dif_domain(sc, sig_attrs, &sig_attrs->wire); |
177e31bd | 671 | sig_attrs->wire.sig.dif.bg_type = IB_T10DIF_CRC; |
92792c0a | 672 | iser_set_dif_domain(sc, sig_attrs, &sig_attrs->mem); |
5bb6e543 SG |
673 | sig_attrs->mem.sig.dif.bg_type = sc->prot_flags & SCSI_PROT_IP_CHECKSUM ? |
674 | IB_T10DIF_CSUM : IB_T10DIF_CRC; | |
177e31bd SG |
675 | break; |
676 | default: | |
677 | iser_err("Unsupported PI operation %d\n", | |
678 | scsi_get_prot_op(sc)); | |
679 | return -EINVAL; | |
680 | } | |
78eda2bb | 681 | |
177e31bd SG |
682 | return 0; |
683 | } | |
684 | ||
5bb6e543 | 685 | static inline void |
177e31bd SG |
686 | iser_set_prot_checks(struct scsi_cmnd *sc, u8 *mask) |
687 | { | |
5bb6e543 SG |
688 | *mask = 0; |
689 | if (sc->prot_flags & SCSI_PROT_REF_CHECK) | |
690 | *mask |= ISER_CHECK_REFTAG; | |
691 | if (sc->prot_flags & SCSI_PROT_GUARD_CHECK) | |
692 | *mask |= ISER_CHECK_GUARD; | |
177e31bd SG |
693 | } |
694 | ||
a11b3e69 SG |
695 | static void |
696 | iser_inv_rkey(struct ib_send_wr *inv_wr, struct ib_mr *mr) | |
697 | { | |
698 | u32 rkey; | |
699 | ||
700 | memset(inv_wr, 0, sizeof(*inv_wr)); | |
701 | inv_wr->opcode = IB_WR_LOCAL_INV; | |
702 | inv_wr->wr_id = ISER_FASTREG_LI_WRID; | |
703 | inv_wr->ex.invalidate_rkey = mr->rkey; | |
704 | ||
705 | rkey = ib_inc_rkey(mr->rkey); | |
706 | ib_update_fast_reg_key(mr, rkey); | |
707 | } | |
708 | ||
177e31bd SG |
709 | static int |
710 | iser_reg_sig_mr(struct iscsi_iser_task *iser_task, | |
d711d81d | 711 | struct iser_pi_context *pi_ctx, |
6ef8bb83 SG |
712 | struct iser_mem_reg *data_reg, |
713 | struct iser_mem_reg *prot_reg, | |
714 | struct iser_mem_reg *sig_reg) | |
177e31bd | 715 | { |
a4ee3539 | 716 | struct ib_conn *ib_conn = &iser_task->iser_conn->ib_conn; |
177e31bd SG |
717 | struct ib_send_wr sig_wr, inv_wr; |
718 | struct ib_send_wr *bad_wr, *wr = NULL; | |
719 | struct ib_sig_attrs sig_attrs; | |
720 | int ret; | |
177e31bd SG |
721 | |
722 | memset(&sig_attrs, 0, sizeof(sig_attrs)); | |
723 | ret = iser_set_sig_attrs(iser_task->sc, &sig_attrs); | |
724 | if (ret) | |
725 | goto err; | |
726 | ||
5bb6e543 | 727 | iser_set_prot_checks(iser_task->sc, &sig_attrs.check_mask); |
177e31bd | 728 | |
d711d81d | 729 | if (!pi_ctx->sig_mr_valid) { |
a11b3e69 | 730 | iser_inv_rkey(&inv_wr, pi_ctx->sig_mr); |
177e31bd | 731 | wr = &inv_wr; |
177e31bd SG |
732 | } |
733 | ||
734 | memset(&sig_wr, 0, sizeof(sig_wr)); | |
735 | sig_wr.opcode = IB_WR_REG_SIG_MR; | |
736 | sig_wr.wr_id = ISER_FASTREG_LI_WRID; | |
6ef8bb83 | 737 | sig_wr.sg_list = &data_reg->sge; |
177e31bd SG |
738 | sig_wr.num_sge = 1; |
739 | sig_wr.wr.sig_handover.sig_attrs = &sig_attrs; | |
740 | sig_wr.wr.sig_handover.sig_mr = pi_ctx->sig_mr; | |
741 | if (scsi_prot_sg_count(iser_task->sc)) | |
6ef8bb83 | 742 | sig_wr.wr.sig_handover.prot = &prot_reg->sge; |
177e31bd SG |
743 | sig_wr.wr.sig_handover.access_flags = IB_ACCESS_LOCAL_WRITE | |
744 | IB_ACCESS_REMOTE_READ | | |
745 | IB_ACCESS_REMOTE_WRITE; | |
746 | ||
747 | if (!wr) | |
748 | wr = &sig_wr; | |
749 | else | |
750 | wr->next = &sig_wr; | |
751 | ||
a4ee3539 | 752 | ret = ib_post_send(ib_conn->qp, wr, &bad_wr); |
177e31bd SG |
753 | if (ret) { |
754 | iser_err("reg_sig_mr failed, ret:%d\n", ret); | |
755 | goto err; | |
756 | } | |
d711d81d | 757 | pi_ctx->sig_mr_valid = 0; |
177e31bd | 758 | |
6ef8bb83 SG |
759 | sig_reg->sge.lkey = pi_ctx->sig_mr->lkey; |
760 | sig_reg->rkey = pi_ctx->sig_mr->rkey; | |
761 | sig_reg->sge.addr = 0; | |
762 | sig_reg->sge.length = scsi_transfer_length(iser_task->sc); | |
177e31bd | 763 | |
6ef8bb83 SG |
764 | iser_dbg("sig_sge: lkey: 0x%x, rkey: 0x%x, addr: 0x%llx, length: %u\n", |
765 | sig_reg->sge.lkey, sig_reg->rkey, sig_reg->sge.addr, | |
766 | sig_reg->sge.length); | |
177e31bd SG |
767 | err: |
768 | return ret; | |
769 | } | |
770 | ||
d11ec4ec | 771 | static int iser_fast_reg_mr(struct iscsi_iser_task *iser_task, |
d11ec4ec | 772 | struct iser_data_buf *mem, |
d711d81d | 773 | struct iser_reg_resources *rsc, |
6ef8bb83 | 774 | struct iser_mem_reg *reg) |
5587856c | 775 | { |
a4ee3539 SG |
776 | struct ib_conn *ib_conn = &iser_task->iser_conn->ib_conn; |
777 | struct iser_device *device = ib_conn->device; | |
177e31bd SG |
778 | struct ib_mr *mr; |
779 | struct ib_fast_reg_page_list *frpl; | |
5587856c SG |
780 | struct ib_send_wr fastreg_wr, inv_wr; |
781 | struct ib_send_wr *bad_wr, *wr = NULL; | |
d11ec4ec SG |
782 | int ret, offset, size, plen; |
783 | ||
784 | /* if there a single dma entry, dma mr suffices */ | |
ad1e5672 SG |
785 | if (mem->dma_nents == 1) |
786 | return iser_reg_dma(device, mem, reg); | |
d11ec4ec | 787 | |
d711d81d SG |
788 | mr = rsc->mr; |
789 | frpl = rsc->frpl; | |
177e31bd SG |
790 | |
791 | plen = iser_sg_to_page_vec(mem, device->ib_device, frpl->page_list, | |
d11ec4ec SG |
792 | &offset, &size); |
793 | if (plen * SIZE_4K < size) { | |
794 | iser_err("fast reg page_list too short to hold this SG\n"); | |
795 | return -EINVAL; | |
796 | } | |
5587856c | 797 | |
d711d81d | 798 | if (!rsc->mr_valid) { |
a11b3e69 | 799 | iser_inv_rkey(&inv_wr, mr); |
5587856c | 800 | wr = &inv_wr; |
5587856c SG |
801 | } |
802 | ||
803 | /* Prepare FASTREG WR */ | |
804 | memset(&fastreg_wr, 0, sizeof(fastreg_wr)); | |
7306b8fa | 805 | fastreg_wr.wr_id = ISER_FASTREG_LI_WRID; |
5587856c | 806 | fastreg_wr.opcode = IB_WR_FAST_REG_MR; |
177e31bd SG |
807 | fastreg_wr.wr.fast_reg.iova_start = frpl->page_list[0] + offset; |
808 | fastreg_wr.wr.fast_reg.page_list = frpl; | |
d11ec4ec | 809 | fastreg_wr.wr.fast_reg.page_list_len = plen; |
5587856c | 810 | fastreg_wr.wr.fast_reg.page_shift = SHIFT_4K; |
d11ec4ec | 811 | fastreg_wr.wr.fast_reg.length = size; |
177e31bd | 812 | fastreg_wr.wr.fast_reg.rkey = mr->rkey; |
5587856c SG |
813 | fastreg_wr.wr.fast_reg.access_flags = (IB_ACCESS_LOCAL_WRITE | |
814 | IB_ACCESS_REMOTE_WRITE | | |
815 | IB_ACCESS_REMOTE_READ); | |
816 | ||
db523b8d | 817 | if (!wr) |
5587856c | 818 | wr = &fastreg_wr; |
db523b8d | 819 | else |
5587856c | 820 | wr->next = &fastreg_wr; |
5587856c | 821 | |
a4ee3539 | 822 | ret = ib_post_send(ib_conn->qp, wr, &bad_wr); |
5587856c | 823 | if (ret) { |
5587856c SG |
824 | iser_err("fast registration failed, ret:%d\n", ret); |
825 | return ret; | |
826 | } | |
d711d81d | 827 | rsc->mr_valid = 0; |
5587856c | 828 | |
6ef8bb83 SG |
829 | reg->sge.lkey = mr->lkey; |
830 | reg->rkey = mr->rkey; | |
831 | reg->sge.addr = frpl->page_list[0] + offset; | |
832 | reg->sge.length = size; | |
5587856c SG |
833 | |
834 | return ret; | |
835 | } | |
836 | ||
837 | /** | |
7306b8fa | 838 | * iser_reg_rdma_mem_fastreg - Registers memory intended for RDMA, |
5587856c SG |
839 | * using Fast Registration WR (if possible) obtaining rkey and va |
840 | * | |
841 | * returns 0 on success, errno code on failure | |
842 | */ | |
7306b8fa SG |
843 | int iser_reg_rdma_mem_fastreg(struct iscsi_iser_task *iser_task, |
844 | enum iser_data_dir cmd_dir) | |
5587856c | 845 | { |
a4ee3539 SG |
846 | struct ib_conn *ib_conn = &iser_task->iser_conn->ib_conn; |
847 | struct iser_device *device = ib_conn->device; | |
5587856c SG |
848 | struct ib_device *ibdev = device->ib_device; |
849 | struct iser_data_buf *mem = &iser_task->data[cmd_dir]; | |
b130eded | 850 | struct iser_mem_reg *mem_reg = &iser_task->rdma_reg[cmd_dir]; |
5190cc26 | 851 | struct iser_fr_desc *desc = NULL; |
5587856c | 852 | int err, aligned_len; |
5587856c SG |
853 | |
854 | aligned_len = iser_data_buf_aligned_len(mem, ibdev); | |
855 | if (aligned_len != mem->dma_nents) { | |
ea18f5d7 | 856 | err = fall_to_bounce_buf(iser_task, mem, cmd_dir); |
5587856c SG |
857 | if (err) { |
858 | iser_err("failed to allocate bounce buffer\n"); | |
859 | return err; | |
860 | } | |
5587856c SG |
861 | } |
862 | ||
177e31bd SG |
863 | if (mem->dma_nents != 1 || |
864 | scsi_get_prot_op(iser_task->sc) != SCSI_PROT_NORMAL) { | |
81722909 | 865 | desc = device->reg_ops->reg_desc_get(ib_conn); |
b130eded | 866 | mem_reg->mem_h = desc; |
d11ec4ec | 867 | } |
5587856c | 868 | |
d711d81d SG |
869 | err = iser_fast_reg_mr(iser_task, mem, |
870 | desc ? &desc->rsc : NULL, mem_reg); | |
d11ec4ec SG |
871 | if (err) |
872 | goto err_reg; | |
873 | ||
177e31bd | 874 | if (scsi_get_prot_op(iser_task->sc) != SCSI_PROT_NORMAL) { |
6ef8bb83 | 875 | struct iser_mem_reg prot_reg; |
177e31bd | 876 | |
6ef8bb83 | 877 | memset(&prot_reg, 0, sizeof(prot_reg)); |
177e31bd SG |
878 | if (scsi_prot_sg_count(iser_task->sc)) { |
879 | mem = &iser_task->prot[cmd_dir]; | |
880 | aligned_len = iser_data_buf_aligned_len(mem, ibdev); | |
881 | if (aligned_len != mem->dma_nents) { | |
56408325 | 882 | err = fall_to_bounce_buf(iser_task, mem, |
ea18f5d7 | 883 | cmd_dir); |
177e31bd SG |
884 | if (err) { |
885 | iser_err("failed to allocate bounce buffer\n"); | |
886 | return err; | |
887 | } | |
177e31bd SG |
888 | } |
889 | ||
d711d81d SG |
890 | err = iser_fast_reg_mr(iser_task, mem, |
891 | &desc->pi_ctx->rsc, &prot_reg); | |
177e31bd SG |
892 | if (err) |
893 | goto err_reg; | |
894 | } | |
895 | ||
d711d81d | 896 | err = iser_reg_sig_mr(iser_task, desc->pi_ctx, mem_reg, |
6ef8bb83 | 897 | &prot_reg, mem_reg); |
177e31bd SG |
898 | if (err) { |
899 | iser_err("Failed to register signature mr\n"); | |
900 | return err; | |
901 | } | |
d711d81d | 902 | desc->pi_ctx->sig_protected = 1; |
177e31bd | 903 | } |
d11ec4ec | 904 | |
5587856c SG |
905 | return 0; |
906 | err_reg: | |
bd8b944e | 907 | if (desc) |
81722909 | 908 | device->reg_ops->reg_desc_put(ib_conn, desc); |
d11ec4ec | 909 | |
5587856c SG |
910 | return err; |
911 | } |