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f931551b | 1 | /* |
c804f072 | 2 | * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. |
7fac3301 | 3 | * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. |
f931551b RC |
4 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
5 | * | |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | */ | |
34 | ||
35 | #include <linux/pci.h> | |
36 | #include <linux/poll.h> | |
37 | #include <linux/cdev.h> | |
38 | #include <linux/swap.h> | |
39 | #include <linux/vmalloc.h> | |
40 | #include <linux/highmem.h> | |
41 | #include <linux/io.h> | |
f931551b RC |
42 | #include <linux/jiffies.h> |
43 | #include <asm/pgtable.h> | |
44 | #include <linux/delay.h> | |
b108d976 | 45 | #include <linux/export.h> |
f931551b RC |
46 | |
47 | #include "qib.h" | |
48 | #include "qib_common.h" | |
49 | #include "qib_user_sdma.h" | |
50 | ||
7fac3301 MM |
51 | #undef pr_fmt |
52 | #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt | |
53 | ||
f931551b RC |
54 | static int qib_open(struct inode *, struct file *); |
55 | static int qib_close(struct inode *, struct file *); | |
56 | static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *); | |
57 | static ssize_t qib_aio_write(struct kiocb *, const struct iovec *, | |
58 | unsigned long, loff_t); | |
59 | static unsigned int qib_poll(struct file *, struct poll_table_struct *); | |
60 | static int qib_mmapf(struct file *, struct vm_area_struct *); | |
61 | ||
62 | static const struct file_operations qib_file_ops = { | |
63 | .owner = THIS_MODULE, | |
64 | .write = qib_write, | |
65 | .aio_write = qib_aio_write, | |
66 | .open = qib_open, | |
67 | .release = qib_close, | |
68 | .poll = qib_poll, | |
6038f373 AB |
69 | .mmap = qib_mmapf, |
70 | .llseek = noop_llseek, | |
f931551b RC |
71 | }; |
72 | ||
73 | /* | |
74 | * Convert kernel virtual addresses to physical addresses so they don't | |
75 | * potentially conflict with the chip addresses used as mmap offsets. | |
76 | * It doesn't really matter what mmap offset we use as long as we can | |
77 | * interpret it correctly. | |
78 | */ | |
79 | static u64 cvt_kvaddr(void *p) | |
80 | { | |
81 | struct page *page; | |
82 | u64 paddr = 0; | |
83 | ||
84 | page = vmalloc_to_page(p); | |
85 | if (page) | |
86 | paddr = page_to_pfn(page) << PAGE_SHIFT; | |
87 | ||
88 | return paddr; | |
89 | } | |
90 | ||
91 | static int qib_get_base_info(struct file *fp, void __user *ubase, | |
92 | size_t ubase_size) | |
93 | { | |
94 | struct qib_ctxtdata *rcd = ctxt_fp(fp); | |
95 | int ret = 0; | |
96 | struct qib_base_info *kinfo = NULL; | |
97 | struct qib_devdata *dd = rcd->dd; | |
98 | struct qib_pportdata *ppd = rcd->ppd; | |
99 | unsigned subctxt_cnt; | |
100 | int shared, master; | |
101 | size_t sz; | |
102 | ||
103 | subctxt_cnt = rcd->subctxt_cnt; | |
104 | if (!subctxt_cnt) { | |
105 | shared = 0; | |
106 | master = 0; | |
107 | subctxt_cnt = 1; | |
108 | } else { | |
109 | shared = 1; | |
110 | master = !subctxt_fp(fp); | |
111 | } | |
112 | ||
113 | sz = sizeof(*kinfo); | |
114 | /* If context sharing is not requested, allow the old size structure */ | |
115 | if (!shared) | |
116 | sz -= 7 * sizeof(u64); | |
117 | if (ubase_size < sz) { | |
118 | ret = -EINVAL; | |
119 | goto bail; | |
120 | } | |
121 | ||
122 | kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL); | |
123 | if (kinfo == NULL) { | |
124 | ret = -ENOMEM; | |
125 | goto bail; | |
126 | } | |
127 | ||
128 | ret = dd->f_get_base_info(rcd, kinfo); | |
129 | if (ret < 0) | |
130 | goto bail; | |
131 | ||
132 | kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt; | |
133 | kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize; | |
134 | kinfo->spi_tidegrcnt = rcd->rcvegrcnt; | |
135 | kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize; | |
136 | /* | |
137 | * have to mmap whole thing | |
138 | */ | |
139 | kinfo->spi_rcv_egrbuftotlen = | |
140 | rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size; | |
141 | kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk; | |
142 | kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen / | |
143 | rcd->rcvegrbuf_chunks; | |
144 | kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt; | |
145 | if (master) | |
146 | kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt; | |
147 | /* | |
148 | * for this use, may be cfgctxts summed over all chips that | |
149 | * are are configured and present | |
150 | */ | |
151 | kinfo->spi_nctxts = dd->cfgctxts; | |
152 | /* unit (chip/board) our context is on */ | |
153 | kinfo->spi_unit = dd->unit; | |
154 | kinfo->spi_port = ppd->port; | |
155 | /* for now, only a single page */ | |
156 | kinfo->spi_tid_maxsize = PAGE_SIZE; | |
157 | ||
158 | /* | |
159 | * Doing this per context, and based on the skip value, etc. This has | |
160 | * to be the actual buffer size, since the protocol code treats it | |
161 | * as an array. | |
162 | * | |
163 | * These have to be set to user addresses in the user code via mmap. | |
164 | * These values are used on return to user code for the mmap target | |
165 | * addresses only. For 32 bit, same 44 bit address problem, so use | |
166 | * the physical address, not virtual. Before 2.6.11, using the | |
167 | * page_address() macro worked, but in 2.6.11, even that returns the | |
168 | * full 64 bit address (upper bits all 1's). So far, using the | |
169 | * physical addresses (or chip offsets, for chip mapping) works, but | |
170 | * no doubt some future kernel release will change that, and we'll be | |
171 | * on to yet another method of dealing with this. | |
172 | * Normally only one of rcvhdr_tailaddr or rhf_offset is useful | |
173 | * since the chips with non-zero rhf_offset don't normally | |
174 | * enable tail register updates to host memory, but for testing, | |
175 | * both can be enabled and used. | |
176 | */ | |
177 | kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys; | |
178 | kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys; | |
179 | kinfo->spi_rhf_offset = dd->rhf_offset; | |
180 | kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys; | |
181 | kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys; | |
182 | /* setup per-unit (not port) status area for user programs */ | |
183 | kinfo->spi_status = (u64) kinfo->spi_pioavailaddr + | |
184 | (char *) ppd->statusp - | |
185 | (char *) dd->pioavailregs_dma; | |
186 | kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt; | |
187 | if (!shared) { | |
188 | kinfo->spi_piocnt = rcd->piocnt; | |
189 | kinfo->spi_piobufbase = (u64) rcd->piobufs; | |
190 | kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask); | |
191 | } else if (master) { | |
192 | kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) + | |
193 | (rcd->piocnt % subctxt_cnt); | |
194 | /* Master's PIO buffers are after all the slave's */ | |
195 | kinfo->spi_piobufbase = (u64) rcd->piobufs + | |
196 | dd->palign * | |
197 | (rcd->piocnt - kinfo->spi_piocnt); | |
198 | } else { | |
199 | unsigned slave = subctxt_fp(fp) - 1; | |
200 | ||
201 | kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt; | |
202 | kinfo->spi_piobufbase = (u64) rcd->piobufs + | |
203 | dd->palign * kinfo->spi_piocnt * slave; | |
204 | } | |
205 | ||
206 | if (shared) { | |
207 | kinfo->spi_sendbuf_status = | |
208 | cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]); | |
209 | /* only spi_subctxt_* fields should be set in this block! */ | |
210 | kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase); | |
211 | ||
212 | kinfo->spi_subctxt_rcvegrbuf = | |
213 | cvt_kvaddr(rcd->subctxt_rcvegrbuf); | |
214 | kinfo->spi_subctxt_rcvhdr_base = | |
215 | cvt_kvaddr(rcd->subctxt_rcvhdr_base); | |
216 | } | |
217 | ||
218 | /* | |
219 | * All user buffers are 2KB buffers. If we ever support | |
220 | * giving 4KB buffers to user processes, this will need some | |
221 | * work. Can't use piobufbase directly, because it has | |
222 | * both 2K and 4K buffer base values. | |
223 | */ | |
224 | kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) / | |
225 | dd->palign; | |
226 | kinfo->spi_pioalign = dd->palign; | |
227 | kinfo->spi_qpair = QIB_KD_QP; | |
228 | /* | |
229 | * user mode PIO buffers are always 2KB, even when 4KB can | |
230 | * be received, and sent via the kernel; this is ibmaxlen | |
231 | * for 2K MTU. | |
232 | */ | |
233 | kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32); | |
234 | kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */ | |
235 | kinfo->spi_ctxt = rcd->ctxt; | |
236 | kinfo->spi_subctxt = subctxt_fp(fp); | |
237 | kinfo->spi_sw_version = QIB_KERN_SWVERSION; | |
238 | kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */ | |
239 | kinfo->spi_hw_version = dd->revision; | |
240 | ||
241 | if (master) | |
242 | kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER; | |
243 | ||
244 | sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo); | |
245 | if (copy_to_user(ubase, kinfo, sz)) | |
246 | ret = -EFAULT; | |
247 | bail: | |
248 | kfree(kinfo); | |
249 | return ret; | |
250 | } | |
251 | ||
252 | /** | |
253 | * qib_tid_update - update a context TID | |
254 | * @rcd: the context | |
255 | * @fp: the qib device file | |
256 | * @ti: the TID information | |
257 | * | |
258 | * The new implementation as of Oct 2004 is that the driver assigns | |
259 | * the tid and returns it to the caller. To reduce search time, we | |
260 | * keep a cursor for each context, walking the shadow tid array to find | |
261 | * one that's not in use. | |
262 | * | |
263 | * For now, if we can't allocate the full list, we fail, although | |
264 | * in the long run, we'll allocate as many as we can, and the | |
265 | * caller will deal with that by trying the remaining pages later. | |
266 | * That means that when we fail, we have to mark the tids as not in | |
267 | * use again, in our shadow copy. | |
268 | * | |
269 | * It's up to the caller to free the tids when they are done. | |
270 | * We'll unlock the pages as they free them. | |
271 | * | |
272 | * Also, right now we are locking one page at a time, but since | |
273 | * the intended use of this routine is for a single group of | |
274 | * virtually contiguous pages, that should change to improve | |
275 | * performance. | |
276 | */ | |
277 | static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp, | |
278 | const struct qib_tid_info *ti) | |
279 | { | |
280 | int ret = 0, ntids; | |
281 | u32 tid, ctxttid, cnt, i, tidcnt, tidoff; | |
282 | u16 *tidlist; | |
283 | struct qib_devdata *dd = rcd->dd; | |
284 | u64 physaddr; | |
285 | unsigned long vaddr; | |
286 | u64 __iomem *tidbase; | |
287 | unsigned long tidmap[8]; | |
288 | struct page **pagep = NULL; | |
289 | unsigned subctxt = subctxt_fp(fp); | |
290 | ||
291 | if (!dd->pageshadow) { | |
292 | ret = -ENOMEM; | |
293 | goto done; | |
294 | } | |
295 | ||
296 | cnt = ti->tidcnt; | |
297 | if (!cnt) { | |
298 | ret = -EFAULT; | |
299 | goto done; | |
300 | } | |
301 | ctxttid = rcd->ctxt * dd->rcvtidcnt; | |
302 | if (!rcd->subctxt_cnt) { | |
303 | tidcnt = dd->rcvtidcnt; | |
304 | tid = rcd->tidcursor; | |
305 | tidoff = 0; | |
306 | } else if (!subctxt) { | |
307 | tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) + | |
308 | (dd->rcvtidcnt % rcd->subctxt_cnt); | |
309 | tidoff = dd->rcvtidcnt - tidcnt; | |
310 | ctxttid += tidoff; | |
311 | tid = tidcursor_fp(fp); | |
312 | } else { | |
313 | tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt; | |
314 | tidoff = tidcnt * (subctxt - 1); | |
315 | ctxttid += tidoff; | |
316 | tid = tidcursor_fp(fp); | |
317 | } | |
318 | if (cnt > tidcnt) { | |
319 | /* make sure it all fits in tid_pg_list */ | |
7fac3301 MM |
320 | qib_devinfo(dd->pcidev, |
321 | "Process tried to allocate %u TIDs, only trying max (%u)\n", | |
322 | cnt, tidcnt); | |
f931551b RC |
323 | cnt = tidcnt; |
324 | } | |
325 | pagep = (struct page **) rcd->tid_pg_list; | |
326 | tidlist = (u16 *) &pagep[dd->rcvtidcnt]; | |
327 | pagep += tidoff; | |
328 | tidlist += tidoff; | |
329 | ||
330 | memset(tidmap, 0, sizeof(tidmap)); | |
331 | /* before decrement; chip actual # */ | |
332 | ntids = tidcnt; | |
333 | tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) + | |
334 | dd->rcvtidbase + | |
335 | ctxttid * sizeof(*tidbase)); | |
336 | ||
337 | /* virtual address of first page in transfer */ | |
338 | vaddr = ti->tidvaddr; | |
339 | if (!access_ok(VERIFY_WRITE, (void __user *) vaddr, | |
340 | cnt * PAGE_SIZE)) { | |
341 | ret = -EFAULT; | |
342 | goto done; | |
343 | } | |
344 | ret = qib_get_user_pages(vaddr, cnt, pagep); | |
345 | if (ret) { | |
346 | /* | |
347 | * if (ret == -EBUSY) | |
348 | * We can't continue because the pagep array won't be | |
349 | * initialized. This should never happen, | |
350 | * unless perhaps the user has mpin'ed the pages | |
351 | * themselves. | |
352 | */ | |
353 | qib_devinfo(dd->pcidev, | |
354 | "Failed to lock addr %p, %u pages: " | |
355 | "errno %d\n", (void *) vaddr, cnt, -ret); | |
356 | goto done; | |
357 | } | |
358 | for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) { | |
359 | for (; ntids--; tid++) { | |
360 | if (tid == tidcnt) | |
361 | tid = 0; | |
362 | if (!dd->pageshadow[ctxttid + tid]) | |
363 | break; | |
364 | } | |
365 | if (ntids < 0) { | |
366 | /* | |
367 | * Oops, wrapped all the way through their TIDs, | |
368 | * and didn't have enough free; see comments at | |
369 | * start of routine | |
370 | */ | |
371 | i--; /* last tidlist[i] not filled in */ | |
372 | ret = -ENOMEM; | |
373 | break; | |
374 | } | |
375 | tidlist[i] = tid + tidoff; | |
376 | /* we "know" system pages and TID pages are same size */ | |
377 | dd->pageshadow[ctxttid + tid] = pagep[i]; | |
378 | dd->physshadow[ctxttid + tid] = | |
379 | qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE, | |
380 | PCI_DMA_FROMDEVICE); | |
381 | /* | |
382 | * don't need atomic or it's overhead | |
383 | */ | |
384 | __set_bit(tid, tidmap); | |
385 | physaddr = dd->physshadow[ctxttid + tid]; | |
386 | /* PERFORMANCE: below should almost certainly be cached */ | |
387 | dd->f_put_tid(dd, &tidbase[tid], | |
388 | RCVHQ_RCV_TYPE_EXPECTED, physaddr); | |
389 | /* | |
390 | * don't check this tid in qib_ctxtshadow, since we | |
391 | * just filled it in; start with the next one. | |
392 | */ | |
393 | tid++; | |
394 | } | |
395 | ||
396 | if (ret) { | |
397 | u32 limit; | |
398 | cleanup: | |
399 | /* jump here if copy out of updated info failed... */ | |
400 | /* same code that's in qib_free_tid() */ | |
401 | limit = sizeof(tidmap) * BITS_PER_BYTE; | |
402 | if (limit > tidcnt) | |
403 | /* just in case size changes in future */ | |
404 | limit = tidcnt; | |
405 | tid = find_first_bit((const unsigned long *)tidmap, limit); | |
406 | for (; tid < limit; tid++) { | |
407 | if (!test_bit(tid, tidmap)) | |
408 | continue; | |
409 | if (dd->pageshadow[ctxttid + tid]) { | |
410 | dma_addr_t phys; | |
411 | ||
412 | phys = dd->physshadow[ctxttid + tid]; | |
413 | dd->physshadow[ctxttid + tid] = dd->tidinvalid; | |
414 | /* PERFORMANCE: below should almost certainly | |
415 | * be cached | |
416 | */ | |
417 | dd->f_put_tid(dd, &tidbase[tid], | |
418 | RCVHQ_RCV_TYPE_EXPECTED, | |
419 | dd->tidinvalid); | |
420 | pci_unmap_page(dd->pcidev, phys, PAGE_SIZE, | |
421 | PCI_DMA_FROMDEVICE); | |
422 | dd->pageshadow[ctxttid + tid] = NULL; | |
423 | } | |
424 | } | |
425 | qib_release_user_pages(pagep, cnt); | |
426 | } else { | |
427 | /* | |
428 | * Copy the updated array, with qib_tid's filled in, back | |
429 | * to user. Since we did the copy in already, this "should | |
430 | * never fail" If it does, we have to clean up... | |
431 | */ | |
432 | if (copy_to_user((void __user *) | |
433 | (unsigned long) ti->tidlist, | |
434 | tidlist, cnt * sizeof(*tidlist))) { | |
435 | ret = -EFAULT; | |
436 | goto cleanup; | |
437 | } | |
438 | if (copy_to_user((void __user *) (unsigned long) ti->tidmap, | |
439 | tidmap, sizeof tidmap)) { | |
440 | ret = -EFAULT; | |
441 | goto cleanup; | |
442 | } | |
443 | if (tid == tidcnt) | |
444 | tid = 0; | |
445 | if (!rcd->subctxt_cnt) | |
446 | rcd->tidcursor = tid; | |
447 | else | |
448 | tidcursor_fp(fp) = tid; | |
449 | } | |
450 | ||
451 | done: | |
452 | return ret; | |
453 | } | |
454 | ||
455 | /** | |
456 | * qib_tid_free - free a context TID | |
457 | * @rcd: the context | |
458 | * @subctxt: the subcontext | |
459 | * @ti: the TID info | |
460 | * | |
461 | * right now we are unlocking one page at a time, but since | |
462 | * the intended use of this routine is for a single group of | |
463 | * virtually contiguous pages, that should change to improve | |
464 | * performance. We check that the TID is in range for this context | |
465 | * but otherwise don't check validity; if user has an error and | |
466 | * frees the wrong tid, it's only their own data that can thereby | |
467 | * be corrupted. We do check that the TID was in use, for sanity | |
468 | * We always use our idea of the saved address, not the address that | |
469 | * they pass in to us. | |
470 | */ | |
471 | static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt, | |
472 | const struct qib_tid_info *ti) | |
473 | { | |
474 | int ret = 0; | |
475 | u32 tid, ctxttid, cnt, limit, tidcnt; | |
476 | struct qib_devdata *dd = rcd->dd; | |
477 | u64 __iomem *tidbase; | |
478 | unsigned long tidmap[8]; | |
479 | ||
480 | if (!dd->pageshadow) { | |
481 | ret = -ENOMEM; | |
482 | goto done; | |
483 | } | |
484 | ||
485 | if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap, | |
486 | sizeof tidmap)) { | |
487 | ret = -EFAULT; | |
488 | goto done; | |
489 | } | |
490 | ||
491 | ctxttid = rcd->ctxt * dd->rcvtidcnt; | |
492 | if (!rcd->subctxt_cnt) | |
493 | tidcnt = dd->rcvtidcnt; | |
494 | else if (!subctxt) { | |
495 | tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) + | |
496 | (dd->rcvtidcnt % rcd->subctxt_cnt); | |
497 | ctxttid += dd->rcvtidcnt - tidcnt; | |
498 | } else { | |
499 | tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt; | |
500 | ctxttid += tidcnt * (subctxt - 1); | |
501 | } | |
502 | tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) + | |
503 | dd->rcvtidbase + | |
504 | ctxttid * sizeof(*tidbase)); | |
505 | ||
506 | limit = sizeof(tidmap) * BITS_PER_BYTE; | |
507 | if (limit > tidcnt) | |
508 | /* just in case size changes in future */ | |
509 | limit = tidcnt; | |
510 | tid = find_first_bit(tidmap, limit); | |
511 | for (cnt = 0; tid < limit; tid++) { | |
512 | /* | |
513 | * small optimization; if we detect a run of 3 or so without | |
514 | * any set, use find_first_bit again. That's mainly to | |
515 | * accelerate the case where we wrapped, so we have some at | |
516 | * the beginning, and some at the end, and a big gap | |
517 | * in the middle. | |
518 | */ | |
519 | if (!test_bit(tid, tidmap)) | |
520 | continue; | |
521 | cnt++; | |
522 | if (dd->pageshadow[ctxttid + tid]) { | |
523 | struct page *p; | |
524 | dma_addr_t phys; | |
525 | ||
526 | p = dd->pageshadow[ctxttid + tid]; | |
527 | dd->pageshadow[ctxttid + tid] = NULL; | |
528 | phys = dd->physshadow[ctxttid + tid]; | |
529 | dd->physshadow[ctxttid + tid] = dd->tidinvalid; | |
530 | /* PERFORMANCE: below should almost certainly be | |
531 | * cached | |
532 | */ | |
533 | dd->f_put_tid(dd, &tidbase[tid], | |
534 | RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid); | |
535 | pci_unmap_page(dd->pcidev, phys, PAGE_SIZE, | |
536 | PCI_DMA_FROMDEVICE); | |
537 | qib_release_user_pages(&p, 1); | |
538 | } | |
539 | } | |
540 | done: | |
541 | return ret; | |
542 | } | |
543 | ||
544 | /** | |
545 | * qib_set_part_key - set a partition key | |
546 | * @rcd: the context | |
547 | * @key: the key | |
548 | * | |
549 | * We can have up to 4 active at a time (other than the default, which is | |
550 | * always allowed). This is somewhat tricky, since multiple contexts may set | |
551 | * the same key, so we reference count them, and clean up at exit. All 4 | |
552 | * partition keys are packed into a single qlogic_ib register. It's an | |
553 | * error for a process to set the same pkey multiple times. We provide no | |
554 | * mechanism to de-allocate a pkey at this time, we may eventually need to | |
555 | * do that. I've used the atomic operations, and no locking, and only make | |
556 | * a single pass through what's available. This should be more than | |
557 | * adequate for some time. I'll think about spinlocks or the like if and as | |
558 | * it's necessary. | |
559 | */ | |
560 | static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key) | |
561 | { | |
562 | struct qib_pportdata *ppd = rcd->ppd; | |
563 | int i, any = 0, pidx = -1; | |
564 | u16 lkey = key & 0x7FFF; | |
565 | int ret; | |
566 | ||
567 | if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) { | |
568 | /* nothing to do; this key always valid */ | |
569 | ret = 0; | |
570 | goto bail; | |
571 | } | |
572 | ||
573 | if (!lkey) { | |
574 | ret = -EINVAL; | |
575 | goto bail; | |
576 | } | |
577 | ||
578 | /* | |
579 | * Set the full membership bit, because it has to be | |
580 | * set in the register or the packet, and it seems | |
581 | * cleaner to set in the register than to force all | |
582 | * callers to set it. | |
583 | */ | |
584 | key |= 0x8000; | |
585 | ||
586 | for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) { | |
587 | if (!rcd->pkeys[i] && pidx == -1) | |
588 | pidx = i; | |
589 | if (rcd->pkeys[i] == key) { | |
590 | ret = -EEXIST; | |
591 | goto bail; | |
592 | } | |
593 | } | |
594 | if (pidx == -1) { | |
595 | ret = -EBUSY; | |
596 | goto bail; | |
597 | } | |
598 | for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) { | |
599 | if (!ppd->pkeys[i]) { | |
600 | any++; | |
601 | continue; | |
602 | } | |
603 | if (ppd->pkeys[i] == key) { | |
604 | atomic_t *pkrefs = &ppd->pkeyrefs[i]; | |
605 | ||
606 | if (atomic_inc_return(pkrefs) > 1) { | |
607 | rcd->pkeys[pidx] = key; | |
608 | ret = 0; | |
609 | goto bail; | |
610 | } else { | |
611 | /* | |
612 | * lost race, decrement count, catch below | |
613 | */ | |
614 | atomic_dec(pkrefs); | |
615 | any++; | |
616 | } | |
617 | } | |
618 | if ((ppd->pkeys[i] & 0x7FFF) == lkey) { | |
619 | /* | |
620 | * It makes no sense to have both the limited and | |
621 | * full membership PKEY set at the same time since | |
622 | * the unlimited one will disable the limited one. | |
623 | */ | |
624 | ret = -EEXIST; | |
625 | goto bail; | |
626 | } | |
627 | } | |
628 | if (!any) { | |
629 | ret = -EBUSY; | |
630 | goto bail; | |
631 | } | |
632 | for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) { | |
633 | if (!ppd->pkeys[i] && | |
634 | atomic_inc_return(&ppd->pkeyrefs[i]) == 1) { | |
635 | rcd->pkeys[pidx] = key; | |
636 | ppd->pkeys[i] = key; | |
637 | (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0); | |
638 | ret = 0; | |
639 | goto bail; | |
640 | } | |
641 | } | |
642 | ret = -EBUSY; | |
643 | ||
644 | bail: | |
645 | return ret; | |
646 | } | |
647 | ||
648 | /** | |
649 | * qib_manage_rcvq - manage a context's receive queue | |
650 | * @rcd: the context | |
651 | * @subctxt: the subcontext | |
652 | * @start_stop: action to carry out | |
653 | * | |
654 | * start_stop == 0 disables receive on the context, for use in queue | |
655 | * overflow conditions. start_stop==1 re-enables, to be used to | |
656 | * re-init the software copy of the head register | |
657 | */ | |
658 | static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt, | |
659 | int start_stop) | |
660 | { | |
661 | struct qib_devdata *dd = rcd->dd; | |
662 | unsigned int rcvctrl_op; | |
663 | ||
664 | if (subctxt) | |
665 | goto bail; | |
666 | /* atomically clear receive enable ctxt. */ | |
667 | if (start_stop) { | |
668 | /* | |
669 | * On enable, force in-memory copy of the tail register to | |
670 | * 0, so that protocol code doesn't have to worry about | |
671 | * whether or not the chip has yet updated the in-memory | |
672 | * copy or not on return from the system call. The chip | |
673 | * always resets it's tail register back to 0 on a | |
674 | * transition from disabled to enabled. | |
675 | */ | |
676 | if (rcd->rcvhdrtail_kvaddr) | |
677 | qib_clear_rcvhdrtail(rcd); | |
678 | rcvctrl_op = QIB_RCVCTRL_CTXT_ENB; | |
679 | } else | |
680 | rcvctrl_op = QIB_RCVCTRL_CTXT_DIS; | |
681 | dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt); | |
682 | /* always; new head should be equal to new tail; see above */ | |
683 | bail: | |
684 | return 0; | |
685 | } | |
686 | ||
687 | static void qib_clean_part_key(struct qib_ctxtdata *rcd, | |
688 | struct qib_devdata *dd) | |
689 | { | |
690 | int i, j, pchanged = 0; | |
691 | u64 oldpkey; | |
692 | struct qib_pportdata *ppd = rcd->ppd; | |
693 | ||
694 | /* for debugging only */ | |
695 | oldpkey = (u64) ppd->pkeys[0] | | |
696 | ((u64) ppd->pkeys[1] << 16) | | |
697 | ((u64) ppd->pkeys[2] << 32) | | |
698 | ((u64) ppd->pkeys[3] << 48); | |
699 | ||
700 | for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) { | |
701 | if (!rcd->pkeys[i]) | |
702 | continue; | |
703 | for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) { | |
704 | /* check for match independent of the global bit */ | |
705 | if ((ppd->pkeys[j] & 0x7fff) != | |
706 | (rcd->pkeys[i] & 0x7fff)) | |
707 | continue; | |
708 | if (atomic_dec_and_test(&ppd->pkeyrefs[j])) { | |
709 | ppd->pkeys[j] = 0; | |
710 | pchanged++; | |
711 | } | |
712 | break; | |
713 | } | |
714 | rcd->pkeys[i] = 0; | |
715 | } | |
716 | if (pchanged) | |
717 | (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0); | |
718 | } | |
719 | ||
720 | /* common code for the mappings on dma_alloc_coherent mem */ | |
721 | static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd, | |
722 | unsigned len, void *kvaddr, u32 write_ok, char *what) | |
723 | { | |
724 | struct qib_devdata *dd = rcd->dd; | |
725 | unsigned long pfn; | |
726 | int ret; | |
727 | ||
728 | if ((vma->vm_end - vma->vm_start) > len) { | |
729 | qib_devinfo(dd->pcidev, | |
730 | "FAIL on %s: len %lx > %x\n", what, | |
731 | vma->vm_end - vma->vm_start, len); | |
732 | ret = -EFAULT; | |
733 | goto bail; | |
734 | } | |
735 | ||
736 | /* | |
737 | * shared context user code requires rcvhdrq mapped r/w, others | |
738 | * only allowed readonly mapping. | |
739 | */ | |
740 | if (!write_ok) { | |
741 | if (vma->vm_flags & VM_WRITE) { | |
742 | qib_devinfo(dd->pcidev, | |
743 | "%s must be mapped readonly\n", what); | |
744 | ret = -EPERM; | |
745 | goto bail; | |
746 | } | |
747 | ||
748 | /* don't allow them to later change with mprotect */ | |
749 | vma->vm_flags &= ~VM_MAYWRITE; | |
750 | } | |
751 | ||
752 | pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT; | |
753 | ret = remap_pfn_range(vma, vma->vm_start, pfn, | |
754 | len, vma->vm_page_prot); | |
755 | if (ret) | |
7fac3301 MM |
756 | qib_devinfo(dd->pcidev, |
757 | "%s ctxt%u mmap of %lx, %x bytes failed: %d\n", | |
758 | what, rcd->ctxt, pfn, len, ret); | |
f931551b RC |
759 | bail: |
760 | return ret; | |
761 | } | |
762 | ||
763 | static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd, | |
764 | u64 ureg) | |
765 | { | |
766 | unsigned long phys; | |
767 | unsigned long sz; | |
768 | int ret; | |
769 | ||
770 | /* | |
771 | * This is real hardware, so use io_remap. This is the mechanism | |
772 | * for the user process to update the head registers for their ctxt | |
773 | * in the chip. | |
774 | */ | |
775 | sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE; | |
776 | if ((vma->vm_end - vma->vm_start) > sz) { | |
7fac3301 MM |
777 | qib_devinfo(dd->pcidev, |
778 | "FAIL mmap userreg: reqlen %lx > PAGE\n", | |
779 | vma->vm_end - vma->vm_start); | |
f931551b RC |
780 | ret = -EFAULT; |
781 | } else { | |
782 | phys = dd->physaddr + ureg; | |
783 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
784 | ||
785 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; | |
786 | ret = io_remap_pfn_range(vma, vma->vm_start, | |
787 | phys >> PAGE_SHIFT, | |
788 | vma->vm_end - vma->vm_start, | |
789 | vma->vm_page_prot); | |
790 | } | |
791 | return ret; | |
792 | } | |
793 | ||
794 | static int mmap_piobufs(struct vm_area_struct *vma, | |
795 | struct qib_devdata *dd, | |
796 | struct qib_ctxtdata *rcd, | |
797 | unsigned piobufs, unsigned piocnt) | |
798 | { | |
799 | unsigned long phys; | |
800 | int ret; | |
801 | ||
802 | /* | |
803 | * When we map the PIO buffers in the chip, we want to map them as | |
804 | * writeonly, no read possible; unfortunately, x86 doesn't allow | |
805 | * for this in hardware, but we still prevent users from asking | |
806 | * for it. | |
807 | */ | |
808 | if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) { | |
7fac3301 MM |
809 | qib_devinfo(dd->pcidev, |
810 | "FAIL mmap piobufs: reqlen %lx > PAGE\n", | |
f931551b RC |
811 | vma->vm_end - vma->vm_start); |
812 | ret = -EINVAL; | |
813 | goto bail; | |
814 | } | |
815 | ||
816 | phys = dd->physaddr + piobufs; | |
817 | ||
818 | #if defined(__powerpc__) | |
819 | /* There isn't a generic way to specify writethrough mappings */ | |
820 | pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE; | |
821 | pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU; | |
822 | pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED; | |
823 | #endif | |
824 | ||
825 | /* | |
826 | * don't allow them to later change to readable with mprotect (for when | |
827 | * not initially mapped readable, as is normally the case) | |
828 | */ | |
829 | vma->vm_flags &= ~VM_MAYREAD; | |
830 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; | |
831 | ||
832 | if (qib_wc_pat) | |
833 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
834 | ||
835 | ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT, | |
836 | vma->vm_end - vma->vm_start, | |
837 | vma->vm_page_prot); | |
838 | bail: | |
839 | return ret; | |
840 | } | |
841 | ||
842 | static int mmap_rcvegrbufs(struct vm_area_struct *vma, | |
843 | struct qib_ctxtdata *rcd) | |
844 | { | |
845 | struct qib_devdata *dd = rcd->dd; | |
846 | unsigned long start, size; | |
847 | size_t total_size, i; | |
848 | unsigned long pfn; | |
849 | int ret; | |
850 | ||
851 | size = rcd->rcvegrbuf_size; | |
852 | total_size = rcd->rcvegrbuf_chunks * size; | |
853 | if ((vma->vm_end - vma->vm_start) > total_size) { | |
7fac3301 MM |
854 | qib_devinfo(dd->pcidev, |
855 | "FAIL on egr bufs: reqlen %lx > actual %lx\n", | |
f931551b RC |
856 | vma->vm_end - vma->vm_start, |
857 | (unsigned long) total_size); | |
858 | ret = -EINVAL; | |
859 | goto bail; | |
860 | } | |
861 | ||
862 | if (vma->vm_flags & VM_WRITE) { | |
7fac3301 MM |
863 | qib_devinfo(dd->pcidev, |
864 | "Can't map eager buffers as writable (flags=%lx)\n", | |
865 | vma->vm_flags); | |
f931551b RC |
866 | ret = -EPERM; |
867 | goto bail; | |
868 | } | |
869 | /* don't allow them to later change to writeable with mprotect */ | |
870 | vma->vm_flags &= ~VM_MAYWRITE; | |
871 | ||
872 | start = vma->vm_start; | |
873 | ||
874 | for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) { | |
875 | pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT; | |
876 | ret = remap_pfn_range(vma, start, pfn, size, | |
877 | vma->vm_page_prot); | |
878 | if (ret < 0) | |
879 | goto bail; | |
880 | } | |
881 | ret = 0; | |
882 | ||
883 | bail: | |
884 | return ret; | |
885 | } | |
886 | ||
887 | /* | |
888 | * qib_file_vma_fault - handle a VMA page fault. | |
889 | */ | |
890 | static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
891 | { | |
892 | struct page *page; | |
893 | ||
894 | page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT)); | |
895 | if (!page) | |
896 | return VM_FAULT_SIGBUS; | |
897 | ||
898 | get_page(page); | |
899 | vmf->page = page; | |
900 | ||
901 | return 0; | |
902 | } | |
903 | ||
904 | static struct vm_operations_struct qib_file_vm_ops = { | |
905 | .fault = qib_file_vma_fault, | |
906 | }; | |
907 | ||
908 | static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr, | |
909 | struct qib_ctxtdata *rcd, unsigned subctxt) | |
910 | { | |
911 | struct qib_devdata *dd = rcd->dd; | |
912 | unsigned subctxt_cnt; | |
913 | unsigned long len; | |
914 | void *addr; | |
915 | size_t size; | |
916 | int ret = 0; | |
917 | ||
918 | subctxt_cnt = rcd->subctxt_cnt; | |
919 | size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size; | |
920 | ||
921 | /* | |
922 | * Each process has all the subctxt uregbase, rcvhdrq, and | |
923 | * rcvegrbufs mmapped - as an array for all the processes, | |
924 | * and also separately for this process. | |
925 | */ | |
926 | if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) { | |
927 | addr = rcd->subctxt_uregbase; | |
928 | size = PAGE_SIZE * subctxt_cnt; | |
929 | } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) { | |
930 | addr = rcd->subctxt_rcvhdr_base; | |
931 | size = rcd->rcvhdrq_size * subctxt_cnt; | |
932 | } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) { | |
933 | addr = rcd->subctxt_rcvegrbuf; | |
934 | size *= subctxt_cnt; | |
935 | } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase + | |
936 | PAGE_SIZE * subctxt)) { | |
937 | addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt; | |
938 | size = PAGE_SIZE; | |
939 | } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base + | |
940 | rcd->rcvhdrq_size * subctxt)) { | |
941 | addr = rcd->subctxt_rcvhdr_base + | |
942 | rcd->rcvhdrq_size * subctxt; | |
943 | size = rcd->rcvhdrq_size; | |
944 | } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) { | |
945 | addr = rcd->user_event_mask; | |
946 | size = PAGE_SIZE; | |
947 | } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf + | |
948 | size * subctxt)) { | |
949 | addr = rcd->subctxt_rcvegrbuf + size * subctxt; | |
950 | /* rcvegrbufs are read-only on the slave */ | |
951 | if (vma->vm_flags & VM_WRITE) { | |
952 | qib_devinfo(dd->pcidev, | |
953 | "Can't map eager buffers as " | |
954 | "writable (flags=%lx)\n", vma->vm_flags); | |
955 | ret = -EPERM; | |
956 | goto bail; | |
957 | } | |
958 | /* | |
959 | * Don't allow permission to later change to writeable | |
960 | * with mprotect. | |
961 | */ | |
962 | vma->vm_flags &= ~VM_MAYWRITE; | |
963 | } else | |
964 | goto bail; | |
965 | len = vma->vm_end - vma->vm_start; | |
966 | if (len > size) { | |
967 | ret = -EINVAL; | |
968 | goto bail; | |
969 | } | |
970 | ||
971 | vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT; | |
972 | vma->vm_ops = &qib_file_vm_ops; | |
314e51b9 | 973 | vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; |
f931551b RC |
974 | ret = 1; |
975 | ||
976 | bail: | |
977 | return ret; | |
978 | } | |
979 | ||
980 | /** | |
981 | * qib_mmapf - mmap various structures into user space | |
982 | * @fp: the file pointer | |
983 | * @vma: the VM area | |
984 | * | |
985 | * We use this to have a shared buffer between the kernel and the user code | |
986 | * for the rcvhdr queue, egr buffers, and the per-context user regs and pio | |
987 | * buffers in the chip. We have the open and close entries so we can bump | |
988 | * the ref count and keep the driver from being unloaded while still mapped. | |
989 | */ | |
990 | static int qib_mmapf(struct file *fp, struct vm_area_struct *vma) | |
991 | { | |
992 | struct qib_ctxtdata *rcd; | |
993 | struct qib_devdata *dd; | |
994 | u64 pgaddr, ureg; | |
995 | unsigned piobufs, piocnt; | |
996 | int ret, match = 1; | |
997 | ||
998 | rcd = ctxt_fp(fp); | |
999 | if (!rcd || !(vma->vm_flags & VM_SHARED)) { | |
1000 | ret = -EINVAL; | |
1001 | goto bail; | |
1002 | } | |
1003 | dd = rcd->dd; | |
1004 | ||
1005 | /* | |
1006 | * This is the qib_do_user_init() code, mapping the shared buffers | |
1007 | * and per-context user registers into the user process. The address | |
1008 | * referred to by vm_pgoff is the file offset passed via mmap(). | |
1009 | * For shared contexts, this is the kernel vmalloc() address of the | |
1010 | * pages to share with the master. | |
1011 | * For non-shared or master ctxts, this is a physical address. | |
1012 | * We only do one mmap for each space mapped. | |
1013 | */ | |
1014 | pgaddr = vma->vm_pgoff << PAGE_SHIFT; | |
1015 | ||
1016 | /* | |
1017 | * Check for 0 in case one of the allocations failed, but user | |
1018 | * called mmap anyway. | |
1019 | */ | |
1020 | if (!pgaddr) { | |
1021 | ret = -EINVAL; | |
1022 | goto bail; | |
1023 | } | |
1024 | ||
1025 | /* | |
1026 | * Physical addresses must fit in 40 bits for our hardware. | |
1027 | * Check for kernel virtual addresses first, anything else must | |
1028 | * match a HW or memory address. | |
1029 | */ | |
1030 | ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp)); | |
1031 | if (ret) { | |
1032 | if (ret > 0) | |
1033 | ret = 0; | |
1034 | goto bail; | |
1035 | } | |
1036 | ||
1037 | ureg = dd->uregbase + dd->ureg_align * rcd->ctxt; | |
1038 | if (!rcd->subctxt_cnt) { | |
1039 | /* ctxt is not shared */ | |
1040 | piocnt = rcd->piocnt; | |
1041 | piobufs = rcd->piobufs; | |
1042 | } else if (!subctxt_fp(fp)) { | |
1043 | /* caller is the master */ | |
1044 | piocnt = (rcd->piocnt / rcd->subctxt_cnt) + | |
1045 | (rcd->piocnt % rcd->subctxt_cnt); | |
1046 | piobufs = rcd->piobufs + | |
1047 | dd->palign * (rcd->piocnt - piocnt); | |
1048 | } else { | |
1049 | unsigned slave = subctxt_fp(fp) - 1; | |
1050 | ||
1051 | /* caller is a slave */ | |
1052 | piocnt = rcd->piocnt / rcd->subctxt_cnt; | |
1053 | piobufs = rcd->piobufs + dd->palign * piocnt * slave; | |
1054 | } | |
1055 | ||
1056 | if (pgaddr == ureg) | |
1057 | ret = mmap_ureg(vma, dd, ureg); | |
1058 | else if (pgaddr == piobufs) | |
1059 | ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt); | |
1060 | else if (pgaddr == dd->pioavailregs_phys) | |
1061 | /* in-memory copy of pioavail registers */ | |
1062 | ret = qib_mmap_mem(vma, rcd, PAGE_SIZE, | |
1063 | (void *) dd->pioavailregs_dma, 0, | |
1064 | "pioavail registers"); | |
1065 | else if (pgaddr == rcd->rcvegr_phys) | |
1066 | ret = mmap_rcvegrbufs(vma, rcd); | |
1067 | else if (pgaddr == (u64) rcd->rcvhdrq_phys) | |
1068 | /* | |
1069 | * The rcvhdrq itself; multiple pages, contiguous | |
1070 | * from an i/o perspective. Shared contexts need | |
1071 | * to map r/w, so we allow writing. | |
1072 | */ | |
1073 | ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size, | |
1074 | rcd->rcvhdrq, 1, "rcvhdrq"); | |
1075 | else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys) | |
1076 | /* in-memory copy of rcvhdrq tail register */ | |
1077 | ret = qib_mmap_mem(vma, rcd, PAGE_SIZE, | |
1078 | rcd->rcvhdrtail_kvaddr, 0, | |
1079 | "rcvhdrq tail"); | |
1080 | else | |
1081 | match = 0; | |
1082 | if (!match) | |
1083 | ret = -EINVAL; | |
1084 | ||
1085 | vma->vm_private_data = NULL; | |
1086 | ||
1087 | if (ret < 0) | |
1088 | qib_devinfo(dd->pcidev, | |
1089 | "mmap Failure %d: off %llx len %lx\n", | |
1090 | -ret, (unsigned long long)pgaddr, | |
1091 | vma->vm_end - vma->vm_start); | |
1092 | bail: | |
1093 | return ret; | |
1094 | } | |
1095 | ||
1096 | static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd, | |
1097 | struct file *fp, | |
1098 | struct poll_table_struct *pt) | |
1099 | { | |
1100 | struct qib_devdata *dd = rcd->dd; | |
1101 | unsigned pollflag; | |
1102 | ||
1103 | poll_wait(fp, &rcd->wait, pt); | |
1104 | ||
1105 | spin_lock_irq(&dd->uctxt_lock); | |
1106 | if (rcd->urgent != rcd->urgent_poll) { | |
1107 | pollflag = POLLIN | POLLRDNORM; | |
1108 | rcd->urgent_poll = rcd->urgent; | |
1109 | } else { | |
1110 | pollflag = 0; | |
1111 | set_bit(QIB_CTXT_WAITING_URG, &rcd->flag); | |
1112 | } | |
1113 | spin_unlock_irq(&dd->uctxt_lock); | |
1114 | ||
1115 | return pollflag; | |
1116 | } | |
1117 | ||
1118 | static unsigned int qib_poll_next(struct qib_ctxtdata *rcd, | |
1119 | struct file *fp, | |
1120 | struct poll_table_struct *pt) | |
1121 | { | |
1122 | struct qib_devdata *dd = rcd->dd; | |
1123 | unsigned pollflag; | |
1124 | ||
1125 | poll_wait(fp, &rcd->wait, pt); | |
1126 | ||
1127 | spin_lock_irq(&dd->uctxt_lock); | |
1128 | if (dd->f_hdrqempty(rcd)) { | |
1129 | set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag); | |
1130 | dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt); | |
1131 | pollflag = 0; | |
1132 | } else | |
1133 | pollflag = POLLIN | POLLRDNORM; | |
1134 | spin_unlock_irq(&dd->uctxt_lock); | |
1135 | ||
1136 | return pollflag; | |
1137 | } | |
1138 | ||
1139 | static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt) | |
1140 | { | |
1141 | struct qib_ctxtdata *rcd; | |
1142 | unsigned pollflag; | |
1143 | ||
1144 | rcd = ctxt_fp(fp); | |
1145 | if (!rcd) | |
1146 | pollflag = POLLERR; | |
1147 | else if (rcd->poll_type == QIB_POLL_TYPE_URGENT) | |
1148 | pollflag = qib_poll_urgent(rcd, fp, pt); | |
1149 | else if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV) | |
1150 | pollflag = qib_poll_next(rcd, fp, pt); | |
1151 | else /* invalid */ | |
1152 | pollflag = POLLERR; | |
1153 | ||
1154 | return pollflag; | |
1155 | } | |
1156 | ||
c804f072 RV |
1157 | static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd) |
1158 | { | |
1159 | struct qib_filedata *fd = fp->private_data; | |
1160 | const unsigned int weight = cpumask_weight(¤t->cpus_allowed); | |
1161 | const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus); | |
1162 | int local_cpu; | |
1163 | ||
1164 | /* | |
1165 | * If process has NOT already set it's affinity, select and | |
1166 | * reserve a processor for it on the local NUMA node. | |
1167 | */ | |
1168 | if ((weight >= qib_cpulist_count) && | |
1169 | (cpumask_weight(local_mask) <= qib_cpulist_count)) { | |
1170 | for_each_cpu(local_cpu, local_mask) | |
1171 | if (!test_and_set_bit(local_cpu, qib_cpulist)) { | |
1172 | fd->rec_cpu_num = local_cpu; | |
1173 | return; | |
1174 | } | |
1175 | } | |
1176 | ||
1177 | /* | |
1178 | * If process has NOT already set it's affinity, select and | |
1179 | * reserve a processor for it, as a rendevous for all | |
1180 | * users of the driver. If they don't actually later | |
1181 | * set affinity to this cpu, or set it to some other cpu, | |
1182 | * it just means that sooner or later we don't recommend | |
1183 | * a cpu, and let the scheduler do it's best. | |
1184 | */ | |
1185 | if (weight >= qib_cpulist_count) { | |
1186 | int cpu; | |
1187 | cpu = find_first_zero_bit(qib_cpulist, | |
1188 | qib_cpulist_count); | |
1189 | if (cpu == qib_cpulist_count) | |
1190 | qib_dev_err(dd, | |
1191 | "no cpus avail for affinity PID %u\n", | |
1192 | current->pid); | |
1193 | else { | |
1194 | __set_bit(cpu, qib_cpulist); | |
1195 | fd->rec_cpu_num = cpu; | |
1196 | } | |
1197 | } | |
1198 | } | |
1199 | ||
f931551b RC |
1200 | /* |
1201 | * Check that userland and driver are compatible for subcontexts. | |
1202 | */ | |
1203 | static int qib_compatible_subctxts(int user_swmajor, int user_swminor) | |
1204 | { | |
1205 | /* this code is written long-hand for clarity */ | |
1206 | if (QIB_USER_SWMAJOR != user_swmajor) { | |
1207 | /* no promise of compatibility if major mismatch */ | |
1208 | return 0; | |
1209 | } | |
1210 | if (QIB_USER_SWMAJOR == 1) { | |
1211 | switch (QIB_USER_SWMINOR) { | |
1212 | case 0: | |
1213 | case 1: | |
1214 | case 2: | |
1215 | /* no subctxt implementation so cannot be compatible */ | |
1216 | return 0; | |
1217 | case 3: | |
1218 | /* 3 is only compatible with itself */ | |
1219 | return user_swminor == 3; | |
1220 | default: | |
1221 | /* >= 4 are compatible (or are expected to be) */ | |
4668e4b5 | 1222 | return user_swminor <= QIB_USER_SWMINOR; |
f931551b RC |
1223 | } |
1224 | } | |
1225 | /* make no promises yet for future major versions */ | |
1226 | return 0; | |
1227 | } | |
1228 | ||
1229 | static int init_subctxts(struct qib_devdata *dd, | |
1230 | struct qib_ctxtdata *rcd, | |
1231 | const struct qib_user_info *uinfo) | |
1232 | { | |
1233 | int ret = 0; | |
1234 | unsigned num_subctxts; | |
1235 | size_t size; | |
1236 | ||
1237 | /* | |
1238 | * If the user is requesting zero subctxts, | |
1239 | * skip the subctxt allocation. | |
1240 | */ | |
1241 | if (uinfo->spu_subctxt_cnt <= 0) | |
1242 | goto bail; | |
1243 | num_subctxts = uinfo->spu_subctxt_cnt; | |
1244 | ||
1245 | /* Check for subctxt compatibility */ | |
1246 | if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16, | |
1247 | uinfo->spu_userversion & 0xffff)) { | |
1248 | qib_devinfo(dd->pcidev, | |
1249 | "Mismatched user version (%d.%d) and driver " | |
1250 | "version (%d.%d) while context sharing. Ensure " | |
1251 | "that driver and library are from the same " | |
1252 | "release.\n", | |
1253 | (int) (uinfo->spu_userversion >> 16), | |
1254 | (int) (uinfo->spu_userversion & 0xffff), | |
1255 | QIB_USER_SWMAJOR, QIB_USER_SWMINOR); | |
1256 | goto bail; | |
1257 | } | |
1258 | if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) { | |
1259 | ret = -EINVAL; | |
1260 | goto bail; | |
1261 | } | |
1262 | ||
1263 | rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts); | |
1264 | if (!rcd->subctxt_uregbase) { | |
1265 | ret = -ENOMEM; | |
1266 | goto bail; | |
1267 | } | |
1268 | /* Note: rcd->rcvhdrq_size isn't initialized yet. */ | |
1269 | size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize * | |
1270 | sizeof(u32), PAGE_SIZE) * num_subctxts; | |
1271 | rcd->subctxt_rcvhdr_base = vmalloc_user(size); | |
1272 | if (!rcd->subctxt_rcvhdr_base) { | |
1273 | ret = -ENOMEM; | |
1274 | goto bail_ureg; | |
1275 | } | |
1276 | ||
1277 | rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks * | |
1278 | rcd->rcvegrbuf_size * | |
1279 | num_subctxts); | |
1280 | if (!rcd->subctxt_rcvegrbuf) { | |
1281 | ret = -ENOMEM; | |
1282 | goto bail_rhdr; | |
1283 | } | |
1284 | ||
1285 | rcd->subctxt_cnt = uinfo->spu_subctxt_cnt; | |
1286 | rcd->subctxt_id = uinfo->spu_subctxt_id; | |
1287 | rcd->active_slaves = 1; | |
1288 | rcd->redirect_seq_cnt = 1; | |
1289 | set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag); | |
1290 | goto bail; | |
1291 | ||
1292 | bail_rhdr: | |
1293 | vfree(rcd->subctxt_rcvhdr_base); | |
1294 | bail_ureg: | |
1295 | vfree(rcd->subctxt_uregbase); | |
1296 | rcd->subctxt_uregbase = NULL; | |
1297 | bail: | |
1298 | return ret; | |
1299 | } | |
1300 | ||
1301 | static int setup_ctxt(struct qib_pportdata *ppd, int ctxt, | |
1302 | struct file *fp, const struct qib_user_info *uinfo) | |
1303 | { | |
c804f072 | 1304 | struct qib_filedata *fd = fp->private_data; |
f931551b RC |
1305 | struct qib_devdata *dd = ppd->dd; |
1306 | struct qib_ctxtdata *rcd; | |
1307 | void *ptmp = NULL; | |
1308 | int ret; | |
e0f30bac | 1309 | int numa_id; |
f931551b | 1310 | |
c804f072 | 1311 | assign_ctxt_affinity(fp, dd); |
f931551b | 1312 | |
c804f072 RV |
1313 | numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ? |
1314 | cpu_to_node(fd->rec_cpu_num) : | |
1315 | numa_node_id()) : dd->assigned_node_id; | |
e0f30bac RV |
1316 | |
1317 | rcd = qib_create_ctxtdata(ppd, ctxt, numa_id); | |
f931551b RC |
1318 | |
1319 | /* | |
1320 | * Allocate memory for use in qib_tid_update() at open to | |
1321 | * reduce cost of expected send setup per message segment | |
1322 | */ | |
1323 | if (rcd) | |
1324 | ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) + | |
1325 | dd->rcvtidcnt * sizeof(struct page **), | |
1326 | GFP_KERNEL); | |
1327 | ||
1328 | if (!rcd || !ptmp) { | |
7fac3301 MM |
1329 | qib_dev_err(dd, |
1330 | "Unable to allocate ctxtdata memory, failing open\n"); | |
f931551b RC |
1331 | ret = -ENOMEM; |
1332 | goto bailerr; | |
1333 | } | |
1334 | rcd->userversion = uinfo->spu_userversion; | |
1335 | ret = init_subctxts(dd, rcd, uinfo); | |
1336 | if (ret) | |
1337 | goto bailerr; | |
1338 | rcd->tid_pg_list = ptmp; | |
1339 | rcd->pid = current->pid; | |
1340 | init_waitqueue_head(&dd->rcd[ctxt]->wait); | |
1341 | strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); | |
1342 | ctxt_fp(fp) = rcd; | |
1343 | qib_stats.sps_ctxts++; | |
29d1b161 | 1344 | dd->freectxts--; |
f931551b RC |
1345 | ret = 0; |
1346 | goto bail; | |
1347 | ||
1348 | bailerr: | |
c804f072 RV |
1349 | if (fd->rec_cpu_num != -1) |
1350 | __clear_bit(fd->rec_cpu_num, qib_cpulist); | |
1351 | ||
f931551b RC |
1352 | dd->rcd[ctxt] = NULL; |
1353 | kfree(rcd); | |
1354 | kfree(ptmp); | |
1355 | bail: | |
1356 | return ret; | |
1357 | } | |
1358 | ||
bdf8edcb | 1359 | static inline int usable(struct qib_pportdata *ppd) |
f931551b RC |
1360 | { |
1361 | struct qib_devdata *dd = ppd->dd; | |
f931551b RC |
1362 | |
1363 | return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid && | |
bdf8edcb | 1364 | (ppd->lflags & QIBL_LINKACTIVE); |
f931551b RC |
1365 | } |
1366 | ||
bdf8edcb DO |
1367 | /* |
1368 | * Select a context on the given device, either using a requested port | |
1369 | * or the port based on the context number. | |
1370 | */ | |
1371 | static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port, | |
1372 | const struct qib_user_info *uinfo) | |
f931551b | 1373 | { |
f931551b | 1374 | struct qib_pportdata *ppd = NULL; |
bdf8edcb | 1375 | int ret, ctxt; |
f931551b | 1376 | |
bdf8edcb DO |
1377 | if (port) { |
1378 | if (!usable(dd->pport + port - 1)) { | |
f931551b | 1379 | ret = -ENETDOWN; |
bdf8edcb DO |
1380 | goto done; |
1381 | } else | |
1382 | ppd = dd->pport + port - 1; | |
f931551b | 1383 | } |
bdf8edcb DO |
1384 | for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt]; |
1385 | ctxt++) | |
1386 | ; | |
1387 | if (ctxt == dd->cfgctxts) { | |
1388 | ret = -EBUSY; | |
1389 | goto done; | |
1390 | } | |
1391 | if (!ppd) { | |
1392 | u32 pidx = ctxt % dd->num_pports; | |
1393 | if (usable(dd->pport + pidx)) | |
1394 | ppd = dd->pport + pidx; | |
1395 | else { | |
1396 | for (pidx = 0; pidx < dd->num_pports && !ppd; | |
1397 | pidx++) | |
1398 | if (usable(dd->pport + pidx)) | |
1399 | ppd = dd->pport + pidx; | |
f931551b | 1400 | } |
f931551b | 1401 | } |
bdf8edcb DO |
1402 | ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN; |
1403 | done: | |
1404 | return ret; | |
1405 | } | |
1406 | ||
1407 | static int find_free_ctxt(int unit, struct file *fp, | |
1408 | const struct qib_user_info *uinfo) | |
1409 | { | |
1410 | struct qib_devdata *dd = qib_lookup(unit); | |
1411 | int ret; | |
1412 | ||
1413 | if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports)) | |
1414 | ret = -ENODEV; | |
1415 | else | |
1416 | ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo); | |
f931551b | 1417 | |
f931551b RC |
1418 | return ret; |
1419 | } | |
1420 | ||
bdf8edcb DO |
1421 | static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo, |
1422 | unsigned alg) | |
f931551b | 1423 | { |
bdf8edcb DO |
1424 | struct qib_devdata *udd = NULL; |
1425 | int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i; | |
f931551b RC |
1426 | u32 port = uinfo->spu_port, ctxt; |
1427 | ||
1428 | devmax = qib_count_units(&npresent, &nup); | |
bdf8edcb DO |
1429 | if (!npresent) { |
1430 | ret = -ENXIO; | |
1431 | goto done; | |
1432 | } | |
1433 | if (nup == 0) { | |
1434 | ret = -ENETDOWN; | |
1435 | goto done; | |
1436 | } | |
f931551b | 1437 | |
bdf8edcb DO |
1438 | if (alg == QIB_PORT_ALG_ACROSS) { |
1439 | unsigned inuse = ~0U; | |
1440 | /* find device (with ACTIVE ports) with fewest ctxts in use */ | |
1441 | for (ndev = 0; ndev < devmax; ndev++) { | |
1442 | struct qib_devdata *dd = qib_lookup(ndev); | |
6676b3f7 | 1443 | unsigned cused = 0, cfree = 0, pusable = 0; |
bdf8edcb | 1444 | if (!dd) |
f931551b | 1445 | continue; |
bdf8edcb DO |
1446 | if (port && port <= dd->num_pports && |
1447 | usable(dd->pport + port - 1)) | |
6676b3f7 | 1448 | pusable = 1; |
bdf8edcb DO |
1449 | else |
1450 | for (i = 0; i < dd->num_pports; i++) | |
1451 | if (usable(dd->pport + i)) | |
6676b3f7 MM |
1452 | pusable++; |
1453 | if (!pusable) | |
bdf8edcb DO |
1454 | continue; |
1455 | for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts; | |
1456 | ctxt++) | |
1457 | if (dd->rcd[ctxt]) | |
1458 | cused++; | |
1459 | else | |
1460 | cfree++; | |
db498827 | 1461 | if (cfree && cused < inuse) { |
bdf8edcb DO |
1462 | udd = dd; |
1463 | inuse = cused; | |
f931551b | 1464 | } |
bdf8edcb DO |
1465 | } |
1466 | if (udd) { | |
1467 | ret = choose_port_ctxt(fp, udd, port, uinfo); | |
f931551b RC |
1468 | goto done; |
1469 | } | |
bdf8edcb DO |
1470 | } else { |
1471 | for (ndev = 0; ndev < devmax; ndev++) { | |
1472 | struct qib_devdata *dd = qib_lookup(ndev); | |
1473 | if (dd) { | |
1474 | ret = choose_port_ctxt(fp, dd, port, uinfo); | |
1475 | if (!ret) | |
1476 | goto done; | |
1477 | if (ret == -EBUSY) | |
1478 | dusable++; | |
1479 | } | |
1480 | } | |
f931551b | 1481 | } |
bdf8edcb | 1482 | ret = dusable ? -EBUSY : -ENETDOWN; |
f931551b RC |
1483 | |
1484 | done: | |
1485 | return ret; | |
1486 | } | |
1487 | ||
1488 | static int find_shared_ctxt(struct file *fp, | |
1489 | const struct qib_user_info *uinfo) | |
1490 | { | |
1491 | int devmax, ndev, i; | |
1492 | int ret = 0; | |
1493 | ||
1494 | devmax = qib_count_units(NULL, NULL); | |
1495 | ||
1496 | for (ndev = 0; ndev < devmax; ndev++) { | |
1497 | struct qib_devdata *dd = qib_lookup(ndev); | |
1498 | ||
1499 | /* device portion of usable() */ | |
1500 | if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase)) | |
1501 | continue; | |
1502 | for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) { | |
1503 | struct qib_ctxtdata *rcd = dd->rcd[i]; | |
1504 | ||
1505 | /* Skip ctxts which are not yet open */ | |
1506 | if (!rcd || !rcd->cnt) | |
1507 | continue; | |
1508 | /* Skip ctxt if it doesn't match the requested one */ | |
1509 | if (rcd->subctxt_id != uinfo->spu_subctxt_id) | |
1510 | continue; | |
1511 | /* Verify the sharing process matches the master */ | |
1512 | if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt || | |
1513 | rcd->userversion != uinfo->spu_userversion || | |
1514 | rcd->cnt >= rcd->subctxt_cnt) { | |
1515 | ret = -EINVAL; | |
1516 | goto done; | |
1517 | } | |
1518 | ctxt_fp(fp) = rcd; | |
1519 | subctxt_fp(fp) = rcd->cnt++; | |
1520 | rcd->subpid[subctxt_fp(fp)] = current->pid; | |
1521 | tidcursor_fp(fp) = 0; | |
1522 | rcd->active_slaves |= 1 << subctxt_fp(fp); | |
1523 | ret = 1; | |
1524 | goto done; | |
1525 | } | |
1526 | } | |
1527 | ||
1528 | done: | |
1529 | return ret; | |
1530 | } | |
1531 | ||
1532 | static int qib_open(struct inode *in, struct file *fp) | |
1533 | { | |
1534 | /* The real work is performed later in qib_assign_ctxt() */ | |
1535 | fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL); | |
1536 | if (fp->private_data) /* no cpu affinity by default */ | |
1537 | ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1; | |
1538 | return fp->private_data ? 0 : -ENOMEM; | |
1539 | } | |
1540 | ||
c804f072 RV |
1541 | static int find_hca(unsigned int cpu, int *unit) |
1542 | { | |
1543 | int ret = 0, devmax, npresent, nup, ndev; | |
1544 | ||
1545 | *unit = -1; | |
1546 | ||
1547 | devmax = qib_count_units(&npresent, &nup); | |
1548 | if (!npresent) { | |
1549 | ret = -ENXIO; | |
1550 | goto done; | |
1551 | } | |
1552 | if (!nup) { | |
1553 | ret = -ENETDOWN; | |
1554 | goto done; | |
1555 | } | |
1556 | for (ndev = 0; ndev < devmax; ndev++) { | |
1557 | struct qib_devdata *dd = qib_lookup(ndev); | |
1558 | if (dd) { | |
1559 | if (pcibus_to_node(dd->pcidev->bus) < 0) { | |
1560 | ret = -EINVAL; | |
1561 | goto done; | |
1562 | } | |
1563 | if (cpu_to_node(cpu) == | |
1564 | pcibus_to_node(dd->pcidev->bus)) { | |
1565 | *unit = ndev; | |
1566 | goto done; | |
1567 | } | |
1568 | } | |
1569 | } | |
1570 | done: | |
1571 | return ret; | |
1572 | } | |
1573 | ||
1574 | static int do_qib_user_sdma_queue_create(struct file *fp) | |
1575 | { | |
1576 | struct qib_filedata *fd = fp->private_data; | |
1577 | struct qib_ctxtdata *rcd = fd->rcd; | |
1578 | struct qib_devdata *dd = rcd->dd; | |
1579 | ||
37a96765 | 1580 | if (dd->flags & QIB_HAS_SEND_DMA) { |
c804f072 RV |
1581 | |
1582 | fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev, | |
1583 | dd->unit, | |
1584 | rcd->ctxt, | |
1585 | fd->subctxt); | |
1586 | if (!fd->pq) | |
1587 | return -ENOMEM; | |
37a96765 | 1588 | } |
c804f072 RV |
1589 | |
1590 | return 0; | |
1591 | } | |
1592 | ||
f931551b RC |
1593 | /* |
1594 | * Get ctxt early, so can set affinity prior to memory allocation. | |
1595 | */ | |
1596 | static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo) | |
1597 | { | |
1598 | int ret; | |
1599 | int i_minor; | |
bdf8edcb | 1600 | unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS; |
f931551b RC |
1601 | |
1602 | /* Check to be sure we haven't already initialized this file */ | |
1603 | if (ctxt_fp(fp)) { | |
1604 | ret = -EINVAL; | |
1605 | goto done; | |
1606 | } | |
1607 | ||
1608 | /* for now, if major version is different, bail */ | |
1609 | swmajor = uinfo->spu_userversion >> 16; | |
1610 | if (swmajor != QIB_USER_SWMAJOR) { | |
1611 | ret = -ENODEV; | |
1612 | goto done; | |
1613 | } | |
1614 | ||
1615 | swminor = uinfo->spu_userversion & 0xffff; | |
1616 | ||
bdf8edcb DO |
1617 | if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT) |
1618 | alg = uinfo->spu_port_alg; | |
1619 | ||
f931551b RC |
1620 | mutex_lock(&qib_mutex); |
1621 | ||
1622 | if (qib_compatible_subctxts(swmajor, swminor) && | |
1623 | uinfo->spu_subctxt_cnt) { | |
1624 | ret = find_shared_ctxt(fp, uinfo); | |
c804f072 RV |
1625 | if (ret > 0) { |
1626 | ret = do_qib_user_sdma_queue_create(fp); | |
1627 | if (!ret) | |
1628 | assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd); | |
1629 | goto done_ok; | |
f931551b RC |
1630 | } |
1631 | } | |
1632 | ||
496ad9aa | 1633 | i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE; |
f931551b RC |
1634 | if (i_minor) |
1635 | ret = find_free_ctxt(i_minor - 1, fp, uinfo); | |
c804f072 RV |
1636 | else { |
1637 | int unit; | |
1638 | const unsigned int cpu = cpumask_first(¤t->cpus_allowed); | |
1639 | const unsigned int weight = | |
1640 | cpumask_weight(¤t->cpus_allowed); | |
1641 | ||
1642 | if (weight == 1 && !test_bit(cpu, qib_cpulist)) | |
1643 | if (!find_hca(cpu, &unit) && unit >= 0) | |
1644 | if (!find_free_ctxt(unit, fp, uinfo)) { | |
1645 | ret = 0; | |
1646 | goto done_chk_sdma; | |
1647 | } | |
bdf8edcb | 1648 | ret = get_a_ctxt(fp, uinfo, alg); |
f931551b RC |
1649 | } |
1650 | ||
c804f072 RV |
1651 | done_chk_sdma: |
1652 | if (!ret) | |
1653 | ret = do_qib_user_sdma_queue_create(fp); | |
1654 | done_ok: | |
f931551b RC |
1655 | mutex_unlock(&qib_mutex); |
1656 | ||
1657 | done: | |
1658 | return ret; | |
1659 | } | |
1660 | ||
1661 | ||
1662 | static int qib_do_user_init(struct file *fp, | |
1663 | const struct qib_user_info *uinfo) | |
1664 | { | |
1665 | int ret; | |
1666 | struct qib_ctxtdata *rcd = ctxt_fp(fp); | |
1667 | struct qib_devdata *dd; | |
1668 | unsigned uctxt; | |
1669 | ||
1670 | /* Subctxts don't need to initialize anything since master did it. */ | |
1671 | if (subctxt_fp(fp)) { | |
1672 | ret = wait_event_interruptible(rcd->wait, | |
1673 | !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag)); | |
1674 | goto bail; | |
1675 | } | |
1676 | ||
1677 | dd = rcd->dd; | |
1678 | ||
1679 | /* some ctxts may get extra buffers, calculate that here */ | |
1680 | uctxt = rcd->ctxt - dd->first_user_ctxt; | |
1681 | if (uctxt < dd->ctxts_extrabuf) { | |
1682 | rcd->piocnt = dd->pbufsctxt + 1; | |
1683 | rcd->pio_base = rcd->piocnt * uctxt; | |
1684 | } else { | |
1685 | rcd->piocnt = dd->pbufsctxt; | |
1686 | rcd->pio_base = rcd->piocnt * uctxt + | |
1687 | dd->ctxts_extrabuf; | |
1688 | } | |
1689 | ||
1690 | /* | |
1691 | * All user buffers are 2KB buffers. If we ever support | |
1692 | * giving 4KB buffers to user processes, this will need some | |
1693 | * work. Can't use piobufbase directly, because it has | |
1694 | * both 2K and 4K buffer base values. So check and handle. | |
1695 | */ | |
1696 | if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) { | |
1697 | if (rcd->pio_base >= dd->piobcnt2k) { | |
1698 | qib_dev_err(dd, | |
1699 | "%u:ctxt%u: no 2KB buffers available\n", | |
1700 | dd->unit, rcd->ctxt); | |
1701 | ret = -ENOBUFS; | |
1702 | goto bail; | |
1703 | } | |
1704 | rcd->piocnt = dd->piobcnt2k - rcd->pio_base; | |
1705 | qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n", | |
1706 | rcd->ctxt, rcd->piocnt); | |
1707 | } | |
1708 | ||
1709 | rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign; | |
1710 | qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt, | |
1711 | TXCHK_CHG_TYPE_USER, rcd); | |
1712 | /* | |
1713 | * try to ensure that processes start up with consistent avail update | |
1714 | * for their own range, at least. If system very quiet, it might | |
1715 | * have the in-memory copy out of date at startup for this range of | |
1716 | * buffers, when a context gets re-used. Do after the chg_pioavail | |
1717 | * and before the rest of setup, so it's "almost certain" the dma | |
1718 | * will have occurred (can't 100% guarantee, but should be many | |
1719 | * decimals of 9s, with this ordering), given how much else happens | |
1720 | * after this. | |
1721 | */ | |
1722 | dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); | |
1723 | ||
1724 | /* | |
1725 | * Now allocate the rcvhdr Q and eager TIDs; skip the TID | |
1726 | * array for time being. If rcd->ctxt > chip-supported, | |
1727 | * we need to do extra stuff here to handle by handling overflow | |
1728 | * through ctxt 0, someday | |
1729 | */ | |
1730 | ret = qib_create_rcvhdrq(dd, rcd); | |
1731 | if (!ret) | |
1732 | ret = qib_setup_eagerbufs(rcd); | |
1733 | if (ret) | |
1734 | goto bail_pio; | |
1735 | ||
1736 | rcd->tidcursor = 0; /* start at beginning after open */ | |
1737 | ||
1738 | /* initialize poll variables... */ | |
1739 | rcd->urgent = 0; | |
1740 | rcd->urgent_poll = 0; | |
1741 | ||
1742 | /* | |
1743 | * Now enable the ctxt for receive. | |
1744 | * For chips that are set to DMA the tail register to memory | |
1745 | * when they change (and when the update bit transitions from | |
1746 | * 0 to 1. So for those chips, we turn it off and then back on. | |
1747 | * This will (very briefly) affect any other open ctxts, but the | |
1748 | * duration is very short, and therefore isn't an issue. We | |
25985edc | 1749 | * explicitly set the in-memory tail copy to 0 beforehand, so we |
f931551b RC |
1750 | * don't have to wait to be sure the DMA update has happened |
1751 | * (chip resets head/tail to 0 on transition to enable). | |
1752 | */ | |
1753 | if (rcd->rcvhdrtail_kvaddr) | |
1754 | qib_clear_rcvhdrtail(rcd); | |
1755 | ||
1756 | dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB, | |
1757 | rcd->ctxt); | |
1758 | ||
1759 | /* Notify any waiting slaves */ | |
1760 | if (rcd->subctxt_cnt) { | |
1761 | clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag); | |
1762 | wake_up(&rcd->wait); | |
1763 | } | |
1764 | return 0; | |
1765 | ||
1766 | bail_pio: | |
1767 | qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt, | |
1768 | TXCHK_CHG_TYPE_KERN, rcd); | |
1769 | bail: | |
1770 | return ret; | |
1771 | } | |
1772 | ||
1773 | /** | |
1774 | * unlock_exptid - unlock any expected TID entries context still had in use | |
1775 | * @rcd: ctxt | |
1776 | * | |
1777 | * We don't actually update the chip here, because we do a bulk update | |
1778 | * below, using f_clear_tids. | |
1779 | */ | |
1780 | static void unlock_expected_tids(struct qib_ctxtdata *rcd) | |
1781 | { | |
1782 | struct qib_devdata *dd = rcd->dd; | |
1783 | int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt; | |
1784 | int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt; | |
1785 | ||
1786 | for (i = ctxt_tidbase; i < maxtid; i++) { | |
1787 | struct page *p = dd->pageshadow[i]; | |
1788 | dma_addr_t phys; | |
1789 | ||
1790 | if (!p) | |
1791 | continue; | |
1792 | ||
1793 | phys = dd->physshadow[i]; | |
1794 | dd->physshadow[i] = dd->tidinvalid; | |
1795 | dd->pageshadow[i] = NULL; | |
1796 | pci_unmap_page(dd->pcidev, phys, PAGE_SIZE, | |
1797 | PCI_DMA_FROMDEVICE); | |
1798 | qib_release_user_pages(&p, 1); | |
1799 | cnt++; | |
1800 | } | |
1801 | } | |
1802 | ||
1803 | static int qib_close(struct inode *in, struct file *fp) | |
1804 | { | |
1805 | int ret = 0; | |
1806 | struct qib_filedata *fd; | |
1807 | struct qib_ctxtdata *rcd; | |
1808 | struct qib_devdata *dd; | |
1809 | unsigned long flags; | |
1810 | unsigned ctxt; | |
1811 | pid_t pid; | |
1812 | ||
1813 | mutex_lock(&qib_mutex); | |
1814 | ||
ea3f0e6b | 1815 | fd = fp->private_data; |
f931551b RC |
1816 | fp->private_data = NULL; |
1817 | rcd = fd->rcd; | |
1818 | if (!rcd) { | |
1819 | mutex_unlock(&qib_mutex); | |
1820 | goto bail; | |
1821 | } | |
1822 | ||
1823 | dd = rcd->dd; | |
1824 | ||
1825 | /* ensure all pio buffer writes in progress are flushed */ | |
1826 | qib_flush_wc(); | |
1827 | ||
1828 | /* drain user sdma queue */ | |
1829 | if (fd->pq) { | |
1830 | qib_user_sdma_queue_drain(rcd->ppd, fd->pq); | |
1831 | qib_user_sdma_queue_destroy(fd->pq); | |
1832 | } | |
1833 | ||
1834 | if (fd->rec_cpu_num != -1) | |
1835 | __clear_bit(fd->rec_cpu_num, qib_cpulist); | |
1836 | ||
1837 | if (--rcd->cnt) { | |
1838 | /* | |
1839 | * XXX If the master closes the context before the slave(s), | |
1840 | * revoke the mmap for the eager receive queue so | |
1841 | * the slave(s) don't wait for receive data forever. | |
1842 | */ | |
1843 | rcd->active_slaves &= ~(1 << fd->subctxt); | |
1844 | rcd->subpid[fd->subctxt] = 0; | |
1845 | mutex_unlock(&qib_mutex); | |
1846 | goto bail; | |
1847 | } | |
1848 | ||
1849 | /* early; no interrupt users after this */ | |
1850 | spin_lock_irqsave(&dd->uctxt_lock, flags); | |
1851 | ctxt = rcd->ctxt; | |
1852 | dd->rcd[ctxt] = NULL; | |
1853 | pid = rcd->pid; | |
1854 | rcd->pid = 0; | |
1855 | spin_unlock_irqrestore(&dd->uctxt_lock, flags); | |
1856 | ||
1857 | if (rcd->rcvwait_to || rcd->piowait_to || | |
1858 | rcd->rcvnowait || rcd->pionowait) { | |
1859 | rcd->rcvwait_to = 0; | |
1860 | rcd->piowait_to = 0; | |
1861 | rcd->rcvnowait = 0; | |
1862 | rcd->pionowait = 0; | |
1863 | } | |
1864 | if (rcd->flag) | |
1865 | rcd->flag = 0; | |
1866 | ||
1867 | if (dd->kregbase) { | |
1868 | /* atomically clear receive enable ctxt and intr avail. */ | |
1869 | dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS | | |
1870 | QIB_RCVCTRL_INTRAVAIL_DIS, ctxt); | |
1871 | ||
1872 | /* clean up the pkeys for this ctxt user */ | |
1873 | qib_clean_part_key(rcd, dd); | |
1874 | qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt); | |
1875 | qib_chg_pioavailkernel(dd, rcd->pio_base, | |
1876 | rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL); | |
1877 | ||
1878 | dd->f_clear_tids(dd, rcd); | |
1879 | ||
1880 | if (dd->pageshadow) | |
1881 | unlock_expected_tids(rcd); | |
1882 | qib_stats.sps_ctxts--; | |
29d1b161 | 1883 | dd->freectxts++; |
f931551b RC |
1884 | } |
1885 | ||
1886 | mutex_unlock(&qib_mutex); | |
1887 | qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */ | |
1888 | ||
1889 | bail: | |
1890 | kfree(fd); | |
1891 | return ret; | |
1892 | } | |
1893 | ||
1894 | static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo) | |
1895 | { | |
1896 | struct qib_ctxt_info info; | |
1897 | int ret; | |
1898 | size_t sz; | |
1899 | struct qib_ctxtdata *rcd = ctxt_fp(fp); | |
1900 | struct qib_filedata *fd; | |
1901 | ||
ea3f0e6b | 1902 | fd = fp->private_data; |
f931551b RC |
1903 | |
1904 | info.num_active = qib_count_active_units(); | |
1905 | info.unit = rcd->dd->unit; | |
1906 | info.port = rcd->ppd->port; | |
1907 | info.ctxt = rcd->ctxt; | |
1908 | info.subctxt = subctxt_fp(fp); | |
1909 | /* Number of user ctxts available for this device. */ | |
1910 | info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt; | |
1911 | info.num_subctxts = rcd->subctxt_cnt; | |
1912 | info.rec_cpu = fd->rec_cpu_num; | |
1913 | sz = sizeof(info); | |
1914 | ||
1915 | if (copy_to_user(uinfo, &info, sz)) { | |
1916 | ret = -EFAULT; | |
1917 | goto bail; | |
1918 | } | |
1919 | ret = 0; | |
1920 | ||
1921 | bail: | |
1922 | return ret; | |
1923 | } | |
1924 | ||
1925 | static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq, | |
1926 | u32 __user *inflightp) | |
1927 | { | |
1928 | const u32 val = qib_user_sdma_inflight_counter(pq); | |
1929 | ||
1930 | if (put_user(val, inflightp)) | |
1931 | return -EFAULT; | |
1932 | ||
1933 | return 0; | |
1934 | } | |
1935 | ||
1936 | static int qib_sdma_get_complete(struct qib_pportdata *ppd, | |
1937 | struct qib_user_sdma_queue *pq, | |
1938 | u32 __user *completep) | |
1939 | { | |
1940 | u32 val; | |
1941 | int err; | |
1942 | ||
1943 | if (!pq) | |
1944 | return -EINVAL; | |
1945 | ||
1946 | err = qib_user_sdma_make_progress(ppd, pq); | |
1947 | if (err < 0) | |
1948 | return err; | |
1949 | ||
1950 | val = qib_user_sdma_complete_counter(pq); | |
1951 | if (put_user(val, completep)) | |
1952 | return -EFAULT; | |
1953 | ||
1954 | return 0; | |
1955 | } | |
1956 | ||
1957 | static int disarm_req_delay(struct qib_ctxtdata *rcd) | |
1958 | { | |
1959 | int ret = 0; | |
1960 | ||
bdf8edcb | 1961 | if (!usable(rcd->ppd)) { |
f931551b RC |
1962 | int i; |
1963 | /* | |
1964 | * if link is down, or otherwise not usable, delay | |
1965 | * the caller up to 30 seconds, so we don't thrash | |
1966 | * in trying to get the chip back to ACTIVE, and | |
1967 | * set flag so they make the call again. | |
1968 | */ | |
1969 | if (rcd->user_event_mask) { | |
1970 | /* | |
1971 | * subctxt_cnt is 0 if not shared, so do base | |
1972 | * separately, first, then remaining subctxt, if any | |
1973 | */ | |
1974 | set_bit(_QIB_EVENT_DISARM_BUFS_BIT, | |
1975 | &rcd->user_event_mask[0]); | |
1976 | for (i = 1; i < rcd->subctxt_cnt; i++) | |
1977 | set_bit(_QIB_EVENT_DISARM_BUFS_BIT, | |
1978 | &rcd->user_event_mask[i]); | |
1979 | } | |
bdf8edcb | 1980 | for (i = 0; !usable(rcd->ppd) && i < 300; i++) |
f931551b RC |
1981 | msleep(100); |
1982 | ret = -ENETDOWN; | |
1983 | } | |
1984 | return ret; | |
1985 | } | |
1986 | ||
1987 | /* | |
1988 | * Find all user contexts in use, and set the specified bit in their | |
1989 | * event mask. | |
1990 | * See also find_ctxt() for a similar use, that is specific to send buffers. | |
1991 | */ | |
1992 | int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit) | |
1993 | { | |
1994 | struct qib_ctxtdata *rcd; | |
1995 | unsigned ctxt; | |
1996 | int ret = 0; | |
4356d0b6 | 1997 | unsigned long flags; |
f931551b | 1998 | |
4356d0b6 | 1999 | spin_lock_irqsave(&ppd->dd->uctxt_lock, flags); |
f931551b RC |
2000 | for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts; |
2001 | ctxt++) { | |
2002 | rcd = ppd->dd->rcd[ctxt]; | |
2003 | if (!rcd) | |
2004 | continue; | |
2005 | if (rcd->user_event_mask) { | |
2006 | int i; | |
2007 | /* | |
2008 | * subctxt_cnt is 0 if not shared, so do base | |
2009 | * separately, first, then remaining subctxt, if any | |
2010 | */ | |
2011 | set_bit(evtbit, &rcd->user_event_mask[0]); | |
2012 | for (i = 1; i < rcd->subctxt_cnt; i++) | |
2013 | set_bit(evtbit, &rcd->user_event_mask[i]); | |
2014 | } | |
2015 | ret = 1; | |
2016 | break; | |
2017 | } | |
4356d0b6 | 2018 | spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags); |
f931551b RC |
2019 | |
2020 | return ret; | |
2021 | } | |
2022 | ||
2023 | /* | |
2024 | * clear the event notifier events for this context. | |
2025 | * For the DISARM_BUFS case, we also take action (this obsoletes | |
2026 | * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards | |
2027 | * compatibility. | |
2028 | * Other bits don't currently require actions, just atomically clear. | |
2029 | * User process then performs actions appropriate to bit having been | |
2030 | * set, if desired, and checks again in future. | |
2031 | */ | |
2032 | static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt, | |
2033 | unsigned long events) | |
2034 | { | |
2035 | int ret = 0, i; | |
2036 | ||
2037 | for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) { | |
2038 | if (!test_bit(i, &events)) | |
2039 | continue; | |
2040 | if (i == _QIB_EVENT_DISARM_BUFS_BIT) { | |
2041 | (void)qib_disarm_piobufs_ifneeded(rcd); | |
2042 | ret = disarm_req_delay(rcd); | |
2043 | } else | |
2044 | clear_bit(i, &rcd->user_event_mask[subctxt]); | |
2045 | } | |
2046 | return ret; | |
2047 | } | |
2048 | ||
2049 | static ssize_t qib_write(struct file *fp, const char __user *data, | |
2050 | size_t count, loff_t *off) | |
2051 | { | |
2052 | const struct qib_cmd __user *ucmd; | |
2053 | struct qib_ctxtdata *rcd; | |
2054 | const void __user *src; | |
2055 | size_t consumed, copy = 0; | |
2056 | struct qib_cmd cmd; | |
2057 | ssize_t ret = 0; | |
2058 | void *dest; | |
2059 | ||
2060 | if (count < sizeof(cmd.type)) { | |
2061 | ret = -EINVAL; | |
2062 | goto bail; | |
2063 | } | |
2064 | ||
2065 | ucmd = (const struct qib_cmd __user *) data; | |
2066 | ||
2067 | if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) { | |
2068 | ret = -EFAULT; | |
2069 | goto bail; | |
2070 | } | |
2071 | ||
2072 | consumed = sizeof(cmd.type); | |
2073 | ||
2074 | switch (cmd.type) { | |
2075 | case QIB_CMD_ASSIGN_CTXT: | |
2076 | case QIB_CMD_USER_INIT: | |
2077 | copy = sizeof(cmd.cmd.user_info); | |
2078 | dest = &cmd.cmd.user_info; | |
2079 | src = &ucmd->cmd.user_info; | |
2080 | break; | |
2081 | ||
2082 | case QIB_CMD_RECV_CTRL: | |
2083 | copy = sizeof(cmd.cmd.recv_ctrl); | |
2084 | dest = &cmd.cmd.recv_ctrl; | |
2085 | src = &ucmd->cmd.recv_ctrl; | |
2086 | break; | |
2087 | ||
2088 | case QIB_CMD_CTXT_INFO: | |
2089 | copy = sizeof(cmd.cmd.ctxt_info); | |
2090 | dest = &cmd.cmd.ctxt_info; | |
2091 | src = &ucmd->cmd.ctxt_info; | |
2092 | break; | |
2093 | ||
2094 | case QIB_CMD_TID_UPDATE: | |
2095 | case QIB_CMD_TID_FREE: | |
2096 | copy = sizeof(cmd.cmd.tid_info); | |
2097 | dest = &cmd.cmd.tid_info; | |
2098 | src = &ucmd->cmd.tid_info; | |
2099 | break; | |
2100 | ||
2101 | case QIB_CMD_SET_PART_KEY: | |
2102 | copy = sizeof(cmd.cmd.part_key); | |
2103 | dest = &cmd.cmd.part_key; | |
2104 | src = &ucmd->cmd.part_key; | |
2105 | break; | |
2106 | ||
2107 | case QIB_CMD_DISARM_BUFS: | |
2108 | case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */ | |
2109 | copy = 0; | |
2110 | src = NULL; | |
2111 | dest = NULL; | |
2112 | break; | |
2113 | ||
2114 | case QIB_CMD_POLL_TYPE: | |
2115 | copy = sizeof(cmd.cmd.poll_type); | |
2116 | dest = &cmd.cmd.poll_type; | |
2117 | src = &ucmd->cmd.poll_type; | |
2118 | break; | |
2119 | ||
2120 | case QIB_CMD_ARMLAUNCH_CTRL: | |
2121 | copy = sizeof(cmd.cmd.armlaunch_ctrl); | |
2122 | dest = &cmd.cmd.armlaunch_ctrl; | |
2123 | src = &ucmd->cmd.armlaunch_ctrl; | |
2124 | break; | |
2125 | ||
2126 | case QIB_CMD_SDMA_INFLIGHT: | |
2127 | copy = sizeof(cmd.cmd.sdma_inflight); | |
2128 | dest = &cmd.cmd.sdma_inflight; | |
2129 | src = &ucmd->cmd.sdma_inflight; | |
2130 | break; | |
2131 | ||
2132 | case QIB_CMD_SDMA_COMPLETE: | |
2133 | copy = sizeof(cmd.cmd.sdma_complete); | |
2134 | dest = &cmd.cmd.sdma_complete; | |
2135 | src = &ucmd->cmd.sdma_complete; | |
2136 | break; | |
2137 | ||
2138 | case QIB_CMD_ACK_EVENT: | |
2139 | copy = sizeof(cmd.cmd.event_mask); | |
2140 | dest = &cmd.cmd.event_mask; | |
2141 | src = &ucmd->cmd.event_mask; | |
2142 | break; | |
2143 | ||
2144 | default: | |
2145 | ret = -EINVAL; | |
2146 | goto bail; | |
2147 | } | |
2148 | ||
2149 | if (copy) { | |
2150 | if ((count - consumed) < copy) { | |
2151 | ret = -EINVAL; | |
2152 | goto bail; | |
2153 | } | |
2154 | if (copy_from_user(dest, src, copy)) { | |
2155 | ret = -EFAULT; | |
2156 | goto bail; | |
2157 | } | |
2158 | consumed += copy; | |
2159 | } | |
2160 | ||
2161 | rcd = ctxt_fp(fp); | |
2162 | if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) { | |
2163 | ret = -EINVAL; | |
2164 | goto bail; | |
2165 | } | |
2166 | ||
2167 | switch (cmd.type) { | |
2168 | case QIB_CMD_ASSIGN_CTXT: | |
2169 | ret = qib_assign_ctxt(fp, &cmd.cmd.user_info); | |
2170 | if (ret) | |
2171 | goto bail; | |
2172 | break; | |
2173 | ||
2174 | case QIB_CMD_USER_INIT: | |
2175 | ret = qib_do_user_init(fp, &cmd.cmd.user_info); | |
2176 | if (ret) | |
2177 | goto bail; | |
2178 | ret = qib_get_base_info(fp, (void __user *) (unsigned long) | |
2179 | cmd.cmd.user_info.spu_base_info, | |
2180 | cmd.cmd.user_info.spu_base_info_size); | |
2181 | break; | |
2182 | ||
2183 | case QIB_CMD_RECV_CTRL: | |
2184 | ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl); | |
2185 | break; | |
2186 | ||
2187 | case QIB_CMD_CTXT_INFO: | |
2188 | ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *) | |
2189 | (unsigned long) cmd.cmd.ctxt_info); | |
2190 | break; | |
2191 | ||
2192 | case QIB_CMD_TID_UPDATE: | |
2193 | ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info); | |
2194 | break; | |
2195 | ||
2196 | case QIB_CMD_TID_FREE: | |
2197 | ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info); | |
2198 | break; | |
2199 | ||
2200 | case QIB_CMD_SET_PART_KEY: | |
2201 | ret = qib_set_part_key(rcd, cmd.cmd.part_key); | |
2202 | break; | |
2203 | ||
2204 | case QIB_CMD_DISARM_BUFS: | |
2205 | (void)qib_disarm_piobufs_ifneeded(rcd); | |
2206 | ret = disarm_req_delay(rcd); | |
2207 | break; | |
2208 | ||
2209 | case QIB_CMD_PIOAVAILUPD: | |
2210 | qib_force_pio_avail_update(rcd->dd); | |
2211 | break; | |
2212 | ||
2213 | case QIB_CMD_POLL_TYPE: | |
2214 | rcd->poll_type = cmd.cmd.poll_type; | |
2215 | break; | |
2216 | ||
2217 | case QIB_CMD_ARMLAUNCH_CTRL: | |
2218 | rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl); | |
2219 | break; | |
2220 | ||
2221 | case QIB_CMD_SDMA_INFLIGHT: | |
2222 | ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp), | |
2223 | (u32 __user *) (unsigned long) | |
2224 | cmd.cmd.sdma_inflight); | |
2225 | break; | |
2226 | ||
2227 | case QIB_CMD_SDMA_COMPLETE: | |
2228 | ret = qib_sdma_get_complete(rcd->ppd, | |
2229 | user_sdma_queue_fp(fp), | |
2230 | (u32 __user *) (unsigned long) | |
2231 | cmd.cmd.sdma_complete); | |
2232 | break; | |
2233 | ||
2234 | case QIB_CMD_ACK_EVENT: | |
2235 | ret = qib_user_event_ack(rcd, subctxt_fp(fp), | |
2236 | cmd.cmd.event_mask); | |
2237 | break; | |
2238 | } | |
2239 | ||
2240 | if (ret >= 0) | |
2241 | ret = consumed; | |
2242 | ||
2243 | bail: | |
2244 | return ret; | |
2245 | } | |
2246 | ||
2247 | static ssize_t qib_aio_write(struct kiocb *iocb, const struct iovec *iov, | |
2248 | unsigned long dim, loff_t off) | |
2249 | { | |
2250 | struct qib_filedata *fp = iocb->ki_filp->private_data; | |
2251 | struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp); | |
2252 | struct qib_user_sdma_queue *pq = fp->pq; | |
2253 | ||
2254 | if (!dim || !pq) | |
2255 | return -EINVAL; | |
2256 | ||
2257 | return qib_user_sdma_writev(rcd, pq, iov, dim); | |
2258 | } | |
2259 | ||
2260 | static struct class *qib_class; | |
2261 | static dev_t qib_dev; | |
2262 | ||
2263 | int qib_cdev_init(int minor, const char *name, | |
2264 | const struct file_operations *fops, | |
2265 | struct cdev **cdevp, struct device **devp) | |
2266 | { | |
2267 | const dev_t dev = MKDEV(MAJOR(qib_dev), minor); | |
2268 | struct cdev *cdev; | |
2269 | struct device *device = NULL; | |
2270 | int ret; | |
2271 | ||
2272 | cdev = cdev_alloc(); | |
2273 | if (!cdev) { | |
7fac3301 | 2274 | pr_err("Could not allocate cdev for minor %d, %s\n", |
f931551b RC |
2275 | minor, name); |
2276 | ret = -ENOMEM; | |
2277 | goto done; | |
2278 | } | |
2279 | ||
2280 | cdev->owner = THIS_MODULE; | |
2281 | cdev->ops = fops; | |
2282 | kobject_set_name(&cdev->kobj, name); | |
2283 | ||
2284 | ret = cdev_add(cdev, dev, 1); | |
2285 | if (ret < 0) { | |
7fac3301 | 2286 | pr_err("Could not add cdev for minor %d, %s (err %d)\n", |
f931551b RC |
2287 | minor, name, -ret); |
2288 | goto err_cdev; | |
2289 | } | |
2290 | ||
02aa2a37 | 2291 | device = device_create(qib_class, NULL, dev, NULL, "%s", name); |
f931551b RC |
2292 | if (!IS_ERR(device)) |
2293 | goto done; | |
2294 | ret = PTR_ERR(device); | |
2295 | device = NULL; | |
7fac3301 | 2296 | pr_err("Could not create device for minor %d, %s (err %d)\n", |
f931551b RC |
2297 | minor, name, -ret); |
2298 | err_cdev: | |
2299 | cdev_del(cdev); | |
2300 | cdev = NULL; | |
2301 | done: | |
2302 | *cdevp = cdev; | |
2303 | *devp = device; | |
2304 | return ret; | |
2305 | } | |
2306 | ||
2307 | void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp) | |
2308 | { | |
2309 | struct device *device = *devp; | |
2310 | ||
2311 | if (device) { | |
2312 | device_unregister(device); | |
2313 | *devp = NULL; | |
2314 | } | |
2315 | ||
2316 | if (*cdevp) { | |
2317 | cdev_del(*cdevp); | |
2318 | *cdevp = NULL; | |
2319 | } | |
2320 | } | |
2321 | ||
2322 | static struct cdev *wildcard_cdev; | |
2323 | static struct device *wildcard_device; | |
2324 | ||
2325 | int __init qib_dev_init(void) | |
2326 | { | |
2327 | int ret; | |
2328 | ||
2329 | ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME); | |
2330 | if (ret < 0) { | |
7fac3301 | 2331 | pr_err("Could not allocate chrdev region (err %d)\n", -ret); |
f931551b RC |
2332 | goto done; |
2333 | } | |
2334 | ||
2335 | qib_class = class_create(THIS_MODULE, "ipath"); | |
2336 | if (IS_ERR(qib_class)) { | |
2337 | ret = PTR_ERR(qib_class); | |
7fac3301 | 2338 | pr_err("Could not create device class (err %d)\n", -ret); |
f931551b RC |
2339 | unregister_chrdev_region(qib_dev, QIB_NMINORS); |
2340 | } | |
2341 | ||
2342 | done: | |
2343 | return ret; | |
2344 | } | |
2345 | ||
2346 | void qib_dev_cleanup(void) | |
2347 | { | |
2348 | if (qib_class) { | |
2349 | class_destroy(qib_class); | |
2350 | qib_class = NULL; | |
2351 | } | |
2352 | ||
2353 | unregister_chrdev_region(qib_dev, QIB_NMINORS); | |
2354 | } | |
2355 | ||
2356 | static atomic_t user_count = ATOMIC_INIT(0); | |
2357 | ||
2358 | static void qib_user_remove(struct qib_devdata *dd) | |
2359 | { | |
2360 | if (atomic_dec_return(&user_count) == 0) | |
2361 | qib_cdev_cleanup(&wildcard_cdev, &wildcard_device); | |
2362 | ||
2363 | qib_cdev_cleanup(&dd->user_cdev, &dd->user_device); | |
2364 | } | |
2365 | ||
2366 | static int qib_user_add(struct qib_devdata *dd) | |
2367 | { | |
2368 | char name[10]; | |
2369 | int ret; | |
2370 | ||
2371 | if (atomic_inc_return(&user_count) == 1) { | |
2372 | ret = qib_cdev_init(0, "ipath", &qib_file_ops, | |
2373 | &wildcard_cdev, &wildcard_device); | |
2374 | if (ret) | |
2375 | goto done; | |
2376 | } | |
2377 | ||
2378 | snprintf(name, sizeof(name), "ipath%d", dd->unit); | |
2379 | ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops, | |
2380 | &dd->user_cdev, &dd->user_device); | |
2381 | if (ret) | |
2382 | qib_user_remove(dd); | |
2383 | done: | |
2384 | return ret; | |
2385 | } | |
2386 | ||
2387 | /* | |
2388 | * Create per-unit files in /dev | |
2389 | */ | |
2390 | int qib_device_create(struct qib_devdata *dd) | |
2391 | { | |
2392 | int r, ret; | |
2393 | ||
2394 | r = qib_user_add(dd); | |
2395 | ret = qib_diag_add(dd); | |
2396 | if (r && !ret) | |
2397 | ret = r; | |
2398 | return ret; | |
2399 | } | |
2400 | ||
2401 | /* | |
2402 | * Remove per-unit files in /dev | |
2403 | * void, core kernel returns no errors for this stuff | |
2404 | */ | |
2405 | void qib_device_remove(struct qib_devdata *dd) | |
2406 | { | |
2407 | qib_user_remove(dd); | |
2408 | qib_diag_remove(dd); | |
2409 | } |