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[linux-block.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
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71ee6730
DS		 1/* This file is part of the Emulex RoCE Device Driver for
2 * RoCE (RDMA over Converged Ethernet) adapters.
3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
4 * EMULEX and SLI are trademarks of Emulex.
5 * www.emulex.com
6 *
7 * This software is available to you under a choice of one of two licenses.
8 * You may choose to be licensed under the terms of the GNU General Public
9 * License (GPL) Version 2, available from the file COPYING in the main
10 * directory of this source tree, or the BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * - Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
fe2caefc
PP		 34 *
35 * Contact Information:
36 * linux-drivers@emulex.com
37 *
38 * Emulex
39 * 3333 Susan Street
40 * Costa Mesa, CA 92626
71ee6730 41 */
fe2caefc
PP		 42
43#include <linux/dma-mapping.h>
44#include <rdma/ib_verbs.h>
45#include <rdma/ib_user_verbs.h>
46#include <rdma/iw_cm.h>
47#include <rdma/ib_umem.h>
48#include <rdma/ib_addr.h>
cc36929e 49#include <rdma/ib_cache.h>
ff23dfa1 50#include <rdma/uverbs_ioctl.h>
fe2caefc
PP		 51
52#include "ocrdma.h"
53#include "ocrdma_hw.h"
54#include "ocrdma_verbs.h"
a7fe7380 55#include <rdma/ocrdma-abi.h>
fe2caefc
PP		 56
57int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
58{
b1889407 59 if (index > 0)
fe2caefc
PP		 60 return -EINVAL;
61
62 *pkey = 0xffff;
63 return 0;
64}
65
2528e33e
MB		 66int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
67 struct ib_udata *uhw)
fe2caefc
PP		 68{
69 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
70
2528e33e
MB		 71 if (uhw->inlen || uhw->outlen)
72 return -EINVAL;
73
fe2caefc
PP		 74 memset(attr, 0, sizeof *attr);
75 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
76 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
77 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
033edd4d 78 attr->max_mr_size = dev->attr.max_mr_size;
fe2caefc
PP		 79 attr->page_size_cap = 0xffff000;
80 attr->vendor_id = dev->nic_info.pdev->vendor;
81 attr->vendor_part_id = dev->nic_info.pdev->device;
96c51abe 82 attr->hw_ver = dev->asic_id;
fe2caefc 83 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 84 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 85 attr->max_qp_wr = dev->attr.max_wqe;
86
87 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
88 IB_DEVICE_RC_RNR_NAK_GEN |
89 IB_DEVICE_SHUTDOWN_PORT |
90 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 91 IB_DEVICE_LOCAL_DMA_LKEY |
92 IB_DEVICE_MEM_MGT_EXTENSIONS;
33023fb8
SW		 93 attr->max_send_sge = dev->attr.max_send_sge;
94 attr->max_recv_sge = dev->attr.max_recv_sge;
3c199b45 95 attr->max_sge_rd = dev->attr.max_rdma_sge;
fe2caefc
PP		 96 attr->max_cq = dev->attr.max_cq;
97 attr->max_cqe = dev->attr.max_cqe;
98 attr->max_mr = dev->attr.max_mr;
ac578aef 99 attr->max_mw = dev->attr.max_mw;
fe2caefc
PP		 100 attr->max_pd = dev->attr.max_pd;
101 attr->atomic_cap = 0;
fe2caefc
PP		 102 attr->max_qp_rd_atom =
103 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
104 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 105 attr->max_srq = dev->attr.max_srq;
d1e09ebf 106 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 107 attr->max_srq_wr = dev->attr.max_rqe;
108 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
d6a488f2 109 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
fe2caefc
PP		 110 attr->max_pkeys = 1;
111 return 0;
112}
113
f24ceba6
NG		 114static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
115 u8 *ib_speed, u8 *ib_width)
116{
117 int status;
118 u8 speed;
119
3b1ea430 120 status = ocrdma_mbx_get_link_speed(dev, &speed, NULL);
f24ceba6
NG		 121 if (status)
122 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
123
124 switch (speed) {
125 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
126 *ib_speed = IB_SPEED_SDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
131 *ib_speed = IB_SPEED_QDR;
132 *ib_width = IB_WIDTH_1X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
136 *ib_speed = IB_SPEED_DDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
141 *ib_speed = IB_SPEED_QDR;
142 *ib_width = IB_WIDTH_4X;
143 break;
144
145 default:
146 /* Unsupported */
147 *ib_speed = IB_SPEED_SDR;
148 *ib_width = IB_WIDTH_1X;
2b50176d 149 }
f24ceba6
NG		 150}
151
fe2caefc
PP		 152int ocrdma_query_port(struct ib_device *ibdev,
153 u8 port, struct ib_port_attr *props)
154{
155 enum ib_port_state port_state;
156 struct ocrdma_dev *dev;
157 struct net_device *netdev;
158
c4550c63 159 /* props being zeroed by the caller, avoid zeroing it here */
fe2caefc 160 dev = get_ocrdma_dev(ibdev);
fe2caefc
PP		 161 netdev = dev->nic_info.netdev;
162 if (netif_running(netdev) && netif_oper_up(netdev)) {
163 port_state = IB_PORT_ACTIVE;
72a7720f 164 props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
fe2caefc
PP		 165 } else {
166 port_state = IB_PORT_DOWN;
72a7720f 167 props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
fe2caefc
PP		 168 }
169 props->max_mtu = IB_MTU_4096;
170 props->active_mtu = iboe_get_mtu(netdev->mtu);
171 props->lid = 0;
172 props->lmc = 0;
173 props->sm_lid = 0;
174 props->sm_sl = 0;
175 props->state = port_state;
2f944c0f
JG		 176 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
177 IB_PORT_DEVICE_MGMT_SUP |
178 IB_PORT_VENDOR_CLASS_SUP;
179 props->ip_gids = true;
fe2caefc
PP		 180 props->gid_tbl_len = OCRDMA_MAX_SGID;
181 props->pkey_tbl_len = 1;
182 props->bad_pkey_cntr = 0;
183 props->qkey_viol_cntr = 0;
f24ceba6
NG		 184 get_link_speed_and_width(dev, &props->active_speed,
185 &props->active_width);
fe2caefc
PP		 186 props->max_msg_sz = 0x80000000;
187 props->max_vl_num = 4;
188 return 0;
189}
190
fe2caefc
PP		 191static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
192 unsigned long len)
193{
194 struct ocrdma_mm *mm;
195
196 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
197 if (mm == NULL)
198 return -ENOMEM;
199 mm->key.phy_addr = phy_addr;
200 mm->key.len = len;
201 INIT_LIST_HEAD(&mm->entry);
202
203 mutex_lock(&uctx->mm_list_lock);
204 list_add_tail(&mm->entry, &uctx->mm_head);
205 mutex_unlock(&uctx->mm_list_lock);
206 return 0;
207}
208
209static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
210 unsigned long len)
211{
212 struct ocrdma_mm *mm, *tmp;
213
214 mutex_lock(&uctx->mm_list_lock);
215 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 216 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 217 continue;
218
219 list_del(&mm->entry);
220 kfree(mm);
221 break;
222 }
223 mutex_unlock(&uctx->mm_list_lock);
224}
225
226static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
227 unsigned long len)
228{
229 bool found = false;
230 struct ocrdma_mm *mm;
231
232 mutex_lock(&uctx->mm_list_lock);
233 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 234 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 235 continue;
236
237 found = true;
238 break;
239 }
240 mutex_unlock(&uctx->mm_list_lock);
241 return found;
242}
243
9ba1377d
MA		 244
245static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
246{
247 u16 pd_bitmap_idx = 0;
248 const unsigned long *pd_bitmap;
249
250 if (dpp_pool) {
251 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
252 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
253 dev->pd_mgr->max_dpp_pd);
254 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
255 dev->pd_mgr->pd_dpp_count++;
256 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
257 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
258 } else {
259 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
260 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
261 dev->pd_mgr->max_normal_pd);
262 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
263 dev->pd_mgr->pd_norm_count++;
264 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
265 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
266 }
267 return pd_bitmap_idx;
268}
269
270static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
271 bool dpp_pool)
272{
273 u16 pd_count;
274 u16 pd_bit_index;
275
276 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
277 dev->pd_mgr->pd_norm_count;
278 if (pd_count == 0)
279 return -EINVAL;
280
281 if (dpp_pool) {
282 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
283 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
284 return -EINVAL;
285 } else {
286 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
287 dev->pd_mgr->pd_dpp_count--;
288 }
289 } else {
290 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
291 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
292 return -EINVAL;
293 } else {
294 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
295 dev->pd_mgr->pd_norm_count--;
296 }
297 }
298
299 return 0;
300}
301
004d18ea 302static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
9ba1377d
MA		 303 bool dpp_pool)
304{
305 int status;
306
307 mutex_lock(&dev->dev_lock);
308 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
309 mutex_unlock(&dev->dev_lock);
310 return status;
311}
312
313static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
314{
315 u16 pd_idx = 0;
316 int status = 0;
317
318 mutex_lock(&dev->dev_lock);
319 if (pd->dpp_enabled) {
320 /* try allocating DPP PD, if not available then normal PD */
321 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
322 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
323 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
324 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
325 } else if (dev->pd_mgr->pd_norm_count <
326 dev->pd_mgr->max_normal_pd) {
327 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
328 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
329 pd->dpp_enabled = false;
330 } else {
331 status = -EINVAL;
332 }
333 } else {
334 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
335 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
336 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
337 } else {
338 status = -EINVAL;
339 }
340 }
341 mutex_unlock(&dev->dev_lock);
342 return status;
343}
344
ff23dfa1
SR		 345/*
346 * NOTE:
347 *
348 * ocrdma_ucontext must be used here because this function is also
349 * called from ocrdma_alloc_ucontext where ib_udata does not have
350 * valid ib_ucontext pointer. ib_uverbs_get_context does not call
351 * uobj_{alloc|get_xxx} helpers which are used to store the
352 * ib_ucontext in uverbs_attr_bundle wrapping the ib_udata. so
353 * ib_udata does NOT imply valid ib_ucontext here!
354 */
21a428a0
LR		 355static int _ocrdma_alloc_pd(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
356 struct ocrdma_ucontext *uctx,
357 struct ib_udata *udata)
cffce990 358{
0ca4c39f 359 int status;
cffce990 360
59582d86 361 if (udata && uctx && dev->attr.max_dpp_pds) {
cffce990 362 pd->dpp_enabled =
21c3391a 363 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
cffce990 364 pd->num_dpp_qp =
a53d77a3
DS		 365 pd->dpp_enabled ? (dev->nic_info.db_page_size /
366 dev->attr.wqe_size) : 0;
cffce990
NG		 367 }
368
21a428a0
LR		 369 if (dev->pd_mgr->pd_prealloc_valid)
370 return ocrdma_get_pd_num(dev, pd);
9ba1377d 371
cffce990
NG		 372retry:
373 status = ocrdma_mbx_alloc_pd(dev, pd);
374 if (status) {
375 if (pd->dpp_enabled) {
376 pd->dpp_enabled = false;
377 pd->num_dpp_qp = 0;
378 goto retry;
cffce990 379 }
21a428a0 380 return status;
cffce990
NG		 381 }
382
21a428a0 383 return 0;
cffce990
NG		 384}
385
386static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
387 struct ocrdma_pd *pd)
388{
8b0c05dc 389 return (uctx->cntxt_pd == pd);
cffce990
NG		 390}
391
21a428a0 392static void _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
cffce990
NG		 393 struct ocrdma_pd *pd)
394{
9ba1377d 395 if (dev->pd_mgr->pd_prealloc_valid)
21a428a0 396 ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
9ba1377d 397 else
21a428a0 398 ocrdma_mbx_dealloc_pd(dev, pd);
cffce990
NG		 399}
400
401static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
402 struct ocrdma_ucontext *uctx,
403 struct ib_udata *udata)
404{
21a428a0
LR		 405 struct ib_device *ibdev = &dev->ibdev;
406 struct ib_pd *pd;
407 int status;
408
409 pd = rdma_zalloc_drv_obj(ibdev, ib_pd);
410 if (!pd)
411 return -ENOMEM;
cffce990 412
21a428a0
LR		 413 pd->device = ibdev;
414 uctx->cntxt_pd = get_ocrdma_pd(pd);
415
416 status = _ocrdma_alloc_pd(dev, uctx->cntxt_pd, uctx, udata);
417 if (status) {
418 kfree(uctx->cntxt_pd);
cffce990
NG		 419 goto err;
420 }
421
422 uctx->cntxt_pd->uctx = uctx;
423 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
424err:
425 return status;
426}
427
a2a074ef 428static void ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
cffce990 429{
cffce990
NG		 430 struct ocrdma_pd *pd = uctx->cntxt_pd;
431 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
432
6dab0264
MA		 433 if (uctx->pd_in_use) {
434 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
435 __func__, dev->id, pd->id);
436 }
21a428a0 437 kfree(uctx->cntxt_pd);
cffce990 438 uctx->cntxt_pd = NULL;
a2a074ef 439 _ocrdma_dealloc_pd(dev, pd);
cffce990
NG		 440}
441
442static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
443{
444 struct ocrdma_pd *pd = NULL;
445
446 mutex_lock(&uctx->mm_list_lock);
447 if (!uctx->pd_in_use) {
448 uctx->pd_in_use = true;
449 pd = uctx->cntxt_pd;
450 }
451 mutex_unlock(&uctx->mm_list_lock);
452
453 return pd;
454}
455
456static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
457{
458 mutex_lock(&uctx->mm_list_lock);
459 uctx->pd_in_use = false;
460 mutex_unlock(&uctx->mm_list_lock);
461}
462
a2a074ef 463int ocrdma_alloc_ucontext(struct ib_ucontext *uctx, struct ib_udata *udata)
fe2caefc 464{
a2a074ef 465 struct ib_device *ibdev = uctx->device;
fe2caefc 466 int status;
a2a074ef
LR		 467 struct ocrdma_ucontext *ctx = get_ocrdma_ucontext(uctx);
468 struct ocrdma_alloc_ucontext_resp resp = {};
fe2caefc
PP		 469 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
470 struct pci_dev *pdev = dev->nic_info.pdev;
471 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
472
473 if (!udata)
a2a074ef 474 return -EFAULT;
fe2caefc
PP		 475 INIT_LIST_HEAD(&ctx->mm_head);
476 mutex_init(&ctx->mm_list_lock);
477
750afb08
LC		 478 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
479 &ctx->ah_tbl.pa, GFP_KERNEL);
a2a074ef
LR		 480 if (!ctx->ah_tbl.va)
481 return -ENOMEM;
482
fe2caefc
PP		 483 ctx->ah_tbl.len = map_len;
484
485 resp.ah_tbl_len = ctx->ah_tbl.len;
1b76d383 486 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
fe2caefc
PP		 487
488 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
489 if (status)
490 goto map_err;
cffce990
NG		 491
492 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
493 if (status)
494 goto pd_err;
495
fe2caefc
PP		 496 resp.dev_id = dev->id;
497 resp.max_inline_data = dev->attr.max_inline_data;
498 resp.wqe_size = dev->attr.wqe_size;
499 resp.rqe_size = dev->attr.rqe_size;
500 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 501
502 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
503 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
504 if (status)
505 goto cpy_err;
a2a074ef 506 return 0;
fe2caefc
PP		 507
508cpy_err:
21a428a0 509 ocrdma_dealloc_ucontext_pd(ctx);
cffce990 510pd_err:
fe2caefc
PP		 511 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
512map_err:
513 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
514 ctx->ah_tbl.pa);
a2a074ef 515 return status;
fe2caefc
PP		 516}
517
a2a074ef 518void ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
fe2caefc
PP		 519{
520 struct ocrdma_mm *mm, *tmp;
521 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 522 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
523 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 524
a2a074ef 525 ocrdma_dealloc_ucontext_pd(uctx);
cffce990 526
fe2caefc
PP		 527 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
528 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
529 uctx->ah_tbl.pa);
530
531 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
532 list_del(&mm->entry);
533 kfree(mm);
534 }
fe2caefc
PP		 535}
536
537int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
538{
539 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 540 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 541 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
542 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
543 unsigned long len = (vma->vm_end - vma->vm_start);
0ca4c39f 544 int status;
fe2caefc
PP		 545 bool found;
546
547 if (vma->vm_start & (PAGE_SIZE - 1))
548 return -EINVAL;
549 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
550 if (!found)
551 return -EINVAL;
552
553 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
554 dev->nic_info.db_total_size)) &&
555 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 556 if (vma->vm_flags & VM_READ)
557 return -EPERM;
558
559 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 560 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
561 len, vma->vm_page_prot);
562 } else if (dev->nic_info.dpp_unmapped_len &&
563 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
564 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
565 dev->nic_info.dpp_unmapped_len)) &&
566 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 567 if (vma->vm_flags & VM_READ)
568 return -EPERM;
569
fe2caefc
PP		 570 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
571 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
572 len, vma->vm_page_prot);
573 } else {
fe2caefc
PP		 574 status = remap_pfn_range(vma, vma->vm_start,
575 vma->vm_pgoff, len, vma->vm_page_prot);
576 }
577 return status;
578}
579
45e86b33 580static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 581 struct ib_udata *udata)
582{
583 int status;
584 u64 db_page_addr;
da496438 585 u64 dpp_page_addr = 0;
fe2caefc
PP		 586 u32 db_page_size;
587 struct ocrdma_alloc_pd_uresp rsp;
ff23dfa1
SR		 588 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
589 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc 590
63ea3749 591 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 592 rsp.id = pd->id;
593 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 594 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 595 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 596
597 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
598 if (status)
599 return status;
600
601 if (pd->dpp_enabled) {
f99b1649 602 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 603 (pd->id * PAGE_SIZE);
fe2caefc 604 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 605 PAGE_SIZE);
fe2caefc
PP		 606 if (status)
607 goto dpp_map_err;
608 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
609 rsp.dpp_page_addr_lo = dpp_page_addr;
610 }
611
612 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
613 if (status)
614 goto ucopy_err;
615
616 pd->uctx = uctx;
617 return 0;
618
619ucopy_err:
da496438 620 if (pd->dpp_enabled)
43a6b402 621 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 622dpp_map_err:
623 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
624 return status;
625}
626
ff23dfa1 627int ocrdma_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
fe2caefc 628{
21a428a0 629 struct ib_device *ibdev = ibpd->device;
fe2caefc
PP		 630 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
631 struct ocrdma_pd *pd;
632 int status;
cffce990 633 u8 is_uctx_pd = false;
ff23dfa1
SR		 634 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
635 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc 636
ff23dfa1 637 if (udata) {
cffce990
NG		 638 pd = ocrdma_get_ucontext_pd(uctx);
639 if (pd) {
640 is_uctx_pd = true;
641 goto pd_mapping;
43a6b402 642 }
fe2caefc 643 }
fe2caefc 644
21a428a0
LR		 645 pd = get_ocrdma_pd(ibpd);
646 status = _ocrdma_alloc_pd(dev, pd, uctx, udata);
647 if (status)
cffce990 648 goto exit;
cffce990
NG		 649
650pd_mapping:
ff23dfa1
SR		 651 if (udata) {
652 status = ocrdma_copy_pd_uresp(dev, pd, udata);
fe2caefc
PP		 653 if (status)
654 goto err;
655 }
21a428a0 656 return 0;
fe2caefc
PP		 657
658err:
21a428a0 659 if (is_uctx_pd)
cffce990 660 ocrdma_release_ucontext_pd(uctx);
21a428a0
LR		 661 else
662 _ocrdma_dealloc_pd(dev, pd);
cffce990 663exit:
21a428a0 664 return status;
fe2caefc
PP		 665}
666
c4367a26 667void ocrdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
fe2caefc
PP		 668{
669 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 670 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990 671 struct ocrdma_ucontext *uctx = NULL;
fe2caefc
PP		 672 u64 usr_db;
673
cffce990
NG		 674 uctx = pd->uctx;
675 if (uctx) {
fe2caefc 676 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 677 (pd->id * PAGE_SIZE);
fe2caefc 678 if (pd->dpp_enabled)
43a6b402 679 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 680 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 681 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 682
683 if (is_ucontext_pd(uctx, pd)) {
684 ocrdma_release_ucontext_pd(uctx);
21a428a0 685 return;
cffce990 686 }
fe2caefc 687 }
21a428a0 688 _ocrdma_dealloc_pd(dev, pd);
fe2caefc
PP		 689}
690
1afc0454
NG		 691static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
692 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 693{
694 int status;
fe2caefc 695
fe2caefc
PP		 696 mr->hwmr.fr_mr = 0;
697 mr->hwmr.local_rd = 1;
698 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
699 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
700 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
701 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
702 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
703 mr->hwmr.num_pbls = num_pbls;
704
f99b1649
NG		 705 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
706 if (status)
707 return status;
708
fe2caefc
PP		 709 mr->ibmr.lkey = mr->hwmr.lkey;
710 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
711 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 712 return 0;
fe2caefc
PP		 713}
714
715struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
716{
f99b1649 717 int status;
fe2caefc 718 struct ocrdma_mr *mr;
f99b1649
NG		 719 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
720 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
721
722 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
723 pr_err("%s err, invalid access rights\n", __func__);
724 return ERR_PTR(-EINVAL);
725 }
fe2caefc 726
f99b1649
NG		 727 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
728 if (!mr)
729 return ERR_PTR(-ENOMEM);
730
1afc0454 731 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 732 OCRDMA_ADDR_CHECK_DISABLE);
733 if (status) {
734 kfree(mr);
735 return ERR_PTR(status);
736 }
fe2caefc
PP		 737
738 return &mr->ibmr;
739}
740
741static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
742 struct ocrdma_hw_mr *mr)
743{
744 struct pci_dev *pdev = dev->nic_info.pdev;
745 int i = 0;
746
747 if (mr->pbl_table) {
748 for (i = 0; i < mr->num_pbls; i++) {
749 if (!mr->pbl_table[i].va)
750 continue;
751 dma_free_coherent(&pdev->dev, mr->pbl_size,
752 mr->pbl_table[i].va,
753 mr->pbl_table[i].pa);
754 }
755 kfree(mr->pbl_table);
756 mr->pbl_table = NULL;
757 }
758}
759
1afc0454
NG		 760static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
761 u32 num_pbes)
fe2caefc
PP		 762{
763 u32 num_pbls = 0;
764 u32 idx = 0;
765 int status = 0;
766 u32 pbl_size;
767
768 do {
769 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
770 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
771 status = -EFAULT;
772 break;
773 }
774 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
775 num_pbls = num_pbls / (pbl_size / sizeof(u64));
776 idx++;
1afc0454 777 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 778
779 mr->hwmr.num_pbes = num_pbes;
780 mr->hwmr.num_pbls = num_pbls;
781 mr->hwmr.pbl_size = pbl_size;
782 return status;
783}
784
785static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
786{
787 int status = 0;
788 int i;
789 u32 dma_len = mr->pbl_size;
790 struct pci_dev *pdev = dev->nic_info.pdev;
791 void *va;
792 dma_addr_t pa;
793
6396bb22
KC		 794 mr->pbl_table = kcalloc(mr->num_pbls, sizeof(struct ocrdma_pbl),
795 GFP_KERNEL);
fe2caefc
PP		 796
797 if (!mr->pbl_table)
798 return -ENOMEM;
799
800 for (i = 0; i < mr->num_pbls; i++) {
750afb08 801 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
fe2caefc
PP		 802 if (!va) {
803 ocrdma_free_mr_pbl_tbl(dev, mr);
804 status = -ENOMEM;
805 break;
806 }
fe2caefc
PP		 807 mr->pbl_table[i].va = va;
808 mr->pbl_table[i].pa = pa;
809 }
810 return status;
811}
812
813static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
814 u32 num_pbes)
815{
816 struct ocrdma_pbe *pbe;
be8c456a 817 struct sg_dma_page_iter sg_iter;
fe2caefc
PP		 818 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
819 struct ib_umem *umem = mr->umem;
be8c456a
SS		 820 int pbe_cnt, total_num_pbes = 0;
821 u64 pg_addr;
fe2caefc
PP		 822
823 if (!mr->hwmr.num_pbes)
824 return;
825
826 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
827 pbe_cnt = 0;
828
be8c456a
SS		 829 for_each_sg_dma_page (umem->sg_head.sgl, &sg_iter, umem->nmap, 0) {
830 /* store the page address in pbe */
831 pg_addr = sg_page_iter_dma_address(&sg_iter);
832 pbe->pa_lo = cpu_to_le32(pg_addr);
833 pbe->pa_hi = cpu_to_le32(upper_32_bits(pg_addr));
834 pbe_cnt += 1;
835 total_num_pbes += 1;
836 pbe++;
837
838 /* if done building pbes, issue the mbx cmd. */
839 if (total_num_pbes == num_pbes)
840 return;
eeb8461e 841
be8c456a
SS		 842 /* if the given pbl is full storing the pbes,
843 * move to next pbl.
844 */
845 if (pbe_cnt == (mr->hwmr.pbl_size / sizeof(u64))) {
846 pbl_tbl++;
847 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
848 pbe_cnt = 0;
fe2caefc
PP		 849 }
850 }
851}
852
853struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
854 u64 usr_addr, int acc, struct ib_udata *udata)
855{
856 int status = -ENOMEM;
f99b1649 857 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 858 struct ocrdma_mr *mr;
859 struct ocrdma_pd *pd;
fe2caefc
PP		 860 u32 num_pbes;
861
862 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 863
864 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
865 return ERR_PTR(-EINVAL);
866
867 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
868 if (!mr)
869 return ERR_PTR(status);
c320e527 870 mr->umem = ib_umem_get(ibpd->device, start, len, acc);
fe2caefc
PP		 871 if (IS_ERR(mr->umem)) {
872 status = -EFAULT;
873 goto umem_err;
874 }
875 num_pbes = ib_umem_page_count(mr->umem);
1afc0454 876 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
fe2caefc
PP		 877 if (status)
878 goto umem_err;
879
be8c456a 880 mr->hwmr.pbe_size = PAGE_SIZE;
406f9e5f 881 mr->hwmr.fbo = ib_umem_offset(mr->umem);
fe2caefc
PP		 882 mr->hwmr.va = usr_addr;
883 mr->hwmr.len = len;
884 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
885 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
886 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
887 mr->hwmr.local_rd = 1;
888 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
889 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
890 if (status)
891 goto umem_err;
892 build_user_pbes(dev, mr, num_pbes);
893 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
894 if (status)
895 goto mbx_err;
fe2caefc
PP		 896 mr->ibmr.lkey = mr->hwmr.lkey;
897 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
898 mr->ibmr.rkey = mr->hwmr.lkey;
899
900 return &mr->ibmr;
901
902mbx_err:
903 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
904umem_err:
905 kfree(mr);
906 return ERR_PTR(status);
907}
908
c4367a26 909int ocrdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
fe2caefc
PP		 910{
911 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 912 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc 913
4b8180aa 914 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
fe2caefc 915
2eaa1c56 916 kfree(mr->pages);
9d1878a3 917 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
fe2caefc 918
fe2caefc 919 /* it could be user registered memory. */
836a0fbb 920 ib_umem_release(mr->umem);
fe2caefc 921 kfree(mr);
6dab0264
MA		 922
923 /* Don't stop cleanup, in case FW is unresponsive */
924 if (dev->mqe_ctx.fw_error_state) {
6dab0264
MA		 925 pr_err("%s(%d) fw not responding.\n",
926 __func__, dev->id);
927 }
4b8180aa 928 return 0;
fe2caefc
PP		 929}
930
1afc0454 931static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
ff23dfa1 932 struct ib_udata *udata)
fe2caefc
PP		 933{
934 int status;
ff23dfa1
SR		 935 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
936 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc
PP		 937 struct ocrdma_create_cq_uresp uresp;
938
ff23dfa1
SR		 939 /* this must be user flow! */
940 if (!udata)
941 return -EINVAL;
942
63ea3749 943 memset(&uresp, 0, sizeof(uresp));
fe2caefc 944 uresp.cq_id = cq->id;
43a6b402 945 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 946 uresp.num_pages = 1;
947 uresp.max_hw_cqe = cq->max_hw_cqe;
1b76d383 948 uresp.page_addr[0] = virt_to_phys(cq->va);
cffce990 949 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 950 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 951 uresp.phase_change = cq->phase_change ? 1 : 0;
952 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
953 if (status) {
ef99c4c2 954 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 955 __func__, dev->id, cq->id);
fe2caefc
PP		 956 goto err;
957 }
fe2caefc
PP		 958 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
959 if (status)
960 goto err;
961 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
962 if (status) {
963 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
964 goto err;
965 }
966 cq->ucontext = uctx;
967err:
968 return status;
969}
970
e39afe3d
LR		 971int ocrdma_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
972 struct ib_udata *udata)
fe2caefc 973{
e39afe3d 974 struct ib_device *ibdev = ibcq->device;
bcf4c1ea 975 int entries = attr->cqe;
e39afe3d 976 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
fe2caefc 977 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
ff23dfa1
SR		 978 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
979 udata, struct ocrdma_ucontext, ibucontext);
cffce990 980 u16 pd_id = 0;
fe2caefc
PP		 981 int status;
982 struct ocrdma_create_cq_ureq ureq;
983
bcf4c1ea 984 if (attr->flags)
e39afe3d 985 return -EINVAL;
bcf4c1ea 986
fe2caefc
PP		 987 if (udata) {
988 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
e39afe3d 989 return -EFAULT;
fe2caefc
PP		 990 } else
991 ureq.dpp_cq = 0;
fe2caefc
PP		 992
993 spin_lock_init(&cq->cq_lock);
994 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 995 INIT_LIST_HEAD(&cq->sq_head);
996 INIT_LIST_HEAD(&cq->rq_head);
fe2caefc 997
ff23dfa1 998 if (udata)
cffce990 999 pd_id = uctx->cntxt_pd->id;
cffce990
NG		 1000
1001 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
e39afe3d
LR		 1002 if (status)
1003 return status;
1004
ff23dfa1
SR		 1005 if (udata) {
1006 status = ocrdma_copy_cq_uresp(dev, cq, udata);
fe2caefc
PP		 1007 if (status)
1008 goto ctx_err;
1009 }
1010 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 1011 dev->cq_tbl[cq->id] = cq;
e39afe3d 1012 return 0;
fe2caefc
PP		 1013
1014ctx_err:
1015 ocrdma_mbx_destroy_cq(dev, cq);
e39afe3d 1016 return status;
fe2caefc
PP		 1017}
1018
1019int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1020 struct ib_udata *udata)
1021{
1022 int status = 0;
1023 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1024
1025 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1026 status = -EINVAL;
1027 return status;
1028 }
1029 ibcq->cqe = new_cnt;
1030 return status;
1031}
1032
ea617626
DS		 1033static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1034{
1035 int cqe_cnt;
1036 int valid_count = 0;
1037 unsigned long flags;
1038
1039 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1040 struct ocrdma_cqe *cqe = NULL;
1041
1042 cqe = cq->va;
1043 cqe_cnt = cq->cqe_cnt;
1044
1045 /* Last irq might have scheduled a polling thread
1046 * sync-up with it before hard flushing.
1047 */
1048 spin_lock_irqsave(&cq->cq_lock, flags);
1049 while (cqe_cnt) {
1050 if (is_cqe_valid(cq, cqe))
1051 valid_count++;
1052 cqe++;
1053 cqe_cnt--;
1054 }
1055 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1056 spin_unlock_irqrestore(&cq->cq_lock, flags);
1057}
1058
a52c8e24 1059void ocrdma_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata)
fe2caefc 1060{
fe2caefc 1061 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 1062 struct ocrdma_eq *eq = NULL;
1afc0454 1063 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 1064 int pdid = 0;
ea617626 1065 u32 irq, indx;
fe2caefc 1066
ea617626
DS		 1067 dev->cq_tbl[cq->id] = NULL;
1068 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
fe2caefc 1069
ea617626
DS		 1070 eq = &dev->eq_tbl[indx];
1071 irq = ocrdma_get_irq(dev, eq);
1072 synchronize_irq(irq);
1073 ocrdma_flush_cq(cq);
fe2caefc 1074
a52c8e24 1075 ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 1076 if (cq->ucontext) {
cffce990 1077 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1078 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1079 PAGE_ALIGN(cq->len));
cffce990
NG		 1080 ocrdma_del_mmap(cq->ucontext,
1081 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1082 dev->nic_info.db_page_size);
1083 }
fe2caefc
PP		 1084}
1085
1086static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1087{
1088 int status = -EINVAL;
1089
1090 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1091 dev->qp_tbl[qp->id] = qp;
1092 status = 0;
1093 }
1094 return status;
1095}
1096
1097static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1098{
1099 dev->qp_tbl[qp->id] = NULL;
1100}
1101
1102static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
e00b64f7
SR		 1103 struct ib_qp_init_attr *attrs,
1104 struct ib_udata *udata)
fe2caefc 1105{
43a6b402
NG		 1106 if ((attrs->qp_type != IB_QPT_GSI) &&
1107 (attrs->qp_type != IB_QPT_RC) &&
1108 (attrs->qp_type != IB_QPT_UC) &&
1109 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1110 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1111 __func__, dev->id, attrs->qp_type);
bb8865f4 1112 return -EOPNOTSUPP;
fe2caefc 1113 }
43a6b402
NG		 1114 /* Skip the check for QP1 to support CM size of 128 */
1115 if ((attrs->qp_type != IB_QPT_GSI) &&
1116 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1117 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1118 __func__, dev->id, attrs->cap.max_send_wr);
1119 pr_err("%s(%d) supported send_wr=0x%x\n",
1120 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1121 return -EINVAL;
1122 }
1123 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1124 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1125 __func__, dev->id, attrs->cap.max_recv_wr);
1126 pr_err("%s(%d) supported recv_wr=0x%x\n",
1127 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1128 return -EINVAL;
1129 }
1130 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1131 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1132 __func__, dev->id, attrs->cap.max_inline_data);
1133 pr_err("%s(%d) supported inline data size=0x%x\n",
1134 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1135 return -EINVAL;
1136 }
1137 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1138 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1139 __func__, dev->id, attrs->cap.max_send_sge);
1140 pr_err("%s(%d) supported send_sge=0x%x\n",
1141 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1142 return -EINVAL;
1143 }
1144 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1145 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1146 __func__, dev->id, attrs->cap.max_recv_sge);
1147 pr_err("%s(%d) supported recv_sge=0x%x\n",
1148 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1149 return -EINVAL;
1150 }
1151 /* unprivileged user space cannot create special QP */
e00b64f7 1152 if (udata && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1153 pr_err
fe2caefc
PP		 1154 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1155 __func__, dev->id, attrs->qp_type);
1156 return -EINVAL;
1157 }
1158 /* allow creating only one GSI type of QP */
1159 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1160 pr_err("%s(%d) GSI special QPs already created.\n",
1161 __func__, dev->id);
fe2caefc
PP		 1162 return -EINVAL;
1163 }
1164 /* verify consumer QPs are not trying to use GSI QP's CQ */
1165 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1166 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1167 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1168 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1169 __func__, dev->id);
fe2caefc
PP		 1170 return -EINVAL;
1171 }
1172 }
1173 return 0;
1174}
1175
1176static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1177 struct ib_udata *udata, int dpp_offset,
1178 int dpp_credit_lmt, int srq)
1179{
0ca4c39f 1180 int status;
fe2caefc
PP		 1181 u64 usr_db;
1182 struct ocrdma_create_qp_uresp uresp;
fe2caefc 1183 struct ocrdma_pd *pd = qp->pd;
d2b8f7b1 1184 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
fe2caefc
PP		 1185
1186 memset(&uresp, 0, sizeof(uresp));
1187 usr_db = dev->nic_info.unmapped_db +
1188 (pd->id * dev->nic_info.db_page_size);
1189 uresp.qp_id = qp->id;
1190 uresp.sq_dbid = qp->sq.dbid;
1191 uresp.num_sq_pages = 1;
43a6b402 1192 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1b76d383 1193 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
fe2caefc
PP		 1194 uresp.num_wqe_allocated = qp->sq.max_cnt;
1195 if (!srq) {
1196 uresp.rq_dbid = qp->rq.dbid;
1197 uresp.num_rq_pages = 1;
43a6b402 1198 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1b76d383 1199 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
fe2caefc
PP		 1200 uresp.num_rqe_allocated = qp->rq.max_cnt;
1201 }
1202 uresp.db_page_addr = usr_db;
1203 uresp.db_page_size = dev->nic_info.db_page_size;
2df84fa8
DS		 1204 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1205 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1206 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
fe2caefc
PP		 1207
1208 if (qp->dpp_enabled) {
1209 uresp.dpp_credit = dpp_credit_lmt;
1210 uresp.dpp_offset = dpp_offset;
1211 }
1212 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1213 if (status) {
ef99c4c2 1214 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1215 goto err;
1216 }
1217 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1218 uresp.sq_page_size);
1219 if (status)
1220 goto err;
1221
1222 if (!srq) {
1223 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1224 uresp.rq_page_size);
1225 if (status)
1226 goto rq_map_err;
1227 }
1228 return status;
1229rq_map_err:
1230 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1231err:
1232 return status;
1233}
1234
1235static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1236 struct ocrdma_pd *pd)
1237{
21c3391a 1238 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
fe2caefc
PP		 1239 qp->sq_db = dev->nic_info.db +
1240 (pd->id * dev->nic_info.db_page_size) +
1241 OCRDMA_DB_GEN2_SQ_OFFSET;
1242 qp->rq_db = dev->nic_info.db +
1243 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1244 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1245 } else {
1246 qp->sq_db = dev->nic_info.db +
1247 (pd->id * dev->nic_info.db_page_size) +
1248 OCRDMA_DB_SQ_OFFSET;
1249 qp->rq_db = dev->nic_info.db +
1250 (pd->id * dev->nic_info.db_page_size) +
1251 OCRDMA_DB_RQ_OFFSET;
1252 }
1253}
1254
1255static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1256{
1257 qp->wqe_wr_id_tbl =
6396bb22 1258 kcalloc(qp->sq.max_cnt, sizeof(*(qp->wqe_wr_id_tbl)),
fe2caefc
PP		 1259 GFP_KERNEL);
1260 if (qp->wqe_wr_id_tbl == NULL)
1261 return -ENOMEM;
1262 qp->rqe_wr_id_tbl =
6396bb22 1263 kcalloc(qp->rq.max_cnt, sizeof(u64), GFP_KERNEL);
fe2caefc
PP		 1264 if (qp->rqe_wr_id_tbl == NULL)
1265 return -ENOMEM;
1266
1267 return 0;
1268}
1269
1270static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1271 struct ocrdma_pd *pd,
1272 struct ib_qp_init_attr *attrs)
1273{
1274 qp->pd = pd;
1275 spin_lock_init(&qp->q_lock);
1276 INIT_LIST_HEAD(&qp->sq_entry);
1277 INIT_LIST_HEAD(&qp->rq_entry);
1278
1279 qp->qp_type = attrs->qp_type;
1280 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1281 qp->max_inline_data = attrs->cap.max_inline_data;
1282 qp->sq.max_sges = attrs->cap.max_send_sge;
1283 qp->rq.max_sges = attrs->cap.max_recv_sge;
1284 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1285 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1286}
1287
fe2caefc
PP		 1288static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1289 struct ib_qp_init_attr *attrs)
1290{
1291 if (attrs->qp_type == IB_QPT_GSI) {
1292 dev->gsi_qp_created = 1;
1293 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1294 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1295 }
1296}
1297
1298struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1299 struct ib_qp_init_attr *attrs,
1300 struct ib_udata *udata)
1301{
1302 int status;
1303 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1304 struct ocrdma_qp *qp;
f99b1649 1305 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 1306 struct ocrdma_create_qp_ureq ureq;
1307 u16 dpp_credit_lmt, dpp_offset;
1308
e00b64f7 1309 status = ocrdma_check_qp_params(ibpd, dev, attrs, udata);
fe2caefc
PP		 1310 if (status)
1311 goto gen_err;
1312
1313 memset(&ureq, 0, sizeof(ureq));
1314 if (udata) {
1315 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1316 return ERR_PTR(-EFAULT);
1317 }
1318 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1319 if (!qp) {
1320 status = -ENOMEM;
1321 goto gen_err;
1322 }
fe2caefc 1323 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1324 if (udata == NULL)
1325 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1326 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1327
1328 mutex_lock(&dev->dev_lock);
1329 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1330 ureq.dpp_cq_id,
1331 &dpp_offset, &dpp_credit_lmt);
1332 if (status)
1333 goto mbx_err;
1334
1335 /* user space QP's wr_id table are managed in library */
1336 if (udata == NULL) {
fe2caefc
PP		 1337 status = ocrdma_alloc_wr_id_tbl(qp);
1338 if (status)
1339 goto map_err;
1340 }
1341
1342 status = ocrdma_add_qpn_map(dev, qp);
1343 if (status)
1344 goto map_err;
1345 ocrdma_set_qp_db(dev, qp, pd);
1346 if (udata) {
1347 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1348 dpp_credit_lmt,
1349 (attrs->srq != NULL));
1350 if (status)
1351 goto cpy_err;
1352 }
1353 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1354 qp->ibqp.qp_num = qp->id;
fe2caefc
PP		 1355 mutex_unlock(&dev->dev_lock);
1356 return &qp->ibqp;
1357
1358cpy_err:
1359 ocrdma_del_qpn_map(dev, qp);
1360map_err:
1361 ocrdma_mbx_destroy_qp(dev, qp);
1362mbx_err:
1363 mutex_unlock(&dev->dev_lock);
1364 kfree(qp->wqe_wr_id_tbl);
1365 kfree(qp->rqe_wr_id_tbl);
1366 kfree(qp);
ef99c4c2 1367 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc
PP		 1368gen_err:
1369 return ERR_PTR(status);
1370}
1371
1372int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1373 int attr_mask)
1374{
1375 int status = 0;
1376 struct ocrdma_qp *qp;
1377 struct ocrdma_dev *dev;
1378 enum ib_qp_state old_qps;
1379
1380 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1381 dev = get_ocrdma_dev(ibqp->device);
fe2caefc 1382 if (attr_mask & IB_QP_STATE)
057729cb 1383 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1384 /* if new and previous states are same hw doesn't need to
1385 * know about it.
1386 */
1387 if (status < 0)
1388 return status;
95f60bb8 1389 return ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
fe2caefc
PP		 1390}
1391
1392int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1393 int attr_mask, struct ib_udata *udata)
1394{
1395 unsigned long flags;
1396 int status = -EINVAL;
1397 struct ocrdma_qp *qp;
1398 struct ocrdma_dev *dev;
1399 enum ib_qp_state old_qps, new_qps;
1400
1401 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1402 dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1403
1404 /* syncronize with multiple context trying to change, retrive qps */
1405 mutex_lock(&dev->dev_lock);
1406 /* syncronize with wqe, rqe posting and cqe processing contexts */
1407 spin_lock_irqsave(&qp->q_lock, flags);
1408 old_qps = get_ibqp_state(qp->state);
1409 if (attr_mask & IB_QP_STATE)
1410 new_qps = attr->qp_state;
1411 else
1412 new_qps = old_qps;
1413 spin_unlock_irqrestore(&qp->q_lock, flags);
1414
d31131bb 1415 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask)) {
ef99c4c2
NG		 1416 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1417 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1418 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1419 old_qps, new_qps);
fe2caefc
PP		 1420 goto param_err;
1421 }
1422
1423 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1424 if (status > 0)
1425 status = 0;
1426param_err:
1427 mutex_unlock(&dev->dev_lock);
1428 return status;
1429}
1430
1431static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1432{
1433 switch (mtu) {
1434 case 256:
1435 return IB_MTU_256;
1436 case 512:
1437 return IB_MTU_512;
1438 case 1024:
1439 return IB_MTU_1024;
1440 case 2048:
1441 return IB_MTU_2048;
1442 case 4096:
1443 return IB_MTU_4096;
1444 default:
1445 return IB_MTU_1024;
1446 }
1447}
1448
1449static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1450{
1451 int ib_qp_acc_flags = 0;
1452
1453 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1454 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1455 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1456 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1457 return ib_qp_acc_flags;
1458}
1459
1460int ocrdma_query_qp(struct ib_qp *ibqp,
1461 struct ib_qp_attr *qp_attr,
1462 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1463{
1464 int status;
1465 u32 qp_state;
1466 struct ocrdma_qp_params params;
1467 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1468 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1469
1470 memset(&params, 0, sizeof(params));
1471 mutex_lock(&dev->dev_lock);
1472 status = ocrdma_mbx_query_qp(dev, qp, &params);
1473 mutex_unlock(&dev->dev_lock);
1474 if (status)
1475 goto mbx_err;
95bf0093
MA		 1476 if (qp->qp_type == IB_QPT_UD)
1477 qp_attr->qkey = params.qkey;
fe2caefc
PP		 1478 qp_attr->path_mtu =
1479 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1480 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1481 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1482 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1483 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1484 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1485 qp_attr->dest_qp_num =
1486 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1487
1488 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1489 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1490 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1491 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1492 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1493 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc 1494 qp_init_attr->cap = qp_attr->cap;
44c58487 1495 qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
d8966fcd
DC		 1496
1497 rdma_ah_set_grh(&qp_attr->ah_attr, NULL,
1498 params.rnt_rc_sl_fl &
1499 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK,
1500 qp->sgid_idx,
1501 (params.hop_lmt_rq_psn &
1502 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1503 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT,
1504 (params.tclass_sq_psn &
1505 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1506 OCRDMA_QP_PARAMS_TCLASS_SHIFT);
1507 rdma_ah_set_dgid_raw(&qp_attr->ah_attr, &params.dgid[0]);
1508
1509 rdma_ah_set_port_num(&qp_attr->ah_attr, 1);
1510 rdma_ah_set_sl(&qp_attr->ah_attr, (params.rnt_rc_sl_fl &
1511 OCRDMA_QP_PARAMS_SL_MASK) >>
1512 OCRDMA_QP_PARAMS_SL_SHIFT);
fe2caefc
PP		 1513 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1514 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1515 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1516 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1517 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1518 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1519 qp_attr->retry_cnt =
1520 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1521 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1522 qp_attr->min_rnr_timer = 0;
1523 qp_attr->pkey_index = 0;
1524 qp_attr->port_num = 1;
d8966fcd
DC		 1525 rdma_ah_set_path_bits(&qp_attr->ah_attr, 0);
1526 rdma_ah_set_static_rate(&qp_attr->ah_attr, 0);
fe2caefc
PP		 1527 qp_attr->alt_pkey_index = 0;
1528 qp_attr->alt_port_num = 0;
1529 qp_attr->alt_timeout = 0;
1530 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1531 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1532 OCRDMA_QP_PARAMS_STATE_SHIFT;
43c706b1
PR		 1533 qp_attr->qp_state = get_ibqp_state(qp_state);
1534 qp_attr->cur_qp_state = qp_attr->qp_state;
fe2caefc
PP		 1535 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1536 qp_attr->max_dest_rd_atomic =
1537 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1538 qp_attr->max_rd_atomic =
1539 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1540 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1541 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
43c706b1
PR		 1542 /* Sync driver QP state with FW */
1543 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
fe2caefc
PP		 1544mbx_err:
1545 return status;
1546}
1547
f3070e7e 1548static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
fe2caefc 1549{
f3070e7e
RV		 1550 unsigned int i = idx / 32;
1551 u32 mask = (1U << (idx % 32));
fe2caefc 1552
ba64fdca 1553 srq->idx_bit_fields[i] ^= mask;
fe2caefc
PP		 1554}
1555
1556static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1557{
43a6b402 1558 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1559}
1560
1561static int is_hw_sq_empty(struct ocrdma_qp *qp)
1562{
43a6b402 1563 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1564}
1565
1566static int is_hw_rq_empty(struct ocrdma_qp *qp)
1567{
43a6b402 1568 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1569}
1570
1571static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1572{
1573 return q->va + (q->head * q->entry_size);
1574}
1575
1576static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1577 u32 idx)
1578{
1579 return q->va + (idx * q->entry_size);
1580}
1581
1582static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1583{
1584 q->head = (q->head + 1) & q->max_wqe_idx;
1585}
1586
1587static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1588{
1589 q->tail = (q->tail + 1) & q->max_wqe_idx;
1590}
1591
1592/* discard the cqe for a given QP */
1593static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1594{
1595 unsigned long cq_flags;
1596 unsigned long flags;
1597 int discard_cnt = 0;
1598 u32 cur_getp, stop_getp;
1599 struct ocrdma_cqe *cqe;
cf5788ad 1600 u32 qpn = 0, wqe_idx = 0;
fe2caefc
PP		 1601
1602 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1603
1604 /* traverse through the CQEs in the hw CQ,
1605 * find the matching CQE for a given qp,
1606 * mark the matching one discarded by clearing qpn.
1607 * ring the doorbell in the poll_cq() as
1608 * we don't complete out of order cqe.
1609 */
1610
1611 cur_getp = cq->getp;
1612 /* find upto when do we reap the cq. */
1613 stop_getp = cur_getp;
1614 do {
1615 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1616 break;
1617
1618 cqe = cq->va + cur_getp;
1619 /* if (a) done reaping whole hw cq, or
1620 * (b) qp_xq becomes empty.
1621 * then exit
1622 */
1623 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1624 /* if previously discarded cqe found, skip that too. */
1625 /* check for matching qp */
1626 if (qpn == 0 || qpn != qp->id)
1627 goto skip_cqe;
1628
f99b1649 1629 if (is_cqe_for_sq(cqe)) {
fe2caefc 1630 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1631 } else {
fe2caefc 1632 if (qp->srq) {
cf5788ad
SX		 1633 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1634 OCRDMA_CQE_BUFTAG_SHIFT) &
1635 qp->srq->rq.max_wqe_idx;
db287ec5 1636 BUG_ON(wqe_idx < 1);
fe2caefc
PP		 1637 spin_lock_irqsave(&qp->srq->q_lock, flags);
1638 ocrdma_hwq_inc_tail(&qp->srq->rq);
cf5788ad 1639 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
fe2caefc
PP		 1640 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1641
f99b1649 1642 } else {
fe2caefc 1643 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1644 }
fe2caefc 1645 }
cf5788ad
SX		 1646 /* mark cqe discarded so that it is not picked up later
1647 * in the poll_cq().
1648 */
1649 discard_cnt += 1;
1650 cqe->cmn.qpn = 0;
fe2caefc
PP		 1651skip_cqe:
1652 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1653 } while (cur_getp != stop_getp);
1654 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1655}
1656
f11220ee 1657void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1658{
1659 int found = false;
1660 unsigned long flags;
d2b8f7b1 1661 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 1662 /* sync with any active CQ poll */
1663
1664 spin_lock_irqsave(&dev->flush_q_lock, flags);
1665 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1666 if (found)
1667 list_del(&qp->sq_entry);
1668 if (!qp->srq) {
1669 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1670 if (found)
1671 list_del(&qp->rq_entry);
1672 }
1673 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1674}
1675
c4367a26 1676int ocrdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
fe2caefc 1677{
fe2caefc
PP		 1678 struct ocrdma_pd *pd;
1679 struct ocrdma_qp *qp;
1680 struct ocrdma_dev *dev;
1681 struct ib_qp_attr attrs;
fe48822b 1682 int attr_mask;
d19081e0 1683 unsigned long flags;
fe2caefc
PP		 1684
1685 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1686 dev = get_ocrdma_dev(ibqp->device);
fe2caefc 1687
fe2caefc
PP		 1688 pd = qp->pd;
1689
1690 /* change the QP state to ERROR */
fe48822b
DS		 1691 if (qp->state != OCRDMA_QPS_RST) {
1692 attrs.qp_state = IB_QPS_ERR;
1693 attr_mask = IB_QP_STATE;
1694 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1695 }
fe2caefc
PP		 1696 /* ensure that CQEs for newly created QP (whose id may be same with
1697 * one which just getting destroyed are same), dont get
1698 * discarded until the old CQEs are discarded.
1699 */
1700 mutex_lock(&dev->dev_lock);
4b8180aa 1701 (void) ocrdma_mbx_destroy_qp(dev, qp);
fe2caefc
PP		 1702
1703 /*
1704 * acquire CQ lock while destroy is in progress, in order to
1705 * protect against proessing in-flight CQEs for this QP.
1706 */
d19081e0 1707 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
beae9eb5 1708 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) {
d19081e0 1709 spin_lock(&qp->rq_cq->cq_lock);
beae9eb5 1710 ocrdma_del_qpn_map(dev, qp);
d19081e0 1711 spin_unlock(&qp->rq_cq->cq_lock);
beae9eb5
BVA		 1712 } else {
1713 ocrdma_del_qpn_map(dev, qp);
1714 }
d19081e0 1715 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1716
1717 if (!pd->uctx) {
1718 ocrdma_discard_cqes(qp, qp->sq_cq);
1719 ocrdma_discard_cqes(qp, qp->rq_cq);
1720 }
1721 mutex_unlock(&dev->dev_lock);
1722
1723 if (pd->uctx) {
43a6b402
NG		 1724 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1725 PAGE_ALIGN(qp->sq.len));
fe2caefc 1726 if (!qp->srq)
43a6b402
NG		 1727 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1728 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1729 }
1730
1731 ocrdma_del_flush_qp(qp);
1732
fe2caefc
PP		 1733 kfree(qp->wqe_wr_id_tbl);
1734 kfree(qp->rqe_wr_id_tbl);
1735 kfree(qp);
4b8180aa 1736 return 0;
fe2caefc
PP		 1737}
1738
1afc0454
NG		 1739static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1740 struct ib_udata *udata)
fe2caefc
PP		 1741{
1742 int status;
1743 struct ocrdma_create_srq_uresp uresp;
1744
63ea3749 1745 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1746 uresp.rq_dbid = srq->rq.dbid;
1747 uresp.num_rq_pages = 1;
1b76d383 1748 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
fe2caefc 1749 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1750 uresp.db_page_addr = dev->nic_info.unmapped_db +
1751 (srq->pd->id * dev->nic_info.db_page_size);
1752 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1753 uresp.num_rqe_allocated = srq->rq.max_cnt;
21c3391a 1754 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
f11220ee 1755 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1756 uresp.db_shift = 24;
1757 } else {
1758 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1759 uresp.db_shift = 16;
1760 }
1761
1762 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1763 if (status)
1764 return status;
1765 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1766 uresp.rq_page_size);
1767 if (status)
1768 return status;
1769 return status;
1770}
1771
68e326de
LR		 1772int ocrdma_create_srq(struct ib_srq *ibsrq, struct ib_srq_init_attr *init_attr,
1773 struct ib_udata *udata)
fe2caefc 1774{
68e326de
LR		 1775 int status;
1776 struct ocrdma_pd *pd = get_ocrdma_pd(ibsrq->pd);
1777 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1778 struct ocrdma_srq *srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1779
1780 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
68e326de 1781 return -EINVAL;
fe2caefc 1782 if (init_attr->attr.max_wr > dev->attr.max_rqe)
68e326de 1783 return -EINVAL;
fe2caefc
PP		 1784
1785 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1786 srq->pd = pd;
1787 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1788 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc 1789 if (status)
68e326de 1790 return status;
fe2caefc 1791
68e326de 1792 if (!udata) {
6396bb22
KC		 1793 srq->rqe_wr_id_tbl = kcalloc(srq->rq.max_cnt, sizeof(u64),
1794 GFP_KERNEL);
68e326de
LR		 1795 if (!srq->rqe_wr_id_tbl) {
1796 status = -ENOMEM;
fe2caefc 1797 goto arm_err;
68e326de 1798 }
fe2caefc
PP		 1799
1800 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1801 (srq->rq.max_cnt % 32 ? 1 : 0);
1802 srq->idx_bit_fields =
6da2ec56
KC		 1803 kmalloc_array(srq->bit_fields_len, sizeof(u32),
1804 GFP_KERNEL);
68e326de
LR		 1805 if (!srq->idx_bit_fields) {
1806 status = -ENOMEM;
fe2caefc 1807 goto arm_err;
68e326de 1808 }
fe2caefc
PP		 1809 memset(srq->idx_bit_fields, 0xff,
1810 srq->bit_fields_len * sizeof(u32));
1811 }
1812
1813 if (init_attr->attr.srq_limit) {
1814 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1815 if (status)
1816 goto arm_err;
1817 }
1818
fe2caefc 1819 if (udata) {
1afc0454 1820 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1821 if (status)
1822 goto arm_err;
1823 }
1824
68e326de 1825 return 0;
fe2caefc
PP		 1826
1827arm_err:
1828 ocrdma_mbx_destroy_srq(dev, srq);
fe2caefc
PP		 1829 kfree(srq->rqe_wr_id_tbl);
1830 kfree(srq->idx_bit_fields);
68e326de 1831 return status;
fe2caefc
PP		 1832}
1833
1834int ocrdma_modify_srq(struct ib_srq *ibsrq,
1835 struct ib_srq_attr *srq_attr,
1836 enum ib_srq_attr_mask srq_attr_mask,
1837 struct ib_udata *udata)
1838{
0ca4c39f 1839 int status;
fe2caefc 1840 struct ocrdma_srq *srq;
fe2caefc
PP		 1841
1842 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1843 if (srq_attr_mask & IB_SRQ_MAX_WR)
1844 status = -EINVAL;
1845 else
1846 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1847 return status;
1848}
1849
1850int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1851{
1852 int status;
1853 struct ocrdma_srq *srq;
fe2caefc
PP		 1854
1855 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1856 status = ocrdma_mbx_query_srq(srq, srq_attr);
1857 return status;
1858}
1859
68e326de 1860void ocrdma_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
fe2caefc 1861{
fe2caefc 1862 struct ocrdma_srq *srq;
1afc0454 1863 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1864
1865 srq = get_ocrdma_srq(ibsrq);
fe2caefc 1866
68e326de 1867 ocrdma_mbx_destroy_srq(dev, srq);
fe2caefc
PP		 1868
1869 if (srq->pd->uctx)
43a6b402
NG		 1870 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1871 PAGE_ALIGN(srq->rq.len));
fe2caefc 1872
fe2caefc
PP		 1873 kfree(srq->idx_bit_fields);
1874 kfree(srq->rqe_wr_id_tbl);
fe2caefc
PP		 1875}
1876
1877/* unprivileged verbs and their support functions. */
1878static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1879 struct ocrdma_hdr_wqe *hdr,
f696bf6d 1880 const struct ib_send_wr *wr)
fe2caefc
PP		 1881{
1882 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1883 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
e622f2f4 1884 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah);
fe2caefc 1885
e622f2f4 1886 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn;
fe2caefc
PP		 1887 if (qp->qp_type == IB_QPT_GSI)
1888 ud_hdr->qkey = qp->qkey;
1889 else
e622f2f4 1890 ud_hdr->qkey = ud_wr(wr)->remote_qkey;
fe2caefc 1891 ud_hdr->rsvd_ahid = ah->id;
6b062667 1892 ud_hdr->hdr_type = ah->hdr_type;
29565f2f
DS		 1893 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
1894 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
fe2caefc
PP		 1895}
1896
1897static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1898 struct ocrdma_sge *sge, int num_sge,
1899 struct ib_sge *sg_list)
1900{
1901 int i;
1902
1903 for (i = 0; i < num_sge; i++) {
1904 sge[i].lrkey = sg_list[i].lkey;
1905 sge[i].addr_lo = sg_list[i].addr;
1906 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1907 sge[i].len = sg_list[i].length;
1908 hdr->total_len += sg_list[i].length;
1909 }
1910 if (num_sge == 0)
1911 memset(sge, 0, sizeof(*sge));
1912}
1913
117e6dd1
NG		 1914static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1915{
1916 uint32_t total_len = 0, i;
1917
1918 for (i = 0; i < num_sge; i++)
1919 total_len += sg_list[i].length;
1920 return total_len;
1921}
1922
1923
fe2caefc
PP		 1924static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1925 struct ocrdma_hdr_wqe *hdr,
1926 struct ocrdma_sge *sge,
f696bf6d 1927 const struct ib_send_wr *wr, u32 wqe_size)
fe2caefc 1928{
117e6dd1
NG		 1929 int i;
1930 char *dpp_addr;
1931
43a6b402 1932 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1933 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1934 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2 1935 pr_err("%s() supported_len=0x%x,\n"
1a84db56 1936 " unsupported len req=0x%x\n", __func__,
117e6dd1 1937 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1938 return -EINVAL;
1939 }
117e6dd1
NG		 1940 dpp_addr = (char *)sge;
1941 for (i = 0; i < wr->num_sge; i++) {
1942 memcpy(dpp_addr,
1943 (void *)(unsigned long)wr->sg_list[i].addr,
1944 wr->sg_list[i].length);
1945 dpp_addr += wr->sg_list[i].length;
1946 }
1947
fe2caefc 1948 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1949 if (0 == hdr->total_len)
43a6b402 1950 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1951 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1952 } else {
1953 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1954 if (wr->num_sge)
1955 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
1956 else
1957 wqe_size += sizeof(struct ocrdma_sge);
1958 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1959 }
1960 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1961 return 0;
1962}
1963
1964static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 1965 const struct ib_send_wr *wr)
fe2caefc
PP		 1966{
1967 int status;
1968 struct ocrdma_sge *sge;
1969 u32 wqe_size = sizeof(*hdr);
1970
1971 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
1972 ocrdma_build_ud_hdr(qp, hdr, wr);
1973 sge = (struct ocrdma_sge *)(hdr + 2);
1974 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 1975 } else {
fe2caefc 1976 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 1977 }
fe2caefc
PP		 1978
1979 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1980 return status;
1981}
1982
1983static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 1984 const struct ib_send_wr *wr)
fe2caefc
PP		 1985{
1986 int status;
1987 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1988 struct ocrdma_sge *sge = ext_rw + 1;
1989 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
1990
1991 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1992 if (status)
1993 return status;
e622f2f4
CH		 1994 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
1995 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
1996 ext_rw->lrkey = rdma_wr(wr)->rkey;
fe2caefc
PP		 1997 ext_rw->len = hdr->total_len;
1998 return 0;
1999}
2000
2001static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 2002 const struct ib_send_wr *wr)
fe2caefc
PP		 2003{
2004 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2005 struct ocrdma_sge *sge = ext_rw + 1;
2006 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2007 sizeof(struct ocrdma_hdr_wqe);
2008
2009 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2010 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2011 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2012 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2013
e622f2f4
CH		 2014 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2015 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2016 ext_rw->lrkey = rdma_wr(wr)->rkey;
fe2caefc
PP		 2017 ext_rw->len = hdr->total_len;
2018}
2019
7c33880c
NG		 2020static int get_encoded_page_size(int pg_sz)
2021{
2022 /* Max size is 256M 4096 << 16 */
2023 int i = 0;
2024 for (; i < 17; i++)
2025 if (pg_sz == (4096 << i))
2026 break;
2027 return i;
2028}
2029
2eaa1c56
SG		 2030static int ocrdma_build_reg(struct ocrdma_qp *qp,
2031 struct ocrdma_hdr_wqe *hdr,
f696bf6d 2032 const struct ib_reg_wr *wr)
2eaa1c56
SG		 2033{
2034 u64 fbo;
2035 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2036 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr);
2037 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
2038 struct ocrdma_pbe *pbe;
2039 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2040 int num_pbes = 0, i;
2041
2042 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2043
2044 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2045 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2046
2047 if (wr->access & IB_ACCESS_LOCAL_WRITE)
2048 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2049 if (wr->access & IB_ACCESS_REMOTE_WRITE)
2050 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2051 if (wr->access & IB_ACCESS_REMOTE_READ)
2052 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2053 hdr->lkey = wr->key;
2054 hdr->total_len = mr->ibmr.length;
2055
2056 fbo = mr->ibmr.iova - mr->pages[0];
2057
2058 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova);
2059 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff);
2060 fast_reg->fbo_hi = upper_32_bits(fbo);
2061 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2062 fast_reg->num_sges = mr->npages;
2063 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size);
2064
2065 pbe = pbl_tbl->va;
2066 for (i = 0; i < mr->npages; i++) {
2067 u64 buf_addr = mr->pages[i];
2068
2069 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2070 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2071 num_pbes += 1;
2072 pbe++;
2073
2074 /* if the pbl is full storing the pbes,
2075 * move to next pbl.
2076 */
2077 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) {
2078 pbl_tbl++;
2079 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2080 }
2081 }
2082
2083 return 0;
2084}
7c33880c 2085
fe2caefc
PP		 2086static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2087{
2df84fa8 2088 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
fe2caefc
PP		 2089
2090 iowrite32(val, qp->sq_db);
2091}
2092
d34ac5cd
BVA		 2093int ocrdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
2094 const struct ib_send_wr **bad_wr)
fe2caefc
PP		 2095{
2096 int status = 0;
2097 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2098 struct ocrdma_hdr_wqe *hdr;
2099 unsigned long flags;
2100
2101 spin_lock_irqsave(&qp->q_lock, flags);
2102 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2103 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2104 *bad_wr = wr;
fe2caefc
PP		 2105 return -EINVAL;
2106 }
2107
2108 while (wr) {
f252b5dc
MA		 2109 if (qp->qp_type == IB_QPT_UD &&
2110 (wr->opcode != IB_WR_SEND &&
2111 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2112 *bad_wr = wr;
2113 status = -EINVAL;
2114 break;
2115 }
fe2caefc
PP		 2116 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2117 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2118 *bad_wr = wr;
fe2caefc
PP		 2119 status = -ENOMEM;
2120 break;
2121 }
2122 hdr = ocrdma_hwq_head(&qp->sq);
2123 hdr->cw = 0;
2b51a9b9 2124 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2125 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2126 if (wr->send_flags & IB_SEND_FENCE)
2127 hdr->cw |=
2128 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2129 if (wr->send_flags & IB_SEND_SOLICITED)
2130 hdr->cw |=
2131 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2132 hdr->total_len = 0;
2133 switch (wr->opcode) {
2134 case IB_WR_SEND_WITH_IMM:
2135 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2136 hdr->immdt = ntohl(wr->ex.imm_data);
df561f66 2137 fallthrough;
fe2caefc
PP		 2138 case IB_WR_SEND:
2139 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2140 ocrdma_build_send(qp, hdr, wr);
2141 break;
2142 case IB_WR_SEND_WITH_INV:
2143 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2144 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2145 hdr->lkey = wr->ex.invalidate_rkey;
2146 status = ocrdma_build_send(qp, hdr, wr);
2147 break;
2148 case IB_WR_RDMA_WRITE_WITH_IMM:
2149 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2150 hdr->immdt = ntohl(wr->ex.imm_data);
df561f66 2151 fallthrough;
fe2caefc
PP		 2152 case IB_WR_RDMA_WRITE:
2153 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2154 status = ocrdma_build_write(qp, hdr, wr);
2155 break;
fe2caefc
PP		 2156 case IB_WR_RDMA_READ:
2157 ocrdma_build_read(qp, hdr, wr);
2158 break;
2159 case IB_WR_LOCAL_INV:
2160 hdr->cw |=
2161 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2162 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2163 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2164 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2165 hdr->lkey = wr->ex.invalidate_rkey;
2166 break;
2eaa1c56
SG		 2167 case IB_WR_REG_MR:
2168 status = ocrdma_build_reg(qp, hdr, reg_wr(wr));
2169 break;
fe2caefc
PP		 2170 default:
2171 status = -EINVAL;
2172 break;
2173 }
2174 if (status) {
2175 *bad_wr = wr;
2176 break;
2177 }
2b51a9b9 2178 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2179 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2180 else
2181 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2182 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2183 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2184 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2185 /* make sure wqe is written before adapter can access it */
2186 wmb();
2187 /* inform hw to start processing it */
2188 ocrdma_ring_sq_db(qp);
2189
2190 /* update pointer, counter for next wr */
2191 ocrdma_hwq_inc_head(&qp->sq);
2192 wr = wr->next;
2193 }
2194 spin_unlock_irqrestore(&qp->q_lock, flags);
2195 return status;
2196}
2197
2198static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2199{
2df84fa8 2200 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
fe2caefc 2201
2df84fa8 2202 iowrite32(val, qp->rq_db);
fe2caefc
PP		 2203}
2204
d34ac5cd
BVA		 2205static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe,
2206 const struct ib_recv_wr *wr, u16 tag)
fe2caefc
PP		 2207{
2208 u32 wqe_size = 0;
2209 struct ocrdma_sge *sge;
2210 if (wr->num_sge)
2211 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2212 else
2213 wqe_size = sizeof(*sge) + sizeof(*rqe);
2214
2215 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2216 OCRDMA_WQE_SIZE_SHIFT);
2217 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2218 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2219 rqe->total_len = 0;
2220 rqe->rsvd_tag = tag;
2221 sge = (struct ocrdma_sge *)(rqe + 1);
2222 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2223 ocrdma_cpu_to_le32(rqe, wqe_size);
2224}
2225
d34ac5cd
BVA		 2226int ocrdma_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
2227 const struct ib_recv_wr **bad_wr)
fe2caefc
PP		 2228{
2229 int status = 0;
2230 unsigned long flags;
2231 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2232 struct ocrdma_hdr_wqe *rqe;
2233
2234 spin_lock_irqsave(&qp->q_lock, flags);
2235 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2236 spin_unlock_irqrestore(&qp->q_lock, flags);
2237 *bad_wr = wr;
2238 return -EINVAL;
2239 }
2240 while (wr) {
2241 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2242 wr->num_sge > qp->rq.max_sges) {
2243 *bad_wr = wr;
2244 status = -ENOMEM;
2245 break;
2246 }
2247 rqe = ocrdma_hwq_head(&qp->rq);
2248 ocrdma_build_rqe(rqe, wr, 0);
2249
2250 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2251 /* make sure rqe is written before adapter can access it */
2252 wmb();
2253
2254 /* inform hw to start processing it */
2255 ocrdma_ring_rq_db(qp);
2256
2257 /* update pointer, counter for next wr */
2258 ocrdma_hwq_inc_head(&qp->rq);
2259 wr = wr->next;
2260 }
2261 spin_unlock_irqrestore(&qp->q_lock, flags);
2262 return status;
2263}
2264
2265/* cqe for srq's rqe can potentially arrive out of order.
2266 * index gives the entry in the shadow table where to store
2267 * the wr_id. tag/index is returned in cqe to reference back
2268 * for a given rqe.
2269 */
2270static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2271{
2272 int row = 0;
2273 int indx = 0;
2274
2275 for (row = 0; row < srq->bit_fields_len; row++) {
2276 if (srq->idx_bit_fields[row]) {
2277 indx = ffs(srq->idx_bit_fields[row]);
2278 indx = (row * 32) + (indx - 1);
db287ec5 2279 BUG_ON(indx >= srq->rq.max_cnt);
fe2caefc
PP		 2280 ocrdma_srq_toggle_bit(srq, indx);
2281 break;
2282 }
2283 }
2284
db287ec5 2285 BUG_ON(row == srq->bit_fields_len);
cf5788ad 2286 return indx + 1; /* Use from index 1 */
fe2caefc
PP		 2287}
2288
2289static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2290{
2291 u32 val = srq->rq.dbid | (1 << 16);
2292
2293 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2294}
2295
d34ac5cd
BVA		 2296int ocrdma_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
2297 const struct ib_recv_wr **bad_wr)
fe2caefc
PP		 2298{
2299 int status = 0;
2300 unsigned long flags;
2301 struct ocrdma_srq *srq;
2302 struct ocrdma_hdr_wqe *rqe;
2303 u16 tag;
2304
2305 srq = get_ocrdma_srq(ibsrq);
2306
2307 spin_lock_irqsave(&srq->q_lock, flags);
2308 while (wr) {
2309 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2310 wr->num_sge > srq->rq.max_sges) {
2311 status = -ENOMEM;
2312 *bad_wr = wr;
2313 break;
2314 }
2315 tag = ocrdma_srq_get_idx(srq);
2316 rqe = ocrdma_hwq_head(&srq->rq);
2317 ocrdma_build_rqe(rqe, wr, tag);
2318
2319 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2320 /* make sure rqe is written before adapter can perform DMA */
2321 wmb();
2322 /* inform hw to start processing it */
2323 ocrdma_ring_srq_db(srq);
2324 /* update pointer, counter for next wr */
2325 ocrdma_hwq_inc_head(&srq->rq);
2326 wr = wr->next;
2327 }
2328 spin_unlock_irqrestore(&srq->q_lock, flags);
2329 return status;
2330}
2331
2332static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2333{
f99b1649 2334 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2335
2336 switch (status) {
2337 case OCRDMA_CQE_GENERAL_ERR:
2338 ibwc_status = IB_WC_GENERAL_ERR;
2339 break;
2340 case OCRDMA_CQE_LOC_LEN_ERR:
2341 ibwc_status = IB_WC_LOC_LEN_ERR;
2342 break;
2343 case OCRDMA_CQE_LOC_QP_OP_ERR:
2344 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2345 break;
2346 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2347 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2348 break;
2349 case OCRDMA_CQE_LOC_PROT_ERR:
2350 ibwc_status = IB_WC_LOC_PROT_ERR;
2351 break;
2352 case OCRDMA_CQE_WR_FLUSH_ERR:
2353 ibwc_status = IB_WC_WR_FLUSH_ERR;
2354 break;
2355 case OCRDMA_CQE_MW_BIND_ERR:
2356 ibwc_status = IB_WC_MW_BIND_ERR;
2357 break;
2358 case OCRDMA_CQE_BAD_RESP_ERR:
2359 ibwc_status = IB_WC_BAD_RESP_ERR;
2360 break;
2361 case OCRDMA_CQE_LOC_ACCESS_ERR:
2362 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2363 break;
2364 case OCRDMA_CQE_REM_INV_REQ_ERR:
2365 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2366 break;
2367 case OCRDMA_CQE_REM_ACCESS_ERR:
2368 ibwc_status = IB_WC_REM_ACCESS_ERR;
2369 break;
2370 case OCRDMA_CQE_REM_OP_ERR:
2371 ibwc_status = IB_WC_REM_OP_ERR;
2372 break;
2373 case OCRDMA_CQE_RETRY_EXC_ERR:
2374 ibwc_status = IB_WC_RETRY_EXC_ERR;
2375 break;
2376 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2377 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2378 break;
2379 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2380 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2381 break;
2382 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2383 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2384 break;
2385 case OCRDMA_CQE_REM_ABORT_ERR:
2386 ibwc_status = IB_WC_REM_ABORT_ERR;
2387 break;
2388 case OCRDMA_CQE_INV_EECN_ERR:
2389 ibwc_status = IB_WC_INV_EECN_ERR;
2390 break;
2391 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2392 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2393 break;
2394 case OCRDMA_CQE_FATAL_ERR:
2395 ibwc_status = IB_WC_FATAL_ERR;
2396 break;
2397 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2398 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2399 break;
2400 default:
2401 ibwc_status = IB_WC_GENERAL_ERR;
2402 break;
2b50176d 2403 }
fe2caefc
PP		 2404 return ibwc_status;
2405}
2406
2407static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2408 u32 wqe_idx)
2409{
2410 struct ocrdma_hdr_wqe *hdr;
2411 struct ocrdma_sge *rw;
2412 int opcode;
2413
2414 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2415
2416 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2417 /* Undo the hdr->cw swap */
2418 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2419 switch (opcode) {
2420 case OCRDMA_WRITE:
2421 ibwc->opcode = IB_WC_RDMA_WRITE;
2422 break;
2423 case OCRDMA_READ:
2424 rw = (struct ocrdma_sge *)(hdr + 1);
2425 ibwc->opcode = IB_WC_RDMA_READ;
2426 ibwc->byte_len = rw->len;
2427 break;
2428 case OCRDMA_SEND:
2429 ibwc->opcode = IB_WC_SEND;
2430 break;
7c33880c 2431 case OCRDMA_FR_MR:
191cfed5 2432 ibwc->opcode = IB_WC_REG_MR;
7c33880c 2433 break;
fe2caefc
PP		 2434 case OCRDMA_LKEY_INV:
2435 ibwc->opcode = IB_WC_LOCAL_INV;
2436 break;
2437 default:
2438 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2439 pr_err("%s() invalid opcode received = 0x%x\n",
2440 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2441 break;
2b50176d 2442 }
fe2caefc
PP		 2443}
2444
2445static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2446 struct ocrdma_cqe *cqe)
2447{
2448 if (is_cqe_for_sq(cqe)) {
2449 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2450 cqe->flags_status_srcqpn) &
2451 ~OCRDMA_CQE_STATUS_MASK);
2452 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2453 cqe->flags_status_srcqpn) |
2454 (OCRDMA_CQE_WR_FLUSH_ERR <<
2455 OCRDMA_CQE_STATUS_SHIFT));
2456 } else {
2457 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2458 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2459 cqe->flags_status_srcqpn) &
2460 ~OCRDMA_CQE_UD_STATUS_MASK);
2461 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2462 cqe->flags_status_srcqpn) |
2463 (OCRDMA_CQE_WR_FLUSH_ERR <<
2464 OCRDMA_CQE_UD_STATUS_SHIFT));
2465 } else {
2466 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2467 cqe->flags_status_srcqpn) &
2468 ~OCRDMA_CQE_STATUS_MASK);
2469 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2470 cqe->flags_status_srcqpn) |
2471 (OCRDMA_CQE_WR_FLUSH_ERR <<
2472 OCRDMA_CQE_STATUS_SHIFT));
2473 }
2474 }
2475}
2476
2477static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2478 struct ocrdma_qp *qp, int status)
2479{
2480 bool expand = false;
2481
2482 ibwc->byte_len = 0;
2483 ibwc->qp = &qp->ibqp;
2484 ibwc->status = ocrdma_to_ibwc_err(status);
2485
2486 ocrdma_flush_qp(qp);
057729cb 2487 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2488
2489 /* if wqe/rqe pending for which cqe needs to be returned,
2490 * trigger inflating it.
2491 */
2492 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2493 expand = true;
2494 ocrdma_set_cqe_status_flushed(qp, cqe);
2495 }
2496 return expand;
2497}
2498
2499static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2500 struct ocrdma_qp *qp, int status)
2501{
2502 ibwc->opcode = IB_WC_RECV;
2503 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2504 ocrdma_hwq_inc_tail(&qp->rq);
2505
2506 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2507}
2508
2509static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2510 struct ocrdma_qp *qp, int status)
2511{
2512 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2513 ocrdma_hwq_inc_tail(&qp->sq);
2514
2515 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2516}
2517
2518
2519static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2520 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2521 bool *polled, bool *stop)
2522{
2523 bool expand;
ad56ebb4 2524 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 2525 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2526 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
ad56ebb4
SX		 2527 if (status < OCRDMA_MAX_CQE_ERR)
2528 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2529
2530 /* when hw sq is empty, but rq is not empty, so we continue
2531 * to keep the cqe in order to get the cq event again.
2532 */
2533 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2534 /* when cq for rq and sq is same, it is safe to return
2535 * flush cqe for RQEs.
2536 */
2537 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2538 *polled = true;
2539 status = OCRDMA_CQE_WR_FLUSH_ERR;
2540 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2541 } else {
2542 /* stop processing further cqe as this cqe is used for
2543 * triggering cq event on buddy cq of RQ.
2544 * When QP is destroyed, this cqe will be removed
2545 * from the cq's hardware q.
2546 */
2547 *polled = false;
2548 *stop = true;
2549 expand = false;
2550 }
a96ffb1d
SX		 2551 } else if (is_hw_sq_empty(qp)) {
2552 /* Do nothing */
2553 expand = false;
2554 *polled = false;
2555 *stop = false;
fe2caefc
PP		 2556 } else {
2557 *polled = true;
2558 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2559 }
2560 return expand;
2561}
2562
2563static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2564 struct ocrdma_cqe *cqe,
2565 struct ib_wc *ibwc, bool *polled)
2566{
2567 bool expand = false;
2568 int tail = qp->sq.tail;
2569 u32 wqe_idx;
2570
2571 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2572 *polled = false; /* WC cannot be consumed yet */
2573 } else {
2574 ibwc->status = IB_WC_SUCCESS;
2575 ibwc->wc_flags = 0;
2576 ibwc->qp = &qp->ibqp;
2577 ocrdma_update_wc(qp, ibwc, tail);
2578 *polled = true;
fe2caefc 2579 }
43a6b402
NG		 2580 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2581 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2582 if (tail != wqe_idx)
2583 expand = true; /* Coalesced CQE can't be consumed yet */
2584
fe2caefc
PP		 2585 ocrdma_hwq_inc_tail(&qp->sq);
2586 return expand;
2587}
2588
2589static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2590 struct ib_wc *ibwc, bool *polled, bool *stop)
2591{
2592 int status;
2593 bool expand;
2594
2595 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2596 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2597
2598 if (status == OCRDMA_CQE_SUCCESS)
2599 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2600 else
2601 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2602 return expand;
2603}
2604
6b062667
DS		 2605static int ocrdma_update_ud_rcqe(struct ocrdma_dev *dev, struct ib_wc *ibwc,
2606 struct ocrdma_cqe *cqe)
fe2caefc
PP		 2607{
2608 int status;
6b062667 2609 u16 hdr_type = 0;
fe2caefc
PP		 2610
2611 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2612 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2613 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2614 OCRDMA_CQE_SRCQP_MASK;
aff3ead9 2615 ibwc->pkey_index = 0;
fe2caefc
PP		 2616 ibwc->wc_flags = IB_WC_GRH;
2617 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
6b062667
DS		 2618 OCRDMA_CQE_UD_XFER_LEN_SHIFT) &
2619 OCRDMA_CQE_UD_XFER_LEN_MASK;
2620
2621 if (ocrdma_is_udp_encap_supported(dev)) {
2622 hdr_type = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2623 OCRDMA_CQE_UD_L3TYPE_SHIFT) &
2624 OCRDMA_CQE_UD_L3TYPE_MASK;
2625 ibwc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE;
2626 ibwc->network_hdr_type = hdr_type;
2627 }
2628
fe2caefc
PP		 2629 return status;
2630}
2631
2632static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2633 struct ocrdma_cqe *cqe,
2634 struct ocrdma_qp *qp)
2635{
2636 unsigned long flags;
2637 struct ocrdma_srq *srq;
2638 u32 wqe_idx;
2639
2640 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402 2641 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
cf5788ad 2642 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
db287ec5 2643 BUG_ON(wqe_idx < 1);
cf5788ad 2644
fe2caefc
PP		 2645 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2646 spin_lock_irqsave(&srq->q_lock, flags);
cf5788ad 2647 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
fe2caefc
PP		 2648 spin_unlock_irqrestore(&srq->q_lock, flags);
2649 ocrdma_hwq_inc_tail(&srq->rq);
2650}
2651
2652static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2653 struct ib_wc *ibwc, bool *polled, bool *stop,
2654 int status)
2655{
2656 bool expand;
ad56ebb4
SX		 2657 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2658
2659 if (status < OCRDMA_MAX_CQE_ERR)
2660 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2661
2662 /* when hw_rq is empty, but wq is not empty, so continue
2663 * to keep the cqe to get the cq event again.
2664 */
2665 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2666 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2667 *polled = true;
2668 status = OCRDMA_CQE_WR_FLUSH_ERR;
2669 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2670 } else {
2671 *polled = false;
2672 *stop = true;
2673 expand = false;
2674 }
a96ffb1d
SX		 2675 } else if (is_hw_rq_empty(qp)) {
2676 /* Do nothing */
2677 expand = false;
2678 *polled = false;
2679 *stop = false;
a3698a9b
PP		 2680 } else {
2681 *polled = true;
fe2caefc 2682 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2683 }
fe2caefc
PP		 2684 return expand;
2685}
2686
2687static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2688 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2689{
6b062667
DS		 2690 struct ocrdma_dev *dev;
2691
2692 dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 2693 ibwc->opcode = IB_WC_RECV;
2694 ibwc->qp = &qp->ibqp;
2695 ibwc->status = IB_WC_SUCCESS;
2696
2697 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
6b062667 2698 ocrdma_update_ud_rcqe(dev, ibwc, cqe);
fe2caefc
PP		 2699 else
2700 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2701
2702 if (is_cqe_imm(cqe)) {
2703 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2704 ibwc->wc_flags |= IB_WC_WITH_IMM;
2705 } else if (is_cqe_wr_imm(cqe)) {
2706 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2707 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2708 ibwc->wc_flags |= IB_WC_WITH_IMM;
2709 } else if (is_cqe_invalidated(cqe)) {
2710 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2711 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2712 }
f99b1649 2713 if (qp->ibqp.srq) {
fe2caefc 2714 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2715 } else {
fe2caefc
PP		 2716 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2717 ocrdma_hwq_inc_tail(&qp->rq);
2718 }
2719}
2720
2721static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2722 struct ib_wc *ibwc, bool *polled, bool *stop)
2723{
2724 int status;
2725 bool expand = false;
2726
2727 ibwc->wc_flags = 0;
f99b1649 2728 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2729 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2730 OCRDMA_CQE_UD_STATUS_MASK) >>
2731 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2732 } else {
fe2caefc
PP		 2733 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2734 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2735 }
fe2caefc
PP		 2736
2737 if (status == OCRDMA_CQE_SUCCESS) {
2738 *polled = true;
2739 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2740 } else {
2741 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2742 status);
2743 }
2744 return expand;
2745}
2746
2747static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2748 u16 cur_getp)
2749{
2750 if (cq->phase_change) {
2751 if (cur_getp == 0)
2752 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2753 } else {
fe2caefc
PP		 2754 /* clear valid bit */
2755 cqe->flags_status_srcqpn = 0;
f99b1649 2756 }
fe2caefc
PP		 2757}
2758
2759static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2760 struct ib_wc *ibwc)
2761{
2762 u16 qpn = 0;
2763 int i = 0;
2764 bool expand = false;
2765 int polled_hw_cqes = 0;
2766 struct ocrdma_qp *qp = NULL;
1afc0454 2767 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2768 struct ocrdma_cqe *cqe;
2769 u16 cur_getp; bool polled = false; bool stop = false;
2770
2771 cur_getp = cq->getp;
2772 while (num_entries) {
2773 cqe = cq->va + cur_getp;
2774 /* check whether valid cqe or not */
2775 if (!is_cqe_valid(cq, cqe))
2776 break;
2777 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2778 /* ignore discarded cqe */
2779 if (qpn == 0)
2780 goto skip_cqe;
2781 qp = dev->qp_tbl[qpn];
2782 BUG_ON(qp == NULL);
2783
2784 if (is_cqe_for_sq(cqe)) {
2785 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2786 &stop);
2787 } else {
2788 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2789 &stop);
2790 }
2791 if (expand)
2792 goto expand_cqe;
2793 if (stop)
2794 goto stop_cqe;
2795 /* clear qpn to avoid duplicate processing by discard_cqe() */
2796 cqe->cmn.qpn = 0;
2797skip_cqe:
2798 polled_hw_cqes += 1;
2799 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2800 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2801expand_cqe:
2802 if (polled) {
2803 num_entries -= 1;
2804 i += 1;
2805 ibwc = ibwc + 1;
2806 polled = false;
2807 }
2808 }
2809stop_cqe:
2810 cq->getp = cur_getp;
b41f7852
DS		 2811
2812 if (polled_hw_cqes)
2813 ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes);
ea617626 2814
fe2caefc
PP		 2815 return i;
2816}
2817
2818/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2819static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2820 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2821{
2822 int err_cqes = 0;
2823
2824 while (num_entries) {
2825 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2826 break;
2827 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2828 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2829 ocrdma_hwq_inc_tail(&qp->sq);
2830 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2831 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2832 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2833 } else {
fe2caefc 2834 return err_cqes;
f99b1649 2835 }
fe2caefc
PP		 2836 ibwc->byte_len = 0;
2837 ibwc->status = IB_WC_WR_FLUSH_ERR;
2838 ibwc = ibwc + 1;
2839 err_cqes += 1;
2840 num_entries -= 1;
2841 }
2842 return err_cqes;
2843}
2844
2845int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2846{
2847 int cqes_to_poll = num_entries;
1afc0454
NG		 2848 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2849 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2850 int num_os_cqe = 0, err_cqes = 0;
2851 struct ocrdma_qp *qp;
1afc0454 2852 unsigned long flags;
fe2caefc
PP		 2853
2854 /* poll cqes from adapter CQ */
2855 spin_lock_irqsave(&cq->cq_lock, flags);
2856 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2857 spin_unlock_irqrestore(&cq->cq_lock, flags);
2858 cqes_to_poll -= num_os_cqe;
2859
2860 if (cqes_to_poll) {
2861 wc = wc + num_os_cqe;
2862 /* adapter returns single error cqe when qp moves to
2863 * error state. So insert error cqes with wc_status as
2864 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2865 * respectively which uses this CQ.
2866 */
2867 spin_lock_irqsave(&dev->flush_q_lock, flags);
2868 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2869 if (cqes_to_poll == 0)
2870 break;
2871 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2872 cqes_to_poll -= err_cqes;
2873 num_os_cqe += err_cqes;
2874 wc = wc + err_cqes;
2875 }
2876 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2877 }
2878 return num_os_cqe;
2879}
2880
2881int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2882{
1afc0454
NG		 2883 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2884 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2885 u16 cq_id;
1afc0454 2886 unsigned long flags;
ea617626 2887 bool arm_needed = false, sol_needed = false;
fe2caefc 2888
fe2caefc 2889 cq_id = cq->id;
fe2caefc
PP		 2890
2891 spin_lock_irqsave(&cq->cq_lock, flags);
2892 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2893 arm_needed = true;
fe2caefc 2894 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2895 sol_needed = true;
fe2caefc 2896
b41f7852 2897 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
fe2caefc 2898 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2899
fe2caefc
PP		 2900 return 0;
2901}
7c33880c 2902
c4367a26 2903struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type,
42a3b153 2904 u32 max_num_sg)
7c33880c
NG		 2905{
2906 int status;
2907 struct ocrdma_mr *mr;
2908 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2909 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2910
cacb7d59
SG		 2911 if (mr_type != IB_MR_TYPE_MEM_REG)
2912 return ERR_PTR(-EINVAL);
2913
2914 if (max_num_sg > dev->attr.max_pages_per_frmr)
7c33880c
NG		 2915 return ERR_PTR(-EINVAL);
2916
2917 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2918 if (!mr)
2919 return ERR_PTR(-ENOMEM);
2920
2eaa1c56
SG		 2921 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
2922 if (!mr->pages) {
2923 status = -ENOMEM;
2924 goto pl_err;
2925 }
2926
cacb7d59 2927 status = ocrdma_get_pbl_info(dev, mr, max_num_sg);
7c33880c
NG		 2928 if (status)
2929 goto pbl_err;
2930 mr->hwmr.fr_mr = 1;
2931 mr->hwmr.remote_rd = 0;
2932 mr->hwmr.remote_wr = 0;
2933 mr->hwmr.local_rd = 0;
2934 mr->hwmr.local_wr = 0;
2935 mr->hwmr.mw_bind = 0;
2936 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2937 if (status)
2938 goto pbl_err;
2939 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2940 if (status)
2941 goto mbx_err;
2942 mr->ibmr.rkey = mr->hwmr.lkey;
2943 mr->ibmr.lkey = mr->hwmr.lkey;
7a1e89d8
RD		 2944 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
2945 (unsigned long) mr;
7c33880c
NG		 2946 return &mr->ibmr;
2947mbx_err:
2948 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
2949pbl_err:
2eaa1c56
SG		 2950 kfree(mr->pages);
2951pl_err:
7c33880c
NG		 2952 kfree(mr);
2953 return ERR_PTR(-ENOMEM);
2954}
2955
2eaa1c56
SG		 2956static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr)
2957{
2958 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
2959
2960 if (unlikely(mr->npages == mr->hwmr.num_pbes))
2961 return -ENOMEM;
2962
2963 mr->pages[mr->npages++] = addr;
2964
2965 return 0;
2966}
2967
ff2ba993 2968int ocrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
9aa8b321 2969 unsigned int *sg_offset)
2eaa1c56
SG		 2970{
2971 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
2972
2973 mr->npages = 0;
2974
ff2ba993 2975 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, ocrdma_set_page);
2eaa1c56 2976}
Linux 6.x block layer and io_uring tree(s)