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IB/sa: Error handling thinko fix
[linux-block.git] / drivers / infiniband / hw / mthca / mthca_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
cd4e8fb4 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
2a1d9b7f 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
1da177e4
LT		 5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
35 */
36
1da177e4
LT		 37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/errno.h>
40#include <linux/pci.h>
41#include <linux/interrupt.h>
42
43#include "mthca_dev.h"
44#include "mthca_config_reg.h"
45#include "mthca_cmd.h"
46#include "mthca_profile.h"
47#include "mthca_memfree.h"
48
49MODULE_AUTHOR("Roland Dreier");
50MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
51MODULE_LICENSE("Dual BSD/GPL");
52MODULE_VERSION(DRV_VERSION);
53
227c939b
RD		 54#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
55
56int mthca_debug_level = 0;
57module_param_named(debug_level, mthca_debug_level, int, 0644);
58MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
59
60#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
61
1da177e4
LT		 62#ifdef CONFIG_PCI_MSI
63
017aadc4 64static int msi_x = 1;
1da177e4
LT		 65module_param(msi_x, int, 0444);
66MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
67
68static int msi = 0;
69module_param(msi, int, 0444);
f6be6fbe 70MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero (deprecated, use MSI-X instead)");
1da177e4
LT		 71
72#else /* CONFIG_PCI_MSI */
73
74#define msi_x (0)
75#define msi (0)
76
77#endif /* CONFIG_PCI_MSI */
78
abf45dbb
MT		 79static int tune_pci = 0;
80module_param(tune_pci, int, 0444);
81MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
82
0b0df6f2 83DEFINE_MUTEX(mthca_device_mutex);
b3b30f5e 84
82da703e
LA		 85#define MTHCA_DEFAULT_NUM_QP (1 << 16)
86#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
87#define MTHCA_DEFAULT_NUM_CQ (1 << 16)
88#define MTHCA_DEFAULT_NUM_MCG (1 << 13)
89#define MTHCA_DEFAULT_NUM_MPT (1 << 17)
90#define MTHCA_DEFAULT_NUM_MTT (1 << 20)
91#define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
92#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
93#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
94
95static struct mthca_profile hca_profile = {
96 .num_qp = MTHCA_DEFAULT_NUM_QP,
97 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
98 .num_cq = MTHCA_DEFAULT_NUM_CQ,
99 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
100 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
101 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
102 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
103 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
104 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
105};
106
107module_param_named(num_qp, hca_profile.num_qp, int, 0444);
108MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
109
110module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
111MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
112
113module_param_named(num_cq, hca_profile.num_cq, int, 0444);
114MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
115
116module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
117MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
118
119module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
120MODULE_PARM_DESC(num_mpt,
121 "maximum number of memory protection table entries per HCA");
122
123module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
124MODULE_PARM_DESC(num_mtt,
125 "maximum number of memory translation table segments per HCA");
126
127module_param_named(num_udav, hca_profile.num_udav, int, 0444);
128MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
129
130module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
131MODULE_PARM_DESC(fmr_reserved_mtts,
132 "number of memory translation table segments reserved for FMR");
133
1da177e4 134static const char mthca_version[] __devinitdata =
177214af 135 DRV_NAME ": Mellanox InfiniBand HCA driver v"
1da177e4
LT		 136 DRV_VERSION " (" DRV_RELDATE ")\n";
137
f4f3d0f0 138static int mthca_tune_pci(struct mthca_dev *mdev)
1da177e4
LT		 139{
140 int cap;
141 u16 val;
142
abf45dbb
MT		 143 if (!tune_pci)
144 return 0;
145
1da177e4
LT		 146 /* First try to max out Read Byte Count */
147 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
148 if (cap) {
149 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
150 mthca_err(mdev, "Couldn't read PCI-X command register, "
151 "aborting.\n");
152 return -ENODEV;
153 }
154 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
155 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
156 mthca_err(mdev, "Couldn't write PCI-X command register, "
157 "aborting.\n");
158 return -ENODEV;
159 }
68a3c212 160 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
1da177e4
LT		 161 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
162
163 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
164 if (cap) {
165 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
166 mthca_err(mdev, "Couldn't read PCI Express device control "
167 "register, aborting.\n");
168 return -ENODEV;
169 }
170 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
171 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
172 mthca_err(mdev, "Couldn't write PCI Express device control "
173 "register, aborting.\n");
174 return -ENODEV;
175 }
68a3c212 176 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
1da177e4
LT		 177 mthca_info(mdev, "No PCI Express capability, "
178 "not setting Max Read Request Size.\n");
179
180 return 0;
181}
182
f4f3d0f0 183static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
1da177e4
LT		 184{
185 int err;
186 u8 status;
187
188 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
189 if (err) {
190 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
191 return err;
192 }
193 if (status) {
194 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
195 "aborting.\n", status);
196 return -EINVAL;
197 }
198 if (dev_lim->min_page_sz > PAGE_SIZE) {
199 mthca_err(mdev, "HCA minimum page size of %d bigger than "
200 "kernel PAGE_SIZE of %ld, aborting.\n",
201 dev_lim->min_page_sz, PAGE_SIZE);
202 return -ENODEV;
203 }
204 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
205 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
206 "aborting.\n",
207 dev_lim->num_ports, MTHCA_MAX_PORTS);
208 return -ENODEV;
209 }
210
cbd2981a
MT		 211 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
212 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
e29419ff
GKH		 213 "PCI resource 2 size of 0x%llx, aborting.\n",
214 dev_lim->uar_size,
215 (unsigned long long)pci_resource_len(mdev->pdev, 2));
cbd2981a
MT		 216 return -ENODEV;
217 }
218
1da177e4
LT		 219 mdev->limits.num_ports = dev_lim->num_ports;
220 mdev->limits.vl_cap = dev_lim->max_vl;
221 mdev->limits.mtu_cap = dev_lim->max_mtu;
222 mdev->limits.gid_table_len = dev_lim->max_gids;
223 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
224 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
225 mdev->limits.max_sg = dev_lim->max_sg;
efaae8f7
JM		 226 mdev->limits.max_wqes = dev_lim->max_qp_sz;
227 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
1da177e4 228 mdev->limits.reserved_qps = dev_lim->reserved_qps;
efaae8f7 229 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
1da177e4
LT		 230 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
231 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
77369ed3 232 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
59fef3b1 233 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
efaae8f7
JM		 234 /*
235 * Subtract 1 from the limit because we need to allocate a
236 * spare CQE so the HCA HW can tell the difference between an
237 * empty CQ and a full CQ.
238 */
239 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
1da177e4
LT		 240 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
241 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
242 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
243 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
244 mdev->limits.reserved_uars = dev_lim->reserved_uars;
245 mdev->limits.reserved_pds = dev_lim->reserved_pds;
da6561c2 246 mdev->limits.port_width_cap = dev_lim->max_port_width;
0f69ce1e 247 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
33033b79 248 mdev->limits.flags = dev_lim->flags;
bf6a9e31
JM		 249 /*
250 * For old FW that doesn't return static rate support, use a
251 * value of 0x3 (only static rate values of 0 or 1 are handled),
252 * except on Sinai, where even old FW can handle static rate
253 * values of 2 and 3.
254 */
255 if (dev_lim->stat_rate_support)
256 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
257 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
258 mdev->limits.stat_rate_support = 0xf;
259 else
260 mdev->limits.stat_rate_support = 0x3;
1da177e4
LT		 261
262 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
263 May be doable since hardware supports it for SRQ.
264
265 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
266
267 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
268 supported by driver. */
269 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
270 IB_DEVICE_PORT_ACTIVE_EVENT |
271 IB_DEVICE_SYS_IMAGE_GUID |
272 IB_DEVICE_RC_RNR_NAK_GEN;
273
274 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
275 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
276
277 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
278 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
279
280 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
281 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
282
283 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
284 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
285
286 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
287 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
288
289 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
290 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
291
292 return 0;
293}
294
f4f3d0f0 295static int mthca_init_tavor(struct mthca_dev *mdev)
1da177e4
LT		 296{
297 u8 status;
298 int err;
299 struct mthca_dev_lim dev_lim;
300 struct mthca_profile profile;
301 struct mthca_init_hca_param init_hca;
1da177e4
LT		 302
303 err = mthca_SYS_EN(mdev, &status);
304 if (err) {
305 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
306 return err;
307 }
308 if (status) {
309 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
310 "aborting.\n", status);
311 return -EINVAL;
312 }
313
314 err = mthca_QUERY_FW(mdev, &status);
315 if (err) {
316 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
317 goto err_disable;
318 }
319 if (status) {
320 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
321 "aborting.\n", status);
322 err = -EINVAL;
323 goto err_disable;
324 }
325 err = mthca_QUERY_DDR(mdev, &status);
326 if (err) {
327 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
328 goto err_disable;
329 }
330 if (status) {
331 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
332 "aborting.\n", status);
333 err = -EINVAL;
334 goto err_disable;
335 }
336
337 err = mthca_dev_lim(mdev, &dev_lim);
aa2f9367
JM		 338 if (err) {
339 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
340 goto err_disable;
341 }
1da177e4 342
82da703e 343 profile = hca_profile;
1da177e4
LT		 344 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
345 profile.uarc_size = 0;
ec34a922
RD		 346 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
347 profile.num_srq = dev_lim.max_srqs;
1da177e4
LT		 348
349 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
350 if (err < 0)
351 goto err_disable;
352
353 err = mthca_INIT_HCA(mdev, &init_hca, &status);
354 if (err) {
355 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
356 goto err_disable;
357 }
358 if (status) {
359 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
360 "aborting.\n", status);
361 err = -EINVAL;
362 goto err_disable;
363 }
364
1da177e4
LT		 365 return 0;
366
1da177e4
LT		 367err_disable:
368 mthca_SYS_DIS(mdev, &status);
369
370 return err;
371}
372
f4f3d0f0 373static int mthca_load_fw(struct mthca_dev *mdev)
1da177e4
LT		 374{
375 u8 status;
376 int err;
377
378 /* FIXME: use HCA-attached memory for FW if present */
379
380 mdev->fw.arbel.fw_icm =
381 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
391e4dea 382 GFP_HIGHUSER | __GFP_NOWARN, 0);
1da177e4
LT		 383 if (!mdev->fw.arbel.fw_icm) {
384 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
385 return -ENOMEM;
386 }
387
388 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
389 if (err) {
390 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
391 goto err_free;
392 }
393 if (status) {
394 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
395 err = -EINVAL;
396 goto err_free;
397 }
398 err = mthca_RUN_FW(mdev, &status);
399 if (err) {
400 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
401 goto err_unmap_fa;
402 }
403 if (status) {
404 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
405 err = -EINVAL;
406 goto err_unmap_fa;
407 }
408
409 return 0;
410
411err_unmap_fa:
412 mthca_UNMAP_FA(mdev, &status);
413
414err_free:
391e4dea 415 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
1da177e4
LT		 416 return err;
417}
418
f4f3d0f0
RD		 419static int mthca_init_icm(struct mthca_dev *mdev,
420 struct mthca_dev_lim *dev_lim,
421 struct mthca_init_hca_param *init_hca,
422 u64 icm_size)
1da177e4
LT		 423{
424 u64 aux_pages;
425 u8 status;
426 int err;
427
428 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
429 if (err) {
430 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
431 return err;
432 }
433 if (status) {
434 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
435 "aborting.\n", status);
436 return -EINVAL;
437 }
438
439 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
440 (unsigned long long) icm_size >> 10,
441 (unsigned long long) aux_pages << 2);
442
443 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
391e4dea 444 GFP_HIGHUSER | __GFP_NOWARN, 0);
1da177e4
LT		 445 if (!mdev->fw.arbel.aux_icm) {
446 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
447 return -ENOMEM;
448 }
449
450 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
451 if (err) {
452 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
453 goto err_free_aux;
454 }
455 if (status) {
456 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
457 err = -EINVAL;
458 goto err_free_aux;
459 }
460
461 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
462 if (err) {
463 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
464 goto err_unmap_aux;
465 }
466
1d1f19cf
MT		 467 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
468 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
469 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
470
1da177e4 471 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
44ea6687 472 MTHCA_MTT_SEG_SIZE,
1da177e4 473 mdev->limits.num_mtt_segs,
391e4dea
MT		 474 mdev->limits.reserved_mtts,
475 1, 0);
1da177e4
LT		 476 if (!mdev->mr_table.mtt_table) {
477 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
478 err = -ENOMEM;
479 goto err_unmap_eq;
480 }
481
482 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
483 dev_lim->mpt_entry_sz,
484 mdev->limits.num_mpts,
391e4dea
MT		 485 mdev->limits.reserved_mrws,
486 1, 1);
1da177e4
LT		 487 if (!mdev->mr_table.mpt_table) {
488 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
489 err = -ENOMEM;
490 goto err_unmap_mtt;
491 }
492
493 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
494 dev_lim->qpc_entry_sz,
495 mdev->limits.num_qps,
391e4dea
MT		 496 mdev->limits.reserved_qps,
497 0, 0);
1da177e4
LT		 498 if (!mdev->qp_table.qp_table) {
499 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
500 err = -ENOMEM;
501 goto err_unmap_mpt;
502 }
503
504 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
505 dev_lim->eqpc_entry_sz,
506 mdev->limits.num_qps,
391e4dea
MT		 507 mdev->limits.reserved_qps,
508 0, 0);
1da177e4
LT		 509 if (!mdev->qp_table.eqp_table) {
510 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
511 err = -ENOMEM;
512 goto err_unmap_qp;
513 }
514
08aeb14e
RD		 515 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
516 MTHCA_RDB_ENTRY_SIZE,
517 mdev->limits.num_qps <<
391e4dea 518 mdev->qp_table.rdb_shift, 0,
08aeb14e
RD		 519 0, 0);
520 if (!mdev->qp_table.rdb_table) {
521 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
522 err = -ENOMEM;
19272d43 523 goto err_unmap_eqp;
08aeb14e
RD		 524 }
525
526 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
ec34a922
RD		 527 dev_lim->cqc_entry_sz,
528 mdev->limits.num_cqs,
391e4dea
MT		 529 mdev->limits.reserved_cqs,
530 0, 0);
1da177e4
LT		 531 if (!mdev->cq_table.table) {
532 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
533 err = -ENOMEM;
08aeb14e 534 goto err_unmap_rdb;
1da177e4
LT		 535 }
536
ec34a922
RD		 537 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
538 mdev->srq_table.table =
539 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
540 dev_lim->srq_entry_sz,
541 mdev->limits.num_srqs,
391e4dea
MT		 542 mdev->limits.reserved_srqs,
543 0, 0);
ec34a922
RD		 544 if (!mdev->srq_table.table) {
545 mthca_err(mdev, "Failed to map SRQ context memory, "
546 "aborting.\n");
547 err = -ENOMEM;
548 goto err_unmap_cq;
549 }
550 }
551
1da177e4
LT		 552 /*
553 * It's not strictly required, but for simplicity just map the
554 * whole multicast group table now. The table isn't very big
555 * and it's a lot easier than trying to track ref counts.
556 */
557 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
558 MTHCA_MGM_ENTRY_SIZE,
559 mdev->limits.num_mgms +
560 mdev->limits.num_amgms,
561 mdev->limits.num_mgms +
562 mdev->limits.num_amgms,
391e4dea 563 0, 0);
1da177e4
LT		 564 if (!mdev->mcg_table.table) {
565 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
566 err = -ENOMEM;
ec34a922 567 goto err_unmap_srq;
1da177e4
LT		 568 }
569
570 return 0;
571
ec34a922
RD		 572err_unmap_srq:
573 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
574 mthca_free_icm_table(mdev, mdev->srq_table.table);
575
1da177e4
LT		 576err_unmap_cq:
577 mthca_free_icm_table(mdev, mdev->cq_table.table);
578
08aeb14e
RD		 579err_unmap_rdb:
580 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
581
1da177e4
LT		 582err_unmap_eqp:
583 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
584
585err_unmap_qp:
586 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
587
588err_unmap_mpt:
589 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
590
591err_unmap_mtt:
592 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
593
594err_unmap_eq:
595 mthca_unmap_eq_icm(mdev);
596
597err_unmap_aux:
598 mthca_UNMAP_ICM_AUX(mdev, &status);
599
600err_free_aux:
391e4dea 601 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
1da177e4
LT		 602
603 return err;
604}
605
aba7a22f
MT		 606static void mthca_free_icms(struct mthca_dev *mdev)
607{
608 u8 status;
609
610 mthca_free_icm_table(mdev, mdev->mcg_table.table);
611 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
612 mthca_free_icm_table(mdev, mdev->srq_table.table);
613 mthca_free_icm_table(mdev, mdev->cq_table.table);
614 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
615 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
616 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
617 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
618 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
619 mthca_unmap_eq_icm(mdev);
620
621 mthca_UNMAP_ICM_AUX(mdev, &status);
391e4dea 622 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
aba7a22f
MT		 623}
624
f4f3d0f0 625static int mthca_init_arbel(struct mthca_dev *mdev)
1da177e4
LT		 626{
627 struct mthca_dev_lim dev_lim;
628 struct mthca_profile profile;
629 struct mthca_init_hca_param init_hca;
1da177e4
LT		 630 u64 icm_size;
631 u8 status;
632 int err;
633
634 err = mthca_QUERY_FW(mdev, &status);
635 if (err) {
636 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
637 return err;
638 }
639 if (status) {
640 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
641 "aborting.\n", status);
642 return -EINVAL;
643 }
644
645 err = mthca_ENABLE_LAM(mdev, &status);
646 if (err) {
647 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
648 return err;
649 }
650 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
651 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
652 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
653 } else if (status) {
654 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
655 "aborting.\n", status);
656 return -EINVAL;
657 }
658
659 err = mthca_load_fw(mdev);
660 if (err) {
661 mthca_err(mdev, "Failed to start FW, aborting.\n");
662 goto err_disable;
663 }
664
665 err = mthca_dev_lim(mdev, &dev_lim);
666 if (err) {
667 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
668 goto err_stop_fw;
669 }
670
82da703e 671 profile = hca_profile;
1da177e4
LT		 672 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
673 profile.num_udav = 0;
ec34a922
RD		 674 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
675 profile.num_srq = dev_lim.max_srqs;
1da177e4
LT		 676
677 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
678 if ((int) icm_size < 0) {
679 err = icm_size;
680 goto err_stop_fw;
681 }
682
683 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
684 if (err)
685 goto err_stop_fw;
686
687 err = mthca_INIT_HCA(mdev, &init_hca, &status);
688 if (err) {
689 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
690 goto err_free_icm;
691 }
692 if (status) {
693 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
694 "aborting.\n", status);
695 err = -EINVAL;
696 goto err_free_icm;
697 }
698
1da177e4
LT		 699 return 0;
700
701err_free_icm:
aba7a22f 702 mthca_free_icms(mdev);
1da177e4
LT		 703
704err_stop_fw:
705 mthca_UNMAP_FA(mdev, &status);
391e4dea 706 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
1da177e4
LT		 707
708err_disable:
709 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
710 mthca_DISABLE_LAM(mdev, &status);
711
712 return err;
713}
714
2e8b981c
MT		 715static void mthca_close_hca(struct mthca_dev *mdev)
716{
717 u8 status;
718
719 mthca_CLOSE_HCA(mdev, 0, &status);
720
721 if (mthca_is_memfree(mdev)) {
aba7a22f 722 mthca_free_icms(mdev);
2e8b981c
MT		 723
724 mthca_UNMAP_FA(mdev, &status);
391e4dea 725 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
2e8b981c
MT		 726
727 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
728 mthca_DISABLE_LAM(mdev, &status);
729 } else
730 mthca_SYS_DIS(mdev, &status);
731}
732
f4f3d0f0 733static int mthca_init_hca(struct mthca_dev *mdev)
1da177e4 734{
2e8b981c
MT		 735 u8 status;
736 int err;
737 struct mthca_adapter adapter;
738
d10ddbf6 739 if (mthca_is_memfree(mdev))
2e8b981c 740 err = mthca_init_arbel(mdev);
1da177e4 741 else
2e8b981c
MT		 742 err = mthca_init_tavor(mdev);
743
744 if (err)
745 return err;
746
747 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
748 if (err) {
749 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
750 goto err_close;
751 }
752 if (status) {
753 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
754 "aborting.\n", status);
755 err = -EINVAL;
756 goto err_close;
757 }
758
759 mdev->eq_table.inta_pin = adapter.inta_pin;
760 mdev->rev_id = adapter.revision_id;
761 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
762
763 return 0;
764
765err_close:
766 mthca_close_hca(mdev);
767 return err;
1da177e4
LT		 768}
769
f4f3d0f0 770static int mthca_setup_hca(struct mthca_dev *dev)
1da177e4
LT		 771{
772 int err;
773 u8 status;
774
775 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
776
777 err = mthca_init_uar_table(dev);
778 if (err) {
779 mthca_err(dev, "Failed to initialize "
780 "user access region table, aborting.\n");
781 return err;
782 }
783
784 err = mthca_uar_alloc(dev, &dev->driver_uar);
785 if (err) {
786 mthca_err(dev, "Failed to allocate driver access region, "
787 "aborting.\n");
788 goto err_uar_table_free;
789 }
790
791 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
792 if (!dev->kar) {
793 mthca_err(dev, "Couldn't map kernel access region, "
794 "aborting.\n");
795 err = -ENOMEM;
796 goto err_uar_free;
797 }
798
799 err = mthca_init_pd_table(dev);
800 if (err) {
801 mthca_err(dev, "Failed to initialize "
802 "protection domain table, aborting.\n");
803 goto err_kar_unmap;
804 }
805
806 err = mthca_init_mr_table(dev);
807 if (err) {
808 mthca_err(dev, "Failed to initialize "
809 "memory region table, aborting.\n");
810 goto err_pd_table_free;
811 }
812
99264c1e 813 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
1da177e4
LT		 814 if (err) {
815 mthca_err(dev, "Failed to create driver PD, "
816 "aborting.\n");
817 goto err_mr_table_free;
818 }
819
820 err = mthca_init_eq_table(dev);
821 if (err) {
822 mthca_err(dev, "Failed to initialize "
823 "event queue table, aborting.\n");
824 goto err_pd_free;
825 }
826
827 err = mthca_cmd_use_events(dev);
828 if (err) {
829 mthca_err(dev, "Failed to switch to event-driven "
830 "firmware commands, aborting.\n");
831 goto err_eq_table_free;
832 }
833
834 err = mthca_NOP(dev, &status);
835 if (err || status) {
017aadc4
MT		 836 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) {
837 mthca_warn(dev, "NOP command failed to generate interrupt "
838 "(IRQ %d).\n",
839 dev->mthca_flags & MTHCA_FLAG_MSI_X ?
840 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
841 dev->pdev->irq);
842 mthca_warn(dev, "Trying again with MSI/MSI-X disabled.\n");
843 } else {
844 mthca_err(dev, "NOP command failed to generate interrupt "
845 "(IRQ %d), aborting.\n",
846 dev->pdev->irq);
1da177e4 847 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
017aadc4 848 }
1da177e4
LT		 849
850 goto err_cmd_poll;
851 }
852
853 mthca_dbg(dev, "NOP command IRQ test passed\n");
854
855 err = mthca_init_cq_table(dev);
856 if (err) {
857 mthca_err(dev, "Failed to initialize "
858 "completion queue table, aborting.\n");
859 goto err_cmd_poll;
860 }
861
ec34a922
RD		 862 err = mthca_init_srq_table(dev);
863 if (err) {
864 mthca_err(dev, "Failed to initialize "
865 "shared receive queue table, aborting.\n");
866 goto err_cq_table_free;
867 }
868
1da177e4
LT		 869 err = mthca_init_qp_table(dev);
870 if (err) {
871 mthca_err(dev, "Failed to initialize "
872 "queue pair table, aborting.\n");
ec34a922 873 goto err_srq_table_free;
1da177e4
LT		 874 }
875
876 err = mthca_init_av_table(dev);
877 if (err) {
878 mthca_err(dev, "Failed to initialize "
879 "address vector table, aborting.\n");
880 goto err_qp_table_free;
881 }
882
883 err = mthca_init_mcg_table(dev);
884 if (err) {
885 mthca_err(dev, "Failed to initialize "
886 "multicast group table, aborting.\n");
887 goto err_av_table_free;
888 }
889
890 return 0;
891
892err_av_table_free:
893 mthca_cleanup_av_table(dev);
894
895err_qp_table_free:
896 mthca_cleanup_qp_table(dev);
897
ec34a922
RD		 898err_srq_table_free:
899 mthca_cleanup_srq_table(dev);
900
1da177e4
LT		 901err_cq_table_free:
902 mthca_cleanup_cq_table(dev);
903
904err_cmd_poll:
905 mthca_cmd_use_polling(dev);
906
907err_eq_table_free:
908 mthca_cleanup_eq_table(dev);
909
910err_pd_free:
911 mthca_pd_free(dev, &dev->driver_pd);
912
913err_mr_table_free:
914 mthca_cleanup_mr_table(dev);
915
916err_pd_table_free:
917 mthca_cleanup_pd_table(dev);
918
919err_kar_unmap:
920 iounmap(dev->kar);
921
922err_uar_free:
923 mthca_uar_free(dev, &dev->driver_uar);
924
925err_uar_table_free:
926 mthca_cleanup_uar_table(dev);
927 return err;
928}
929
f4f3d0f0 930static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden)
1da177e4
LT		 931{
932 int err;
933
934 /*
935 * We can't just use pci_request_regions() because the MSI-X
936 * table is right in the middle of the first BAR. If we did
937 * pci_request_region and grab all of the first BAR, then
938 * setting up MSI-X would fail, since the PCI core wants to do
939 * request_mem_region on the MSI-X vector table.
940 *
941 * So just request what we need right now, and request any
942 * other regions we need when setting up EQs.
943 */
944 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
945 MTHCA_HCR_SIZE, DRV_NAME))
946 return -EBUSY;
947
948 err = pci_request_region(pdev, 2, DRV_NAME);
949 if (err)
950 goto err_bar2_failed;
951
952 if (!ddr_hidden) {
953 err = pci_request_region(pdev, 4, DRV_NAME);
954 if (err)
955 goto err_bar4_failed;
956 }
957
958 return 0;
959
960err_bar4_failed:
961 pci_release_region(pdev, 2);
962
963err_bar2_failed:
964 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
965 MTHCA_HCR_SIZE);
966
967 return err;
968}
969
970static void mthca_release_regions(struct pci_dev *pdev,
971 int ddr_hidden)
972{
973 if (!ddr_hidden)
974 pci_release_region(pdev, 4);
975
976 pci_release_region(pdev, 2);
977
978 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
979 MTHCA_HCR_SIZE);
980}
981
f4f3d0f0 982static int mthca_enable_msi_x(struct mthca_dev *mdev)
1da177e4
LT		 983{
984 struct msix_entry entries[3];
985 int err;
986
987 entries[0].entry = 0;
988 entries[1].entry = 1;
989 entries[2].entry = 2;
990
991 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
992 if (err) {
993 if (err > 0)
994 mthca_info(mdev, "Only %d MSI-X vectors available, "
995 "not using MSI-X\n", err);
996 return err;
997 }
998
999 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
1000 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
1001 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
1002
1003 return 0;
1004}
1005
68a3c212
RD		 1006/* Types of supported HCA */
1007enum {
1008 TAVOR, /* MT23108 */
1009 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
1010 ARBEL_NATIVE, /* MT25208 with extended features */
1011 SINAI /* MT25204 */
1012};
1013
1014#define MTHCA_FW_VER(major, minor, subminor) \
1015 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
1016
1017static struct {
1018 u64 latest_fw;
651eaac9 1019 u32 flags;
68a3c212 1020} mthca_hca_table[] = {
3f114853 1021 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
651eaac9 1022 .flags = 0 },
3f114853 1023 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
651eaac9 1024 .flags = MTHCA_FLAG_PCIE },
3f114853 1025 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 2, 0),
651eaac9
EC		 1026 .flags = MTHCA_FLAG_MEMFREE |
1027 MTHCA_FLAG_PCIE },
3f114853 1028 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
651eaac9
EC		 1029 .flags = MTHCA_FLAG_MEMFREE |
1030 MTHCA_FLAG_PCIE |
1031 MTHCA_FLAG_SINAI_OPT }
68a3c212
RD		 1032};
1033
b3b30f5e 1034static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
1da177e4 1035{
1da177e4
LT		 1036 int ddr_hidden = 0;
1037 int err;
1038 struct mthca_dev *mdev;
1039
982245f0
AB		 1040 printk(KERN_INFO PFX "Initializing %s\n",
1041 pci_name(pdev));
1da177e4
LT		 1042
1043 err = pci_enable_device(pdev);
1044 if (err) {
1045 dev_err(&pdev->dev, "Cannot enable PCI device, "
1046 "aborting.\n");
1047 return err;
1048 }
1049
1050 /*
1051 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
1052 * be present)
1053 */
1054 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
1055 pci_resource_len(pdev, 0) != 1 << 20) {
177214af 1056 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1da177e4
LT		 1057 err = -ENODEV;
1058 goto err_disable_pdev;
1059 }
cbd2981a 1060 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
177214af 1061 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1da177e4
LT		 1062 err = -ENODEV;
1063 goto err_disable_pdev;
1064 }
1065 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
1066 ddr_hidden = 1;
1067
1068 err = mthca_request_regions(pdev, ddr_hidden);
1069 if (err) {
1070 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
1071 "aborting.\n");
1072 goto err_disable_pdev;
1073 }
1074
1075 pci_set_master(pdev);
1076
1077 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1078 if (err) {
1079 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1080 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1081 if (err) {
1082 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1083 goto err_free_res;
1084 }
1085 }
1086 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1087 if (err) {
1088 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1089 "consistent PCI DMA mask.\n");
1090 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1091 if (err) {
1092 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1093 "aborting.\n");
1094 goto err_free_res;
1095 }
1096 }
1097
1098 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1099 if (!mdev) {
1100 dev_err(&pdev->dev, "Device struct alloc failed, "
1101 "aborting.\n");
1102 err = -ENOMEM;
1103 goto err_free_res;
1104 }
1105
68a3c212 1106 mdev->pdev = pdev;
1da177e4 1107
b3b30f5e 1108 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
1da177e4
LT		 1109 if (ddr_hidden)
1110 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
1111
1112 /*
1113 * Now reset the HCA before we touch the PCI capabilities or
1114 * attempt a firmware command, since a boot ROM may have left
1115 * the HCA in an undefined state.
1116 */
1117 err = mthca_reset(mdev);
1118 if (err) {
1119 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1120 goto err_free_dev;
1121 }
1122
80fd8238
RD		 1123 if (mthca_cmd_init(mdev)) {
1124 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1da177e4
LT		 1125 goto err_free_dev;
1126 }
1127
1128 err = mthca_tune_pci(mdev);
1129 if (err)
80fd8238 1130 goto err_cmd;
1da177e4
LT		 1131
1132 err = mthca_init_hca(mdev);
1133 if (err)
80fd8238 1134 goto err_cmd;
1da177e4 1135
b3b30f5e 1136 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
e4daf738 1137 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
68a3c212
RD		 1138 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1139 (int) (mdev->fw_ver & 0xffff),
b3b30f5e
JM		 1140 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1141 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1142 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
68a3c212
RD		 1143 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1144 }
1145
017aadc4
MT		 1146 if (msi_x && !mthca_enable_msi_x(mdev))
1147 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1148 else if (msi) {
1149 static int warned;
1150
1151 if (!warned) {
1152 printk(KERN_WARNING PFX "WARNING: MSI support will be "
1153 "removed from the ib_mthca driver in January 2008.\n");
1154 printk(KERN_WARNING " If you are using MSI and cannot "
1155 "switch to MSI-X, please tell "
1156 "<general@lists.openfabrics.org>.\n");
1157 ++warned;
1158 }
1159
1160 if (!pci_enable_msi(pdev))
1161 mdev->mthca_flags |= MTHCA_FLAG_MSI;
1162 }
1163
1da177e4 1164 err = mthca_setup_hca(mdev);
017aadc4
MT		 1165 if (err == -EBUSY && (mdev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))) {
1166 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1167 pci_disable_msix(pdev);
1168 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1169 pci_disable_msi(pdev);
1170 mdev->mthca_flags &= ~(MTHCA_FLAG_MSI_X | MTHCA_FLAG_MSI);
1171
1172 err = mthca_setup_hca(mdev);
1173 }
1174
1da177e4
LT		 1175 if (err)
1176 goto err_close;
1177
1178 err = mthca_register_device(mdev);
1179 if (err)
1180 goto err_cleanup;
1181
1182 err = mthca_create_agents(mdev);
1183 if (err)
1184 goto err_unregister;
1185
1186 pci_set_drvdata(pdev, mdev);
b3b30f5e 1187 mdev->hca_type = hca_type;
1da177e4
LT		 1188
1189 return 0;
1190
1191err_unregister:
1192 mthca_unregister_device(mdev);
1193
1194err_cleanup:
1195 mthca_cleanup_mcg_table(mdev);
1196 mthca_cleanup_av_table(mdev);
1197 mthca_cleanup_qp_table(mdev);
ec34a922 1198 mthca_cleanup_srq_table(mdev);
1da177e4
LT		 1199 mthca_cleanup_cq_table(mdev);
1200 mthca_cmd_use_polling(mdev);
1201 mthca_cleanup_eq_table(mdev);
1202
1203 mthca_pd_free(mdev, &mdev->driver_pd);
1204
1205 mthca_cleanup_mr_table(mdev);
1206 mthca_cleanup_pd_table(mdev);
1207 mthca_cleanup_uar_table(mdev);
1208
1209err_close:
017aadc4
MT		 1210 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1211 pci_disable_msix(pdev);
1212 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1213 pci_disable_msi(pdev);
1214
1da177e4
LT		 1215 mthca_close_hca(mdev);
1216
80fd8238
RD		 1217err_cmd:
1218 mthca_cmd_cleanup(mdev);
1da177e4
LT		 1219
1220err_free_dev:
1da177e4
LT		 1221 ib_dealloc_device(&mdev->ib_dev);
1222
1223err_free_res:
1224 mthca_release_regions(pdev, ddr_hidden);
1225
1226err_disable_pdev:
1227 pci_disable_device(pdev);
1228 pci_set_drvdata(pdev, NULL);
1229 return err;
1230}
1231
b3b30f5e 1232static void __mthca_remove_one(struct pci_dev *pdev)
1da177e4
LT		 1233{
1234 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1235 u8 status;
1236 int p;
1237
1238 if (mdev) {
1239 mthca_free_agents(mdev);
1240 mthca_unregister_device(mdev);
1241
1242 for (p = 1; p <= mdev->limits.num_ports; ++p)
1243 mthca_CLOSE_IB(mdev, p, &status);
1244
1245 mthca_cleanup_mcg_table(mdev);
1246 mthca_cleanup_av_table(mdev);
1247 mthca_cleanup_qp_table(mdev);
ec34a922 1248 mthca_cleanup_srq_table(mdev);
1da177e4
LT		 1249 mthca_cleanup_cq_table(mdev);
1250 mthca_cmd_use_polling(mdev);
1251 mthca_cleanup_eq_table(mdev);
1252
1253 mthca_pd_free(mdev, &mdev->driver_pd);
1254
1255 mthca_cleanup_mr_table(mdev);
1256 mthca_cleanup_pd_table(mdev);
1257
1258 iounmap(mdev->kar);
1259 mthca_uar_free(mdev, &mdev->driver_uar);
1260 mthca_cleanup_uar_table(mdev);
1da177e4 1261 mthca_close_hca(mdev);
80fd8238 1262 mthca_cmd_cleanup(mdev);
1da177e4
LT		 1263
1264 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1265 pci_disable_msix(pdev);
1266 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1267 pci_disable_msi(pdev);
1268
1269 ib_dealloc_device(&mdev->ib_dev);
1270 mthca_release_regions(pdev, mdev->mthca_flags &
1271 MTHCA_FLAG_DDR_HIDDEN);
1272 pci_disable_device(pdev);
1273 pci_set_drvdata(pdev, NULL);
1274 }
1275}
1276
b3b30f5e
JM		 1277int __mthca_restart_one(struct pci_dev *pdev)
1278{
1279 struct mthca_dev *mdev;
de57c9f1 1280 int hca_type;
b3b30f5e
JM		 1281
1282 mdev = pci_get_drvdata(pdev);
1283 if (!mdev)
1284 return -ENODEV;
de57c9f1 1285 hca_type = mdev->hca_type;
b3b30f5e 1286 __mthca_remove_one(pdev);
de57c9f1 1287 return __mthca_init_one(pdev, hca_type);
b3b30f5e
JM		 1288}
1289
1290static int __devinit mthca_init_one(struct pci_dev *pdev,
f4f3d0f0 1291 const struct pci_device_id *id)
b3b30f5e
JM		 1292{
1293 static int mthca_version_printed = 0;
1294 int ret;
1295
1296 mutex_lock(&mthca_device_mutex);
1297
1298 if (!mthca_version_printed) {
1299 printk(KERN_INFO "%s", mthca_version);
1300 ++mthca_version_printed;
1301 }
1302
1303 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1304 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
1305 pci_name(pdev), id->driver_data);
1306 mutex_unlock(&mthca_device_mutex);
1307 return -ENODEV;
1308 }
1309
1310 ret = __mthca_init_one(pdev, id->driver_data);
1311
1312 mutex_unlock(&mthca_device_mutex);
1313
1314 return ret;
1315}
1316
1317static void __devexit mthca_remove_one(struct pci_dev *pdev)
1318{
1319 mutex_lock(&mthca_device_mutex);
1320 __mthca_remove_one(pdev);
1321 mutex_unlock(&mthca_device_mutex);
1322}
1323
1da177e4
LT		 1324static struct pci_device_id mthca_pci_table[] = {
1325 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1326 .driver_data = TAVOR },
1327 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1328 .driver_data = TAVOR },
1329 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1330 .driver_data = ARBEL_COMPAT },
1331 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1332 .driver_data = ARBEL_COMPAT },
1333 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1334 .driver_data = ARBEL_NATIVE },
1335 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1336 .driver_data = ARBEL_NATIVE },
68a3c212
RD		 1337 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1338 .driver_data = SINAI },
1339 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1340 .driver_data = SINAI },
1341 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1342 .driver_data = SINAI },
1343 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1344 .driver_data = SINAI },
1da177e4
LT		 1345 { 0, }
1346};
1347
1348MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1349
1350static struct pci_driver mthca_driver = {
177214af 1351 .name = DRV_NAME,
1da177e4
LT		 1352 .id_table = mthca_pci_table,
1353 .probe = mthca_init_one,
1354 .remove = __devexit_p(mthca_remove_one)
1355};
1356
82da703e
LA		 1357static void __init __mthca_check_profile_val(const char *name, int *pval,
1358 int pval_default)
1359{
1360 /* value must be positive and power of 2 */
1361 int old_pval = *pval;
1362
1363 if (old_pval <= 0)
1364 *pval = pval_default;
1365 else
1366 *pval = roundup_pow_of_two(old_pval);
1367
1368 if (old_pval != *pval) {
1369 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1370 old_pval, name);
1371 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1372 }
1373}
1374
1375#define mthca_check_profile_val(name, default) \
1376 __mthca_check_profile_val(#name, &hca_profile.name, default)
1377
1378static void __init mthca_validate_profile(void)
1379{
1380 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1381 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1382 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1383 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1384 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1385 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1386 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1387 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1388
1389 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1390 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1391 hca_profile.fmr_reserved_mtts);
1392 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1393 hca_profile.num_mtt);
1394 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1395 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1396 hca_profile.fmr_reserved_mtts);
1397 }
1398}
1399
1da177e4
LT		 1400static int __init mthca_init(void)
1401{
1402 int ret;
1403
82da703e
LA		 1404 mthca_validate_profile();
1405
b3b30f5e
JM		 1406 ret = mthca_catas_init();
1407 if (ret)
1408 return ret;
1409
1da177e4 1410 ret = pci_register_driver(&mthca_driver);
b3b30f5e
JM		 1411 if (ret < 0) {
1412 mthca_catas_cleanup();
1413 return ret;
1414 }
1415
1416 return 0;
1da177e4
LT		 1417}
1418
1419static void __exit mthca_cleanup(void)
1420{
1421 pci_unregister_driver(&mthca_driver);
b3b30f5e 1422 mthca_catas_cleanup();
1da177e4
LT		 1423}
1424
1425module_init(mthca_init);
1426module_exit(mthca_cleanup);
Linux 6.x block layer and io_uring tree(s)