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IB/mlx4: Load balance ports in port aggregation mode
[linux-2.6-block.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
a0c64a17
JM		 69int mlx4_ib_sm_guid_assign = 1;
70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f
RD		 134static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props)
136{
137 struct mlx4_ib_dev *dev = to_mdev(ibdev);
138 struct ib_smp *in_mad = NULL;
139 struct ib_smp *out_mad = NULL;
140 int err = -ENOMEM;
3dec4878 141 int have_ib_ports;
225c7b1f
RD		 142
143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
145 if (!in_mad || !out_mad)
146 goto out;
147
148 init_query_mad(in_mad);
149 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
150
0a9a0188
JM		 151 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
152 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 153 if (err)
154 goto out;
155
156 memset(props, 0, sizeof *props);
157
3dec4878
JM		 158 have_ib_ports = num_ib_ports(dev->dev);
159
225c7b1f
RD		 160 props->fw_ver = dev->dev->caps.fw_ver;
161 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
162 IB_DEVICE_PORT_ACTIVE_EVENT |
163 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 164 IB_DEVICE_RC_RNR_NAK_GEN |
165 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
167 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
169 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 171 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
173 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
175 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 176 if (dev->dev->caps.max_gso_sz &&
177 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 179 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
181 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
185 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
187 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
189 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
192 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
193 else
194 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 195 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 196 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 197 }
225c7b1f
RD		 198
199 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
200 0xffffff;
872bf2fb 201 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 202 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
203 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
204
205 props->max_mr_size = ~0ull;
206 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 207 props->max_qp = dev->dev->quotas.qp;
fc2d0044 208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 209 props->max_sge = min(dev->dev->caps.max_sq_sg,
210 dev->dev->caps.max_rq_sg);
5a0d0a61 211 props->max_cq = dev->dev->quotas.cq;
225c7b1f 212 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 213 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
217 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 218 props->max_srq = dev->dev->quotas.srq;
c8681f14 219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 220 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 221 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
224 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 225 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 226 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
229 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
230 props->max_mcast_grp;
a5bbe892 231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 232
233out:
234 kfree(in_mad);
235 kfree(out_mad);
236
237 return err;
238}
239
fa417f7b
EC		 240static enum rdma_link_layer
241mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 242{
fa417f7b 243 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 244
65dab25d 245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 246 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
247}
225c7b1f 248
fa417f7b 249static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 250 struct ib_port_attr *props, int netw_view)
fa417f7b 251{
a9c766bb
OG		 252 struct ib_smp *in_mad = NULL;
253 struct ib_smp *out_mad = NULL;
a5e12dff 254 int ext_active_speed;
0a9a0188 255 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 256 int err = -ENOMEM;
257
258 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
259 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
260 if (!in_mad || !out_mad)
261 goto out;
262
263 init_query_mad(in_mad);
264 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
265 in_mad->attr_mod = cpu_to_be32(port);
266
0a9a0188
JM		 267 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
268 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
269
270 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 271 in_mad, out_mad);
272 if (err)
273 goto out;
274
a5e12dff 275
225c7b1f
RD		 276 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
277 props->lmc = out_mad->data[34] & 0x7;
278 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
279 props->sm_sl = out_mad->data[36] & 0xf;
280 props->state = out_mad->data[32] & 0xf;
281 props->phys_state = out_mad->data[33] >> 4;
282 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 283 if (netw_view)
284 props->gid_tbl_len = out_mad->data[50];
285 else
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 289 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
290 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
291 props->active_width = out_mad->data[31] & 0xf;
292 props->active_speed = out_mad->data[35] >> 4;
293 props->max_mtu = out_mad->data[41] & 0xf;
294 props->active_mtu = out_mad->data[36] >> 4;
295 props->subnet_timeout = out_mad->data[51] & 0x1f;
296 props->max_vl_num = out_mad->data[37] >> 4;
297 props->init_type_reply = out_mad->data[41] >> 4;
298
a5e12dff
MA		 299 /* Check if extended speeds (EDR/FDR/...) are supported */
300 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
301 ext_active_speed = out_mad->data[62] >> 4;
302
303 switch (ext_active_speed) {
304 case 1:
2e96691c 305 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 306 break;
307 case 2:
2e96691c 308 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 309 break;
310 }
311 }
312
313 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 314 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
318
0a9a0188 319 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 320 NULL, NULL, in_mad, out_mad);
321 if (err)
bf6b47de 322 goto out;
8154c07f
OG		 323
324 /* Checking LinkSpeedActive for FDR-10 */
325 if (out_mad->data[15] & 0x1)
326 props->active_speed = IB_SPEED_FDR10;
a5e12dff 327 }
d2ef4068
OG		 328
329 /* Avoid wrong speed value returned by FW if the IB link is down. */
330 if (props->state == IB_PORT_DOWN)
331 props->active_speed = IB_SPEED_SDR;
332
a9c766bb
OG		 333out:
334 kfree(in_mad);
335 kfree(out_mad);
336 return err;
fa417f7b
EC		 337}
338
339static u8 state_to_phys_state(enum ib_port_state state)
340{
341 return state == IB_PORT_ACTIVE ? 5 : 3;
342}
343
344static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 345 struct ib_port_attr *props, int netw_view)
fa417f7b 346{
a9c766bb
OG		 347
348 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
349 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 350 struct net_device *ndev;
351 enum ib_mtu tmp;
a9c766bb
OG		 352 struct mlx4_cmd_mailbox *mailbox;
353 int err = 0;
a5750090 354 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 355
356 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
357 if (IS_ERR(mailbox))
358 return PTR_ERR(mailbox);
fa417f7b 359
a9c766bb
OG		 360 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
361 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
362 MLX4_CMD_WRAPPED);
363 if (err)
364 goto out;
365
366 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
367 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 368 props->active_speed = IB_SPEED_QDR;
b4a26a27 369 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 370 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
371 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 372 props->pkey_tbl_len = 1;
bcacb897 373 props->max_mtu = IB_MTU_4096;
a9c766bb 374 props->max_vl_num = 2;
fa417f7b
EC		 375 props->state = IB_PORT_DOWN;
376 props->phys_state = state_to_phys_state(props->state);
377 props->active_mtu = IB_MTU_256;
a5750090
MS		 378 if (is_bonded)
379 rtnl_lock(); /* required to get upper dev */
dba3ad2a 380 spin_lock_bh(&iboe->lock);
fa417f7b 381 ndev = iboe->netdevs[port - 1];
a5750090
MS		 382 if (ndev && is_bonded)
383 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 384 if (!ndev)
a9c766bb 385 goto out_unlock;
fa417f7b
EC		 386
387 tmp = iboe_get_mtu(ndev->mtu);
388 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
389
21d60609 390 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 391 IB_PORT_ACTIVE : IB_PORT_DOWN;
392 props->phys_state = state_to_phys_state(props->state);
a9c766bb 393out_unlock:
dba3ad2a 394 spin_unlock_bh(&iboe->lock);
a5750090
MS		 395 if (is_bonded)
396 rtnl_unlock();
a9c766bb
OG		 397out:
398 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
399 return err;
fa417f7b
EC		 400}
401
0a9a0188
JM		 402int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
403 struct ib_port_attr *props, int netw_view)
fa417f7b 404{
a9c766bb 405 int err;
fa417f7b
EC		 406
407 memset(props, 0, sizeof *props);
408
fa417f7b 409 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 410 ib_link_query_port(ibdev, port, props, netw_view) :
411 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 412
413 return err;
414}
415
0a9a0188
JM		 416static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
417 struct ib_port_attr *props)
418{
419 /* returns host view */
420 return __mlx4_ib_query_port(ibdev, port, props, 0);
421}
422
a0c64a17
JM		 423int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
424 union ib_gid *gid, int netw_view)
225c7b1f
RD		 425{
426 struct ib_smp *in_mad = NULL;
427 struct ib_smp *out_mad = NULL;
428 int err = -ENOMEM;
a0c64a17
JM		 429 struct mlx4_ib_dev *dev = to_mdev(ibdev);
430 int clear = 0;
431 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 432
433 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
434 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
435 if (!in_mad || !out_mad)
436 goto out;
437
438 init_query_mad(in_mad);
439 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
440 in_mad->attr_mod = cpu_to_be32(port);
441
a0c64a17
JM		 442 if (mlx4_is_mfunc(dev->dev) && netw_view)
443 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
444
445 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 446 if (err)
447 goto out;
448
449 memcpy(gid->raw, out_mad->data + 8, 8);
450
a0c64a17
JM		 451 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
452 if (index) {
453 /* For any index > 0, return the null guid */
454 err = 0;
455 clear = 1;
456 goto out;
457 }
458 }
459
225c7b1f
RD		 460 init_query_mad(in_mad);
461 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
462 in_mad->attr_mod = cpu_to_be32(index / 8);
463
a0c64a17 464 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 465 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 466 if (err)
467 goto out;
468
469 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
470
471out:
a0c64a17
JM		 472 if (clear)
473 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 474 kfree(in_mad);
475 kfree(out_mad);
476 return err;
477}
478
fa417f7b
EC		 479static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
480 union ib_gid *gid)
481{
482 struct mlx4_ib_dev *dev = to_mdev(ibdev);
483
484 *gid = dev->iboe.gid_table[port - 1][index];
485
486 return 0;
487}
488
489static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
490 union ib_gid *gid)
491{
492 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 493 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 494 else
495 return iboe_query_gid(ibdev, port, index, gid);
496}
497
0a9a0188
JM		 498int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
499 u16 *pkey, int netw_view)
225c7b1f
RD		 500{
501 struct ib_smp *in_mad = NULL;
502 struct ib_smp *out_mad = NULL;
0a9a0188 503 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 504 int err = -ENOMEM;
505
506 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
507 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
508 if (!in_mad || !out_mad)
509 goto out;
510
511 init_query_mad(in_mad);
512 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
513 in_mad->attr_mod = cpu_to_be32(index / 32);
514
0a9a0188
JM		 515 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
516 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
517
518 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
519 in_mad, out_mad);
225c7b1f
RD		 520 if (err)
521 goto out;
522
523 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
524
525out:
526 kfree(in_mad);
527 kfree(out_mad);
528 return err;
529}
530
0a9a0188
JM		 531static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
532{
533 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
534}
535
225c7b1f
RD		 536static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
537 struct ib_device_modify *props)
538{
d0d68b86 539 struct mlx4_cmd_mailbox *mailbox;
df7fba66 540 unsigned long flags;
d0d68b86 541
225c7b1f
RD		 542 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
543 return -EOPNOTSUPP;
544
d0d68b86
JM		 545 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
546 return 0;
547
992e8e6e
JM		 548 if (mlx4_is_slave(to_mdev(ibdev)->dev))
549 return -EOPNOTSUPP;
550
df7fba66 551 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 552 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 553 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 554
555 /*
556 * If possible, pass node desc to FW, so it can generate
557 * a 144 trap. If cmd fails, just ignore.
558 */
559 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
560 if (IS_ERR(mailbox))
561 return 0;
562
d0d68b86
JM		 563 memcpy(mailbox->buf, props->node_desc, 64);
564 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 565 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 566
567 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 568
569 return 0;
570}
571
61565013
JM		 572static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
573 u32 cap_mask)
225c7b1f
RD		 574{
575 struct mlx4_cmd_mailbox *mailbox;
576 int err;
577
578 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
579 if (IS_ERR(mailbox))
580 return PTR_ERR(mailbox);
581
5ae2a7a8
RD		 582 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
583 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
584 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
585 } else {
586 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
587 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
588 }
225c7b1f 589
61565013
JM		 590 err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
591 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
225c7b1f
RD		 592
593 mlx4_free_cmd_mailbox(dev->dev, mailbox);
594 return err;
595}
596
597static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
598 struct ib_port_modify *props)
599{
61565013
JM		 600 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
601 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 602 struct ib_port_attr attr;
603 u32 cap_mask;
604 int err;
605
61565013
JM		 606 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
607 * of whether port link layer is ETH or IB. For ETH ports, qkey
608 * violations and port capabilities are not meaningful.
609 */
610 if (is_eth)
611 return 0;
612
613 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 614
615 err = mlx4_ib_query_port(ibdev, port, &attr);
616 if (err)
617 goto out;
618
619 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
620 ~props->clr_port_cap_mask;
621
61565013
JM		 622 err = mlx4_ib_SET_PORT(mdev, port,
623 !!(mask & IB_PORT_RESET_QKEY_CNTR),
624 cap_mask);
225c7b1f
RD		 625
626out:
627 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
628 return err;
629}
630
631static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
632 struct ib_udata *udata)
633{
634 struct mlx4_ib_dev *dev = to_mdev(ibdev);
635 struct mlx4_ib_ucontext *context;
08ff3235 636 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 637 struct mlx4_ib_alloc_ucontext_resp resp;
638 int err;
639
3b4a8cd5
JM		 640 if (!dev->ib_active)
641 return ERR_PTR(-EAGAIN);
642
08ff3235
OG		 643 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
644 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
645 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
646 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
647 } else {
648 resp.dev_caps = dev->dev->caps.userspace_caps;
649 resp.qp_tab_size = dev->dev->caps.num_qps;
650 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
651 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
652 resp.cqe_size = dev->dev->caps.cqe_size;
653 }
225c7b1f
RD		 654
655 context = kmalloc(sizeof *context, GFP_KERNEL);
656 if (!context)
657 return ERR_PTR(-ENOMEM);
658
659 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
660 if (err) {
661 kfree(context);
662 return ERR_PTR(err);
663 }
664
665 INIT_LIST_HEAD(&context->db_page_list);
666 mutex_init(&context->db_page_mutex);
667
08ff3235
OG		 668 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
669 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
670 else
671 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
672
225c7b1f
RD		 673 if (err) {
674 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
675 kfree(context);
676 return ERR_PTR(-EFAULT);
677 }
678
679 return &context->ibucontext;
680}
681
682static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
683{
684 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
685
686 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
687 kfree(context);
688
689 return 0;
690}
691
692static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
693{
694 struct mlx4_ib_dev *dev = to_mdev(context->device);
695
696 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
697 return -EINVAL;
698
699 if (vma->vm_pgoff == 0) {
700 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
701
702 if (io_remap_pfn_range(vma, vma->vm_start,
703 to_mucontext(context)->uar.pfn,
704 PAGE_SIZE, vma->vm_page_prot))
705 return -EAGAIN;
706 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 707 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 708
709 if (io_remap_pfn_range(vma, vma->vm_start,
710 to_mucontext(context)->uar.pfn +
711 dev->dev->caps.num_uars,
712 PAGE_SIZE, vma->vm_page_prot))
713 return -EAGAIN;
714 } else
715 return -EINVAL;
716
717 return 0;
718}
719
720static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
721 struct ib_ucontext *context,
722 struct ib_udata *udata)
723{
724 struct mlx4_ib_pd *pd;
725 int err;
726
727 pd = kmalloc(sizeof *pd, GFP_KERNEL);
728 if (!pd)
729 return ERR_PTR(-ENOMEM);
730
731 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
732 if (err) {
733 kfree(pd);
734 return ERR_PTR(err);
735 }
736
737 if (context)
738 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
739 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
740 kfree(pd);
741 return ERR_PTR(-EFAULT);
742 }
743
744 return &pd->ibpd;
745}
746
747static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
748{
749 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
750 kfree(pd);
751
752 return 0;
753}
754
012a8ff5
SH		 755static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
756 struct ib_ucontext *context,
757 struct ib_udata *udata)
758{
759 struct mlx4_ib_xrcd *xrcd;
760 int err;
761
762 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
763 return ERR_PTR(-ENOSYS);
764
765 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
766 if (!xrcd)
767 return ERR_PTR(-ENOMEM);
768
769 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
770 if (err)
771 goto err1;
772
773 xrcd->pd = ib_alloc_pd(ibdev);
774 if (IS_ERR(xrcd->pd)) {
775 err = PTR_ERR(xrcd->pd);
776 goto err2;
777 }
778
779 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
780 if (IS_ERR(xrcd->cq)) {
781 err = PTR_ERR(xrcd->cq);
782 goto err3;
783 }
784
785 return &xrcd->ibxrcd;
786
787err3:
788 ib_dealloc_pd(xrcd->pd);
789err2:
790 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
791err1:
792 kfree(xrcd);
793 return ERR_PTR(err);
794}
795
796static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
797{
798 ib_destroy_cq(to_mxrcd(xrcd)->cq);
799 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
800 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
801 kfree(xrcd);
802
803 return 0;
804}
805
fa417f7b
EC		 806static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
807{
808 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
809 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
810 struct mlx4_ib_gid_entry *ge;
811
812 ge = kzalloc(sizeof *ge, GFP_KERNEL);
813 if (!ge)
814 return -ENOMEM;
815
816 ge->gid = *gid;
817 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
818 ge->port = mqp->port;
819 ge->added = 1;
820 }
821
822 mutex_lock(&mqp->mutex);
823 list_add_tail(&ge->list, &mqp->gid_list);
824 mutex_unlock(&mqp->mutex);
825
826 return 0;
827}
828
829int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
830 union ib_gid *gid)
831{
fa417f7b
EC		 832 struct net_device *ndev;
833 int ret = 0;
834
835 if (!mqp->port)
836 return 0;
837
dba3ad2a 838 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 839 ndev = mdev->iboe.netdevs[mqp->port - 1];
840 if (ndev)
841 dev_hold(ndev);
dba3ad2a 842 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 843
844 if (ndev) {
fa417f7b 845 ret = 1;
fa417f7b
EC		 846 dev_put(ndev);
847 }
848
849 return ret;
850}
851
0ff1fb65
HHZ		 852struct mlx4_ib_steering {
853 struct list_head list;
146d6e19 854 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 855 union ib_gid gid;
856};
857
f77c0162 858static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 859 u32 qp_num,
f77c0162
HHZ		 860 union ib_flow_spec *ib_spec,
861 struct _rule_hw *mlx4_spec)
862{
863 enum mlx4_net_trans_rule_id type;
864
865 switch (ib_spec->type) {
866 case IB_FLOW_SPEC_ETH:
867 type = MLX4_NET_TRANS_RULE_ID_ETH;
868 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
869 ETH_ALEN);
870 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
871 ETH_ALEN);
872 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
873 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
874 break;
a37a1a42
MB		 875 case IB_FLOW_SPEC_IB:
876 type = MLX4_NET_TRANS_RULE_ID_IB;
877 mlx4_spec->ib.l3_qpn =
878 cpu_to_be32(qp_num);
879 mlx4_spec->ib.qpn_mask =
880 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
881 break;
882
f77c0162
HHZ		 883
884 case IB_FLOW_SPEC_IPV4:
885 type = MLX4_NET_TRANS_RULE_ID_IPV4;
886 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
887 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
888 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
889 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
890 break;
891
892 case IB_FLOW_SPEC_TCP:
893 case IB_FLOW_SPEC_UDP:
894 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
895 MLX4_NET_TRANS_RULE_ID_TCP :
896 MLX4_NET_TRANS_RULE_ID_UDP;
897 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
898 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
899 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
900 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
901 break;
902
903 default:
904 return -EINVAL;
905 }
906 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
907 mlx4_hw_rule_sz(dev, type) < 0)
908 return -EINVAL;
909 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
910 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
911 return mlx4_hw_rule_sz(dev, type);
912}
913
a37a1a42
MB		 914struct default_rules {
915 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
916 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
917 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
918 __u8 link_layer;
919};
920static const struct default_rules default_table[] = {
921 {
922 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
923 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
924 .rules_create_list = {IB_FLOW_SPEC_IB},
925 .link_layer = IB_LINK_LAYER_INFINIBAND
926 }
927};
928
929static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
930 struct ib_flow_attr *flow_attr)
931{
932 int i, j, k;
933 void *ib_flow;
934 const struct default_rules *pdefault_rules = default_table;
935 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
936
a57f23f6 937 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 938 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
939 memset(&field_types, 0, sizeof(field_types));
940
941 if (link_layer != pdefault_rules->link_layer)
942 continue;
943
944 ib_flow = flow_attr + 1;
945 /* we assume the specs are sorted */
946 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
947 j < flow_attr->num_of_specs; k++) {
948 union ib_flow_spec *current_flow =
949 (union ib_flow_spec *)ib_flow;
950
951 /* same layer but different type */
952 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
953 (pdefault_rules->mandatory_fields[k] &
954 IB_FLOW_SPEC_LAYER_MASK)) &&
955 (current_flow->type !=
956 pdefault_rules->mandatory_fields[k]))
957 goto out;
958
959 /* same layer, try match next one */
960 if (current_flow->type ==
961 pdefault_rules->mandatory_fields[k]) {
962 j++;
963 ib_flow +=
964 ((union ib_flow_spec *)ib_flow)->size;
965 }
966 }
967
968 ib_flow = flow_attr + 1;
969 for (j = 0; j < flow_attr->num_of_specs;
970 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
971 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
972 /* same layer and same type */
973 if (((union ib_flow_spec *)ib_flow)->type ==
974 pdefault_rules->mandatory_not_fields[k])
975 goto out;
976
977 return i;
978 }
979out:
980 return -1;
981}
982
983static int __mlx4_ib_create_default_rules(
984 struct mlx4_ib_dev *mdev,
985 struct ib_qp *qp,
986 const struct default_rules *pdefault_rules,
987 struct _rule_hw *mlx4_spec) {
988 int size = 0;
989 int i;
990
a57f23f6 991 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 992 int ret;
993 union ib_flow_spec ib_spec;
994 switch (pdefault_rules->rules_create_list[i]) {
995 case 0:
996 /* no rule */
997 continue;
998 case IB_FLOW_SPEC_IB:
999 ib_spec.type = IB_FLOW_SPEC_IB;
1000 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1001
1002 break;
1003 default:
1004 /* invalid rule */
1005 return -EINVAL;
1006 }
1007 /* We must put empty rule, qpn is being ignored */
1008 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1009 mlx4_spec);
1010 if (ret < 0) {
1011 pr_info("invalid parsing\n");
1012 return -EINVAL;
1013 }
1014
1015 mlx4_spec = (void *)mlx4_spec + ret;
1016 size += ret;
1017 }
1018 return size;
1019}
1020
f77c0162
HHZ		 1021static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1022 int domain,
1023 enum mlx4_net_trans_promisc_mode flow_type,
1024 u64 *reg_id)
1025{
1026 int ret, i;
1027 int size = 0;
1028 void *ib_flow;
1029 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1030 struct mlx4_cmd_mailbox *mailbox;
1031 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1032 int default_flow;
f77c0162
HHZ		 1033
1034 static const u16 __mlx4_domain[] = {
1035 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1036 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1037 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1038 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1039 };
1040
1041 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1042 pr_err("Invalid priority value %d\n", flow_attr->priority);
1043 return -EINVAL;
1044 }
1045
1046 if (domain >= IB_FLOW_DOMAIN_NUM) {
1047 pr_err("Invalid domain value %d\n", domain);
1048 return -EINVAL;
1049 }
1050
1051 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1052 return -EINVAL;
1053
1054 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1055 if (IS_ERR(mailbox))
1056 return PTR_ERR(mailbox);
f77c0162
HHZ		 1057 ctrl = mailbox->buf;
1058
1059 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1060 flow_attr->priority);
1061 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1062 ctrl->port = flow_attr->port;
1063 ctrl->qpn = cpu_to_be32(qp->qp_num);
1064
1065 ib_flow = flow_attr + 1;
1066 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1067 /* Add default flows */
1068 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1069 if (default_flow >= 0) {
1070 ret = __mlx4_ib_create_default_rules(
1071 mdev, qp, default_table + default_flow,
1072 mailbox->buf + size);
1073 if (ret < 0) {
1074 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1075 return -EINVAL;
1076 }
1077 size += ret;
1078 }
f77c0162 1079 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1080 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1081 mailbox->buf + size);
f77c0162
HHZ		 1082 if (ret < 0) {
1083 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1084 return -EINVAL;
1085 }
1086 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1087 size += ret;
1088 }
1089
1090 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1091 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1092 MLX4_CMD_NATIVE);
1093 if (ret == -ENOMEM)
1094 pr_err("mcg table is full. Fail to register network rule.\n");
1095 else if (ret == -ENXIO)
1096 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1097 else if (ret)
1098 pr_err("Invalid argumant. Fail to register network rule.\n");
1099
1100 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1101 return ret;
1102}
1103
1104static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1105{
1106 int err;
1107 err = mlx4_cmd(dev, reg_id, 0, 0,
1108 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1109 MLX4_CMD_NATIVE);
1110 if (err)
1111 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1112 reg_id);
1113 return err;
1114}
1115
d2fce8a9
OG		 1116static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1117 u64 *reg_id)
1118{
1119 void *ib_flow;
1120 union ib_flow_spec *ib_spec;
1121 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1122 int err = 0;
1123
5eff6dad
OG		 1124 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1125 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1126 return 0; /* do nothing */
1127
1128 ib_flow = flow_attr + 1;
1129 ib_spec = (union ib_flow_spec *)ib_flow;
1130
1131 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1132 return 0; /* do nothing */
1133
1134 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1135 flow_attr->port, qp->qp_num,
1136 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1137 reg_id);
1138 return err;
1139}
1140
f77c0162
HHZ		 1141static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1142 struct ib_flow_attr *flow_attr,
1143 int domain)
1144{
146d6e19 1145 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1146 struct mlx4_ib_flow *mflow;
1147 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1148 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1149 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1150
1151 memset(type, 0, sizeof(type));
1152
1153 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1154 if (!mflow) {
1155 err = -ENOMEM;
1156 goto err_free;
1157 }
1158
1159 switch (flow_attr->type) {
1160 case IB_FLOW_ATTR_NORMAL:
1161 type[0] = MLX4_FS_REGULAR;
1162 break;
1163
1164 case IB_FLOW_ATTR_ALL_DEFAULT:
1165 type[0] = MLX4_FS_ALL_DEFAULT;
1166 break;
1167
1168 case IB_FLOW_ATTR_MC_DEFAULT:
1169 type[0] = MLX4_FS_MC_DEFAULT;
1170 break;
1171
1172 case IB_FLOW_ATTR_SNIFFER:
1173 type[0] = MLX4_FS_UC_SNIFFER;
1174 type[1] = MLX4_FS_MC_SNIFFER;
1175 break;
1176
1177 default:
1178 err = -EINVAL;
1179 goto err_free;
1180 }
1181
1182 while (i < ARRAY_SIZE(type) && type[i]) {
1183 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1184 &mflow->reg_id[i].id);
f77c0162 1185 if (err)
571e1b2c 1186 goto err_create_flow;
f77c0162 1187 i++;
146d6e19
MS		 1188 if (is_bonded) {
1189 flow_attr->port = 2;
1190 err = __mlx4_ib_create_flow(qp, flow_attr,
1191 domain, type[j],
1192 &mflow->reg_id[j].mirror);
1193 flow_attr->port = 1;
1194 if (err)
1195 goto err_create_flow;
1196 j++;
1197 }
1198
f77c0162
HHZ		 1199 }
1200
d2fce8a9 1201 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1202 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1203 &mflow->reg_id[i].id);
d2fce8a9 1204 if (err)
571e1b2c
OG		 1205 goto err_create_flow;
1206 i++;
146d6e19
MS		 1207 if (is_bonded) {
1208 flow_attr->port = 2;
1209 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1210 &mflow->reg_id[j].mirror);
1211 flow_attr->port = 1;
1212 if (err)
1213 goto err_create_flow;
1214 j++;
1215 }
1216 /* function to create mirror rule */
d2fce8a9
OG		 1217 }
1218
f77c0162
HHZ		 1219 return &mflow->ibflow;
1220
571e1b2c
OG		 1221err_create_flow:
1222 while (i) {
146d6e19
MS		 1223 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1224 mflow->reg_id[i].id);
571e1b2c
OG		 1225 i--;
1226 }
146d6e19
MS		 1227
1228 while (j) {
1229 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1230 mflow->reg_id[j].mirror);
1231 j--;
1232 }
f77c0162
HHZ		 1233err_free:
1234 kfree(mflow);
1235 return ERR_PTR(err);
1236}
1237
1238static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1239{
1240 int err, ret = 0;
1241 int i = 0;
1242 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1243 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1244
146d6e19
MS		 1245 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1246 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1247 if (err)
1248 ret = err;
146d6e19
MS		 1249 if (mflow->reg_id[i].mirror) {
1250 err = __mlx4_ib_destroy_flow(mdev->dev,
1251 mflow->reg_id[i].mirror);
1252 if (err)
1253 ret = err;
1254 }
f77c0162
HHZ		 1255 i++;
1256 }
1257
1258 kfree(mflow);
1259 return ret;
1260}
1261
225c7b1f
RD		 1262static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1263{
fa417f7b
EC		 1264 int err;
1265 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1266 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1267 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1268 struct mlx4_ib_steering *ib_steering = NULL;
d487ee77
MS		 1269 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1270 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
146d6e19 1271 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1272
1273 if (mdev->dev->caps.steering_mode ==
1274 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1275 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1276 if (!ib_steering)
1277 return -ENOMEM;
1278 }
fa417f7b 1279
0ff1fb65
HHZ		 1280 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1281 !!(mqp->flags &
1282 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1283 prot, &reg_id.id);
fa417f7b 1284 if (err)
0ff1fb65 1285 goto err_malloc;
fa417f7b 1286
146d6e19
MS		 1287 reg_id.mirror = 0;
1288 if (mlx4_is_bonded(dev)) {
1289 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 2,
1290 !!(mqp->flags &
1291 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1292 prot, &reg_id.mirror);
1293 if (err)
1294 goto err_add;
1295 }
1296
fa417f7b
EC		 1297 err = add_gid_entry(ibqp, gid);
1298 if (err)
1299 goto err_add;
1300
0ff1fb65
HHZ		 1301 if (ib_steering) {
1302 memcpy(ib_steering->gid.raw, gid->raw, 16);
1303 ib_steering->reg_id = reg_id;
1304 mutex_lock(&mqp->mutex);
1305 list_add(&ib_steering->list, &mqp->steering_rules);
1306 mutex_unlock(&mqp->mutex);
1307 }
fa417f7b
EC		 1308 return 0;
1309
1310err_add:
0ff1fb65 1311 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1312 prot, reg_id.id);
1313 if (reg_id.mirror)
1314 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1315 prot, reg_id.mirror);
0ff1fb65
HHZ		 1316err_malloc:
1317 kfree(ib_steering);
1318
fa417f7b
EC		 1319 return err;
1320}
1321
1322static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1323{
1324 struct mlx4_ib_gid_entry *ge;
1325 struct mlx4_ib_gid_entry *tmp;
1326 struct mlx4_ib_gid_entry *ret = NULL;
1327
1328 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1329 if (!memcmp(raw, ge->gid.raw, 16)) {
1330 ret = ge;
1331 break;
1332 }
1333 }
1334
1335 return ret;
225c7b1f
RD		 1336}
1337
1338static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1339{
fa417f7b
EC		 1340 int err;
1341 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1342 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1343 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1344 struct net_device *ndev;
1345 struct mlx4_ib_gid_entry *ge;
146d6e19
MS		 1346 struct mlx4_flow_reg_id reg_id = {0, 0};
1347
d487ee77
MS		 1348 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1349 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1350
1351 if (mdev->dev->caps.steering_mode ==
1352 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1353 struct mlx4_ib_steering *ib_steering;
1354
1355 mutex_lock(&mqp->mutex);
1356 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1357 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1358 list_del(&ib_steering->list);
1359 break;
1360 }
1361 }
1362 mutex_unlock(&mqp->mutex);
1363 if (&ib_steering->list == &mqp->steering_rules) {
1364 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1365 return -EINVAL;
1366 }
1367 reg_id = ib_steering->reg_id;
1368 kfree(ib_steering);
1369 }
fa417f7b 1370
0ff1fb65 1371 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1372 prot, reg_id.id);
fa417f7b
EC		 1373 if (err)
1374 return err;
1375
146d6e19
MS		 1376 if (mlx4_is_bonded(dev)) {
1377 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1378 prot, reg_id.mirror);
1379 if (err)
1380 return err;
1381 }
1382
fa417f7b
EC		 1383 mutex_lock(&mqp->mutex);
1384 ge = find_gid_entry(mqp, gid->raw);
1385 if (ge) {
dba3ad2a 1386 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1387 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1388 if (ndev)
1389 dev_hold(ndev);
dba3ad2a 1390 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1391 if (ndev)
fa417f7b 1392 dev_put(ndev);
fa417f7b
EC		 1393 list_del(&ge->list);
1394 kfree(ge);
1395 } else
987c8f8f 1396 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1397
1398 mutex_unlock(&mqp->mutex);
1399
1400 return 0;
225c7b1f
RD		 1401}
1402
1403static int init_node_data(struct mlx4_ib_dev *dev)
1404{
1405 struct ib_smp *in_mad = NULL;
1406 struct ib_smp *out_mad = NULL;
0a9a0188 1407 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1408 int err = -ENOMEM;
1409
1410 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1411 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1412 if (!in_mad || !out_mad)
1413 goto out;
1414
1415 init_query_mad(in_mad);
1416 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1417 if (mlx4_is_master(dev->dev))
1418 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1419
0a9a0188 1420 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1421 if (err)
1422 goto out;
1423
1424 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1425
1426 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1427
0a9a0188 1428 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1429 if (err)
1430 goto out;
1431
992e8e6e 1432 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1433 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1434
1435out:
1436 kfree(in_mad);
1437 kfree(out_mad);
1438 return err;
1439}
1440
f4e91eb4
TJ		 1441static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1442 char *buf)
cd9281d8 1443{
f4e91eb4
TJ		 1444 struct mlx4_ib_dev *dev =
1445 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1446 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1447}
1448
f4e91eb4
TJ		 1449static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1450 char *buf)
cd9281d8 1451{
f4e91eb4
TJ		 1452 struct mlx4_ib_dev *dev =
1453 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1454 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1455 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1456 (int) dev->dev->caps.fw_ver & 0xffff);
1457}
1458
f4e91eb4
TJ		 1459static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1460 char *buf)
cd9281d8 1461{
f4e91eb4
TJ		 1462 struct mlx4_ib_dev *dev =
1463 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1464 return sprintf(buf, "%x\n", dev->dev->rev_id);
1465}
1466
f4e91eb4
TJ		 1467static ssize_t show_board(struct device *device, struct device_attribute *attr,
1468 char *buf)
cd9281d8 1469{
f4e91eb4
TJ		 1470 struct mlx4_ib_dev *dev =
1471 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1472 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1473 dev->dev->board_id);
cd9281d8
JM		 1474}
1475
f4e91eb4
TJ		 1476static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1477static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1478static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1479static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1480
f4e91eb4
TJ		 1481static struct device_attribute *mlx4_class_attributes[] = {
1482 &dev_attr_hw_rev,
1483 &dev_attr_fw_ver,
1484 &dev_attr_hca_type,
1485 &dev_attr_board_id
cd9281d8
JM		 1486};
1487
acc4fccf
MS		 1488static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1489 struct net_device *dev)
1490{
1491 memcpy(eui, dev->dev_addr, 3);
1492 memcpy(eui + 5, dev->dev_addr + 3, 3);
1493 if (vlan_id < 0x1000) {
1494 eui[3] = vlan_id >> 8;
1495 eui[4] = vlan_id & 0xff;
1496 } else {
1497 eui[3] = 0xff;
1498 eui[4] = 0xfe;
1499 }
1500 eui[0] ^= 2;
1501}
1502
fa417f7b
EC		 1503static void update_gids_task(struct work_struct *work)
1504{
1505 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1506 struct mlx4_cmd_mailbox *mailbox;
1507 union ib_gid *gids;
1508 int err;
1509 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1510 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1511
4bf9715f
MS		 1512 if (!gw->dev->ib_active)
1513 return;
1514
fa417f7b
EC		 1515 mailbox = mlx4_alloc_cmd_mailbox(dev);
1516 if (IS_ERR(mailbox)) {
987c8f8f 1517 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1518 return;
1519 }
1520
1521 gids = mailbox->buf;
1522 memcpy(gids, gw->gids, sizeof gw->gids);
1523
1524 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
f9baff50 1525 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
992e8e6e 1526 MLX4_CMD_WRAPPED);
fa417f7b 1527 if (err)
987c8f8f 1528 pr_warn("set port command failed\n");
d487ee77 1529 else
a5750090
MS		 1530 if ((gw->port == 1) || !is_bonded)
1531 mlx4_ib_dispatch_event(gw->dev,
1532 is_bonded ? 1 : gw->port,
1533 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1534
1535 mlx4_free_cmd_mailbox(dev, mailbox);
1536 kfree(gw);
1537}
1538
d487ee77 1539static void reset_gids_task(struct work_struct *work)
fa417f7b 1540{
d487ee77
MS		 1541 struct update_gid_work *gw =
1542 container_of(work, struct update_gid_work, work);
1543 struct mlx4_cmd_mailbox *mailbox;
1544 union ib_gid *gids;
1545 int err;
d487ee77 1546 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1547
4bf9715f
MS		 1548 if (!gw->dev->ib_active)
1549 return;
1550
d487ee77
MS		 1551 mailbox = mlx4_alloc_cmd_mailbox(dev);
1552 if (IS_ERR(mailbox)) {
1553 pr_warn("reset gid table failed\n");
1554 goto free;
1555 }
fa417f7b 1556
d487ee77
MS		 1557 gids = mailbox->buf;
1558 memcpy(gids, gw->gids, sizeof(gw->gids));
1559
5071456f
MS		 1560 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1561 IB_LINK_LAYER_ETHERNET) {
1562 err = mlx4_cmd(dev, mailbox->dma,
1563 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1564 1, MLX4_CMD_SET_PORT,
1565 MLX4_CMD_TIME_CLASS_B,
1566 MLX4_CMD_WRAPPED);
1567 if (err)
1568 pr_warn(KERN_WARNING
1569 "set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1570 }
1571
d487ee77
MS		 1572 mlx4_free_cmd_mailbox(dev, mailbox);
1573free:
1574 kfree(gw);
1575}
4c3eb3ca 1576
d487ee77 1577static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1578 union ib_gid *gid, int clear,
1579 int default_gid)
d487ee77
MS		 1580{
1581 struct update_gid_work *work;
1582 int i;
1583 int need_update = 0;
1584 int free = -1;
1585 int found = -1;
1586 int max_gids;
1587
acc4fccf
MS		 1588 if (default_gid) {
1589 free = 0;
1590 } else {
1591 max_gids = dev->dev->caps.gid_table_len[port];
1592 for (i = 1; i < max_gids; ++i) {
1593 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1594 sizeof(*gid)))
acc4fccf
MS		 1595 found = i;
1596
1597 if (clear) {
1598 if (found >= 0) {
1599 need_update = 1;
1600 dev->iboe.gid_table[port - 1][found] =
1601 zgid;
1602 break;
1603 }
1604 } else {
1605 if (found >= 0)
1606 break;
1607
1608 if (free < 0 &&
1609 !memcmp(&dev->iboe.gid_table[port - 1][i],
1610 &zgid, sizeof(*gid)))
1611 free = i;
1612 }
4c3eb3ca 1613 }
fa417f7b 1614 }
4c3eb3ca 1615
d487ee77
MS		 1616 if (found == -1 && !clear && free >= 0) {
1617 dev->iboe.gid_table[port - 1][free] = *gid;
1618 need_update = 1;
1619 }
fa417f7b 1620
d487ee77
MS		 1621 if (!need_update)
1622 return 0;
1623
1624 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1625 if (!work)
1626 return -ENOMEM;
1627
1628 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1629 INIT_WORK(&work->work, update_gids_task);
1630 work->port = port;
1631 work->dev = dev;
1632 queue_work(wq, &work->work);
fa417f7b
EC		 1633
1634 return 0;
d487ee77 1635}
4c3eb3ca 1636
acc4fccf 1637static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1638{
acc4fccf
MS		 1639 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1640 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1641}
1642
d487ee77 1643
5071456f 1644static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1645{
1646 struct update_gid_work *work;
d487ee77
MS		 1647
1648 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1649 if (!work)
1650 return -ENOMEM;
5071456f
MS		 1651
1652 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1653 memset(work->gids, 0, sizeof(work->gids));
1654 INIT_WORK(&work->work, reset_gids_task);
1655 work->dev = dev;
5071456f 1656 work->port = port;
d487ee77
MS		 1657 queue_work(wq, &work->work);
1658 return 0;
fa417f7b
EC		 1659}
1660
d487ee77
MS		 1661static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1662 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1663{
d487ee77
MS		 1664 struct mlx4_ib_iboe *iboe;
1665 int port = 0;
1666 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1667 rdma_vlan_dev_real_dev(event_netdev) :
1668 event_netdev;
acc4fccf
MS		 1669 union ib_gid default_gid;
1670
1671 mlx4_make_default_gid(real_dev, &default_gid);
1672
1673 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1674 return 0;
d487ee77
MS		 1675
1676 if (event != NETDEV_DOWN && event != NETDEV_UP)
1677 return 0;
1678
1679 if ((real_dev != event_netdev) &&
1680 (event == NETDEV_DOWN) &&
1681 rdma_link_local_addr((struct in6_addr *)gid))
1682 return 0;
1683
1684 iboe = &ibdev->iboe;
dba3ad2a 1685 spin_lock_bh(&iboe->lock);
d487ee77 1686
82373701 1687 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1688 if ((netif_is_bond_master(real_dev) &&
1689 (real_dev == iboe->masters[port - 1])) ||
1690 (!netif_is_bond_master(real_dev) &&
1691 (real_dev == iboe->netdevs[port - 1])))
1692 update_gid_table(ibdev, port, gid,
acc4fccf 1693 event == NETDEV_DOWN, 0);
d487ee77 1694
dba3ad2a 1695 spin_unlock_bh(&iboe->lock);
d487ee77 1696 return 0;
fa417f7b 1697
fa417f7b
EC		 1698}
1699
d487ee77
MS		 1700static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1701 struct mlx4_ib_dev *ibdev)
fa417f7b 1702{
d487ee77
MS		 1703 u8 port = 0;
1704 struct mlx4_ib_iboe *iboe;
1705 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1706 rdma_vlan_dev_real_dev(dev) : dev;
1707
1708 iboe = &ibdev->iboe;
d487ee77 1709
82373701 1710 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1711 if ((netif_is_bond_master(real_dev) &&
1712 (real_dev == iboe->masters[port - 1])) ||
1713 (!netif_is_bond_master(real_dev) &&
1714 (real_dev == iboe->netdevs[port - 1])))
1715 break;
1716
82373701 1717 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1718 return 0;
1719 else
1720 return port;
fa417f7b
EC		 1721}
1722
d487ee77
MS		 1723static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1724 void *ptr)
fa417f7b 1725{
d487ee77
MS		 1726 struct mlx4_ib_dev *ibdev;
1727 struct in_ifaddr *ifa = ptr;
1728 union ib_gid gid;
1729 struct net_device *event_netdev = ifa->ifa_dev->dev;
1730
1731 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1732
1733 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1734
1735 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1736 return NOTIFY_DONE;
fa417f7b
EC		 1737}
1738
27cdef63 1739#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1740static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1741 void *ptr)
1742{
fa417f7b 1743 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1744 struct inet6_ifaddr *ifa = ptr;
1745 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1746 struct net_device *event_netdev = ifa->idev->dev;
1747
1748 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1749
1750 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1751 return NOTIFY_DONE;
1752}
1753#endif
1754
9433c188
MB		 1755#define MLX4_IB_INVALID_MAC ((u64)-1)
1756static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1757 struct net_device *dev,
1758 int port)
1759{
1760 u64 new_smac = 0;
1761 u64 release_mac = MLX4_IB_INVALID_MAC;
1762 struct mlx4_ib_qp *qp;
1763
1764 read_lock(&dev_base_lock);
1765 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1766 read_unlock(&dev_base_lock);
1767
3e0629cb
JM		 1768 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1769
d24d9f43
JM		 1770 /* no need for update QP1 and mac registration in non-SRIOV */
1771 if (!mlx4_is_mfunc(ibdev->dev))
1772 return;
1773
9433c188
MB		 1774 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1775 qp = ibdev->qp1_proxy[port - 1];
1776 if (qp) {
1777 int new_smac_index;
25476b02 1778 u64 old_smac;
9433c188
MB		 1779 struct mlx4_update_qp_params update_params;
1780
25476b02
JM		 1781 mutex_lock(&qp->mutex);
1782 old_smac = qp->pri.smac;
9433c188
MB		 1783 if (new_smac == old_smac)
1784 goto unlock;
1785
1786 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1787
1788 if (new_smac_index < 0)
1789 goto unlock;
1790
1791 update_params.smac_index = new_smac_index;
09e05c3f 1792 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1793 &update_params)) {
1794 release_mac = new_smac;
1795 goto unlock;
1796 }
25476b02
JM		 1797 /* if old port was zero, no mac was yet registered for this QP */
1798 if (qp->pri.smac_port)
1799 release_mac = old_smac;
9433c188 1800 qp->pri.smac = new_smac;
25476b02 1801 qp->pri.smac_port = port;
9433c188 1802 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1803 }
1804
1805unlock:
9433c188
MB		 1806 if (release_mac != MLX4_IB_INVALID_MAC)
1807 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1808 if (qp)
1809 mutex_unlock(&qp->mutex);
1810 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1811}
1812
d487ee77
MS		 1813static void mlx4_ib_get_dev_addr(struct net_device *dev,
1814 struct mlx4_ib_dev *ibdev, u8 port)
1815{
1816 struct in_device *in_dev;
27cdef63 1817#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1818 struct inet6_dev *in6_dev;
1819 union ib_gid *pgid;
1820 struct inet6_ifaddr *ifp;
f5c4834d 1821 union ib_gid default_gid;
d487ee77
MS		 1822#endif
1823 union ib_gid gid;
1824
1825
82373701 1826 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1827 return;
1828
1829 /* IPv4 gids */
1830 in_dev = in_dev_get(dev);
1831 if (in_dev) {
1832 for_ifa(in_dev) {
1833 /*ifa->ifa_address;*/
1834 ipv6_addr_set_v4mapped(ifa->ifa_address,
1835 (struct in6_addr *)&gid);
acc4fccf 1836 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1837 }
1838 endfor_ifa(in_dev);
1839 in_dev_put(in_dev);
1840 }
27cdef63 1841#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1842 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1843 /* IPv6 gids */
1844 in6_dev = in6_dev_get(dev);
1845 if (in6_dev) {
1846 read_lock_bh(&in6_dev->lock);
1847 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1848 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1849 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1850 continue;
acc4fccf 1851 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1852 }
1853 read_unlock_bh(&in6_dev->lock);
1854 in6_dev_put(in6_dev);
1855 }
1856#endif
1857}
1858
acc4fccf
MS		 1859static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1860 struct net_device *dev, u8 port)
1861{
1862 union ib_gid gid;
1863 mlx4_make_default_gid(dev, &gid);
1864 update_gid_table(ibdev, port, &gid, 0, 1);
1865}
1866
d487ee77
MS		 1867static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1868{
1869 struct net_device *dev;
ddf8bd34 1870 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1871 int i;
655b2aae 1872 int err = 0;
d487ee77 1873
655b2aae
MS		 1874 for (i = 1; i <= ibdev->num_ports; ++i) {
1875 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1876 IB_LINK_LAYER_ETHERNET) {
1877 err = reset_gid_table(ibdev, i);
1878 if (err)
1879 goto out;
1880 }
1881 }
d487ee77
MS		 1882
1883 read_lock(&dev_base_lock);
dba3ad2a 1884 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1885
1886 for_each_netdev(&init_net, dev) {
1887 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1888 /* port will be non-zero only for ETH ports */
1889 if (port) {
1890 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1891 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1892 }
d487ee77
MS		 1893 }
1894
dba3ad2a 1895 spin_unlock_bh(&iboe->lock);
d487ee77 1896 read_unlock(&dev_base_lock);
655b2aae
MS		 1897out:
1898 return err;
d487ee77
MS		 1899}
1900
9433c188
MB		 1901static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1902 struct net_device *dev,
1903 unsigned long event)
1904
d487ee77 1905{
fa417f7b 1906 struct mlx4_ib_iboe *iboe;
9433c188 1907 int update_qps_port = -1;
fa417f7b
EC		 1908 int port;
1909
fa417f7b
EC		 1910 iboe = &ibdev->iboe;
1911
dba3ad2a 1912 spin_lock_bh(&iboe->lock);
fa417f7b 1913 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1914 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1915 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1916 struct net_device *curr_netdev;
d487ee77 1917 struct net_device *curr_master;
ad4885d2 1918
fa417f7b 1919 iboe->netdevs[port - 1] =
0345584e 1920 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1921 if (iboe->netdevs[port - 1])
1922 mlx4_ib_set_default_gid(ibdev,
1923 iboe->netdevs[port - 1], port);
ad4885d2 1924 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1925
1926 if (iboe->netdevs[port - 1] &&
1927 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1928 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1929 iboe->netdevs[port - 1]);
ad4885d2
MS		 1930 } else {
1931 iboe->masters[port - 1] = NULL;
fa417f7b 1932 }
d487ee77 1933 curr_master = iboe->masters[port - 1];
fa417f7b 1934
9433c188
MB		 1935 if (dev == iboe->netdevs[port - 1] &&
1936 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1937 event == NETDEV_UP || event == NETDEV_CHANGE))
1938 update_qps_port = port;
1939
ad4885d2
MS		 1940 if (curr_netdev) {
1941 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1942 IB_PORT_ACTIVE : IB_PORT_DOWN;
1943 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1944 if (curr_master) {
1945 /* if using bonding/team and a slave port is down, we
1946 * don't want the bond IP based gids in the table since
1947 * flows that select port by gid may get the down port.
1948 */
a5750090
MS		 1949 if (port_state == IB_PORT_DOWN &&
1950 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 1951 reset_gid_table(ibdev, port);
1952 mlx4_ib_set_default_gid(ibdev,
1953 curr_netdev,
1954 port);
1955 } else {
1956 /* gids from the upper dev (bond/team)
1957 * should appear in port's gid table
1958 */
1959 mlx4_ib_get_dev_addr(curr_master,
1960 ibdev, port);
1961 }
e381835c
MS		 1962 }
1963 /* if bonding is used it is possible that we add it to
1964 * masters only after IP address is assigned to the
1965 * net bonding interface.
1966 */
1967 if (curr_master && (old_master != curr_master)) {
1968 reset_gid_table(ibdev, port);
1969 mlx4_ib_set_default_gid(ibdev,
1970 curr_netdev, port);
1971 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1972 }
ad4885d2 1973
e381835c
MS		 1974 if (!curr_master && (old_master != curr_master)) {
1975 reset_gid_table(ibdev, port);
1976 mlx4_ib_set_default_gid(ibdev,
1977 curr_netdev, port);
1978 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1979 }
1980 } else {
ad4885d2 1981 reset_gid_table(ibdev, port);
ad4885d2 1982 }
d487ee77 1983 }
fa417f7b 1984
dba3ad2a 1985 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1986
1987 if (update_qps_port > 0)
1988 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 1989}
1990
1991static int mlx4_ib_netdev_event(struct notifier_block *this,
1992 unsigned long event, void *ptr)
1993{
1994 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1995 struct mlx4_ib_dev *ibdev;
1996
1997 if (!net_eq(dev_net(dev), &init_net))
1998 return NOTIFY_DONE;
1999
2000 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2001 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2002
2003 return NOTIFY_DONE;
2004}
2005
54679e14
JM		 2006static void init_pkeys(struct mlx4_ib_dev *ibdev)
2007{
2008 int port;
2009 int slave;
2010 int i;
2011
2012 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2013 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2014 ++slave) {
54679e14
JM		 2015 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2016 for (i = 0;
2017 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2018 ++i) {
2019 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2020 /* master has the identity virt2phys pkey mapping */
2021 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2022 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2023 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2024 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2025 }
2026 }
2027 }
2028 /* initialize pkey cache */
2029 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2030 for (i = 0;
2031 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2032 ++i)
2033 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2034 (i) ? 0 : 0xFFFF;
2035 }
2036 }
2037}
2038
e605b743
SP		 2039static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2040{
4661bd79 2041 char name[80];
e605b743
SP		 2042 int eq_per_port = 0;
2043 int added_eqs = 0;
2044 int total_eqs = 0;
2045 int i, j, eq;
2046
3aac6ff1
SP		 2047 /* Legacy mode or comp_pool is not large enough */
2048 if (dev->caps.comp_pool == 0 ||
2049 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2050 return;
2051
7ae0e400 2052 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2053
2054 /* Init eq table */
2055 added_eqs = 0;
2056 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2057 added_eqs += eq_per_port;
2058
2059 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2060
2061 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2062 if (!ibdev->eq_table)
2063 return;
2064
2065 ibdev->eq_added = added_eqs;
2066
2067 eq = 0;
2068 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2069 for (j = 0; j < eq_per_port; j++) {
4661bd79 2070 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2071 i, j, dev->persist->pdev->bus->name);
e605b743 2072 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2073 if (mlx4_assign_eq(dev, name, NULL,
2074 &ibdev->eq_table[eq])) {
e605b743
SP		 2075 /* Use legacy (same as mlx4_en driver) */
2076 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2077 ibdev->eq_table[eq] =
2078 (eq % dev->caps.num_comp_vectors);
2079 }
2080 eq++;
2081 }
2082 }
2083
2084 /* Fill the reset of the vector with legacy EQ */
2085 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2086 ibdev->eq_table[eq++] = i;
2087
2088 /* Advertise the new number of EQs to clients */
2089 ibdev->ib_dev.num_comp_vectors = total_eqs;
2090}
2091
2092static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2093{
2094 int i;
3aac6ff1
SP		 2095
2096 /* no additional eqs were added */
2097 if (!ibdev->eq_table)
2098 return;
e605b743
SP		 2099
2100 /* Reset the advertised EQ number */
2101 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2102
2103 /* Free only the added eqs */
2104 for (i = 0; i < ibdev->eq_added; i++) {
2105 /* Don't free legacy eqs if used */
2106 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2107 continue;
2108 mlx4_release_eq(dev, ibdev->eq_table[i]);
2109 }
2110
e605b743 2111 kfree(ibdev->eq_table);
e605b743
SP		 2112}
2113
225c7b1f
RD		 2114static void *mlx4_ib_add(struct mlx4_dev *dev)
2115{
2116 struct mlx4_ib_dev *ibdev;
22e7ef9c 2117 int num_ports = 0;
035b1032 2118 int i, j;
fa417f7b
EC		 2119 int err;
2120 struct mlx4_ib_iboe *iboe;
4196670b 2121 int ib_num_ports = 0;
a5750090 2122 int num_req_counters;
225c7b1f 2123
987c8f8f 2124 pr_info_once("%s", mlx4_ib_version);
68f3948d 2125
026149cb 2126 num_ports = 0;
fa417f7b 2127 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2128 num_ports++;
2129
2130 /* No point in registering a device with no ports... */
2131 if (num_ports == 0)
2132 return NULL;
2133
225c7b1f
RD		 2134 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2135 if (!ibdev) {
872bf2fb
YH		 2136 dev_err(&dev->persist->pdev->dev,
2137 "Device struct alloc failed\n");
225c7b1f
RD		 2138 return NULL;
2139 }
2140
fa417f7b
EC		 2141 iboe = &ibdev->iboe;
2142
225c7b1f
RD		 2143 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2144 goto err_dealloc;
2145
2146 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2147 goto err_pd;
2148
4979d18f
RD		 2149 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2150 PAGE_SIZE);
225c7b1f
RD		 2151 if (!ibdev->uar_map)
2152 goto err_uar;
26c6bc7b 2153 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2154
225c7b1f 2155 ibdev->dev = dev;
c6215745 2156 ibdev->bond_next_port = 0;
225c7b1f
RD		 2157
2158 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2159 ibdev->ib_dev.owner = THIS_MODULE;
2160 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2161 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2162 ibdev->num_ports = num_ports;
a5750090
MS		 2163 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2164 1 : ibdev->num_ports;
b8dd786f 2165 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2166 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2167
08ff3235
OG		 2168 if (dev->caps.userspace_caps)
2169 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2170 else
2171 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2172
225c7b1f
RD		 2173 ibdev->ib_dev.uverbs_cmd_mask =
2174 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2175 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2176 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2177 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2178 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2179 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2180 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2181 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2182 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2183 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2184 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2185 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2186 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2187 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2188 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2189 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2190 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2191 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2192 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2193 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2194 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2195 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2196 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2197 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2198
2199 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2200 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2201 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2202 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2203 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2204 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2205 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2206 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2207 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2208 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2209 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2210 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2211 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2212 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2213 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2214 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2215 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2216 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2217 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2218 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2219 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2220 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2221 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2222 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2223 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2224 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2225 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2226 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2227 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2228 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2229 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2230 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2231 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2232 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2233 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2234 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2235 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2236 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2237 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2238 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2239 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2240 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2241
992e8e6e
JM		 2242 if (!mlx4_is_slave(ibdev->dev)) {
2243 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2244 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2245 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2246 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2247 }
8ad11fb6 2248
b425388d
SM		 2249 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2250 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2251 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2252 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2253 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2254
2255 ibdev->ib_dev.uverbs_cmd_mask |=
2256 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2257 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2258 }
2259
012a8ff5
SH		 2260 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2261 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2262 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2263 ibdev->ib_dev.uverbs_cmd_mask |=
2264 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2265 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2266 }
2267
f77c0162 2268 if (check_flow_steering_support(dev)) {
0a9b7d59 2269 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2270 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2271 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2272
f21519b2
YD		 2273 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2274 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2275 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2276 }
2277
e605b743
SP		 2278 mlx4_ib_alloc_eqs(dev, ibdev);
2279
fa417f7b
EC		 2280 spin_lock_init(&iboe->lock);
2281
225c7b1f
RD		 2282 if (init_node_data(ibdev))
2283 goto err_map;
2284
a5750090
MS		 2285 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2286 for (i = 0; i < num_req_counters; ++i) {
9433c188 2287 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2288 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2289 IB_LINK_LAYER_ETHERNET) {
2290 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2291 if (err)
2292 ibdev->counters[i] = -1;
3839d8ac
DC		 2293 } else {
2294 ibdev->counters[i] = -1;
2295 }
cfcde11c 2296 }
a5750090
MS		 2297 if (mlx4_is_bonded(dev))
2298 for (i = 1; i < ibdev->num_ports ; ++i)
2299 ibdev->counters[i] = ibdev->counters[0];
2300
cfcde11c 2301
4196670b
MB		 2302 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2303 ib_num_ports++;
2304
225c7b1f
RD		 2305 spin_lock_init(&ibdev->sm_lock);
2306 mutex_init(&ibdev->cap_mask_mutex);
2307
4196670b
MB		 2308 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2309 ib_num_ports) {
c1c98501
MB		 2310 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2311 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2312 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2313 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2314 if (err)
2315 goto err_counter;
2316
2317 ibdev->ib_uc_qpns_bitmap =
2318 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2319 sizeof(long),
2320 GFP_KERNEL);
2321 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2322 dev_err(&dev->persist->pdev->dev,
2323 "bit map alloc failed\n");
c1c98501
MB		 2324 goto err_steer_qp_release;
2325 }
2326
2327 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2328
2329 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2330 dev, ibdev->steer_qpn_base,
2331 ibdev->steer_qpn_base +
2332 ibdev->steer_qpn_count - 1);
2333 if (err)
2334 goto err_steer_free_bitmap;
2335 }
2336
3e0629cb
JM		 2337 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2338 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2339
9a6edb60 2340 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2341 goto err_steer_free_bitmap;
225c7b1f
RD		 2342
2343 if (mlx4_ib_mad_init(ibdev))
2344 goto err_reg;
2345
fc06573d
JM		 2346 if (mlx4_ib_init_sriov(ibdev))
2347 goto err_mad;
2348
d487ee77
MS		 2349 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2350 if (!iboe->nb.notifier_call) {
2351 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2352 err = register_netdevice_notifier(&iboe->nb);
2353 if (err) {
2354 iboe->nb.notifier_call = NULL;
2355 goto err_notif;
2356 }
2357 }
2358 if (!iboe->nb_inet.notifier_call) {
2359 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2360 err = register_inetaddr_notifier(&iboe->nb_inet);
2361 if (err) {
2362 iboe->nb_inet.notifier_call = NULL;
2363 goto err_notif;
2364 }
2365 }
27cdef63 2366#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2367 if (!iboe->nb_inet6.notifier_call) {
2368 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2369 err = register_inet6addr_notifier(&iboe->nb_inet6);
2370 if (err) {
2371 iboe->nb_inet6.notifier_call = NULL;
2372 goto err_notif;
2373 }
2374 }
2375#endif
655b2aae
MS		 2376 if (mlx4_ib_init_gid_table(ibdev))
2377 goto err_notif;
fa417f7b
EC		 2378 }
2379
035b1032 2380 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2381 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2382 mlx4_class_attributes[j]))
fa417f7b 2383 goto err_notif;
cd9281d8
JM		 2384 }
2385
3b4a8cd5
JM		 2386 ibdev->ib_active = true;
2387
54679e14
JM		 2388 if (mlx4_is_mfunc(ibdev->dev))
2389 init_pkeys(ibdev);
2390
3806d08c
JM		 2391 /* create paravirt contexts for any VFs which are active */
2392 if (mlx4_is_master(ibdev->dev)) {
2393 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2394 if (j == mlx4_master_func_num(ibdev->dev))
2395 continue;
2396 if (mlx4_is_slave_active(ibdev->dev, j))
2397 do_slave_init(ibdev, j, 1);
2398 }
2399 }
225c7b1f
RD		 2400 return ibdev;
2401
fa417f7b 2402err_notif:
d487ee77
MS		 2403 if (ibdev->iboe.nb.notifier_call) {
2404 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2405 pr_warn("failure unregistering notifier\n");
2406 ibdev->iboe.nb.notifier_call = NULL;
2407 }
2408 if (ibdev->iboe.nb_inet.notifier_call) {
2409 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2410 pr_warn("failure unregistering notifier\n");
2411 ibdev->iboe.nb_inet.notifier_call = NULL;
2412 }
27cdef63 2413#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2414 if (ibdev->iboe.nb_inet6.notifier_call) {
2415 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2416 pr_warn("failure unregistering notifier\n");
2417 ibdev->iboe.nb_inet6.notifier_call = NULL;
2418 }
2419#endif
fa417f7b
EC		 2420 flush_workqueue(wq);
2421
fc06573d
JM		 2422 mlx4_ib_close_sriov(ibdev);
2423
2424err_mad:
2425 mlx4_ib_mad_cleanup(ibdev);
2426
225c7b1f
RD		 2427err_reg:
2428 ib_unregister_device(&ibdev->ib_dev);
2429
c1c98501
MB		 2430err_steer_free_bitmap:
2431 kfree(ibdev->ib_uc_qpns_bitmap);
2432
2433err_steer_qp_release:
2434 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2435 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2436 ibdev->steer_qpn_count);
cfcde11c
OG		 2437err_counter:
2438 for (; i; --i)
4af3ce0d
RD		 2439 if (ibdev->counters[i - 1] != -1)
2440 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2441
225c7b1f
RD		 2442err_map:
2443 iounmap(ibdev->uar_map);
2444
2445err_uar:
2446 mlx4_uar_free(dev, &ibdev->priv_uar);
2447
2448err_pd:
2449 mlx4_pd_free(dev, ibdev->priv_pdn);
2450
2451err_dealloc:
2452 ib_dealloc_device(&ibdev->ib_dev);
2453
2454 return NULL;
2455}
2456
c1c98501
MB		 2457int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2458{
2459 int offset;
2460
2461 WARN_ON(!dev->ib_uc_qpns_bitmap);
2462
2463 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2464 dev->steer_qpn_count,
2465 get_count_order(count));
2466 if (offset < 0)
2467 return offset;
2468
2469 *qpn = dev->steer_qpn_base + offset;
2470 return 0;
2471}
2472
2473void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2474{
2475 if (!qpn ||
2476 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2477 return;
2478
2479 BUG_ON(qpn < dev->steer_qpn_base);
2480
2481 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2482 qpn - dev->steer_qpn_base,
2483 get_count_order(count));
2484}
2485
2486int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2487 int is_attach)
2488{
2489 int err;
2490 size_t flow_size;
2491 struct ib_flow_attr *flow = NULL;
2492 struct ib_flow_spec_ib *ib_spec;
2493
2494 if (is_attach) {
2495 flow_size = sizeof(struct ib_flow_attr) +
2496 sizeof(struct ib_flow_spec_ib);
2497 flow = kzalloc(flow_size, GFP_KERNEL);
2498 if (!flow)
2499 return -ENOMEM;
2500 flow->port = mqp->port;
2501 flow->num_of_specs = 1;
2502 flow->size = flow_size;
2503 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2504 ib_spec->type = IB_FLOW_SPEC_IB;
2505 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2506 /* Add an empty rule for IB L2 */
2507 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2508
2509 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2510 IB_FLOW_DOMAIN_NIC,
2511 MLX4_FS_REGULAR,
2512 &mqp->reg_id);
2513 } else {
2514 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2515 }
2516 kfree(flow);
2517 return err;
2518}
2519
225c7b1f
RD		 2520static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2521{
2522 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2523 int p;
2524
4bf9715f
MS		 2525 ibdev->ib_active = false;
2526 flush_workqueue(wq);
2527
fc06573d 2528 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2529 mlx4_ib_mad_cleanup(ibdev);
2530 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2531 if (ibdev->iboe.nb.notifier_call) {
2532 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2533 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2534 ibdev->iboe.nb.notifier_call = NULL;
2535 }
c1c98501
MB		 2536
2537 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2538 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2539 ibdev->steer_qpn_count);
2540 kfree(ibdev->ib_uc_qpns_bitmap);
2541 }
2542
d487ee77
MS		 2543 if (ibdev->iboe.nb_inet.notifier_call) {
2544 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2545 pr_warn("failure unregistering notifier\n");
2546 ibdev->iboe.nb_inet.notifier_call = NULL;
2547 }
27cdef63 2548#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2549 if (ibdev->iboe.nb_inet6.notifier_call) {
2550 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2551 pr_warn("failure unregistering notifier\n");
2552 ibdev->iboe.nb_inet6.notifier_call = NULL;
2553 }
2554#endif
fb1b5034 2555
fa417f7b 2556 iounmap(ibdev->uar_map);
cfcde11c 2557 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2558 if (ibdev->counters[p] != -1)
2559 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2560 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2561 mlx4_CLOSE_PORT(dev, p);
2562
e605b743
SP		 2563 mlx4_ib_free_eqs(dev, ibdev);
2564
225c7b1f
RD		 2565 mlx4_uar_free(dev, &ibdev->priv_uar);
2566 mlx4_pd_free(dev, ibdev->priv_pdn);
2567 ib_dealloc_device(&ibdev->ib_dev);
2568}
2569
fc06573d
JM		 2570static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2571{
2572 struct mlx4_ib_demux_work **dm = NULL;
2573 struct mlx4_dev *dev = ibdev->dev;
2574 int i;
2575 unsigned long flags;
449fc488
MB		 2576 struct mlx4_active_ports actv_ports;
2577 unsigned int ports;
2578 unsigned int first_port;
fc06573d
JM		 2579
2580 if (!mlx4_is_master(dev))
2581 return;
2582
449fc488
MB		 2583 actv_ports = mlx4_get_active_ports(dev, slave);
2584 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2585 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2586
2587 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2588 if (!dm) {
2589 pr_err("failed to allocate memory for tunneling qp update\n");
2590 goto out;
2591 }
2592
449fc488 2593 for (i = 0; i < ports; i++) {
fc06573d
JM		 2594 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2595 if (!dm[i]) {
2596 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2597 for (i = 0; i < dev->caps.num_ports; i++) {
2598 if (dm[i])
2599 kfree(dm[i]);
2600 }
2601 goto out;
2602 }
2603 }
2604 /* initialize or tear down tunnel QPs for the slave */
449fc488 2605 for (i = 0; i < ports; i++) {
fc06573d 2606 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2607 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2608 dm[i]->slave = slave;
2609 dm[i]->do_init = do_init;
2610 dm[i]->dev = ibdev;
2611 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2612 if (!ibdev->sriov.is_going_down)
2613 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2614 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2615 }
2616out:
c89d1271 2617 kfree(dm);
fc06573d
JM		 2618 return;
2619}
2620
a5750090
MS		 2621static void handle_bonded_port_state_event(struct work_struct *work)
2622{
2623 struct ib_event_work *ew =
2624 container_of(work, struct ib_event_work, work);
2625 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2626 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2627 int i;
2628 struct ib_event ibev;
2629
2630 kfree(ew);
2631 spin_lock_bh(&ibdev->iboe.lock);
2632 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2633 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
2634
2635 enum ib_port_state curr_port_state =
2636 (netif_running(curr_netdev) &&
2637 netif_carrier_ok(curr_netdev)) ?
2638 IB_PORT_ACTIVE : IB_PORT_DOWN;
2639
2640 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2641 curr_port_state : IB_PORT_ACTIVE;
2642 }
2643 spin_unlock_bh(&ibdev->iboe.lock);
2644
2645 ibev.device = &ibdev->ib_dev;
2646 ibev.element.port_num = 1;
2647 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2648 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2649
2650 ib_dispatch_event(&ibev);
2651}
2652
225c7b1f 2653static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2654 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2655{
2656 struct ib_event ibev;
7ff93f8b 2657 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2658 struct mlx4_eqe *eqe = NULL;
2659 struct ib_event_work *ew;
fc06573d 2660 int p = 0;
00f5ce99 2661
a5750090
MS		 2662 if (mlx4_is_bonded(dev) &&
2663 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2664 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2665 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2666 if (!ew)
2667 return;
2668 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2669 ew->ib_dev = ibdev;
2670 queue_work(wq, &ew->work);
2671 return;
2672 }
2673
00f5ce99
JM		 2674 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2675 eqe = (struct mlx4_eqe *)param;
2676 else
fc06573d 2677 p = (int) param;
225c7b1f
RD		 2678
2679 switch (event) {
37608eea 2680 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2681 if (p > ibdev->num_ports)
2682 return;
a0c64a17
JM		 2683 if (mlx4_is_master(dev) &&
2684 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2685 IB_LINK_LAYER_INFINIBAND) {
2686 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2687 }
37608eea 2688 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2689 break;
2690
37608eea 2691 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2692 if (p > ibdev->num_ports)
2693 return;
37608eea
RD		 2694 ibev.event = IB_EVENT_PORT_ERR;
2695 break;
2696
2697 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2698 ibdev->ib_active = false;
225c7b1f
RD		 2699 ibev.event = IB_EVENT_DEVICE_FATAL;
2700 break;
2701
00f5ce99
JM		 2702 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2703 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2704 if (!ew) {
2705 pr_err("failed to allocate memory for events work\n");
2706 break;
2707 }
2708
2709 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2710 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2711 ew->ib_dev = ibdev;
992e8e6e
JM		 2712 /* need to queue only for port owner, which uses GEN_EQE */
2713 if (mlx4_is_master(dev))
2714 queue_work(wq, &ew->work);
2715 else
2716 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2717 return;
2718
fc06573d
JM		 2719 case MLX4_DEV_EVENT_SLAVE_INIT:
2720 /* here, p is the slave id */
2721 do_slave_init(ibdev, p, 1);
2722 return;
2723
2724 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2725 /* here, p is the slave id */
2726 do_slave_init(ibdev, p, 0);
2727 return;
2728
225c7b1f
RD		 2729 default:
2730 return;
2731 }
2732
2733 ibev.device = ibdev_ptr;
a5750090 2734 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2735
2736 ib_dispatch_event(&ibev);
2737}
2738
2739static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2740 .add = mlx4_ib_add,
2741 .remove = mlx4_ib_remove,
2742 .event = mlx4_ib_event,
a5750090
MS		 2743 .protocol = MLX4_PROT_IB_IPV6,
2744 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2745};
2746
2747static int __init mlx4_ib_init(void)
2748{
fa417f7b
EC		 2749 int err;
2750
2751 wq = create_singlethread_workqueue("mlx4_ib");
2752 if (!wq)
2753 return -ENOMEM;
2754
b9c5d6a6
OD		 2755 err = mlx4_ib_mcg_init();
2756 if (err)
2757 goto clean_wq;
2758
fa417f7b 2759 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2760 if (err)
2761 goto clean_mcg;
fa417f7b
EC		 2762
2763 return 0;
b9c5d6a6
OD		 2764
2765clean_mcg:
2766 mlx4_ib_mcg_destroy();
2767
2768clean_wq:
2769 destroy_workqueue(wq);
2770 return err;
225c7b1f
RD		 2771}
2772
2773static void __exit mlx4_ib_cleanup(void)
2774{
2775 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2776 mlx4_ib_mcg_destroy();
fa417f7b 2777 destroy_workqueue(wq);
225c7b1f
RD		 2778}
2779
2780module_init(mlx4_ib_init);
2781module_exit(mlx4_ib_cleanup);
Linux 6.x block layer and io_uring tree(s)