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IB/user_mad: Fix buggy usage of port index
[linux-2.6-block.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
56c1d233 69int mlx4_ib_sm_guid_assign = 0;
a0c64a17 70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
56c1d233 71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
a0c64a17 72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f
RD		 134static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props)
136{
137 struct mlx4_ib_dev *dev = to_mdev(ibdev);
138 struct ib_smp *in_mad = NULL;
139 struct ib_smp *out_mad = NULL;
140 int err = -ENOMEM;
3dec4878 141 int have_ib_ports;
225c7b1f
RD		 142
143 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
144 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
145 if (!in_mad || !out_mad)
146 goto out;
147
148 init_query_mad(in_mad);
149 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
150
0a9a0188
JM		 151 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
152 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 153 if (err)
154 goto out;
155
156 memset(props, 0, sizeof *props);
157
3dec4878
JM		 158 have_ib_ports = num_ib_ports(dev->dev);
159
225c7b1f
RD		 160 props->fw_ver = dev->dev->caps.fw_ver;
161 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
162 IB_DEVICE_PORT_ACTIVE_EVENT |
163 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 164 IB_DEVICE_RC_RNR_NAK_GEN |
165 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
167 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
169 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 171 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
173 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
175 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 176 if (dev->dev->caps.max_gso_sz &&
177 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 179 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
181 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
185 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
187 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
189 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
192 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
193 else
194 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 195 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 196 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 197 }
225c7b1f
RD		 198
199 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
200 0xffffff;
872bf2fb 201 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 202 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
203 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
204
205 props->max_mr_size = ~0ull;
206 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 207 props->max_qp = dev->dev->quotas.qp;
fc2d0044 208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 209 props->max_sge = min(dev->dev->caps.max_sq_sg,
210 dev->dev->caps.max_rq_sg);
5a0d0a61 211 props->max_cq = dev->dev->quotas.cq;
225c7b1f 212 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 213 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
217 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 218 props->max_srq = dev->dev->quotas.srq;
c8681f14 219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 220 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 221 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
224 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 225 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 226 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
229 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
230 props->max_mcast_grp;
a5bbe892 231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
225c7b1f
RD		 232
233out:
234 kfree(in_mad);
235 kfree(out_mad);
236
237 return err;
238}
239
fa417f7b
EC		 240static enum rdma_link_layer
241mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 242{
fa417f7b 243 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 244
65dab25d 245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 246 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
247}
225c7b1f 248
fa417f7b 249static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 250 struct ib_port_attr *props, int netw_view)
fa417f7b 251{
a9c766bb
OG		 252 struct ib_smp *in_mad = NULL;
253 struct ib_smp *out_mad = NULL;
a5e12dff 254 int ext_active_speed;
0a9a0188 255 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 256 int err = -ENOMEM;
257
258 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
259 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
260 if (!in_mad || !out_mad)
261 goto out;
262
263 init_query_mad(in_mad);
264 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
265 in_mad->attr_mod = cpu_to_be32(port);
266
0a9a0188
JM		 267 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
268 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
269
270 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 271 in_mad, out_mad);
272 if (err)
273 goto out;
274
a5e12dff 275
225c7b1f
RD		 276 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
277 props->lmc = out_mad->data[34] & 0x7;
278 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
279 props->sm_sl = out_mad->data[36] & 0xf;
280 props->state = out_mad->data[32] & 0xf;
281 props->phys_state = out_mad->data[33] >> 4;
282 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 283 if (netw_view)
284 props->gid_tbl_len = out_mad->data[50];
285 else
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 289 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
290 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
291 props->active_width = out_mad->data[31] & 0xf;
292 props->active_speed = out_mad->data[35] >> 4;
293 props->max_mtu = out_mad->data[41] & 0xf;
294 props->active_mtu = out_mad->data[36] >> 4;
295 props->subnet_timeout = out_mad->data[51] & 0x1f;
296 props->max_vl_num = out_mad->data[37] >> 4;
297 props->init_type_reply = out_mad->data[41] >> 4;
298
a5e12dff
MA		 299 /* Check if extended speeds (EDR/FDR/...) are supported */
300 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
301 ext_active_speed = out_mad->data[62] >> 4;
302
303 switch (ext_active_speed) {
304 case 1:
2e96691c 305 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 306 break;
307 case 2:
2e96691c 308 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 309 break;
310 }
311 }
312
313 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 314 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
318
0a9a0188 319 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 320 NULL, NULL, in_mad, out_mad);
321 if (err)
bf6b47de 322 goto out;
8154c07f
OG		 323
324 /* Checking LinkSpeedActive for FDR-10 */
325 if (out_mad->data[15] & 0x1)
326 props->active_speed = IB_SPEED_FDR10;
a5e12dff 327 }
d2ef4068
OG		 328
329 /* Avoid wrong speed value returned by FW if the IB link is down. */
330 if (props->state == IB_PORT_DOWN)
331 props->active_speed = IB_SPEED_SDR;
332
a9c766bb
OG		 333out:
334 kfree(in_mad);
335 kfree(out_mad);
336 return err;
fa417f7b
EC		 337}
338
339static u8 state_to_phys_state(enum ib_port_state state)
340{
341 return state == IB_PORT_ACTIVE ? 5 : 3;
342}
343
344static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 345 struct ib_port_attr *props, int netw_view)
fa417f7b 346{
a9c766bb
OG		 347
348 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
349 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 350 struct net_device *ndev;
351 enum ib_mtu tmp;
a9c766bb
OG		 352 struct mlx4_cmd_mailbox *mailbox;
353 int err = 0;
a5750090 354 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 355
356 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
357 if (IS_ERR(mailbox))
358 return PTR_ERR(mailbox);
fa417f7b 359
a9c766bb
OG		 360 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
361 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
362 MLX4_CMD_WRAPPED);
363 if (err)
364 goto out;
365
366 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
367 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 368 props->active_speed = IB_SPEED_QDR;
b4a26a27 369 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 370 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
371 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 372 props->pkey_tbl_len = 1;
bcacb897 373 props->max_mtu = IB_MTU_4096;
a9c766bb 374 props->max_vl_num = 2;
fa417f7b
EC		 375 props->state = IB_PORT_DOWN;
376 props->phys_state = state_to_phys_state(props->state);
377 props->active_mtu = IB_MTU_256;
a5750090
MS		 378 if (is_bonded)
379 rtnl_lock(); /* required to get upper dev */
dba3ad2a 380 spin_lock_bh(&iboe->lock);
fa417f7b 381 ndev = iboe->netdevs[port - 1];
a5750090
MS		 382 if (ndev && is_bonded)
383 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 384 if (!ndev)
a9c766bb 385 goto out_unlock;
fa417f7b
EC		 386
387 tmp = iboe_get_mtu(ndev->mtu);
388 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
389
21d60609 390 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 391 IB_PORT_ACTIVE : IB_PORT_DOWN;
392 props->phys_state = state_to_phys_state(props->state);
a9c766bb 393out_unlock:
dba3ad2a 394 spin_unlock_bh(&iboe->lock);
a5750090
MS		 395 if (is_bonded)
396 rtnl_unlock();
a9c766bb
OG		 397out:
398 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
399 return err;
fa417f7b
EC		 400}
401
0a9a0188
JM		 402int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
403 struct ib_port_attr *props, int netw_view)
fa417f7b 404{
a9c766bb 405 int err;
fa417f7b
EC		 406
407 memset(props, 0, sizeof *props);
408
fa417f7b 409 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 410 ib_link_query_port(ibdev, port, props, netw_view) :
411 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 412
413 return err;
414}
415
0a9a0188
JM		 416static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
417 struct ib_port_attr *props)
418{
419 /* returns host view */
420 return __mlx4_ib_query_port(ibdev, port, props, 0);
421}
422
6b90a6d6
MW		 423static enum rdma_protocol_type
424mlx4_ib_query_protocol(struct ib_device *device, u8 port_num)
425{
426 struct mlx4_dev *dev = to_mdev(device)->dev;
427
428 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
429 RDMA_PROTOCOL_IB : RDMA_PROTOCOL_IBOE;
430}
431
a0c64a17
JM		 432int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
433 union ib_gid *gid, int netw_view)
225c7b1f
RD		 434{
435 struct ib_smp *in_mad = NULL;
436 struct ib_smp *out_mad = NULL;
437 int err = -ENOMEM;
a0c64a17
JM		 438 struct mlx4_ib_dev *dev = to_mdev(ibdev);
439 int clear = 0;
440 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 441
442 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
443 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
444 if (!in_mad || !out_mad)
445 goto out;
446
447 init_query_mad(in_mad);
448 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
449 in_mad->attr_mod = cpu_to_be32(port);
450
a0c64a17
JM		 451 if (mlx4_is_mfunc(dev->dev) && netw_view)
452 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
453
454 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 455 if (err)
456 goto out;
457
458 memcpy(gid->raw, out_mad->data + 8, 8);
459
a0c64a17
JM		 460 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
461 if (index) {
462 /* For any index > 0, return the null guid */
463 err = 0;
464 clear = 1;
465 goto out;
466 }
467 }
468
225c7b1f
RD		 469 init_query_mad(in_mad);
470 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
471 in_mad->attr_mod = cpu_to_be32(index / 8);
472
a0c64a17 473 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 474 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 475 if (err)
476 goto out;
477
478 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
479
480out:
a0c64a17
JM		 481 if (clear)
482 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 483 kfree(in_mad);
484 kfree(out_mad);
485 return err;
486}
487
fa417f7b
EC		 488static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
489 union ib_gid *gid)
490{
491 struct mlx4_ib_dev *dev = to_mdev(ibdev);
492
493 *gid = dev->iboe.gid_table[port - 1][index];
494
495 return 0;
496}
497
498static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
499 union ib_gid *gid)
500{
501 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 502 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 503 else
504 return iboe_query_gid(ibdev, port, index, gid);
505}
506
0a9a0188
JM		 507int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
508 u16 *pkey, int netw_view)
225c7b1f
RD		 509{
510 struct ib_smp *in_mad = NULL;
511 struct ib_smp *out_mad = NULL;
0a9a0188 512 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 513 int err = -ENOMEM;
514
515 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
516 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
517 if (!in_mad || !out_mad)
518 goto out;
519
520 init_query_mad(in_mad);
521 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
522 in_mad->attr_mod = cpu_to_be32(index / 32);
523
0a9a0188
JM		 524 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
525 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
526
527 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
528 in_mad, out_mad);
225c7b1f
RD		 529 if (err)
530 goto out;
531
532 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
533
534out:
535 kfree(in_mad);
536 kfree(out_mad);
537 return err;
538}
539
0a9a0188
JM		 540static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
541{
542 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
543}
544
225c7b1f
RD		 545static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
546 struct ib_device_modify *props)
547{
d0d68b86 548 struct mlx4_cmd_mailbox *mailbox;
df7fba66 549 unsigned long flags;
d0d68b86 550
225c7b1f
RD		 551 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
552 return -EOPNOTSUPP;
553
d0d68b86
JM		 554 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
555 return 0;
556
992e8e6e
JM		 557 if (mlx4_is_slave(to_mdev(ibdev)->dev))
558 return -EOPNOTSUPP;
559
df7fba66 560 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 561 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 562 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 563
564 /*
565 * If possible, pass node desc to FW, so it can generate
566 * a 144 trap. If cmd fails, just ignore.
567 */
568 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
569 if (IS_ERR(mailbox))
570 return 0;
571
d0d68b86
JM		 572 memcpy(mailbox->buf, props->node_desc, 64);
573 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 574 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 575
576 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 577
578 return 0;
579}
580
61565013
JM		 581static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
582 u32 cap_mask)
225c7b1f
RD		 583{
584 struct mlx4_cmd_mailbox *mailbox;
585 int err;
586
587 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
588 if (IS_ERR(mailbox))
589 return PTR_ERR(mailbox);
590
5ae2a7a8
RD		 591 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
592 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
593 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
594 } else {
595 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
596 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
597 }
225c7b1f 598
a130b590
IS		 599 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
600 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
601 MLX4_CMD_WRAPPED);
225c7b1f
RD		 602
603 mlx4_free_cmd_mailbox(dev->dev, mailbox);
604 return err;
605}
606
607static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
608 struct ib_port_modify *props)
609{
61565013
JM		 610 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
611 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 612 struct ib_port_attr attr;
613 u32 cap_mask;
614 int err;
615
61565013
JM		 616 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
617 * of whether port link layer is ETH or IB. For ETH ports, qkey
618 * violations and port capabilities are not meaningful.
619 */
620 if (is_eth)
621 return 0;
622
623 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 624
625 err = mlx4_ib_query_port(ibdev, port, &attr);
626 if (err)
627 goto out;
628
629 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
630 ~props->clr_port_cap_mask;
631
61565013
JM		 632 err = mlx4_ib_SET_PORT(mdev, port,
633 !!(mask & IB_PORT_RESET_QKEY_CNTR),
634 cap_mask);
225c7b1f
RD		 635
636out:
637 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
638 return err;
639}
640
641static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
642 struct ib_udata *udata)
643{
644 struct mlx4_ib_dev *dev = to_mdev(ibdev);
645 struct mlx4_ib_ucontext *context;
08ff3235 646 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 647 struct mlx4_ib_alloc_ucontext_resp resp;
648 int err;
649
3b4a8cd5
JM		 650 if (!dev->ib_active)
651 return ERR_PTR(-EAGAIN);
652
08ff3235
OG		 653 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
654 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
655 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
656 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
657 } else {
658 resp.dev_caps = dev->dev->caps.userspace_caps;
659 resp.qp_tab_size = dev->dev->caps.num_qps;
660 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
661 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
662 resp.cqe_size = dev->dev->caps.cqe_size;
663 }
225c7b1f
RD		 664
665 context = kmalloc(sizeof *context, GFP_KERNEL);
666 if (!context)
667 return ERR_PTR(-ENOMEM);
668
669 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
670 if (err) {
671 kfree(context);
672 return ERR_PTR(err);
673 }
674
675 INIT_LIST_HEAD(&context->db_page_list);
676 mutex_init(&context->db_page_mutex);
677
08ff3235
OG		 678 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
679 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
680 else
681 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
682
225c7b1f
RD		 683 if (err) {
684 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
685 kfree(context);
686 return ERR_PTR(-EFAULT);
687 }
688
689 return &context->ibucontext;
690}
691
692static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
693{
694 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
695
696 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
697 kfree(context);
698
699 return 0;
700}
701
702static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
703{
704 struct mlx4_ib_dev *dev = to_mdev(context->device);
705
706 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
707 return -EINVAL;
708
709 if (vma->vm_pgoff == 0) {
710 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
711
712 if (io_remap_pfn_range(vma, vma->vm_start,
713 to_mucontext(context)->uar.pfn,
714 PAGE_SIZE, vma->vm_page_prot))
715 return -EAGAIN;
716 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 717 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 718
719 if (io_remap_pfn_range(vma, vma->vm_start,
720 to_mucontext(context)->uar.pfn +
721 dev->dev->caps.num_uars,
722 PAGE_SIZE, vma->vm_page_prot))
723 return -EAGAIN;
724 } else
725 return -EINVAL;
726
727 return 0;
728}
729
730static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
731 struct ib_ucontext *context,
732 struct ib_udata *udata)
733{
734 struct mlx4_ib_pd *pd;
735 int err;
736
737 pd = kmalloc(sizeof *pd, GFP_KERNEL);
738 if (!pd)
739 return ERR_PTR(-ENOMEM);
740
741 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
742 if (err) {
743 kfree(pd);
744 return ERR_PTR(err);
745 }
746
747 if (context)
748 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
749 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
750 kfree(pd);
751 return ERR_PTR(-EFAULT);
752 }
753
754 return &pd->ibpd;
755}
756
757static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
758{
759 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
760 kfree(pd);
761
762 return 0;
763}
764
012a8ff5
SH		 765static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
766 struct ib_ucontext *context,
767 struct ib_udata *udata)
768{
769 struct mlx4_ib_xrcd *xrcd;
770 int err;
771
772 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
773 return ERR_PTR(-ENOSYS);
774
775 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
776 if (!xrcd)
777 return ERR_PTR(-ENOMEM);
778
779 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
780 if (err)
781 goto err1;
782
783 xrcd->pd = ib_alloc_pd(ibdev);
784 if (IS_ERR(xrcd->pd)) {
785 err = PTR_ERR(xrcd->pd);
786 goto err2;
787 }
788
789 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
790 if (IS_ERR(xrcd->cq)) {
791 err = PTR_ERR(xrcd->cq);
792 goto err3;
793 }
794
795 return &xrcd->ibxrcd;
796
797err3:
798 ib_dealloc_pd(xrcd->pd);
799err2:
800 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
801err1:
802 kfree(xrcd);
803 return ERR_PTR(err);
804}
805
806static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
807{
808 ib_destroy_cq(to_mxrcd(xrcd)->cq);
809 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
810 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
811 kfree(xrcd);
812
813 return 0;
814}
815
fa417f7b
EC		 816static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
817{
818 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
819 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
820 struct mlx4_ib_gid_entry *ge;
821
822 ge = kzalloc(sizeof *ge, GFP_KERNEL);
823 if (!ge)
824 return -ENOMEM;
825
826 ge->gid = *gid;
827 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
828 ge->port = mqp->port;
829 ge->added = 1;
830 }
831
832 mutex_lock(&mqp->mutex);
833 list_add_tail(&ge->list, &mqp->gid_list);
834 mutex_unlock(&mqp->mutex);
835
836 return 0;
837}
838
839int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
840 union ib_gid *gid)
841{
fa417f7b
EC		 842 struct net_device *ndev;
843 int ret = 0;
844
845 if (!mqp->port)
846 return 0;
847
dba3ad2a 848 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 849 ndev = mdev->iboe.netdevs[mqp->port - 1];
850 if (ndev)
851 dev_hold(ndev);
dba3ad2a 852 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 853
854 if (ndev) {
fa417f7b 855 ret = 1;
fa417f7b
EC		 856 dev_put(ndev);
857 }
858
859 return ret;
860}
861
0ff1fb65
HHZ		 862struct mlx4_ib_steering {
863 struct list_head list;
146d6e19 864 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 865 union ib_gid gid;
866};
867
f77c0162 868static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 869 u32 qp_num,
f77c0162
HHZ		 870 union ib_flow_spec *ib_spec,
871 struct _rule_hw *mlx4_spec)
872{
873 enum mlx4_net_trans_rule_id type;
874
875 switch (ib_spec->type) {
876 case IB_FLOW_SPEC_ETH:
877 type = MLX4_NET_TRANS_RULE_ID_ETH;
878 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
879 ETH_ALEN);
880 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
881 ETH_ALEN);
882 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
883 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
884 break;
a37a1a42
MB		 885 case IB_FLOW_SPEC_IB:
886 type = MLX4_NET_TRANS_RULE_ID_IB;
887 mlx4_spec->ib.l3_qpn =
888 cpu_to_be32(qp_num);
889 mlx4_spec->ib.qpn_mask =
890 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
891 break;
892
f77c0162
HHZ		 893
894 case IB_FLOW_SPEC_IPV4:
895 type = MLX4_NET_TRANS_RULE_ID_IPV4;
896 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
897 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
898 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
899 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
900 break;
901
902 case IB_FLOW_SPEC_TCP:
903 case IB_FLOW_SPEC_UDP:
904 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
905 MLX4_NET_TRANS_RULE_ID_TCP :
906 MLX4_NET_TRANS_RULE_ID_UDP;
907 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
908 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
909 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
910 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
911 break;
912
913 default:
914 return -EINVAL;
915 }
916 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
917 mlx4_hw_rule_sz(dev, type) < 0)
918 return -EINVAL;
919 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
920 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
921 return mlx4_hw_rule_sz(dev, type);
922}
923
a37a1a42
MB		 924struct default_rules {
925 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
926 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
927 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
928 __u8 link_layer;
929};
930static const struct default_rules default_table[] = {
931 {
932 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
933 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
934 .rules_create_list = {IB_FLOW_SPEC_IB},
935 .link_layer = IB_LINK_LAYER_INFINIBAND
936 }
937};
938
939static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
940 struct ib_flow_attr *flow_attr)
941{
942 int i, j, k;
943 void *ib_flow;
944 const struct default_rules *pdefault_rules = default_table;
945 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
946
a57f23f6 947 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 948 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
949 memset(&field_types, 0, sizeof(field_types));
950
951 if (link_layer != pdefault_rules->link_layer)
952 continue;
953
954 ib_flow = flow_attr + 1;
955 /* we assume the specs are sorted */
956 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
957 j < flow_attr->num_of_specs; k++) {
958 union ib_flow_spec *current_flow =
959 (union ib_flow_spec *)ib_flow;
960
961 /* same layer but different type */
962 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
963 (pdefault_rules->mandatory_fields[k] &
964 IB_FLOW_SPEC_LAYER_MASK)) &&
965 (current_flow->type !=
966 pdefault_rules->mandatory_fields[k]))
967 goto out;
968
969 /* same layer, try match next one */
970 if (current_flow->type ==
971 pdefault_rules->mandatory_fields[k]) {
972 j++;
973 ib_flow +=
974 ((union ib_flow_spec *)ib_flow)->size;
975 }
976 }
977
978 ib_flow = flow_attr + 1;
979 for (j = 0; j < flow_attr->num_of_specs;
980 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
981 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
982 /* same layer and same type */
983 if (((union ib_flow_spec *)ib_flow)->type ==
984 pdefault_rules->mandatory_not_fields[k])
985 goto out;
986
987 return i;
988 }
989out:
990 return -1;
991}
992
993static int __mlx4_ib_create_default_rules(
994 struct mlx4_ib_dev *mdev,
995 struct ib_qp *qp,
996 const struct default_rules *pdefault_rules,
997 struct _rule_hw *mlx4_spec) {
998 int size = 0;
999 int i;
1000
a57f23f6 1001 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 1002 int ret;
1003 union ib_flow_spec ib_spec;
1004 switch (pdefault_rules->rules_create_list[i]) {
1005 case 0:
1006 /* no rule */
1007 continue;
1008 case IB_FLOW_SPEC_IB:
1009 ib_spec.type = IB_FLOW_SPEC_IB;
1010 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1011
1012 break;
1013 default:
1014 /* invalid rule */
1015 return -EINVAL;
1016 }
1017 /* We must put empty rule, qpn is being ignored */
1018 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1019 mlx4_spec);
1020 if (ret < 0) {
1021 pr_info("invalid parsing\n");
1022 return -EINVAL;
1023 }
1024
1025 mlx4_spec = (void *)mlx4_spec + ret;
1026 size += ret;
1027 }
1028 return size;
1029}
1030
f77c0162
HHZ		 1031static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1032 int domain,
1033 enum mlx4_net_trans_promisc_mode flow_type,
1034 u64 *reg_id)
1035{
1036 int ret, i;
1037 int size = 0;
1038 void *ib_flow;
1039 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1040 struct mlx4_cmd_mailbox *mailbox;
1041 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1042 int default_flow;
f77c0162
HHZ		 1043
1044 static const u16 __mlx4_domain[] = {
1045 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1046 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1047 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1048 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1049 };
1050
1051 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1052 pr_err("Invalid priority value %d\n", flow_attr->priority);
1053 return -EINVAL;
1054 }
1055
1056 if (domain >= IB_FLOW_DOMAIN_NUM) {
1057 pr_err("Invalid domain value %d\n", domain);
1058 return -EINVAL;
1059 }
1060
1061 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1062 return -EINVAL;
1063
1064 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1065 if (IS_ERR(mailbox))
1066 return PTR_ERR(mailbox);
f77c0162
HHZ		 1067 ctrl = mailbox->buf;
1068
1069 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1070 flow_attr->priority);
1071 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1072 ctrl->port = flow_attr->port;
1073 ctrl->qpn = cpu_to_be32(qp->qp_num);
1074
1075 ib_flow = flow_attr + 1;
1076 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1077 /* Add default flows */
1078 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1079 if (default_flow >= 0) {
1080 ret = __mlx4_ib_create_default_rules(
1081 mdev, qp, default_table + default_flow,
1082 mailbox->buf + size);
1083 if (ret < 0) {
1084 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1085 return -EINVAL;
1086 }
1087 size += ret;
1088 }
f77c0162 1089 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1090 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1091 mailbox->buf + size);
f77c0162
HHZ		 1092 if (ret < 0) {
1093 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1094 return -EINVAL;
1095 }
1096 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1097 size += ret;
1098 }
1099
1100 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1101 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1102 MLX4_CMD_NATIVE);
1103 if (ret == -ENOMEM)
1104 pr_err("mcg table is full. Fail to register network rule.\n");
1105 else if (ret == -ENXIO)
1106 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1107 else if (ret)
1108 pr_err("Invalid argumant. Fail to register network rule.\n");
1109
1110 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1111 return ret;
1112}
1113
1114static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1115{
1116 int err;
1117 err = mlx4_cmd(dev, reg_id, 0, 0,
1118 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1119 MLX4_CMD_NATIVE);
1120 if (err)
1121 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1122 reg_id);
1123 return err;
1124}
1125
d2fce8a9
OG		 1126static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1127 u64 *reg_id)
1128{
1129 void *ib_flow;
1130 union ib_flow_spec *ib_spec;
1131 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1132 int err = 0;
1133
5eff6dad
OG		 1134 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1135 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1136 return 0; /* do nothing */
1137
1138 ib_flow = flow_attr + 1;
1139 ib_spec = (union ib_flow_spec *)ib_flow;
1140
1141 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1142 return 0; /* do nothing */
1143
1144 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1145 flow_attr->port, qp->qp_num,
1146 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1147 reg_id);
1148 return err;
1149}
1150
f77c0162
HHZ		 1151static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1152 struct ib_flow_attr *flow_attr,
1153 int domain)
1154{
146d6e19 1155 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1156 struct mlx4_ib_flow *mflow;
1157 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1158 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1159 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1160
1161 memset(type, 0, sizeof(type));
1162
1163 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1164 if (!mflow) {
1165 err = -ENOMEM;
1166 goto err_free;
1167 }
1168
1169 switch (flow_attr->type) {
1170 case IB_FLOW_ATTR_NORMAL:
1171 type[0] = MLX4_FS_REGULAR;
1172 break;
1173
1174 case IB_FLOW_ATTR_ALL_DEFAULT:
1175 type[0] = MLX4_FS_ALL_DEFAULT;
1176 break;
1177
1178 case IB_FLOW_ATTR_MC_DEFAULT:
1179 type[0] = MLX4_FS_MC_DEFAULT;
1180 break;
1181
1182 case IB_FLOW_ATTR_SNIFFER:
1183 type[0] = MLX4_FS_UC_SNIFFER;
1184 type[1] = MLX4_FS_MC_SNIFFER;
1185 break;
1186
1187 default:
1188 err = -EINVAL;
1189 goto err_free;
1190 }
1191
1192 while (i < ARRAY_SIZE(type) && type[i]) {
1193 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1194 &mflow->reg_id[i].id);
f77c0162 1195 if (err)
571e1b2c 1196 goto err_create_flow;
f77c0162 1197 i++;
146d6e19 1198 if (is_bonded) {
824c25c1
MS		 1199 /* Application always sees one port so the mirror rule
1200 * must be on port #2
1201 */
146d6e19
MS		 1202 flow_attr->port = 2;
1203 err = __mlx4_ib_create_flow(qp, flow_attr,
1204 domain, type[j],
1205 &mflow->reg_id[j].mirror);
1206 flow_attr->port = 1;
1207 if (err)
1208 goto err_create_flow;
1209 j++;
1210 }
1211
f77c0162
HHZ		 1212 }
1213
d2fce8a9 1214 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1215 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1216 &mflow->reg_id[i].id);
d2fce8a9 1217 if (err)
571e1b2c
OG		 1218 goto err_create_flow;
1219 i++;
146d6e19
MS		 1220 if (is_bonded) {
1221 flow_attr->port = 2;
1222 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1223 &mflow->reg_id[j].mirror);
1224 flow_attr->port = 1;
1225 if (err)
1226 goto err_create_flow;
1227 j++;
1228 }
1229 /* function to create mirror rule */
d2fce8a9
OG		 1230 }
1231
f77c0162
HHZ		 1232 return &mflow->ibflow;
1233
571e1b2c
OG		 1234err_create_flow:
1235 while (i) {
146d6e19
MS		 1236 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1237 mflow->reg_id[i].id);
571e1b2c
OG		 1238 i--;
1239 }
146d6e19
MS		 1240
1241 while (j) {
1242 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1243 mflow->reg_id[j].mirror);
1244 j--;
1245 }
f77c0162
HHZ		 1246err_free:
1247 kfree(mflow);
1248 return ERR_PTR(err);
1249}
1250
1251static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1252{
1253 int err, ret = 0;
1254 int i = 0;
1255 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1256 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1257
146d6e19
MS		 1258 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1259 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1260 if (err)
1261 ret = err;
146d6e19
MS		 1262 if (mflow->reg_id[i].mirror) {
1263 err = __mlx4_ib_destroy_flow(mdev->dev,
1264 mflow->reg_id[i].mirror);
1265 if (err)
1266 ret = err;
1267 }
f77c0162
HHZ		 1268 i++;
1269 }
1270
1271 kfree(mflow);
1272 return ret;
1273}
1274
225c7b1f
RD		 1275static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1276{
fa417f7b
EC		 1277 int err;
1278 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1279 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1280 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1281 struct mlx4_ib_steering *ib_steering = NULL;
e9a7faf1 1282 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
146d6e19 1283 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1284
1285 if (mdev->dev->caps.steering_mode ==
1286 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1287 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1288 if (!ib_steering)
1289 return -ENOMEM;
1290 }
fa417f7b 1291
0ff1fb65
HHZ		 1292 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1293 !!(mqp->flags &
1294 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1295 prot, &reg_id.id);
e9a7faf1
OG		 1296 if (err) {
1297 pr_err("multicast attach op failed, err %d\n", err);
0ff1fb65 1298 goto err_malloc;
e9a7faf1 1299 }
fa417f7b 1300
146d6e19
MS		 1301 reg_id.mirror = 0;
1302 if (mlx4_is_bonded(dev)) {
824c25c1
MS		 1303 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1304 (mqp->port == 1) ? 2 : 1,
146d6e19
MS		 1305 !!(mqp->flags &
1306 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1307 prot, &reg_id.mirror);
1308 if (err)
1309 goto err_add;
1310 }
1311
fa417f7b
EC		 1312 err = add_gid_entry(ibqp, gid);
1313 if (err)
1314 goto err_add;
1315
0ff1fb65
HHZ		 1316 if (ib_steering) {
1317 memcpy(ib_steering->gid.raw, gid->raw, 16);
1318 ib_steering->reg_id = reg_id;
1319 mutex_lock(&mqp->mutex);
1320 list_add(&ib_steering->list, &mqp->steering_rules);
1321 mutex_unlock(&mqp->mutex);
1322 }
fa417f7b
EC		 1323 return 0;
1324
1325err_add:
0ff1fb65 1326 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1327 prot, reg_id.id);
1328 if (reg_id.mirror)
1329 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1330 prot, reg_id.mirror);
0ff1fb65
HHZ		 1331err_malloc:
1332 kfree(ib_steering);
1333
fa417f7b
EC		 1334 return err;
1335}
1336
1337static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1338{
1339 struct mlx4_ib_gid_entry *ge;
1340 struct mlx4_ib_gid_entry *tmp;
1341 struct mlx4_ib_gid_entry *ret = NULL;
1342
1343 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1344 if (!memcmp(raw, ge->gid.raw, 16)) {
1345 ret = ge;
1346 break;
1347 }
1348 }
1349
1350 return ret;
225c7b1f
RD		 1351}
1352
1353static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1354{
fa417f7b
EC		 1355 int err;
1356 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1357 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1358 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1359 struct net_device *ndev;
1360 struct mlx4_ib_gid_entry *ge;
146d6e19 1361 struct mlx4_flow_reg_id reg_id = {0, 0};
e9a7faf1 1362 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1363
1364 if (mdev->dev->caps.steering_mode ==
1365 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1366 struct mlx4_ib_steering *ib_steering;
1367
1368 mutex_lock(&mqp->mutex);
1369 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1370 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1371 list_del(&ib_steering->list);
1372 break;
1373 }
1374 }
1375 mutex_unlock(&mqp->mutex);
1376 if (&ib_steering->list == &mqp->steering_rules) {
1377 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1378 return -EINVAL;
1379 }
1380 reg_id = ib_steering->reg_id;
1381 kfree(ib_steering);
1382 }
fa417f7b 1383
0ff1fb65 1384 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1385 prot, reg_id.id);
fa417f7b
EC		 1386 if (err)
1387 return err;
1388
146d6e19
MS		 1389 if (mlx4_is_bonded(dev)) {
1390 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1391 prot, reg_id.mirror);
1392 if (err)
1393 return err;
1394 }
1395
fa417f7b
EC		 1396 mutex_lock(&mqp->mutex);
1397 ge = find_gid_entry(mqp, gid->raw);
1398 if (ge) {
dba3ad2a 1399 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1400 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1401 if (ndev)
1402 dev_hold(ndev);
dba3ad2a 1403 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1404 if (ndev)
fa417f7b 1405 dev_put(ndev);
fa417f7b
EC		 1406 list_del(&ge->list);
1407 kfree(ge);
1408 } else
987c8f8f 1409 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1410
1411 mutex_unlock(&mqp->mutex);
1412
1413 return 0;
225c7b1f
RD		 1414}
1415
1416static int init_node_data(struct mlx4_ib_dev *dev)
1417{
1418 struct ib_smp *in_mad = NULL;
1419 struct ib_smp *out_mad = NULL;
0a9a0188 1420 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1421 int err = -ENOMEM;
1422
1423 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1424 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1425 if (!in_mad || !out_mad)
1426 goto out;
1427
1428 init_query_mad(in_mad);
1429 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1430 if (mlx4_is_master(dev->dev))
1431 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1432
0a9a0188 1433 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1434 if (err)
1435 goto out;
1436
1437 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1438
1439 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1440
0a9a0188 1441 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1442 if (err)
1443 goto out;
1444
992e8e6e 1445 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1446 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1447
1448out:
1449 kfree(in_mad);
1450 kfree(out_mad);
1451 return err;
1452}
1453
f4e91eb4
TJ		 1454static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1455 char *buf)
cd9281d8 1456{
f4e91eb4
TJ		 1457 struct mlx4_ib_dev *dev =
1458 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1459 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1460}
1461
f4e91eb4
TJ		 1462static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1463 char *buf)
cd9281d8 1464{
f4e91eb4
TJ		 1465 struct mlx4_ib_dev *dev =
1466 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1467 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1468 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1469 (int) dev->dev->caps.fw_ver & 0xffff);
1470}
1471
f4e91eb4
TJ		 1472static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1473 char *buf)
cd9281d8 1474{
f4e91eb4
TJ		 1475 struct mlx4_ib_dev *dev =
1476 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1477 return sprintf(buf, "%x\n", dev->dev->rev_id);
1478}
1479
f4e91eb4
TJ		 1480static ssize_t show_board(struct device *device, struct device_attribute *attr,
1481 char *buf)
cd9281d8 1482{
f4e91eb4
TJ		 1483 struct mlx4_ib_dev *dev =
1484 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1485 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1486 dev->dev->board_id);
cd9281d8
JM		 1487}
1488
f4e91eb4
TJ		 1489static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1490static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1491static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1492static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1493
f4e91eb4
TJ		 1494static struct device_attribute *mlx4_class_attributes[] = {
1495 &dev_attr_hw_rev,
1496 &dev_attr_fw_ver,
1497 &dev_attr_hca_type,
1498 &dev_attr_board_id
cd9281d8
JM		 1499};
1500
acc4fccf
MS		 1501static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1502 struct net_device *dev)
1503{
1504 memcpy(eui, dev->dev_addr, 3);
1505 memcpy(eui + 5, dev->dev_addr + 3, 3);
1506 if (vlan_id < 0x1000) {
1507 eui[3] = vlan_id >> 8;
1508 eui[4] = vlan_id & 0xff;
1509 } else {
1510 eui[3] = 0xff;
1511 eui[4] = 0xfe;
1512 }
1513 eui[0] ^= 2;
1514}
1515
fa417f7b
EC		 1516static void update_gids_task(struct work_struct *work)
1517{
1518 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1519 struct mlx4_cmd_mailbox *mailbox;
1520 union ib_gid *gids;
1521 int err;
1522 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1523 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1524
4bf9715f
MS		 1525 if (!gw->dev->ib_active)
1526 return;
1527
fa417f7b
EC		 1528 mailbox = mlx4_alloc_cmd_mailbox(dev);
1529 if (IS_ERR(mailbox)) {
987c8f8f 1530 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1531 return;
1532 }
1533
1534 gids = mailbox->buf;
1535 memcpy(gids, gw->gids, sizeof gw->gids);
1536
1537 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590
IS		 1538 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1539 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
fa417f7b 1540 if (err)
987c8f8f 1541 pr_warn("set port command failed\n");
d487ee77 1542 else
a5750090
MS		 1543 if ((gw->port == 1) || !is_bonded)
1544 mlx4_ib_dispatch_event(gw->dev,
1545 is_bonded ? 1 : gw->port,
1546 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1547
1548 mlx4_free_cmd_mailbox(dev, mailbox);
1549 kfree(gw);
1550}
1551
d487ee77 1552static void reset_gids_task(struct work_struct *work)
fa417f7b 1553{
d487ee77
MS		 1554 struct update_gid_work *gw =
1555 container_of(work, struct update_gid_work, work);
1556 struct mlx4_cmd_mailbox *mailbox;
1557 union ib_gid *gids;
1558 int err;
d487ee77 1559 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1560
4bf9715f
MS		 1561 if (!gw->dev->ib_active)
1562 return;
1563
d487ee77
MS		 1564 mailbox = mlx4_alloc_cmd_mailbox(dev);
1565 if (IS_ERR(mailbox)) {
1566 pr_warn("reset gid table failed\n");
1567 goto free;
1568 }
fa417f7b 1569
d487ee77
MS		 1570 gids = mailbox->buf;
1571 memcpy(gids, gw->gids, sizeof(gw->gids));
1572
5071456f
MS		 1573 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1574 IB_LINK_LAYER_ETHERNET) {
1575 err = mlx4_cmd(dev, mailbox->dma,
1576 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590 1577 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
5071456f
MS		 1578 MLX4_CMD_TIME_CLASS_B,
1579 MLX4_CMD_WRAPPED);
1580 if (err)
f4f01b54 1581 pr_warn("set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1582 }
1583
d487ee77
MS		 1584 mlx4_free_cmd_mailbox(dev, mailbox);
1585free:
1586 kfree(gw);
1587}
4c3eb3ca 1588
d487ee77 1589static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1590 union ib_gid *gid, int clear,
1591 int default_gid)
d487ee77
MS		 1592{
1593 struct update_gid_work *work;
1594 int i;
1595 int need_update = 0;
1596 int free = -1;
1597 int found = -1;
1598 int max_gids;
1599
acc4fccf
MS		 1600 if (default_gid) {
1601 free = 0;
1602 } else {
1603 max_gids = dev->dev->caps.gid_table_len[port];
1604 for (i = 1; i < max_gids; ++i) {
1605 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1606 sizeof(*gid)))
acc4fccf
MS		 1607 found = i;
1608
1609 if (clear) {
1610 if (found >= 0) {
1611 need_update = 1;
1612 dev->iboe.gid_table[port - 1][found] =
1613 zgid;
1614 break;
1615 }
1616 } else {
1617 if (found >= 0)
1618 break;
1619
1620 if (free < 0 &&
1621 !memcmp(&dev->iboe.gid_table[port - 1][i],
1622 &zgid, sizeof(*gid)))
1623 free = i;
1624 }
4c3eb3ca 1625 }
fa417f7b 1626 }
4c3eb3ca 1627
d487ee77
MS		 1628 if (found == -1 && !clear && free >= 0) {
1629 dev->iboe.gid_table[port - 1][free] = *gid;
1630 need_update = 1;
1631 }
fa417f7b 1632
d487ee77
MS		 1633 if (!need_update)
1634 return 0;
1635
1636 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1637 if (!work)
1638 return -ENOMEM;
1639
1640 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1641 INIT_WORK(&work->work, update_gids_task);
1642 work->port = port;
1643 work->dev = dev;
1644 queue_work(wq, &work->work);
fa417f7b
EC		 1645
1646 return 0;
d487ee77 1647}
4c3eb3ca 1648
acc4fccf 1649static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1650{
acc4fccf
MS		 1651 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1652 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1653}
1654
d487ee77 1655
5071456f 1656static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1657{
1658 struct update_gid_work *work;
d487ee77
MS		 1659
1660 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1661 if (!work)
1662 return -ENOMEM;
5071456f
MS		 1663
1664 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1665 memset(work->gids, 0, sizeof(work->gids));
1666 INIT_WORK(&work->work, reset_gids_task);
1667 work->dev = dev;
5071456f 1668 work->port = port;
d487ee77
MS		 1669 queue_work(wq, &work->work);
1670 return 0;
fa417f7b
EC		 1671}
1672
d487ee77
MS		 1673static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1674 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1675{
d487ee77
MS		 1676 struct mlx4_ib_iboe *iboe;
1677 int port = 0;
1678 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1679 rdma_vlan_dev_real_dev(event_netdev) :
1680 event_netdev;
acc4fccf
MS		 1681 union ib_gid default_gid;
1682
1683 mlx4_make_default_gid(real_dev, &default_gid);
1684
1685 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1686 return 0;
d487ee77
MS		 1687
1688 if (event != NETDEV_DOWN && event != NETDEV_UP)
1689 return 0;
1690
1691 if ((real_dev != event_netdev) &&
1692 (event == NETDEV_DOWN) &&
1693 rdma_link_local_addr((struct in6_addr *)gid))
1694 return 0;
1695
1696 iboe = &ibdev->iboe;
dba3ad2a 1697 spin_lock_bh(&iboe->lock);
d487ee77 1698
82373701 1699 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1700 if ((netif_is_bond_master(real_dev) &&
1701 (real_dev == iboe->masters[port - 1])) ||
1702 (!netif_is_bond_master(real_dev) &&
1703 (real_dev == iboe->netdevs[port - 1])))
1704 update_gid_table(ibdev, port, gid,
acc4fccf 1705 event == NETDEV_DOWN, 0);
d487ee77 1706
dba3ad2a 1707 spin_unlock_bh(&iboe->lock);
d487ee77 1708 return 0;
fa417f7b 1709
fa417f7b
EC		 1710}
1711
d487ee77
MS		 1712static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1713 struct mlx4_ib_dev *ibdev)
fa417f7b 1714{
d487ee77
MS		 1715 u8 port = 0;
1716 struct mlx4_ib_iboe *iboe;
1717 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1718 rdma_vlan_dev_real_dev(dev) : dev;
1719
1720 iboe = &ibdev->iboe;
d487ee77 1721
82373701 1722 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1723 if ((netif_is_bond_master(real_dev) &&
1724 (real_dev == iboe->masters[port - 1])) ||
1725 (!netif_is_bond_master(real_dev) &&
1726 (real_dev == iboe->netdevs[port - 1])))
1727 break;
1728
82373701 1729 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1730 return 0;
1731 else
1732 return port;
fa417f7b
EC		 1733}
1734
d487ee77
MS		 1735static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1736 void *ptr)
fa417f7b 1737{
d487ee77
MS		 1738 struct mlx4_ib_dev *ibdev;
1739 struct in_ifaddr *ifa = ptr;
1740 union ib_gid gid;
1741 struct net_device *event_netdev = ifa->ifa_dev->dev;
1742
1743 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1744
1745 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1746
1747 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1748 return NOTIFY_DONE;
fa417f7b
EC		 1749}
1750
27cdef63 1751#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1752static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1753 void *ptr)
1754{
fa417f7b 1755 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1756 struct inet6_ifaddr *ifa = ptr;
1757 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1758 struct net_device *event_netdev = ifa->idev->dev;
1759
1760 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1761
1762 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1763 return NOTIFY_DONE;
1764}
1765#endif
1766
9433c188
MB		 1767#define MLX4_IB_INVALID_MAC ((u64)-1)
1768static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1769 struct net_device *dev,
1770 int port)
1771{
1772 u64 new_smac = 0;
1773 u64 release_mac = MLX4_IB_INVALID_MAC;
1774 struct mlx4_ib_qp *qp;
1775
1776 read_lock(&dev_base_lock);
1777 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1778 read_unlock(&dev_base_lock);
1779
3e0629cb
JM		 1780 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1781
d24d9f43
JM		 1782 /* no need for update QP1 and mac registration in non-SRIOV */
1783 if (!mlx4_is_mfunc(ibdev->dev))
1784 return;
1785
9433c188
MB		 1786 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1787 qp = ibdev->qp1_proxy[port - 1];
1788 if (qp) {
1789 int new_smac_index;
25476b02 1790 u64 old_smac;
9433c188
MB		 1791 struct mlx4_update_qp_params update_params;
1792
25476b02
JM		 1793 mutex_lock(&qp->mutex);
1794 old_smac = qp->pri.smac;
9433c188
MB		 1795 if (new_smac == old_smac)
1796 goto unlock;
1797
1798 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1799
1800 if (new_smac_index < 0)
1801 goto unlock;
1802
1803 update_params.smac_index = new_smac_index;
09e05c3f 1804 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1805 &update_params)) {
1806 release_mac = new_smac;
1807 goto unlock;
1808 }
25476b02
JM		 1809 /* if old port was zero, no mac was yet registered for this QP */
1810 if (qp->pri.smac_port)
1811 release_mac = old_smac;
9433c188 1812 qp->pri.smac = new_smac;
25476b02 1813 qp->pri.smac_port = port;
9433c188 1814 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1815 }
1816
1817unlock:
9433c188
MB		 1818 if (release_mac != MLX4_IB_INVALID_MAC)
1819 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1820 if (qp)
1821 mutex_unlock(&qp->mutex);
1822 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1823}
1824
d487ee77
MS		 1825static void mlx4_ib_get_dev_addr(struct net_device *dev,
1826 struct mlx4_ib_dev *ibdev, u8 port)
1827{
1828 struct in_device *in_dev;
27cdef63 1829#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1830 struct inet6_dev *in6_dev;
1831 union ib_gid *pgid;
1832 struct inet6_ifaddr *ifp;
f5c4834d 1833 union ib_gid default_gid;
d487ee77
MS		 1834#endif
1835 union ib_gid gid;
1836
1837
82373701 1838 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1839 return;
1840
1841 /* IPv4 gids */
1842 in_dev = in_dev_get(dev);
1843 if (in_dev) {
1844 for_ifa(in_dev) {
1845 /*ifa->ifa_address;*/
1846 ipv6_addr_set_v4mapped(ifa->ifa_address,
1847 (struct in6_addr *)&gid);
acc4fccf 1848 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1849 }
1850 endfor_ifa(in_dev);
1851 in_dev_put(in_dev);
1852 }
27cdef63 1853#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1854 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1855 /* IPv6 gids */
1856 in6_dev = in6_dev_get(dev);
1857 if (in6_dev) {
1858 read_lock_bh(&in6_dev->lock);
1859 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1860 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1861 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1862 continue;
acc4fccf 1863 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1864 }
1865 read_unlock_bh(&in6_dev->lock);
1866 in6_dev_put(in6_dev);
1867 }
1868#endif
1869}
1870
acc4fccf
MS		 1871static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1872 struct net_device *dev, u8 port)
1873{
1874 union ib_gid gid;
1875 mlx4_make_default_gid(dev, &gid);
1876 update_gid_table(ibdev, port, &gid, 0, 1);
1877}
1878
d487ee77
MS		 1879static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1880{
1881 struct net_device *dev;
ddf8bd34 1882 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1883 int i;
655b2aae 1884 int err = 0;
d487ee77 1885
655b2aae
MS		 1886 for (i = 1; i <= ibdev->num_ports; ++i) {
1887 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1888 IB_LINK_LAYER_ETHERNET) {
1889 err = reset_gid_table(ibdev, i);
1890 if (err)
1891 goto out;
1892 }
1893 }
d487ee77
MS		 1894
1895 read_lock(&dev_base_lock);
dba3ad2a 1896 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1897
1898 for_each_netdev(&init_net, dev) {
1899 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1900 /* port will be non-zero only for ETH ports */
1901 if (port) {
1902 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1903 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1904 }
d487ee77
MS		 1905 }
1906
dba3ad2a 1907 spin_unlock_bh(&iboe->lock);
d487ee77 1908 read_unlock(&dev_base_lock);
655b2aae
MS		 1909out:
1910 return err;
d487ee77
MS		 1911}
1912
9433c188
MB		 1913static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1914 struct net_device *dev,
1915 unsigned long event)
1916
d487ee77 1917{
fa417f7b 1918 struct mlx4_ib_iboe *iboe;
9433c188 1919 int update_qps_port = -1;
fa417f7b
EC		 1920 int port;
1921
fa417f7b
EC		 1922 iboe = &ibdev->iboe;
1923
dba3ad2a 1924 spin_lock_bh(&iboe->lock);
fa417f7b 1925 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1926 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1927 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1928 struct net_device *curr_netdev;
d487ee77 1929 struct net_device *curr_master;
ad4885d2 1930
fa417f7b 1931 iboe->netdevs[port - 1] =
0345584e 1932 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1933 if (iboe->netdevs[port - 1])
1934 mlx4_ib_set_default_gid(ibdev,
1935 iboe->netdevs[port - 1], port);
ad4885d2 1936 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1937
1938 if (iboe->netdevs[port - 1] &&
1939 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1940 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1941 iboe->netdevs[port - 1]);
ad4885d2
MS		 1942 } else {
1943 iboe->masters[port - 1] = NULL;
fa417f7b 1944 }
d487ee77 1945 curr_master = iboe->masters[port - 1];
fa417f7b 1946
9433c188
MB		 1947 if (dev == iboe->netdevs[port - 1] &&
1948 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1949 event == NETDEV_UP || event == NETDEV_CHANGE))
1950 update_qps_port = port;
1951
ad4885d2
MS		 1952 if (curr_netdev) {
1953 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1954 IB_PORT_ACTIVE : IB_PORT_DOWN;
1955 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 1956 if (curr_master) {
1957 /* if using bonding/team and a slave port is down, we
1958 * don't want the bond IP based gids in the table since
1959 * flows that select port by gid may get the down port.
1960 */
a5750090
MS		 1961 if (port_state == IB_PORT_DOWN &&
1962 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 1963 reset_gid_table(ibdev, port);
1964 mlx4_ib_set_default_gid(ibdev,
1965 curr_netdev,
1966 port);
1967 } else {
1968 /* gids from the upper dev (bond/team)
1969 * should appear in port's gid table
1970 */
1971 mlx4_ib_get_dev_addr(curr_master,
1972 ibdev, port);
1973 }
e381835c
MS		 1974 }
1975 /* if bonding is used it is possible that we add it to
1976 * masters only after IP address is assigned to the
1977 * net bonding interface.
1978 */
1979 if (curr_master && (old_master != curr_master)) {
1980 reset_gid_table(ibdev, port);
1981 mlx4_ib_set_default_gid(ibdev,
1982 curr_netdev, port);
1983 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1984 }
ad4885d2 1985
e381835c
MS		 1986 if (!curr_master && (old_master != curr_master)) {
1987 reset_gid_table(ibdev, port);
1988 mlx4_ib_set_default_gid(ibdev,
1989 curr_netdev, port);
1990 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1991 }
1992 } else {
ad4885d2 1993 reset_gid_table(ibdev, port);
ad4885d2 1994 }
d487ee77 1995 }
fa417f7b 1996
dba3ad2a 1997 spin_unlock_bh(&iboe->lock);
9433c188
MB		 1998
1999 if (update_qps_port > 0)
2000 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 2001}
2002
2003static int mlx4_ib_netdev_event(struct notifier_block *this,
2004 unsigned long event, void *ptr)
2005{
2006 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2007 struct mlx4_ib_dev *ibdev;
2008
2009 if (!net_eq(dev_net(dev), &init_net))
2010 return NOTIFY_DONE;
2011
2012 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2013 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2014
2015 return NOTIFY_DONE;
2016}
2017
54679e14
JM		 2018static void init_pkeys(struct mlx4_ib_dev *ibdev)
2019{
2020 int port;
2021 int slave;
2022 int i;
2023
2024 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2025 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2026 ++slave) {
54679e14
JM		 2027 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2028 for (i = 0;
2029 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2030 ++i) {
2031 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2032 /* master has the identity virt2phys pkey mapping */
2033 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2034 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2035 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2036 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2037 }
2038 }
2039 }
2040 /* initialize pkey cache */
2041 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2042 for (i = 0;
2043 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2044 ++i)
2045 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2046 (i) ? 0 : 0xFFFF;
2047 }
2048 }
2049}
2050
e605b743
SP		 2051static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2052{
4661bd79 2053 char name[80];
e605b743
SP		 2054 int eq_per_port = 0;
2055 int added_eqs = 0;
2056 int total_eqs = 0;
2057 int i, j, eq;
2058
3aac6ff1
SP		 2059 /* Legacy mode or comp_pool is not large enough */
2060 if (dev->caps.comp_pool == 0 ||
2061 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2062 return;
2063
7ae0e400 2064 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2065
2066 /* Init eq table */
2067 added_eqs = 0;
2068 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2069 added_eqs += eq_per_port;
2070
2071 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2072
2073 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2074 if (!ibdev->eq_table)
2075 return;
2076
2077 ibdev->eq_added = added_eqs;
2078
2079 eq = 0;
2080 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2081 for (j = 0; j < eq_per_port; j++) {
4661bd79 2082 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2083 i, j, dev->persist->pdev->bus->name);
e605b743 2084 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2085 if (mlx4_assign_eq(dev, name, NULL,
2086 &ibdev->eq_table[eq])) {
e605b743
SP		 2087 /* Use legacy (same as mlx4_en driver) */
2088 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2089 ibdev->eq_table[eq] =
2090 (eq % dev->caps.num_comp_vectors);
2091 }
2092 eq++;
2093 }
2094 }
2095
2096 /* Fill the reset of the vector with legacy EQ */
2097 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2098 ibdev->eq_table[eq++] = i;
2099
2100 /* Advertise the new number of EQs to clients */
2101 ibdev->ib_dev.num_comp_vectors = total_eqs;
2102}
2103
2104static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2105{
2106 int i;
3aac6ff1
SP		 2107
2108 /* no additional eqs were added */
2109 if (!ibdev->eq_table)
2110 return;
e605b743
SP		 2111
2112 /* Reset the advertised EQ number */
2113 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2114
2115 /* Free only the added eqs */
2116 for (i = 0; i < ibdev->eq_added; i++) {
2117 /* Don't free legacy eqs if used */
2118 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2119 continue;
2120 mlx4_release_eq(dev, ibdev->eq_table[i]);
2121 }
2122
e605b743 2123 kfree(ibdev->eq_table);
e605b743
SP		 2124}
2125
225c7b1f
RD		 2126static void *mlx4_ib_add(struct mlx4_dev *dev)
2127{
2128 struct mlx4_ib_dev *ibdev;
22e7ef9c 2129 int num_ports = 0;
035b1032 2130 int i, j;
fa417f7b
EC		 2131 int err;
2132 struct mlx4_ib_iboe *iboe;
4196670b 2133 int ib_num_ports = 0;
a5750090 2134 int num_req_counters;
225c7b1f 2135
987c8f8f 2136 pr_info_once("%s", mlx4_ib_version);
68f3948d 2137
026149cb 2138 num_ports = 0;
fa417f7b 2139 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2140 num_ports++;
2141
2142 /* No point in registering a device with no ports... */
2143 if (num_ports == 0)
2144 return NULL;
2145
225c7b1f
RD		 2146 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2147 if (!ibdev) {
872bf2fb
YH		 2148 dev_err(&dev->persist->pdev->dev,
2149 "Device struct alloc failed\n");
225c7b1f
RD		 2150 return NULL;
2151 }
2152
fa417f7b
EC		 2153 iboe = &ibdev->iboe;
2154
225c7b1f
RD		 2155 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2156 goto err_dealloc;
2157
2158 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2159 goto err_pd;
2160
4979d18f
RD		 2161 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2162 PAGE_SIZE);
225c7b1f
RD		 2163 if (!ibdev->uar_map)
2164 goto err_uar;
26c6bc7b 2165 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2166
225c7b1f 2167 ibdev->dev = dev;
c6215745 2168 ibdev->bond_next_port = 0;
225c7b1f
RD		 2169
2170 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2171 ibdev->ib_dev.owner = THIS_MODULE;
2172 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2173 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2174 ibdev->num_ports = num_ports;
a5750090
MS		 2175 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2176 1 : ibdev->num_ports;
b8dd786f 2177 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2178 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2179
08ff3235
OG		 2180 if (dev->caps.userspace_caps)
2181 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2182 else
2183 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2184
225c7b1f
RD		 2185 ibdev->ib_dev.uverbs_cmd_mask =
2186 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2187 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2188 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2189 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2190 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2191 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2192 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2193 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2194 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2195 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2196 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2197 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2198 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2199 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2200 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2201 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2202 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2203 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2204 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2205 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2206 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2207 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2208 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2209 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2210
2211 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2212 ibdev->ib_dev.query_port = mlx4_ib_query_port;
6b90a6d6 2213 ibdev->ib_dev.query_protocol = mlx4_ib_query_protocol;
fa417f7b 2214 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2215 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2216 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2217 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2218 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2219 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2220 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2221 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2222 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2223 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2224 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2225 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2226 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2227 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2228 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2229 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2230 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2231 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2232 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2233 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2234 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2235 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2236 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2237 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2238 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2239 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2240 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2241 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2242 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2243 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2244 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2245 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2246 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2247 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2248 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2249 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2250 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2251 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2252 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2253 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2254
992e8e6e
JM		 2255 if (!mlx4_is_slave(ibdev->dev)) {
2256 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2257 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2258 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2259 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2260 }
8ad11fb6 2261
b425388d
SM		 2262 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2263 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2264 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2265 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2266 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2267
2268 ibdev->ib_dev.uverbs_cmd_mask |=
2269 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2270 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2271 }
2272
012a8ff5
SH		 2273 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2274 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2275 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2276 ibdev->ib_dev.uverbs_cmd_mask |=
2277 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2278 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2279 }
2280
f77c0162 2281 if (check_flow_steering_support(dev)) {
0a9b7d59 2282 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2283 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2284 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2285
f21519b2
YD		 2286 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2287 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2288 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2289 }
2290
e605b743
SP		 2291 mlx4_ib_alloc_eqs(dev, ibdev);
2292
fa417f7b
EC		 2293 spin_lock_init(&iboe->lock);
2294
225c7b1f
RD		 2295 if (init_node_data(ibdev))
2296 goto err_map;
2297
a5750090
MS		 2298 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2299 for (i = 0; i < num_req_counters; ++i) {
9433c188 2300 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2301 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2302 IB_LINK_LAYER_ETHERNET) {
2303 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2304 if (err)
2305 ibdev->counters[i] = -1;
3839d8ac
DC		 2306 } else {
2307 ibdev->counters[i] = -1;
2308 }
cfcde11c 2309 }
a5750090
MS		 2310 if (mlx4_is_bonded(dev))
2311 for (i = 1; i < ibdev->num_ports ; ++i)
2312 ibdev->counters[i] = ibdev->counters[0];
2313
cfcde11c 2314
4196670b
MB		 2315 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2316 ib_num_ports++;
2317
225c7b1f
RD		 2318 spin_lock_init(&ibdev->sm_lock);
2319 mutex_init(&ibdev->cap_mask_mutex);
35f05dab
YH		 2320 INIT_LIST_HEAD(&ibdev->qp_list);
2321 spin_lock_init(&ibdev->reset_flow_resource_lock);
225c7b1f 2322
4196670b
MB		 2323 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2324 ib_num_ports) {
c1c98501
MB		 2325 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2326 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2327 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2328 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2329 if (err)
2330 goto err_counter;
2331
2332 ibdev->ib_uc_qpns_bitmap =
2333 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2334 sizeof(long),
2335 GFP_KERNEL);
2336 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2337 dev_err(&dev->persist->pdev->dev,
2338 "bit map alloc failed\n");
c1c98501
MB		 2339 goto err_steer_qp_release;
2340 }
2341
2342 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2343
2344 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2345 dev, ibdev->steer_qpn_base,
2346 ibdev->steer_qpn_base +
2347 ibdev->steer_qpn_count - 1);
2348 if (err)
2349 goto err_steer_free_bitmap;
2350 }
2351
3e0629cb
JM		 2352 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2353 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2354
9a6edb60 2355 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2356 goto err_steer_free_bitmap;
225c7b1f
RD		 2357
2358 if (mlx4_ib_mad_init(ibdev))
2359 goto err_reg;
2360
fc06573d
JM		 2361 if (mlx4_ib_init_sriov(ibdev))
2362 goto err_mad;
2363
d487ee77
MS		 2364 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2365 if (!iboe->nb.notifier_call) {
2366 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2367 err = register_netdevice_notifier(&iboe->nb);
2368 if (err) {
2369 iboe->nb.notifier_call = NULL;
2370 goto err_notif;
2371 }
2372 }
2373 if (!iboe->nb_inet.notifier_call) {
2374 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2375 err = register_inetaddr_notifier(&iboe->nb_inet);
2376 if (err) {
2377 iboe->nb_inet.notifier_call = NULL;
2378 goto err_notif;
2379 }
2380 }
27cdef63 2381#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2382 if (!iboe->nb_inet6.notifier_call) {
2383 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2384 err = register_inet6addr_notifier(&iboe->nb_inet6);
2385 if (err) {
2386 iboe->nb_inet6.notifier_call = NULL;
2387 goto err_notif;
2388 }
2389 }
2390#endif
655b2aae
MS		 2391 if (mlx4_ib_init_gid_table(ibdev))
2392 goto err_notif;
fa417f7b
EC		 2393 }
2394
035b1032 2395 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2396 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2397 mlx4_class_attributes[j]))
fa417f7b 2398 goto err_notif;
cd9281d8
JM		 2399 }
2400
3b4a8cd5
JM		 2401 ibdev->ib_active = true;
2402
54679e14
JM		 2403 if (mlx4_is_mfunc(ibdev->dev))
2404 init_pkeys(ibdev);
2405
3806d08c
JM		 2406 /* create paravirt contexts for any VFs which are active */
2407 if (mlx4_is_master(ibdev->dev)) {
2408 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2409 if (j == mlx4_master_func_num(ibdev->dev))
2410 continue;
2411 if (mlx4_is_slave_active(ibdev->dev, j))
2412 do_slave_init(ibdev, j, 1);
2413 }
2414 }
225c7b1f
RD		 2415 return ibdev;
2416
fa417f7b 2417err_notif:
d487ee77
MS		 2418 if (ibdev->iboe.nb.notifier_call) {
2419 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2420 pr_warn("failure unregistering notifier\n");
2421 ibdev->iboe.nb.notifier_call = NULL;
2422 }
2423 if (ibdev->iboe.nb_inet.notifier_call) {
2424 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2425 pr_warn("failure unregistering notifier\n");
2426 ibdev->iboe.nb_inet.notifier_call = NULL;
2427 }
27cdef63 2428#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2429 if (ibdev->iboe.nb_inet6.notifier_call) {
2430 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2431 pr_warn("failure unregistering notifier\n");
2432 ibdev->iboe.nb_inet6.notifier_call = NULL;
2433 }
2434#endif
fa417f7b
EC		 2435 flush_workqueue(wq);
2436
fc06573d
JM		 2437 mlx4_ib_close_sriov(ibdev);
2438
2439err_mad:
2440 mlx4_ib_mad_cleanup(ibdev);
2441
225c7b1f
RD		 2442err_reg:
2443 ib_unregister_device(&ibdev->ib_dev);
2444
c1c98501
MB		 2445err_steer_free_bitmap:
2446 kfree(ibdev->ib_uc_qpns_bitmap);
2447
2448err_steer_qp_release:
2449 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2450 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2451 ibdev->steer_qpn_count);
cfcde11c
OG		 2452err_counter:
2453 for (; i; --i)
4af3ce0d
RD		 2454 if (ibdev->counters[i - 1] != -1)
2455 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2456
225c7b1f
RD		 2457err_map:
2458 iounmap(ibdev->uar_map);
2459
2460err_uar:
2461 mlx4_uar_free(dev, &ibdev->priv_uar);
2462
2463err_pd:
2464 mlx4_pd_free(dev, ibdev->priv_pdn);
2465
2466err_dealloc:
2467 ib_dealloc_device(&ibdev->ib_dev);
2468
2469 return NULL;
2470}
2471
c1c98501
MB		 2472int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2473{
2474 int offset;
2475
2476 WARN_ON(!dev->ib_uc_qpns_bitmap);
2477
2478 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2479 dev->steer_qpn_count,
2480 get_count_order(count));
2481 if (offset < 0)
2482 return offset;
2483
2484 *qpn = dev->steer_qpn_base + offset;
2485 return 0;
2486}
2487
2488void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2489{
2490 if (!qpn ||
2491 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2492 return;
2493
2494 BUG_ON(qpn < dev->steer_qpn_base);
2495
2496 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2497 qpn - dev->steer_qpn_base,
2498 get_count_order(count));
2499}
2500
2501int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2502 int is_attach)
2503{
2504 int err;
2505 size_t flow_size;
2506 struct ib_flow_attr *flow = NULL;
2507 struct ib_flow_spec_ib *ib_spec;
2508
2509 if (is_attach) {
2510 flow_size = sizeof(struct ib_flow_attr) +
2511 sizeof(struct ib_flow_spec_ib);
2512 flow = kzalloc(flow_size, GFP_KERNEL);
2513 if (!flow)
2514 return -ENOMEM;
2515 flow->port = mqp->port;
2516 flow->num_of_specs = 1;
2517 flow->size = flow_size;
2518 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2519 ib_spec->type = IB_FLOW_SPEC_IB;
2520 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2521 /* Add an empty rule for IB L2 */
2522 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2523
2524 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2525 IB_FLOW_DOMAIN_NIC,
2526 MLX4_FS_REGULAR,
2527 &mqp->reg_id);
2528 } else {
2529 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2530 }
2531 kfree(flow);
2532 return err;
2533}
2534
225c7b1f
RD		 2535static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2536{
2537 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2538 int p;
2539
4bf9715f
MS		 2540 ibdev->ib_active = false;
2541 flush_workqueue(wq);
2542
fc06573d 2543 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2544 mlx4_ib_mad_cleanup(ibdev);
2545 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2546 if (ibdev->iboe.nb.notifier_call) {
2547 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2548 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2549 ibdev->iboe.nb.notifier_call = NULL;
2550 }
c1c98501
MB		 2551
2552 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2553 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2554 ibdev->steer_qpn_count);
2555 kfree(ibdev->ib_uc_qpns_bitmap);
2556 }
2557
d487ee77
MS		 2558 if (ibdev->iboe.nb_inet.notifier_call) {
2559 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2560 pr_warn("failure unregistering notifier\n");
2561 ibdev->iboe.nb_inet.notifier_call = NULL;
2562 }
27cdef63 2563#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2564 if (ibdev->iboe.nb_inet6.notifier_call) {
2565 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2566 pr_warn("failure unregistering notifier\n");
2567 ibdev->iboe.nb_inet6.notifier_call = NULL;
2568 }
2569#endif
fb1b5034 2570
fa417f7b 2571 iounmap(ibdev->uar_map);
cfcde11c 2572 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2573 if (ibdev->counters[p] != -1)
2574 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2575 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2576 mlx4_CLOSE_PORT(dev, p);
2577
e605b743
SP		 2578 mlx4_ib_free_eqs(dev, ibdev);
2579
225c7b1f
RD		 2580 mlx4_uar_free(dev, &ibdev->priv_uar);
2581 mlx4_pd_free(dev, ibdev->priv_pdn);
2582 ib_dealloc_device(&ibdev->ib_dev);
2583}
2584
fc06573d
JM		 2585static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2586{
2587 struct mlx4_ib_demux_work **dm = NULL;
2588 struct mlx4_dev *dev = ibdev->dev;
2589 int i;
2590 unsigned long flags;
449fc488
MB		 2591 struct mlx4_active_ports actv_ports;
2592 unsigned int ports;
2593 unsigned int first_port;
fc06573d
JM		 2594
2595 if (!mlx4_is_master(dev))
2596 return;
2597
449fc488
MB		 2598 actv_ports = mlx4_get_active_ports(dev, slave);
2599 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2600 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2601
2602 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2603 if (!dm) {
2604 pr_err("failed to allocate memory for tunneling qp update\n");
2605 goto out;
2606 }
2607
449fc488 2608 for (i = 0; i < ports; i++) {
fc06573d
JM		 2609 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2610 if (!dm[i]) {
2611 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2612 for (i = 0; i < dev->caps.num_ports; i++) {
2613 if (dm[i])
2614 kfree(dm[i]);
2615 }
2616 goto out;
2617 }
2618 }
2619 /* initialize or tear down tunnel QPs for the slave */
449fc488 2620 for (i = 0; i < ports; i++) {
fc06573d 2621 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2622 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2623 dm[i]->slave = slave;
2624 dm[i]->do_init = do_init;
2625 dm[i]->dev = ibdev;
2626 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2627 if (!ibdev->sriov.is_going_down)
2628 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2629 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2630 }
2631out:
c89d1271 2632 kfree(dm);
fc06573d
JM		 2633 return;
2634}
2635
35f05dab
YH		 2636static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2637{
2638 struct mlx4_ib_qp *mqp;
2639 unsigned long flags_qp;
2640 unsigned long flags_cq;
2641 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2642 struct list_head cq_notify_list;
2643 struct mlx4_cq *mcq;
2644 unsigned long flags;
2645
2646 pr_warn("mlx4_ib_handle_catas_error was started\n");
2647 INIT_LIST_HEAD(&cq_notify_list);
2648
2649 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2650 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2651
2652 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2653 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2654 if (mqp->sq.tail != mqp->sq.head) {
2655 send_mcq = to_mcq(mqp->ibqp.send_cq);
2656 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2657 if (send_mcq->mcq.comp &&
2658 mqp->ibqp.send_cq->comp_handler) {
2659 if (!send_mcq->mcq.reset_notify_added) {
2660 send_mcq->mcq.reset_notify_added = 1;
2661 list_add_tail(&send_mcq->mcq.reset_notify,
2662 &cq_notify_list);
2663 }
2664 }
2665 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2666 }
2667 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2668 /* Now, handle the QP's receive queue */
2669 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2670 /* no handling is needed for SRQ */
2671 if (!mqp->ibqp.srq) {
2672 if (mqp->rq.tail != mqp->rq.head) {
2673 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2674 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2675 if (recv_mcq->mcq.comp &&
2676 mqp->ibqp.recv_cq->comp_handler) {
2677 if (!recv_mcq->mcq.reset_notify_added) {
2678 recv_mcq->mcq.reset_notify_added = 1;
2679 list_add_tail(&recv_mcq->mcq.reset_notify,
2680 &cq_notify_list);
2681 }
2682 }
2683 spin_unlock_irqrestore(&recv_mcq->lock,
2684 flags_cq);
2685 }
2686 }
2687 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2688 }
2689
2690 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2691 mcq->comp(mcq);
2692 }
2693 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2694 pr_warn("mlx4_ib_handle_catas_error ended\n");
2695}
2696
a5750090
MS		 2697static void handle_bonded_port_state_event(struct work_struct *work)
2698{
2699 struct ib_event_work *ew =
2700 container_of(work, struct ib_event_work, work);
2701 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2702 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2703 int i;
2704 struct ib_event ibev;
2705
2706 kfree(ew);
2707 spin_lock_bh(&ibdev->iboe.lock);
2708 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2709 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
217e8b16 2710 enum ib_port_state curr_port_state;
a5750090 2711
217e8b16
MS		 2712 if (!curr_netdev)
2713 continue;
2714
2715 curr_port_state =
a5750090
MS		 2716 (netif_running(curr_netdev) &&
2717 netif_carrier_ok(curr_netdev)) ?
2718 IB_PORT_ACTIVE : IB_PORT_DOWN;
2719
2720 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2721 curr_port_state : IB_PORT_ACTIVE;
2722 }
2723 spin_unlock_bh(&ibdev->iboe.lock);
2724
2725 ibev.device = &ibdev->ib_dev;
2726 ibev.element.port_num = 1;
2727 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2728 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2729
2730 ib_dispatch_event(&ibev);
2731}
2732
225c7b1f 2733static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2734 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2735{
2736 struct ib_event ibev;
7ff93f8b 2737 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2738 struct mlx4_eqe *eqe = NULL;
2739 struct ib_event_work *ew;
fc06573d 2740 int p = 0;
00f5ce99 2741
a5750090
MS		 2742 if (mlx4_is_bonded(dev) &&
2743 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2744 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2745 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2746 if (!ew)
2747 return;
2748 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2749 ew->ib_dev = ibdev;
2750 queue_work(wq, &ew->work);
2751 return;
2752 }
2753
00f5ce99
JM		 2754 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2755 eqe = (struct mlx4_eqe *)param;
2756 else
fc06573d 2757 p = (int) param;
225c7b1f
RD		 2758
2759 switch (event) {
37608eea 2760 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2761 if (p > ibdev->num_ports)
2762 return;
a0c64a17
JM		 2763 if (mlx4_is_master(dev) &&
2764 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2765 IB_LINK_LAYER_INFINIBAND) {
2766 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2767 }
37608eea 2768 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2769 break;
2770
37608eea 2771 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2772 if (p > ibdev->num_ports)
2773 return;
37608eea
RD		 2774 ibev.event = IB_EVENT_PORT_ERR;
2775 break;
2776
2777 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2778 ibdev->ib_active = false;
225c7b1f 2779 ibev.event = IB_EVENT_DEVICE_FATAL;
35f05dab 2780 mlx4_ib_handle_catas_error(ibdev);
225c7b1f
RD		 2781 break;
2782
00f5ce99
JM		 2783 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2784 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2785 if (!ew) {
2786 pr_err("failed to allocate memory for events work\n");
2787 break;
2788 }
2789
2790 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2791 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2792 ew->ib_dev = ibdev;
992e8e6e
JM		 2793 /* need to queue only for port owner, which uses GEN_EQE */
2794 if (mlx4_is_master(dev))
2795 queue_work(wq, &ew->work);
2796 else
2797 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2798 return;
2799
fc06573d
JM		 2800 case MLX4_DEV_EVENT_SLAVE_INIT:
2801 /* here, p is the slave id */
2802 do_slave_init(ibdev, p, 1);
ee59fa0d
YH		 2803 if (mlx4_is_master(dev)) {
2804 int i;
2805
2806 for (i = 1; i <= ibdev->num_ports; i++) {
2807 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2808 == IB_LINK_LAYER_INFINIBAND)
2809 mlx4_ib_slave_alias_guid_event(ibdev,
2810 p, i,
2811 1);
2812 }
2813 }
fc06573d
JM		 2814 return;
2815
2816 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
ee59fa0d
YH		 2817 if (mlx4_is_master(dev)) {
2818 int i;
2819
2820 for (i = 1; i <= ibdev->num_ports; i++) {
2821 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2822 == IB_LINK_LAYER_INFINIBAND)
2823 mlx4_ib_slave_alias_guid_event(ibdev,
2824 p, i,
2825 0);
2826 }
2827 }
fc06573d
JM		 2828 /* here, p is the slave id */
2829 do_slave_init(ibdev, p, 0);
2830 return;
2831
225c7b1f
RD		 2832 default:
2833 return;
2834 }
2835
2836 ibev.device = ibdev_ptr;
a5750090 2837 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2838
2839 ib_dispatch_event(&ibev);
2840}
2841
2842static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2843 .add = mlx4_ib_add,
2844 .remove = mlx4_ib_remove,
2845 .event = mlx4_ib_event,
a5750090
MS		 2846 .protocol = MLX4_PROT_IB_IPV6,
2847 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2848};
2849
2850static int __init mlx4_ib_init(void)
2851{
fa417f7b
EC		 2852 int err;
2853
2854 wq = create_singlethread_workqueue("mlx4_ib");
2855 if (!wq)
2856 return -ENOMEM;
2857
b9c5d6a6
OD		 2858 err = mlx4_ib_mcg_init();
2859 if (err)
2860 goto clean_wq;
2861
fa417f7b 2862 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2863 if (err)
2864 goto clean_mcg;
fa417f7b
EC		 2865
2866 return 0;
b9c5d6a6
OD		 2867
2868clean_mcg:
2869 mlx4_ib_mcg_destroy();
2870
2871clean_wq:
2872 destroy_workqueue(wq);
2873 return err;
225c7b1f
RD		 2874}
2875
2876static void __exit mlx4_ib_cleanup(void)
2877{
2878 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2879 mlx4_ib_mcg_destroy();
fa417f7b 2880 destroy_workqueue(wq);
225c7b1f
RD		 2881}
2882
2883module_init(mlx4_ib_init);
2884module_exit(mlx4_ib_cleanup);
Linux 6.x block layer and io_uring tree(s)