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4e9042e6 FL |
1 | /******************************************************************************* |
2 | * | |
3 | * Copyright (c) 2015-2016 Intel Corporation. All rights reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the | |
9 | * OpenFabrics.org BSD license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or | |
12 | * without modification, are permitted provided that the following | |
13 | * conditions are met: | |
14 | * | |
15 | * - Redistributions of source code must retain the above | |
16 | * copyright notice, this list of conditions and the following | |
17 | * disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above | |
20 | * copyright notice, this list of conditions and the following | |
21 | * disclaimer in the documentation and/or other materials | |
22 | * provided with the distribution. | |
23 | * | |
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
31 | * SOFTWARE. | |
32 | * | |
33 | *******************************************************************************/ | |
34 | ||
35 | #include <linux/module.h> | |
36 | #include <linux/moduleparam.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <linux/ethtool.h> | |
40 | #include <linux/mii.h> | |
41 | #include <linux/if_vlan.h> | |
42 | #include <linux/crc32.h> | |
43 | #include <linux/in.h> | |
44 | #include <linux/ip.h> | |
45 | #include <linux/tcp.h> | |
46 | #include <linux/init.h> | |
47 | #include <linux/io.h> | |
48 | #include <asm/irq.h> | |
49 | #include <asm/byteorder.h> | |
50 | #include <net/netevent.h> | |
51 | #include <net/neighbour.h> | |
52 | #include "i40iw.h" | |
53 | ||
54 | /** | |
55 | * i40iw_arp_table - manage arp table | |
56 | * @iwdev: iwarp device | |
57 | * @ip_addr: ip address for device | |
58 | * @mac_addr: mac address ptr | |
59 | * @action: modify, delete or add | |
60 | */ | |
61 | int i40iw_arp_table(struct i40iw_device *iwdev, | |
20c61f7e | 62 | u32 *ip_addr, |
4e9042e6 FL |
63 | bool ipv4, |
64 | u8 *mac_addr, | |
65 | u32 action) | |
66 | { | |
67 | int arp_index; | |
68 | int err; | |
69 | u32 ip[4]; | |
70 | ||
71 | if (ipv4) { | |
72 | memset(ip, 0, sizeof(ip)); | |
73 | ip[0] = *ip_addr; | |
74 | } else { | |
75 | memcpy(ip, ip_addr, sizeof(ip)); | |
76 | } | |
77 | ||
78 | for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++) | |
79 | if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0) | |
80 | break; | |
81 | switch (action) { | |
82 | case I40IW_ARP_ADD: | |
83 | if (arp_index != iwdev->arp_table_size) | |
84 | return -1; | |
85 | ||
86 | arp_index = 0; | |
87 | err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps, | |
88 | iwdev->arp_table_size, | |
89 | (u32 *)&arp_index, | |
90 | &iwdev->next_arp_index); | |
91 | ||
92 | if (err) | |
93 | return err; | |
94 | ||
95 | memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)); | |
96 | ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr); | |
97 | break; | |
98 | case I40IW_ARP_RESOLVE: | |
99 | if (arp_index == iwdev->arp_table_size) | |
100 | return -1; | |
101 | break; | |
102 | case I40IW_ARP_DELETE: | |
103 | if (arp_index == iwdev->arp_table_size) | |
104 | return -1; | |
105 | memset(iwdev->arp_table[arp_index].ip_addr, 0, | |
106 | sizeof(iwdev->arp_table[arp_index].ip_addr)); | |
107 | eth_zero_addr(iwdev->arp_table[arp_index].mac_addr); | |
108 | i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index); | |
109 | break; | |
110 | default: | |
111 | return -1; | |
112 | } | |
113 | return arp_index; | |
114 | } | |
115 | ||
116 | /** | |
117 | * i40iw_wr32 - write 32 bits to hw register | |
118 | * @hw: hardware information including registers | |
119 | * @reg: register offset | |
120 | * @value: vvalue to write to register | |
121 | */ | |
122 | inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value) | |
123 | { | |
124 | writel(value, hw->hw_addr + reg); | |
125 | } | |
126 | ||
127 | /** | |
128 | * i40iw_rd32 - read a 32 bit hw register | |
129 | * @hw: hardware information including registers | |
130 | * @reg: register offset | |
131 | * | |
132 | * Return value of register content | |
133 | */ | |
134 | inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg) | |
135 | { | |
136 | return readl(hw->hw_addr + reg); | |
137 | } | |
138 | ||
139 | /** | |
140 | * i40iw_inetaddr_event - system notifier for netdev events | |
141 | * @notfier: not used | |
142 | * @event: event for notifier | |
143 | * @ptr: if address | |
144 | */ | |
145 | int i40iw_inetaddr_event(struct notifier_block *notifier, | |
146 | unsigned long event, | |
147 | void *ptr) | |
148 | { | |
149 | struct in_ifaddr *ifa = ptr; | |
150 | struct net_device *event_netdev = ifa->ifa_dev->dev; | |
151 | struct net_device *netdev; | |
152 | struct net_device *upper_dev; | |
153 | struct i40iw_device *iwdev; | |
154 | struct i40iw_handler *hdl; | |
20c61f7e | 155 | u32 local_ipaddr; |
e5e74b61 | 156 | u32 action = I40IW_ARP_ADD; |
4e9042e6 FL |
157 | |
158 | hdl = i40iw_find_netdev(event_netdev); | |
159 | if (!hdl) | |
160 | return NOTIFY_DONE; | |
161 | ||
162 | iwdev = &hdl->device; | |
163 | netdev = iwdev->ldev->netdev; | |
164 | upper_dev = netdev_master_upper_dev_get(netdev); | |
165 | if (netdev != event_netdev) | |
166 | return NOTIFY_DONE; | |
167 | ||
e5e74b61 MI |
168 | if (upper_dev) |
169 | local_ipaddr = ntohl( | |
170 | ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address); | |
171 | else | |
172 | local_ipaddr = ntohl(ifa->ifa_address); | |
4e9042e6 FL |
173 | switch (event) { |
174 | case NETDEV_DOWN: | |
e5e74b61 MI |
175 | action = I40IW_ARP_DELETE; |
176 | /* Fall through */ | |
4e9042e6 | 177 | case NETDEV_UP: |
e5e74b61 | 178 | /* Fall through */ |
4e9042e6 | 179 | case NETDEV_CHANGEADDR: |
4e9042e6 FL |
180 | i40iw_manage_arp_cache(iwdev, |
181 | netdev->dev_addr, | |
182 | &local_ipaddr, | |
183 | true, | |
e5e74b61 MI |
184 | action); |
185 | i40iw_if_notify(iwdev, netdev, &local_ipaddr, true, | |
186 | (action == I40IW_ARP_ADD) ? true : false); | |
4e9042e6 FL |
187 | break; |
188 | default: | |
189 | break; | |
190 | } | |
191 | return NOTIFY_DONE; | |
192 | } | |
193 | ||
194 | /** | |
195 | * i40iw_inet6addr_event - system notifier for ipv6 netdev events | |
196 | * @notfier: not used | |
197 | * @event: event for notifier | |
198 | * @ptr: if address | |
199 | */ | |
200 | int i40iw_inet6addr_event(struct notifier_block *notifier, | |
201 | unsigned long event, | |
202 | void *ptr) | |
203 | { | |
204 | struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr; | |
205 | struct net_device *event_netdev = ifa->idev->dev; | |
206 | struct net_device *netdev; | |
207 | struct i40iw_device *iwdev; | |
208 | struct i40iw_handler *hdl; | |
20c61f7e | 209 | u32 local_ipaddr6[4]; |
e5e74b61 | 210 | u32 action = I40IW_ARP_ADD; |
4e9042e6 FL |
211 | |
212 | hdl = i40iw_find_netdev(event_netdev); | |
213 | if (!hdl) | |
214 | return NOTIFY_DONE; | |
215 | ||
216 | iwdev = &hdl->device; | |
217 | netdev = iwdev->ldev->netdev; | |
218 | if (netdev != event_netdev) | |
219 | return NOTIFY_DONE; | |
220 | ||
e5e74b61 | 221 | i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32); |
4e9042e6 FL |
222 | switch (event) { |
223 | case NETDEV_DOWN: | |
e5e74b61 MI |
224 | action = I40IW_ARP_DELETE; |
225 | /* Fall through */ | |
4e9042e6 FL |
226 | case NETDEV_UP: |
227 | /* Fall through */ | |
228 | case NETDEV_CHANGEADDR: | |
4e9042e6 FL |
229 | i40iw_manage_arp_cache(iwdev, |
230 | netdev->dev_addr, | |
231 | local_ipaddr6, | |
232 | false, | |
e5e74b61 MI |
233 | action); |
234 | i40iw_if_notify(iwdev, netdev, local_ipaddr6, false, | |
235 | (action == I40IW_ARP_ADD) ? true : false); | |
4e9042e6 FL |
236 | break; |
237 | default: | |
238 | break; | |
239 | } | |
240 | return NOTIFY_DONE; | |
241 | } | |
242 | ||
243 | /** | |
244 | * i40iw_net_event - system notifier for net events | |
245 | * @notfier: not used | |
246 | * @event: event for notifier | |
247 | * @ptr: neighbor | |
248 | */ | |
249 | int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr) | |
250 | { | |
251 | struct neighbour *neigh = ptr; | |
252 | struct i40iw_device *iwdev; | |
253 | struct i40iw_handler *iwhdl; | |
254 | __be32 *p; | |
255 | u32 local_ipaddr[4]; | |
256 | ||
257 | switch (event) { | |
258 | case NETEVENT_NEIGH_UPDATE: | |
259 | iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev); | |
260 | if (!iwhdl) | |
261 | return NOTIFY_DONE; | |
262 | iwdev = &iwhdl->device; | |
263 | p = (__be32 *)neigh->primary_key; | |
264 | i40iw_copy_ip_ntohl(local_ipaddr, p); | |
265 | if (neigh->nud_state & NUD_VALID) { | |
266 | i40iw_manage_arp_cache(iwdev, | |
267 | neigh->ha, | |
268 | local_ipaddr, | |
269 | false, | |
270 | I40IW_ARP_ADD); | |
271 | ||
272 | } else { | |
273 | i40iw_manage_arp_cache(iwdev, | |
274 | neigh->ha, | |
275 | local_ipaddr, | |
276 | false, | |
277 | I40IW_ARP_DELETE); | |
278 | } | |
279 | break; | |
280 | default: | |
281 | break; | |
282 | } | |
283 | return NOTIFY_DONE; | |
284 | } | |
285 | ||
286 | /** | |
287 | * i40iw_get_cqp_request - get cqp struct | |
288 | * @cqp: device cqp ptr | |
289 | * @wait: cqp to be used in wait mode | |
290 | */ | |
291 | struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait) | |
292 | { | |
293 | struct i40iw_cqp_request *cqp_request = NULL; | |
294 | unsigned long flags; | |
295 | ||
296 | spin_lock_irqsave(&cqp->req_lock, flags); | |
297 | if (!list_empty(&cqp->cqp_avail_reqs)) { | |
298 | cqp_request = list_entry(cqp->cqp_avail_reqs.next, | |
299 | struct i40iw_cqp_request, list); | |
300 | list_del_init(&cqp_request->list); | |
301 | } | |
302 | spin_unlock_irqrestore(&cqp->req_lock, flags); | |
303 | if (!cqp_request) { | |
304 | cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC); | |
305 | if (cqp_request) { | |
306 | cqp_request->dynamic = true; | |
307 | INIT_LIST_HEAD(&cqp_request->list); | |
308 | init_waitqueue_head(&cqp_request->waitq); | |
309 | } | |
310 | } | |
311 | if (!cqp_request) { | |
312 | i40iw_pr_err("CQP Request Fail: No Memory"); | |
313 | return NULL; | |
314 | } | |
315 | ||
316 | if (wait) { | |
317 | atomic_set(&cqp_request->refcount, 2); | |
318 | cqp_request->waiting = true; | |
319 | } else { | |
320 | atomic_set(&cqp_request->refcount, 1); | |
321 | } | |
322 | return cqp_request; | |
323 | } | |
324 | ||
325 | /** | |
326 | * i40iw_free_cqp_request - free cqp request | |
327 | * @cqp: cqp ptr | |
328 | * @cqp_request: to be put back in cqp list | |
329 | */ | |
330 | void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request) | |
331 | { | |
332 | unsigned long flags; | |
333 | ||
334 | if (cqp_request->dynamic) { | |
335 | kfree(cqp_request); | |
336 | } else { | |
337 | cqp_request->request_done = false; | |
338 | cqp_request->callback_fcn = NULL; | |
339 | cqp_request->waiting = false; | |
340 | ||
341 | spin_lock_irqsave(&cqp->req_lock, flags); | |
342 | list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs); | |
343 | spin_unlock_irqrestore(&cqp->req_lock, flags); | |
344 | } | |
345 | } | |
346 | ||
347 | /** | |
348 | * i40iw_put_cqp_request - dec ref count and free if 0 | |
349 | * @cqp: cqp ptr | |
350 | * @cqp_request: to be put back in cqp list | |
351 | */ | |
352 | void i40iw_put_cqp_request(struct i40iw_cqp *cqp, | |
353 | struct i40iw_cqp_request *cqp_request) | |
354 | { | |
355 | if (atomic_dec_and_test(&cqp_request->refcount)) | |
356 | i40iw_free_cqp_request(cqp, cqp_request); | |
357 | } | |
358 | ||
359 | /** | |
360 | * i40iw_free_qp - callback after destroy cqp completes | |
361 | * @cqp_request: cqp request for destroy qp | |
362 | * @num: not used | |
363 | */ | |
364 | static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num) | |
365 | { | |
366 | struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param; | |
367 | struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp; | |
368 | struct i40iw_device *iwdev; | |
369 | u32 qp_num = iwqp->ibqp.qp_num; | |
370 | ||
371 | iwdev = iwqp->iwdev; | |
372 | ||
373 | i40iw_rem_pdusecount(iwqp->iwpd, iwdev); | |
374 | i40iw_free_qp_resources(iwdev, iwqp, qp_num); | |
d5965934 | 375 | i40iw_rem_devusecount(iwdev); |
4e9042e6 FL |
376 | } |
377 | ||
378 | /** | |
379 | * i40iw_wait_event - wait for completion | |
380 | * @iwdev: iwarp device | |
381 | * @cqp_request: cqp request to wait | |
382 | */ | |
383 | static int i40iw_wait_event(struct i40iw_device *iwdev, | |
384 | struct i40iw_cqp_request *cqp_request) | |
385 | { | |
386 | struct cqp_commands_info *info = &cqp_request->info; | |
387 | struct i40iw_cqp *iwcqp = &iwdev->cqp; | |
388 | bool cqp_error = false; | |
389 | int err_code = 0; | |
390 | int timeout_ret = 0; | |
391 | ||
392 | timeout_ret = wait_event_timeout(cqp_request->waitq, | |
393 | cqp_request->request_done, | |
394 | I40IW_EVENT_TIMEOUT); | |
395 | if (!timeout_ret) { | |
396 | i40iw_pr_err("error cqp command 0x%x timed out ret = %d\n", | |
397 | info->cqp_cmd, timeout_ret); | |
398 | err_code = -ETIME; | |
399 | i40iw_request_reset(iwdev); | |
400 | goto done; | |
401 | } | |
402 | cqp_error = cqp_request->compl_info.error; | |
403 | if (cqp_error) { | |
404 | i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n", | |
405 | info->cqp_cmd, cqp_request->compl_info.maj_err_code, | |
406 | cqp_request->compl_info.min_err_code); | |
407 | err_code = -EPROTO; | |
408 | goto done; | |
409 | } | |
410 | done: | |
411 | i40iw_put_cqp_request(iwcqp, cqp_request); | |
412 | return err_code; | |
413 | } | |
414 | ||
415 | /** | |
416 | * i40iw_handle_cqp_op - process cqp command | |
417 | * @iwdev: iwarp device | |
418 | * @cqp_request: cqp request to process | |
419 | */ | |
420 | enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev, | |
421 | struct i40iw_cqp_request | |
422 | *cqp_request) | |
423 | { | |
424 | struct i40iw_sc_dev *dev = &iwdev->sc_dev; | |
425 | enum i40iw_status_code status; | |
426 | struct cqp_commands_info *info = &cqp_request->info; | |
427 | int err_code = 0; | |
428 | ||
429 | status = i40iw_process_cqp_cmd(dev, info); | |
430 | if (status) { | |
431 | i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd); | |
432 | i40iw_free_cqp_request(&iwdev->cqp, cqp_request); | |
433 | return status; | |
434 | } | |
435 | if (cqp_request->waiting) | |
436 | err_code = i40iw_wait_event(iwdev, cqp_request); | |
437 | if (err_code) | |
438 | status = I40IW_ERR_CQP_COMPL_ERROR; | |
439 | return status; | |
440 | } | |
441 | ||
d5965934 MI |
442 | /** |
443 | * i40iw_add_devusecount - add dev refcount | |
444 | * @iwdev: dev for refcount | |
445 | */ | |
446 | void i40iw_add_devusecount(struct i40iw_device *iwdev) | |
447 | { | |
448 | atomic64_inc(&iwdev->use_count); | |
449 | } | |
450 | ||
451 | /** | |
452 | * i40iw_rem_devusecount - decrement refcount for dev | |
453 | * @iwdev: device | |
454 | */ | |
455 | void i40iw_rem_devusecount(struct i40iw_device *iwdev) | |
456 | { | |
457 | if (!atomic64_dec_and_test(&iwdev->use_count)) | |
458 | return; | |
459 | wake_up(&iwdev->close_wq); | |
460 | } | |
461 | ||
4e9042e6 FL |
462 | /** |
463 | * i40iw_add_pdusecount - add pd refcount | |
464 | * @iwpd: pd for refcount | |
465 | */ | |
466 | void i40iw_add_pdusecount(struct i40iw_pd *iwpd) | |
467 | { | |
468 | atomic_inc(&iwpd->usecount); | |
469 | } | |
470 | ||
471 | /** | |
472 | * i40iw_rem_pdusecount - decrement refcount for pd and free if 0 | |
473 | * @iwpd: pd for refcount | |
474 | * @iwdev: iwarp device | |
475 | */ | |
476 | void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev) | |
477 | { | |
478 | if (!atomic_dec_and_test(&iwpd->usecount)) | |
479 | return; | |
480 | i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id); | |
481 | kfree(iwpd); | |
482 | } | |
483 | ||
484 | /** | |
485 | * i40iw_add_ref - add refcount for qp | |
486 | * @ibqp: iqarp qp | |
487 | */ | |
488 | void i40iw_add_ref(struct ib_qp *ibqp) | |
489 | { | |
490 | struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp; | |
491 | ||
492 | atomic_inc(&iwqp->refcount); | |
493 | } | |
494 | ||
495 | /** | |
496 | * i40iw_rem_ref - rem refcount for qp and free if 0 | |
497 | * @ibqp: iqarp qp | |
498 | */ | |
499 | void i40iw_rem_ref(struct ib_qp *ibqp) | |
500 | { | |
501 | struct i40iw_qp *iwqp; | |
502 | enum i40iw_status_code status; | |
503 | struct i40iw_cqp_request *cqp_request; | |
504 | struct cqp_commands_info *cqp_info; | |
505 | struct i40iw_device *iwdev; | |
506 | u32 qp_num; | |
996abf0a | 507 | unsigned long flags; |
4e9042e6 FL |
508 | |
509 | iwqp = to_iwqp(ibqp); | |
996abf0a IM |
510 | iwdev = iwqp->iwdev; |
511 | spin_lock_irqsave(&iwdev->qptable_lock, flags); | |
512 | if (!atomic_dec_and_test(&iwqp->refcount)) { | |
513 | spin_unlock_irqrestore(&iwdev->qptable_lock, flags); | |
4e9042e6 | 514 | return; |
996abf0a | 515 | } |
4e9042e6 | 516 | |
4e9042e6 FL |
517 | qp_num = iwqp->ibqp.qp_num; |
518 | iwdev->qp_table[qp_num] = NULL; | |
996abf0a | 519 | spin_unlock_irqrestore(&iwdev->qptable_lock, flags); |
4e9042e6 FL |
520 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false); |
521 | if (!cqp_request) | |
522 | return; | |
523 | ||
524 | cqp_request->callback_fcn = i40iw_free_qp; | |
525 | cqp_request->param = (void *)&iwqp->sc_qp; | |
526 | cqp_info = &cqp_request->info; | |
527 | cqp_info->cqp_cmd = OP_QP_DESTROY; | |
528 | cqp_info->post_sq = 1; | |
529 | cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp; | |
530 | cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request; | |
531 | cqp_info->in.u.qp_destroy.remove_hash_idx = true; | |
532 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
533 | if (status) | |
534 | i40iw_pr_err("CQP-OP Destroy QP fail"); | |
535 | } | |
536 | ||
537 | /** | |
538 | * i40iw_get_qp - get qp address | |
539 | * @device: iwarp device | |
540 | * @qpn: qp number | |
541 | */ | |
542 | struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn) | |
543 | { | |
544 | struct i40iw_device *iwdev = to_iwdev(device); | |
545 | ||
546 | if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp)) | |
547 | return NULL; | |
548 | ||
549 | return &iwdev->qp_table[qpn]->ibqp; | |
550 | } | |
551 | ||
552 | /** | |
553 | * i40iw_debug_buf - print debug msg and buffer is mask set | |
554 | * @dev: hardware control device structure | |
555 | * @mask: mask to compare if to print debug buffer | |
556 | * @buf: points buffer addr | |
557 | * @size: saize of buffer to print | |
558 | */ | |
559 | void i40iw_debug_buf(struct i40iw_sc_dev *dev, | |
560 | enum i40iw_debug_flag mask, | |
561 | char *desc, | |
562 | u64 *buf, | |
563 | u32 size) | |
564 | { | |
565 | u32 i; | |
566 | ||
567 | if (!(dev->debug_mask & mask)) | |
568 | return; | |
569 | i40iw_debug(dev, mask, "%s\n", desc); | |
570 | i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf, | |
571 | (unsigned long long)virt_to_phys(buf)); | |
572 | ||
573 | for (i = 0; i < size; i += 8) | |
574 | i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]); | |
575 | } | |
576 | ||
577 | /** | |
578 | * i40iw_get_hw_addr - return hw addr | |
579 | * @par: points to shared dev | |
580 | */ | |
581 | u8 __iomem *i40iw_get_hw_addr(void *par) | |
582 | { | |
583 | struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par; | |
584 | ||
585 | return dev->hw->hw_addr; | |
586 | } | |
587 | ||
588 | /** | |
589 | * i40iw_remove_head - return head entry and remove from list | |
590 | * @list: list for entry | |
591 | */ | |
592 | void *i40iw_remove_head(struct list_head *list) | |
593 | { | |
594 | struct list_head *entry; | |
595 | ||
596 | if (list_empty(list)) | |
597 | return NULL; | |
598 | ||
599 | entry = (void *)list->next; | |
600 | list_del(entry); | |
601 | return (void *)entry; | |
602 | } | |
603 | ||
604 | /** | |
605 | * i40iw_allocate_dma_mem - Memory alloc helper fn | |
606 | * @hw: pointer to the HW structure | |
607 | * @mem: ptr to mem struct to fill out | |
608 | * @size: size of memory requested | |
609 | * @alignment: what to align the allocation to | |
610 | */ | |
611 | enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw, | |
612 | struct i40iw_dma_mem *mem, | |
613 | u64 size, | |
614 | u32 alignment) | |
615 | { | |
616 | struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context; | |
617 | ||
618 | if (!mem) | |
619 | return I40IW_ERR_PARAM; | |
620 | mem->size = ALIGN(size, alignment); | |
621 | mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size, | |
622 | (dma_addr_t *)&mem->pa, GFP_KERNEL); | |
623 | if (!mem->va) | |
624 | return I40IW_ERR_NO_MEMORY; | |
625 | return 0; | |
626 | } | |
627 | ||
628 | /** | |
629 | * i40iw_free_dma_mem - Memory free helper fn | |
630 | * @hw: pointer to the HW structure | |
631 | * @mem: ptr to mem struct to free | |
632 | */ | |
633 | void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem) | |
634 | { | |
635 | struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context; | |
636 | ||
637 | if (!mem || !mem->va) | |
638 | return; | |
639 | ||
640 | dma_free_coherent(&pcidev->dev, mem->size, | |
641 | mem->va, (dma_addr_t)mem->pa); | |
642 | mem->va = NULL; | |
643 | } | |
644 | ||
645 | /** | |
646 | * i40iw_allocate_virt_mem - virtual memory alloc helper fn | |
647 | * @hw: pointer to the HW structure | |
648 | * @mem: ptr to mem struct to fill out | |
649 | * @size: size of memory requested | |
650 | */ | |
651 | enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw, | |
652 | struct i40iw_virt_mem *mem, | |
653 | u32 size) | |
654 | { | |
655 | if (!mem) | |
656 | return I40IW_ERR_PARAM; | |
657 | ||
658 | mem->size = size; | |
659 | mem->va = kzalloc(size, GFP_KERNEL); | |
660 | ||
661 | if (mem->va) | |
662 | return 0; | |
663 | else | |
664 | return I40IW_ERR_NO_MEMORY; | |
665 | } | |
666 | ||
667 | /** | |
668 | * i40iw_free_virt_mem - virtual memory free helper fn | |
669 | * @hw: pointer to the HW structure | |
670 | * @mem: ptr to mem struct to free | |
671 | */ | |
672 | enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw, | |
673 | struct i40iw_virt_mem *mem) | |
674 | { | |
675 | if (!mem) | |
676 | return I40IW_ERR_PARAM; | |
7eaf8313 MI |
677 | /* |
678 | * mem->va points to the parent of mem, so both mem and mem->va | |
679 | * can not be touched once mem->va is freed | |
680 | */ | |
4e9042e6 | 681 | kfree(mem->va); |
4e9042e6 FL |
682 | return 0; |
683 | } | |
684 | ||
685 | /** | |
686 | * i40iw_cqp_sds_cmd - create cqp command for sd | |
687 | * @dev: hardware control device structure | |
688 | * @sd_info: information for sd cqp | |
689 | * | |
690 | */ | |
691 | enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev, | |
692 | struct i40iw_update_sds_info *sdinfo) | |
693 | { | |
694 | enum i40iw_status_code status; | |
695 | struct i40iw_cqp_request *cqp_request; | |
696 | struct cqp_commands_info *cqp_info; | |
697 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
698 | ||
699 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
700 | if (!cqp_request) | |
701 | return I40IW_ERR_NO_MEMORY; | |
702 | cqp_info = &cqp_request->info; | |
703 | memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo, | |
704 | sizeof(cqp_info->in.u.update_pe_sds.info)); | |
705 | cqp_info->cqp_cmd = OP_UPDATE_PE_SDS; | |
706 | cqp_info->post_sq = 1; | |
707 | cqp_info->in.u.update_pe_sds.dev = dev; | |
708 | cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request; | |
709 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
710 | if (status) | |
711 | i40iw_pr_err("CQP-OP Update SD's fail"); | |
712 | return status; | |
713 | } | |
714 | ||
0fc2dc58 HO |
715 | /** |
716 | * i40iw_qp_suspend_resume - cqp command for suspend/resume | |
717 | * @dev: hardware control device structure | |
718 | * @qp: hardware control qp | |
719 | * @suspend: flag if suspend or resume | |
720 | */ | |
721 | void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend) | |
722 | { | |
723 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
724 | struct i40iw_cqp_request *cqp_request; | |
725 | struct i40iw_sc_cqp *cqp = dev->cqp; | |
726 | struct cqp_commands_info *cqp_info; | |
727 | enum i40iw_status_code status; | |
728 | ||
729 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false); | |
730 | if (!cqp_request) | |
731 | return; | |
732 | ||
733 | cqp_info = &cqp_request->info; | |
734 | cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME; | |
735 | cqp_info->in.u.suspend_resume.cqp = cqp; | |
736 | cqp_info->in.u.suspend_resume.qp = qp; | |
737 | cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request; | |
738 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
739 | if (status) | |
740 | i40iw_pr_err("CQP-OP QP Suspend/Resume fail"); | |
741 | } | |
742 | ||
743 | /** | |
744 | * i40iw_qp_mss_modify - modify mss for qp | |
745 | * @dev: hardware control device structure | |
746 | * @qp: hardware control qp | |
747 | */ | |
748 | void i40iw_qp_mss_modify(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp) | |
749 | { | |
750 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
751 | struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp; | |
752 | struct i40iw_modify_qp_info info; | |
753 | ||
754 | memset(&info, 0, sizeof(info)); | |
755 | info.mss_change = true; | |
756 | info.new_mss = dev->mss; | |
757 | i40iw_hw_modify_qp(iwdev, iwqp, &info, false); | |
758 | } | |
759 | ||
4e9042e6 FL |
760 | /** |
761 | * i40iw_term_modify_qp - modify qp for term message | |
762 | * @qp: hardware control qp | |
763 | * @next_state: qp's next state | |
764 | * @term: terminate code | |
765 | * @term_len: length | |
766 | */ | |
767 | void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len) | |
768 | { | |
769 | struct i40iw_qp *iwqp; | |
770 | ||
771 | iwqp = (struct i40iw_qp *)qp->back_qp; | |
772 | i40iw_next_iw_state(iwqp, next_state, 0, term, term_len); | |
773 | }; | |
774 | ||
775 | /** | |
776 | * i40iw_terminate_done - after terminate is completed | |
777 | * @qp: hardware control qp | |
778 | * @timeout_occurred: indicates if terminate timer expired | |
779 | */ | |
780 | void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred) | |
781 | { | |
782 | struct i40iw_qp *iwqp; | |
783 | u32 next_iwarp_state = I40IW_QP_STATE_ERROR; | |
784 | u8 hte = 0; | |
785 | bool first_time; | |
786 | unsigned long flags; | |
787 | ||
788 | iwqp = (struct i40iw_qp *)qp->back_qp; | |
789 | spin_lock_irqsave(&iwqp->lock, flags); | |
790 | if (iwqp->hte_added) { | |
791 | iwqp->hte_added = 0; | |
792 | hte = 1; | |
793 | } | |
794 | first_time = !(qp->term_flags & I40IW_TERM_DONE); | |
795 | qp->term_flags |= I40IW_TERM_DONE; | |
796 | spin_unlock_irqrestore(&iwqp->lock, flags); | |
797 | if (first_time) { | |
798 | if (!timeout_occurred) | |
799 | i40iw_terminate_del_timer(qp); | |
800 | else | |
801 | next_iwarp_state = I40IW_QP_STATE_CLOSING; | |
802 | ||
803 | i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0); | |
804 | i40iw_cm_disconn(iwqp); | |
805 | } | |
806 | } | |
807 | ||
808 | /** | |
809 | * i40iw_terminate_imeout - timeout happened | |
810 | * @context: points to iwarp qp | |
811 | */ | |
812 | static void i40iw_terminate_timeout(unsigned long context) | |
813 | { | |
814 | struct i40iw_qp *iwqp = (struct i40iw_qp *)context; | |
815 | struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp; | |
816 | ||
817 | i40iw_terminate_done(qp, 1); | |
818 | } | |
819 | ||
820 | /** | |
821 | * i40iw_terminate_start_timer - start terminate timeout | |
822 | * @qp: hardware control qp | |
823 | */ | |
824 | void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp) | |
825 | { | |
826 | struct i40iw_qp *iwqp; | |
827 | ||
828 | iwqp = (struct i40iw_qp *)qp->back_qp; | |
829 | init_timer(&iwqp->terminate_timer); | |
830 | iwqp->terminate_timer.function = i40iw_terminate_timeout; | |
831 | iwqp->terminate_timer.expires = jiffies + HZ; | |
832 | iwqp->terminate_timer.data = (unsigned long)iwqp; | |
833 | add_timer(&iwqp->terminate_timer); | |
834 | } | |
835 | ||
836 | /** | |
837 | * i40iw_terminate_del_timer - delete terminate timeout | |
838 | * @qp: hardware control qp | |
839 | */ | |
840 | void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp) | |
841 | { | |
842 | struct i40iw_qp *iwqp; | |
843 | ||
844 | iwqp = (struct i40iw_qp *)qp->back_qp; | |
845 | del_timer(&iwqp->terminate_timer); | |
846 | } | |
847 | ||
848 | /** | |
849 | * i40iw_cqp_generic_worker - generic worker for cqp | |
850 | * @work: work pointer | |
851 | */ | |
852 | static void i40iw_cqp_generic_worker(struct work_struct *work) | |
853 | { | |
854 | struct i40iw_virtchnl_work_info *work_info = | |
855 | &((struct virtchnl_work *)work)->work_info; | |
856 | ||
857 | if (work_info->worker_vf_dev) | |
858 | work_info->callback_fcn(work_info->worker_vf_dev); | |
859 | } | |
860 | ||
861 | /** | |
862 | * i40iw_cqp_spawn_worker - spawn worket thread | |
863 | * @iwdev: device struct pointer | |
864 | * @work_info: work request info | |
865 | * @iw_vf_idx: virtual function index | |
866 | */ | |
867 | void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev, | |
868 | struct i40iw_virtchnl_work_info *work_info, | |
869 | u32 iw_vf_idx) | |
870 | { | |
871 | struct virtchnl_work *work; | |
872 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
873 | ||
874 | work = &iwdev->virtchnl_w[iw_vf_idx]; | |
875 | memcpy(&work->work_info, work_info, sizeof(*work_info)); | |
876 | INIT_WORK(&work->work, i40iw_cqp_generic_worker); | |
877 | queue_work(iwdev->virtchnl_wq, &work->work); | |
878 | } | |
879 | ||
880 | /** | |
881 | * i40iw_cqp_manage_hmc_fcn_worker - | |
882 | * @work: work pointer for hmc info | |
883 | */ | |
884 | static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work) | |
885 | { | |
886 | struct i40iw_cqp_request *cqp_request = | |
887 | ((struct virtchnl_work *)work)->cqp_request; | |
888 | struct i40iw_ccq_cqe_info ccq_cqe_info; | |
889 | struct i40iw_hmc_fcn_info *hmcfcninfo = | |
890 | &cqp_request->info.in.u.manage_hmc_pm.info; | |
891 | struct i40iw_device *iwdev = | |
892 | (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev; | |
893 | ||
894 | ccq_cqe_info.cqp = NULL; | |
895 | ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code; | |
896 | ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code; | |
897 | ccq_cqe_info.op_code = cqp_request->compl_info.op_code; | |
898 | ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val; | |
899 | ccq_cqe_info.scratch = 0; | |
900 | ccq_cqe_info.error = cqp_request->compl_info.error; | |
901 | hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev, | |
902 | hmcfcninfo->cqp_callback_param, &ccq_cqe_info); | |
903 | i40iw_put_cqp_request(&iwdev->cqp, cqp_request); | |
904 | } | |
905 | ||
906 | /** | |
907 | * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion | |
908 | * @cqp_request: cqp request info struct for hmc fun | |
909 | * @unused: unused param of callback | |
910 | */ | |
911 | static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request, | |
912 | u32 unused) | |
913 | { | |
914 | struct virtchnl_work *work; | |
915 | struct i40iw_hmc_fcn_info *hmcfcninfo = | |
916 | &cqp_request->info.in.u.manage_hmc_pm.info; | |
917 | struct i40iw_device *iwdev = | |
918 | (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev-> | |
919 | back_dev; | |
920 | ||
921 | if (hmcfcninfo && hmcfcninfo->callback_fcn) { | |
922 | i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__); | |
923 | atomic_inc(&cqp_request->refcount); | |
924 | work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx]; | |
925 | work->cqp_request = cqp_request; | |
926 | INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker); | |
927 | queue_work(iwdev->virtchnl_wq, &work->work); | |
928 | i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__); | |
929 | } else { | |
930 | i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__); | |
931 | } | |
932 | } | |
933 | ||
934 | /** | |
935 | * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc | |
936 | * @dev: hardware control device structure | |
937 | * @hmcfcninfo: info for hmc | |
938 | */ | |
939 | enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev, | |
940 | struct i40iw_hmc_fcn_info *hmcfcninfo) | |
941 | { | |
942 | enum i40iw_status_code status; | |
943 | struct i40iw_cqp_request *cqp_request; | |
944 | struct cqp_commands_info *cqp_info; | |
945 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
946 | ||
947 | i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__); | |
948 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false); | |
949 | if (!cqp_request) | |
950 | return I40IW_ERR_NO_MEMORY; | |
951 | cqp_info = &cqp_request->info; | |
952 | cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback; | |
953 | cqp_request->param = hmcfcninfo; | |
954 | memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo, | |
955 | sizeof(*hmcfcninfo)); | |
956 | cqp_info->in.u.manage_hmc_pm.dev = dev; | |
957 | cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE; | |
958 | cqp_info->post_sq = 1; | |
959 | cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request; | |
960 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
961 | if (status) | |
962 | i40iw_pr_err("CQP-OP Manage HMC fail"); | |
963 | return status; | |
964 | } | |
965 | ||
966 | /** | |
967 | * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm | |
968 | * @iwdev: function device struct | |
969 | * @values_mem: buffer for fpm | |
970 | * @hmc_fn_id: function id for fpm | |
971 | */ | |
972 | enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev, | |
973 | struct i40iw_dma_mem *values_mem, | |
974 | u8 hmc_fn_id) | |
975 | { | |
976 | enum i40iw_status_code status; | |
977 | struct i40iw_cqp_request *cqp_request; | |
978 | struct cqp_commands_info *cqp_info; | |
979 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
980 | ||
981 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
982 | if (!cqp_request) | |
983 | return I40IW_ERR_NO_MEMORY; | |
984 | cqp_info = &cqp_request->info; | |
985 | cqp_request->param = NULL; | |
986 | cqp_info->in.u.query_fpm_values.cqp = dev->cqp; | |
987 | cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa; | |
988 | cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va; | |
989 | cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id; | |
990 | cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES; | |
991 | cqp_info->post_sq = 1; | |
992 | cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request; | |
993 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
994 | if (status) | |
995 | i40iw_pr_err("CQP-OP Query FPM fail"); | |
996 | return status; | |
997 | } | |
998 | ||
999 | /** | |
1000 | * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw | |
1001 | * @dev: hardware control device structure | |
1002 | * @values_mem: buffer with fpm values | |
1003 | * @hmc_fn_id: function id for fpm | |
1004 | */ | |
1005 | enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev, | |
1006 | struct i40iw_dma_mem *values_mem, | |
1007 | u8 hmc_fn_id) | |
1008 | { | |
1009 | enum i40iw_status_code status; | |
1010 | struct i40iw_cqp_request *cqp_request; | |
1011 | struct cqp_commands_info *cqp_info; | |
1012 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
1013 | ||
1014 | cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true); | |
1015 | if (!cqp_request) | |
1016 | return I40IW_ERR_NO_MEMORY; | |
1017 | cqp_info = &cqp_request->info; | |
1018 | cqp_request->param = NULL; | |
1019 | cqp_info->in.u.commit_fpm_values.cqp = dev->cqp; | |
1020 | cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa; | |
1021 | cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va; | |
1022 | cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id; | |
1023 | cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES; | |
1024 | cqp_info->post_sq = 1; | |
1025 | cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request; | |
1026 | status = i40iw_handle_cqp_op(iwdev, cqp_request); | |
1027 | if (status) | |
1028 | i40iw_pr_err("CQP-OP Commit FPM fail"); | |
1029 | return status; | |
1030 | } | |
1031 | ||
1032 | /** | |
1033 | * i40iw_vf_wait_vchnl_resp - wait for channel msg | |
1034 | * @iwdev: function's device struct | |
1035 | */ | |
1036 | enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev) | |
1037 | { | |
1038 | struct i40iw_device *iwdev = dev->back_dev; | |
4e9042e6 FL |
1039 | int timeout_ret; |
1040 | ||
1041 | i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n", | |
1042 | __func__, __LINE__, dev, iwdev); | |
f69c3331 IM |
1043 | |
1044 | atomic_set(&iwdev->vchnl_msgs, 2); | |
4e9042e6 FL |
1045 | timeout_ret = wait_event_timeout(iwdev->vchnl_waitq, |
1046 | (atomic_read(&iwdev->vchnl_msgs) == 1), | |
1047 | I40IW_VCHNL_EVENT_TIMEOUT); | |
1048 | atomic_dec(&iwdev->vchnl_msgs); | |
1049 | if (!timeout_ret) { | |
1050 | i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret); | |
f69c3331 IM |
1051 | atomic_set(&iwdev->vchnl_msgs, 0); |
1052 | dev->vchnl_up = false; | |
1053 | return I40IW_ERR_TIMEOUT; | |
4e9042e6 | 1054 | } |
f69c3331 IM |
1055 | wake_up(&dev->vf_reqs); |
1056 | return 0; | |
4e9042e6 FL |
1057 | } |
1058 | ||
1059 | /** | |
1060 | * i40iw_ieq_mpa_crc_ae - generate AE for crc error | |
1061 | * @dev: hardware control device structure | |
1062 | * @qp: hardware control qp | |
1063 | */ | |
1064 | void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp) | |
1065 | { | |
1066 | struct i40iw_qp_flush_info info; | |
1067 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
1068 | ||
1069 | i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__); | |
1070 | memset(&info, 0, sizeof(info)); | |
1071 | info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR; | |
1072 | info.generate_ae = true; | |
1073 | info.ae_source = 0x3; | |
1074 | (void)i40iw_hw_flush_wqes(iwdev, qp, &info, false); | |
1075 | } | |
1076 | ||
1077 | /** | |
1078 | * i40iw_init_hash_desc - initialize hash for crc calculation | |
1079 | * @desc: cryption type | |
1080 | */ | |
34abf9ed | 1081 | enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc) |
4e9042e6 | 1082 | { |
34abf9ed TN |
1083 | struct crypto_shash *tfm; |
1084 | struct shash_desc *tdesc; | |
1085 | ||
1086 | tfm = crypto_alloc_shash("crc32c", 0, 0); | |
1087 | if (IS_ERR(tfm)) | |
1088 | return I40IW_ERR_MPA_CRC; | |
1089 | ||
1090 | tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm), | |
1091 | GFP_KERNEL); | |
1092 | if (!tdesc) { | |
1093 | crypto_free_shash(tfm); | |
4e9042e6 | 1094 | return I40IW_ERR_MPA_CRC; |
34abf9ed TN |
1095 | } |
1096 | tdesc->tfm = tfm; | |
1097 | *desc = tdesc; | |
1098 | ||
4e9042e6 FL |
1099 | return 0; |
1100 | } | |
1101 | ||
1102 | /** | |
1103 | * i40iw_free_hash_desc - free hash desc | |
1104 | * @desc: to be freed | |
1105 | */ | |
34abf9ed | 1106 | void i40iw_free_hash_desc(struct shash_desc *desc) |
4e9042e6 | 1107 | { |
34abf9ed TN |
1108 | if (desc) { |
1109 | crypto_free_shash(desc->tfm); | |
1110 | kfree(desc); | |
1111 | } | |
4e9042e6 FL |
1112 | } |
1113 | ||
1114 | /** | |
1115 | * i40iw_alloc_query_fpm_buf - allocate buffer for fpm | |
1116 | * @dev: hardware control device structure | |
1117 | * @mem: buffer ptr for fpm to be allocated | |
1118 | * @return: memory allocation status | |
1119 | */ | |
1120 | enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev, | |
1121 | struct i40iw_dma_mem *mem) | |
1122 | { | |
1123 | enum i40iw_status_code status; | |
1124 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
1125 | ||
1126 | status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE, | |
1127 | I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK); | |
1128 | return status; | |
1129 | } | |
1130 | ||
1131 | /** | |
1132 | * i40iw_ieq_check_mpacrc - check if mpa crc is OK | |
1133 | * @desc: desc for hash | |
1134 | * @addr: address of buffer for crc | |
1135 | * @length: length of buffer | |
1136 | * @value: value to be compared | |
1137 | */ | |
34abf9ed | 1138 | enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc, |
4e9042e6 FL |
1139 | void *addr, |
1140 | u32 length, | |
1141 | u32 value) | |
1142 | { | |
4e9042e6 FL |
1143 | u32 crc = 0; |
1144 | int ret; | |
1145 | enum i40iw_status_code ret_code = 0; | |
1146 | ||
34abf9ed TN |
1147 | crypto_shash_init(desc); |
1148 | ret = crypto_shash_update(desc, addr, length); | |
4e9042e6 | 1149 | if (!ret) |
34abf9ed | 1150 | crypto_shash_final(desc, (u8 *)&crc); |
4e9042e6 FL |
1151 | if (crc != value) { |
1152 | i40iw_pr_err("mpa crc check fail\n"); | |
1153 | ret_code = I40IW_ERR_MPA_CRC; | |
1154 | } | |
1155 | return ret_code; | |
1156 | } | |
1157 | ||
1158 | /** | |
1159 | * i40iw_ieq_get_qp - get qp based on quad in puda buffer | |
1160 | * @dev: hardware control device structure | |
1161 | * @buf: receive puda buffer on exception q | |
1162 | */ | |
1163 | struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev, | |
1164 | struct i40iw_puda_buf *buf) | |
1165 | { | |
1166 | struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
1167 | struct i40iw_qp *iwqp; | |
1168 | struct i40iw_cm_node *cm_node; | |
1169 | u32 loc_addr[4], rem_addr[4]; | |
1170 | u16 loc_port, rem_port; | |
1171 | struct ipv6hdr *ip6h; | |
1172 | struct iphdr *iph = (struct iphdr *)buf->iph; | |
1173 | struct tcphdr *tcph = (struct tcphdr *)buf->tcph; | |
1174 | ||
1175 | if (iph->version == 4) { | |
1176 | memset(loc_addr, 0, sizeof(loc_addr)); | |
1177 | loc_addr[0] = ntohl(iph->daddr); | |
1178 | memset(rem_addr, 0, sizeof(rem_addr)); | |
1179 | rem_addr[0] = ntohl(iph->saddr); | |
1180 | } else { | |
1181 | ip6h = (struct ipv6hdr *)buf->iph; | |
1182 | i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32); | |
1183 | i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32); | |
1184 | } | |
1185 | loc_port = ntohs(tcph->dest); | |
1186 | rem_port = ntohs(tcph->source); | |
1187 | ||
1188 | cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port, | |
1189 | loc_addr, false); | |
1190 | if (!cm_node) | |
1191 | return NULL; | |
1192 | iwqp = cm_node->iwqp; | |
1193 | return &iwqp->sc_qp; | |
1194 | } | |
1195 | ||
1196 | /** | |
1197 | * i40iw_ieq_update_tcpip_info - update tcpip in the buffer | |
1198 | * @buf: puda to update | |
1199 | * @length: length of buffer | |
1200 | * @seqnum: seq number for tcp | |
1201 | */ | |
1202 | void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum) | |
1203 | { | |
1204 | struct tcphdr *tcph; | |
1205 | struct iphdr *iph; | |
1206 | u16 iphlen; | |
1207 | u16 packetsize; | |
1208 | u8 *addr = (u8 *)buf->mem.va; | |
1209 | ||
1210 | iphlen = (buf->ipv4) ? 20 : 40; | |
1211 | iph = (struct iphdr *)(addr + buf->maclen); | |
1212 | tcph = (struct tcphdr *)(addr + buf->maclen + iphlen); | |
1213 | packetsize = length + buf->tcphlen + iphlen; | |
1214 | ||
1215 | iph->tot_len = htons(packetsize); | |
1216 | tcph->seq = htonl(seqnum); | |
1217 | } | |
1218 | ||
1219 | /** | |
1220 | * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer | |
1221 | * @info: to get information | |
1222 | * @buf: puda buffer | |
1223 | */ | |
1224 | enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info, | |
1225 | struct i40iw_puda_buf *buf) | |
1226 | { | |
1227 | struct iphdr *iph; | |
1228 | struct ipv6hdr *ip6h; | |
1229 | struct tcphdr *tcph; | |
1230 | u16 iphlen; | |
1231 | u16 pkt_len; | |
1232 | u8 *mem = (u8 *)buf->mem.va; | |
1233 | struct ethhdr *ethh = (struct ethhdr *)buf->mem.va; | |
1234 | ||
1235 | if (ethh->h_proto == htons(0x8100)) { | |
1236 | info->vlan_valid = true; | |
1237 | buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK; | |
1238 | } | |
1239 | buf->maclen = (info->vlan_valid) ? 18 : 14; | |
1240 | iphlen = (info->l3proto) ? 40 : 20; | |
1241 | buf->ipv4 = (info->l3proto) ? false : true; | |
1242 | buf->iph = mem + buf->maclen; | |
1243 | iph = (struct iphdr *)buf->iph; | |
1244 | ||
1245 | buf->tcph = buf->iph + iphlen; | |
1246 | tcph = (struct tcphdr *)buf->tcph; | |
1247 | ||
1248 | if (buf->ipv4) { | |
1249 | pkt_len = ntohs(iph->tot_len); | |
1250 | } else { | |
1251 | ip6h = (struct ipv6hdr *)buf->iph; | |
1252 | pkt_len = ntohs(ip6h->payload_len) + iphlen; | |
1253 | } | |
1254 | ||
1255 | buf->totallen = pkt_len + buf->maclen; | |
1256 | ||
7581e96c | 1257 | if (info->payload_len < buf->totallen) { |
4e9042e6 FL |
1258 | i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n", |
1259 | info->payload_len, buf->totallen); | |
1260 | return I40IW_ERR_INVALID_SIZE; | |
1261 | } | |
1262 | ||
1263 | buf->tcphlen = (tcph->doff) << 2; | |
1264 | buf->datalen = pkt_len - iphlen - buf->tcphlen; | |
1265 | buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL; | |
1266 | buf->hdrlen = buf->maclen + iphlen + buf->tcphlen; | |
1267 | buf->seqnum = ntohl(tcph->seq); | |
1268 | return 0; | |
1269 | } | |
1270 | ||
1271 | /** | |
1272 | * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats | |
1273 | * @dev: hardware control device structure | |
1274 | */ | |
1275 | static void i40iw_hw_stats_timeout(unsigned long dev) | |
1276 | { | |
1277 | struct i40iw_sc_dev *pf_dev = (struct i40iw_sc_dev *)dev; | |
1278 | struct i40iw_dev_pestat *pf_devstat = &pf_dev->dev_pestat; | |
1279 | struct i40iw_dev_pestat *vf_devstat = NULL; | |
1280 | u16 iw_vf_idx; | |
1281 | unsigned long flags; | |
1282 | ||
1283 | /*PF*/ | |
1284 | pf_devstat->ops.iw_hw_stat_read_all(pf_devstat, &pf_devstat->hw_stats); | |
1285 | for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) { | |
1286 | spin_lock_irqsave(&pf_devstat->stats_lock, flags); | |
1287 | if (pf_dev->vf_dev[iw_vf_idx]) { | |
1288 | if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) { | |
1289 | vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->dev_pestat; | |
1290 | vf_devstat->ops.iw_hw_stat_read_all(vf_devstat, &vf_devstat->hw_stats); | |
1291 | } | |
1292 | } | |
1293 | spin_unlock_irqrestore(&pf_devstat->stats_lock, flags); | |
1294 | } | |
1295 | ||
1296 | mod_timer(&pf_devstat->stats_timer, | |
1297 | jiffies + msecs_to_jiffies(STATS_TIMER_DELAY)); | |
1298 | } | |
1299 | ||
1300 | /** | |
1301 | * i40iw_hw_stats_start_timer - Start periodic stats timer | |
1302 | * @dev: hardware control device structure | |
1303 | */ | |
1304 | void i40iw_hw_stats_start_timer(struct i40iw_sc_dev *dev) | |
1305 | { | |
1306 | struct i40iw_dev_pestat *devstat = &dev->dev_pestat; | |
1307 | ||
1308 | init_timer(&devstat->stats_timer); | |
1309 | devstat->stats_timer.function = i40iw_hw_stats_timeout; | |
1310 | devstat->stats_timer.data = (unsigned long)dev; | |
1311 | mod_timer(&devstat->stats_timer, | |
1312 | jiffies + msecs_to_jiffies(STATS_TIMER_DELAY)); | |
1313 | } | |
1314 | ||
1315 | /** | |
1316 | * i40iw_hw_stats_del_timer - Delete periodic stats timer | |
1317 | * @dev: hardware control device structure | |
1318 | */ | |
1319 | void i40iw_hw_stats_del_timer(struct i40iw_sc_dev *dev) | |
1320 | { | |
1321 | struct i40iw_dev_pestat *devstat = &dev->dev_pestat; | |
1322 | ||
1323 | del_timer_sync(&devstat->stats_timer); | |
1324 | } |