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Merge tag 'mvebu-fixes-4.14-1' of git://git.infradead.org/linux-mvebu into fixes
[linux-2.6-block.git] / drivers / infiniband / hw / i40iw / i40iw.h
CommitLineData
8e06af71
FL		 1/*******************************************************************************
2*
3* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4*
5* This software is available to you under a choice of one of two
6* licenses. You may choose to be licensed under the terms of the GNU
7* General Public License (GPL) Version 2, available from the file
8* COPYING in the main directory of this source tree, or the
9* OpenFabrics.org BSD license below:
10*
11* Redistribution and use in source and binary forms, with or
12* without modification, are permitted provided that the following
13* conditions are met:
14*
15* - Redistributions of source code must retain the above
16* copyright notice, this list of conditions and the following
17* disclaimer.
18*
19* - Redistributions in binary form must reproduce the above
20* copyright notice, this list of conditions and the following
21* disclaimer in the documentation and/or other materials
22* provided with the distribution.
23*
24* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31* SOFTWARE.
32*
33*******************************************************************************/
34
35#ifndef I40IW_IW_H
36#define I40IW_IW_H
37#include <linux/netdevice.h>
38#include <linux/inetdevice.h>
39#include <linux/spinlock.h>
40#include <linux/kernel.h>
41#include <linux/delay.h>
42#include <linux/pci.h>
43#include <linux/dma-mapping.h>
44#include <linux/workqueue.h>
45#include <linux/slab.h>
46#include <linux/io.h>
47#include <linux/crc32c.h>
48#include <rdma/ib_smi.h>
49#include <rdma/ib_verbs.h>
50#include <rdma/ib_pack.h>
51#include <rdma/rdma_cm.h>
52#include <rdma/iw_cm.h>
34abf9ed 53#include <crypto/hash.h>
8e06af71
FL		 54
55#include "i40iw_status.h"
56#include "i40iw_osdep.h"
57#include "i40iw_d.h"
58#include "i40iw_hmc.h"
59
60#include <i40e_client.h>
61#include "i40iw_type.h"
62#include "i40iw_p.h"
63#include "i40iw_ucontext.h"
64#include "i40iw_pble.h"
65#include "i40iw_verbs.h"
66#include "i40iw_cm.h"
67#include "i40iw_user.h"
68#include "i40iw_puda.h"
69
70#define I40IW_FW_VERSION 2
71#define I40IW_HW_VERSION 2
72
73#define I40IW_ARP_ADD 1
74#define I40IW_ARP_DELETE 2
75#define I40IW_ARP_RESOLVE 3
76
77#define I40IW_MACIP_ADD 1
78#define I40IW_MACIP_DELETE 2
79
80#define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
81#define IW_CEQ_SIZE 2048
82#define IW_AEQ_SIZE 2048
83
84#define RX_BUF_SIZE (1536 + 8)
85#define IW_REG0_SIZE (4 * 1024)
86#define IW_TX_TIMEOUT (6 * HZ)
87#define IW_FIRST_QPN 1
88#define IW_SW_CONTEXT_ALIGN 1024
89
90#define MAX_DPC_ITERATIONS 128
91
92#define I40IW_EVENT_TIMEOUT 100000
93#define I40IW_VCHNL_EVENT_TIMEOUT 100000
94
95#define I40IW_NO_VLAN 0xffff
96#define I40IW_NO_QSET 0xffff
97
98/* access to mcast filter list */
99#define IW_ADD_MCAST false
100#define IW_DEL_MCAST true
101
102#define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
103#define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
104#define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
105#define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
106#define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
107#define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
108#define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
109#define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
110#define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
111#define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
112#define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
113
114#define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
1cda28bb
SS		 115#define IW_CFG_FPM_QP_COUNT 32768
116#define I40IW_MAX_PAGES_PER_FMR 512
117#define I40IW_MIN_PAGES_PER_FMR 1
118#define I40IW_CQP_COMPL_RQ_WQE_FLUSHED 2
119#define I40IW_CQP_COMPL_SQ_WQE_FLUSHED 3
120#define I40IW_CQP_COMPL_RQ_SQ_WQE_FLUSHED 4
8e06af71
FL		 121
122#define I40IW_MTU_TO_MSS 40
123#define I40IW_DEFAULT_MSS 1460
124
125struct i40iw_cqp_compl_info {
126 u32 op_ret_val;
127 u16 maj_err_code;
128 u16 min_err_code;
129 bool error;
130 u8 op_code;
131};
132
133#define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
134
135#define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
136
137#define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
138
139struct i40iw_cqp_request {
140 struct cqp_commands_info info;
141 wait_queue_head_t waitq;
142 struct list_head list;
143 atomic_t refcount;
144 void (*callback_fcn)(struct i40iw_cqp_request*, u32);
145 void *param;
146 struct i40iw_cqp_compl_info compl_info;
147 bool waiting;
148 bool request_done;
149 bool dynamic;
150};
151
152struct i40iw_cqp {
153 struct i40iw_sc_cqp sc_cqp;
154 spinlock_t req_lock; /*cqp request list */
155 wait_queue_head_t waitq;
156 struct i40iw_dma_mem sq;
157 struct i40iw_dma_mem host_ctx;
158 u64 *scratch_array;
159 struct i40iw_cqp_request *cqp_requests;
160 struct list_head cqp_avail_reqs;
161 struct list_head cqp_pending_reqs;
162};
163
164struct i40iw_device;
165
166struct i40iw_ccq {
167 struct i40iw_sc_cq sc_cq;
168 spinlock_t lock; /* ccq control */
169 wait_queue_head_t waitq;
170 struct i40iw_dma_mem mem_cq;
171 struct i40iw_dma_mem shadow_area;
172};
173
174struct i40iw_ceq {
175 struct i40iw_sc_ceq sc_ceq;
176 struct i40iw_dma_mem mem;
177 u32 irq;
178 u32 msix_idx;
179 struct i40iw_device *iwdev;
180 struct tasklet_struct dpc_tasklet;
181};
182
183struct i40iw_aeq {
184 struct i40iw_sc_aeq sc_aeq;
185 struct i40iw_dma_mem mem;
186};
187
188struct i40iw_arp_entry {
189 u32 ip_addr[4];
190 u8 mac_addr[ETH_ALEN];
191};
192
193enum init_completion_state {
194 INVALID_STATE = 0,
195 INITIAL_STATE,
196 CQP_CREATED,
197 HMC_OBJS_CREATED,
198 PBLE_CHUNK_MEM,
199 CCQ_CREATED,
200 AEQ_CREATED,
201 CEQ_CREATED,
202 ILQ_CREATED,
203 IEQ_CREATED,
8e06af71
FL		 204 IP_ADDR_REGISTERED,
205 RDMA_DEV_REGISTERED
206};
207
208struct i40iw_msix_vector {
209 u32 idx;
210 u32 irq;
211 u32 cpu_affinity;
212 u32 ceq_id;
213};
214
0fc2dc58
HO		 215struct l2params_work {
216 struct work_struct work;
217 struct i40iw_device *iwdev;
218 struct i40iw_l2params l2params;
219};
220
8e06af71
FL		 221#define I40IW_MSIX_TABLE_SIZE 65
222
223struct virtchnl_work {
224 struct work_struct work;
225 union {
226 struct i40iw_cqp_request *cqp_request;
227 struct i40iw_virtchnl_work_info work_info;
228 };
229};
230
231struct i40e_qvlist_info;
232
233struct i40iw_device {
234 struct i40iw_ib_device *iwibdev;
235 struct net_device *netdev;
236 wait_queue_head_t vchnl_waitq;
237 struct i40iw_sc_dev sc_dev;
d6f7bbcc 238 struct i40iw_sc_vsi vsi;
8e06af71
FL		 239 struct i40iw_handler *hdl;
240 struct i40e_info *ldev;
241 struct i40e_client *client;
242 struct i40iw_hw hw;
243 struct i40iw_cm_core cm_core;
6c7d46fd 244 u8 *mem_resources;
8e06af71
FL		 245 unsigned long *allocated_qps;
246 unsigned long *allocated_cqs;
247 unsigned long *allocated_mrs;
248 unsigned long *allocated_pds;
249 unsigned long *allocated_arps;
250 struct i40iw_qp **qp_table;
251 bool msix_shared;
252 u32 msix_count;
253 struct i40iw_msix_vector *iw_msixtbl;
254 struct i40e_qvlist_info *iw_qvlist;
255
256 struct i40iw_hmc_pble_rsrc *pble_rsrc;
257 struct i40iw_arp_entry *arp_table;
258 struct i40iw_cqp cqp;
259 struct i40iw_ccq ccq;
260 u32 ceqs_count;
261 struct i40iw_ceq *ceqlist;
262 struct i40iw_aeq aeq;
263 u32 arp_table_size;
264 u32 next_arp_index;
265 spinlock_t resource_lock; /* hw resource access */
996abf0a 266 spinlock_t qptable_lock;
8e06af71
FL		 267 u32 vendor_id;
268 u32 vendor_part_id;
269 u32 of_device_registered;
270
271 u32 device_cap_flags;
272 unsigned long db_start;
273 u8 resource_profile;
274 u8 max_rdma_vfs;
275 u8 max_enabled_vfs;
276 u8 max_sge;
277 u8 iw_status;
278 u8 send_term_ok;
279 bool push_mode; /* Initialized from parameter passed to driver */
280
281 /* x710 specific */
282 struct mutex pbl_mutex;
283 struct tasklet_struct dpc_tasklet;
284 struct workqueue_struct *virtchnl_wq;
285 struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
286 struct i40iw_dma_mem obj_mem;
287 struct i40iw_dma_mem obj_next;
288 u8 *hmc_info_mem;
289 u32 sd_type;
290 struct workqueue_struct *param_wq;
291 atomic_t params_busy;
8e06af71
FL		 292 enum init_completion_state init_state;
293 u16 mac_ip_table_idx;
294 atomic_t vchnl_msgs;
295 u32 max_mr;
296 u32 max_qp;
297 u32 max_cq;
298 u32 max_pd;
299 u32 next_qp;
300 u32 next_cq;
301 u32 next_pd;
302 u32 max_mr_size;
303 u32 max_qp_wr;
304 u32 max_cqe;
305 u32 mr_stagmask;
306 u32 mpa_version;
307 bool dcb;
d5965934 308 bool closing;
78300cf8 309 bool reset;
85a87c90
HO		 310 u32 used_pds;
311 u32 used_cqs;
312 u32 used_mrs;
313 u32 used_qps;
d5965934
MI		 314 wait_queue_head_t close_wq;
315 atomic64_t use_count;
8e06af71
FL		 316};
317
318struct i40iw_ib_device {
319 struct ib_device ibdev;
320 struct i40iw_device *iwdev;
321};
322
323struct i40iw_handler {
324 struct list_head list;
325 struct i40e_client *client;
326 struct i40iw_device device;
327 struct i40e_info ldev;
328};
329
330/**
331 * to_iwdev - get device
332 * @ibdev: ib device
333 **/
334static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
335{
336 return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
337}
338
339/**
340 * to_ucontext - get user context
341 * @ibucontext: ib user context
342 **/
343static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
344{
345 return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
346}
347
348/**
349 * to_iwpd - get protection domain
350 * @ibpd: ib pd
351 **/
352static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
353{
354 return container_of(ibpd, struct i40iw_pd, ibpd);
355}
356
357/**
358 * to_iwmr - get device memory region
359 * @ibdev: ib memory region
360 **/
361static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
362{
363 return container_of(ibmr, struct i40iw_mr, ibmr);
364}
365
366/**
367 * to_iwmr_from_ibfmr - get device memory region
368 * @ibfmr: ib fmr
369 **/
370static inline struct i40iw_mr *to_iwmr_from_ibfmr(struct ib_fmr *ibfmr)
371{
372 return container_of(ibfmr, struct i40iw_mr, ibfmr);
373}
374
375/**
376 * to_iwmw - get device memory window
377 * @ibmw: ib memory window
378 **/
379static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
380{
381 return container_of(ibmw, struct i40iw_mr, ibmw);
382}
383
384/**
385 * to_iwcq - get completion queue
386 * @ibcq: ib cqdevice
387 **/
388static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
389{
390 return container_of(ibcq, struct i40iw_cq, ibcq);
391}
392
393/**
394 * to_iwqp - get device qp
395 * @ibqp: ib qp
396 **/
397static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
398{
399 return container_of(ibqp, struct i40iw_qp, ibqp);
400}
401
402/* i40iw.c */
403void i40iw_add_ref(struct ib_qp *);
404void i40iw_rem_ref(struct ib_qp *);
405struct ib_qp *i40iw_get_qp(struct ib_device *, int);
406
407void i40iw_flush_wqes(struct i40iw_device *iwdev,
408 struct i40iw_qp *qp);
409
410void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
411 unsigned char *mac_addr,
20c61f7e 412 u32 *ip_addr,
8e06af71
FL		 413 bool ipv4,
414 u32 action);
415
416int i40iw_manage_apbvt(struct i40iw_device *iwdev,
417 u16 accel_local_port,
418 bool add_port);
419
420struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
421void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
422void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
423
424/**
425 * i40iw_alloc_resource - allocate a resource
426 * @iwdev: device pointer
427 * @resource_array: resource bit array:
428 * @max_resources: maximum resource number
429 * @req_resources_num: Allocated resource number
430 * @next: next free id
431 **/
432static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
433 unsigned long *resource_array,
434 u32 max_resources,
435 u32 *req_resource_num,
436 u32 *next)
437{
438 u32 resource_num;
439 unsigned long flags;
440
441 spin_lock_irqsave(&iwdev->resource_lock, flags);
442 resource_num = find_next_zero_bit(resource_array, max_resources, *next);
443 if (resource_num >= max_resources) {
444 resource_num = find_first_zero_bit(resource_array, max_resources);
445 if (resource_num >= max_resources) {
446 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
447 return -EOVERFLOW;
448 }
449 }
450 set_bit(resource_num, resource_array);
451 *next = resource_num + 1;
452 if (*next == max_resources)
453 *next = 0;
8e06af71 454 *req_resource_num = resource_num;
44856be3 455 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
8e06af71
FL		 456
457 return 0;
458}
459
460/**
461 * i40iw_is_resource_allocated - detrmine if resource is
462 * allocated
463 * @iwdev: device pointer
464 * @resource_array: resource array for the resource_num
465 * @resource_num: resource number to check
466 **/
467static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
468 unsigned long *resource_array,
469 u32 resource_num)
470{
471 bool bit_is_set;
472 unsigned long flags;
473
474 spin_lock_irqsave(&iwdev->resource_lock, flags);
475
476 bit_is_set = test_bit(resource_num, resource_array);
477 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
478
479 return bit_is_set;
480}
481
482/**
483 * i40iw_free_resource - free a resource
484 * @iwdev: device pointer
485 * @resource_array: resource array for the resource_num
486 * @resource_num: resource number to free
487 **/
488static inline void i40iw_free_resource(struct i40iw_device *iwdev,
489 unsigned long *resource_array,
490 u32 resource_num)
491{
492 unsigned long flags;
493
494 spin_lock_irqsave(&iwdev->resource_lock, flags);
495 clear_bit(resource_num, resource_array);
496 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
497}
498
499/**
500 * to_iwhdl - Get the handler from the device pointer
501 * @iwdev: device pointer
502 **/
503static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
504{
505 return container_of(iw_dev, struct i40iw_handler, device);
506}
507
508struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
509
510/**
511 * iw_init_resources -
512 */
513u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
514
515int i40iw_register_rdma_device(struct i40iw_device *iwdev);
516void i40iw_port_ibevent(struct i40iw_device *iwdev);
f4a87ca1 517void i40iw_cm_disconn(struct i40iw_qp *iwqp);
8e06af71
FL		 518void i40iw_cm_disconn_worker(void *);
519int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
520 struct sk_buff *);
521
522enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
523 struct i40iw_cqp_request *cqp_request);
524enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
525 u8 *mac_addr, u8 *mac_index);
526int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
d6f7bbcc 527void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq);
8e06af71 528
44b99f88 529void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev);
8e06af71
FL		 530void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
531void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
d5965934
MI		 532void i40iw_rem_devusecount(struct i40iw_device *iwdev);
533void i40iw_add_devusecount(struct i40iw_device *iwdev);
8e06af71
FL		 534void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
535 struct i40iw_modify_qp_info *info, bool wait);
536
0fc2dc58
HO		 537void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev,
538 struct i40iw_sc_qp *qp,
539 bool suspend);
8e06af71
FL		 540enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
541 struct i40iw_cm_info *cminfo,
542 enum i40iw_quad_entry_type etype,
543 enum i40iw_quad_hash_manage_type mtype,
544 void *cmnode,
545 bool wait);
d6f7bbcc
HO		 546void i40iw_receive_ilq(struct i40iw_sc_vsi *vsi, struct i40iw_puda_buf *rbuf);
547void i40iw_free_sqbuf(struct i40iw_sc_vsi *vsi, void *bufp);
8e06af71
FL		 548void i40iw_free_qp_resources(struct i40iw_device *iwdev,
549 struct i40iw_qp *iwqp,
550 u32 qp_num);
551enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
552 struct i40iw_dma_mem *memptr,
553 u32 size, u32 mask);
554
555void i40iw_request_reset(struct i40iw_device *iwdev);
556void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
557void i40iw_setup_cm_core(struct i40iw_device *iwdev);
558void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
559void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
560void i40iw_process_aeq(struct i40iw_device *);
561void i40iw_next_iw_state(struct i40iw_qp *iwqp,
562 u8 state, u8 del_hash,
563 u8 term, u8 term_len);
564int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
565struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
566 u16 rem_port,
567 u32 *rem_addr,
568 u16 loc_port,
569 u32 *loc_addr,
570 bool add_refcnt);
571
572enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
573 struct i40iw_sc_qp *qp,
574 struct i40iw_qp_flush_info *info,
575 bool wait);
576
20c61f7e 577void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
8e06af71
FL		 578struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
579 u64 addr,
580 u64 size,
581 int acc,
582 u64 *iova_start);
583
584int i40iw_inetaddr_event(struct notifier_block *notifier,
585 unsigned long event,
586 void *ptr);
587int i40iw_inet6addr_event(struct notifier_block *notifier,
588 unsigned long event,
589 void *ptr);
590int i40iw_net_event(struct notifier_block *notifier,
591 unsigned long event,
592 void *ptr);
593
594#endif
Linux 6.x block layer and io_uring tree(s)