[linux-block.git] / drivers / infiniband / hw / hns / hns_roce_cmd.h

/*
 * Copyright (c) 2016 Hisilicon Limited.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef _HNS_ROCE_CMD_H
#define _HNS_ROCE_CMD_H

#define HNS_ROCE_MAILBOX_SIZE		4096
#define HNS_ROCE_CMD_TIMEOUT_MSECS	10000

enum {
	/* QPC BT commands */
	HNS_ROCE_CMD_WRITE_QPC_BT0	= 0x0,
	HNS_ROCE_CMD_WRITE_QPC_BT1	= 0x1,
	HNS_ROCE_CMD_WRITE_QPC_BT2	= 0x2,
	HNS_ROCE_CMD_READ_QPC_BT0	= 0x4,
	HNS_ROCE_CMD_READ_QPC_BT1	= 0x5,
	HNS_ROCE_CMD_READ_QPC_BT2	= 0x6,
	HNS_ROCE_CMD_DESTROY_QPC_BT0	= 0x8,
	HNS_ROCE_CMD_DESTROY_QPC_BT1	= 0x9,
	HNS_ROCE_CMD_DESTROY_QPC_BT2	= 0xa,

	/* QPC operation */
	HNS_ROCE_CMD_MODIFY_QPC		= 0x41,
	HNS_ROCE_CMD_QUERY_QPC		= 0x42,

	HNS_ROCE_CMD_MODIFY_CQC		= 0x52,
	HNS_ROCE_CMD_QUERY_CQC		= 0x53,
	/* CQC BT commands */
	HNS_ROCE_CMD_WRITE_CQC_BT0	= 0x10,
	HNS_ROCE_CMD_WRITE_CQC_BT1	= 0x11,
	HNS_ROCE_CMD_WRITE_CQC_BT2	= 0x12,
	HNS_ROCE_CMD_READ_CQC_BT0	= 0x14,
	HNS_ROCE_CMD_READ_CQC_BT1	= 0x15,
	HNS_ROCE_CMD_READ_CQC_BT2	= 0x1b,
	HNS_ROCE_CMD_DESTROY_CQC_BT0	= 0x18,
	HNS_ROCE_CMD_DESTROY_CQC_BT1	= 0x19,
	HNS_ROCE_CMD_DESTROY_CQC_BT2	= 0x1a,

	/* MPT BT commands */
	HNS_ROCE_CMD_WRITE_MPT_BT0	= 0x20,
	HNS_ROCE_CMD_WRITE_MPT_BT1	= 0x21,
	HNS_ROCE_CMD_WRITE_MPT_BT2	= 0x22,
	HNS_ROCE_CMD_READ_MPT_BT0	= 0x24,
	HNS_ROCE_CMD_READ_MPT_BT1	= 0x25,
	HNS_ROCE_CMD_READ_MPT_BT2	= 0x26,
	HNS_ROCE_CMD_DESTROY_MPT_BT0	= 0x28,
	HNS_ROCE_CMD_DESTROY_MPT_BT1	= 0x29,
	HNS_ROCE_CMD_DESTROY_MPT_BT2	= 0x2a,

	/* CQC TIMER commands */
	HNS_ROCE_CMD_WRITE_CQC_TIMER_BT0 = 0x23,
	HNS_ROCE_CMD_READ_CQC_TIMER_BT0  = 0x27,

	/* MPT commands */
	HNS_ROCE_CMD_QUERY_MPT		= 0x62,

	/* SRQC BT commands */
	HNS_ROCE_CMD_WRITE_SRQC_BT0	= 0x30,
	HNS_ROCE_CMD_WRITE_SRQC_BT1	= 0x31,
	HNS_ROCE_CMD_WRITE_SRQC_BT2	= 0x32,
	HNS_ROCE_CMD_READ_SRQC_BT0	= 0x34,
	HNS_ROCE_CMD_READ_SRQC_BT1	= 0x35,
	HNS_ROCE_CMD_READ_SRQC_BT2	= 0x36,
	HNS_ROCE_CMD_DESTROY_SRQC_BT0	= 0x38,
	HNS_ROCE_CMD_DESTROY_SRQC_BT1	= 0x39,
	HNS_ROCE_CMD_DESTROY_SRQC_BT2	= 0x3a,

	/* QPC TIMER commands */
	HNS_ROCE_CMD_WRITE_QPC_TIMER_BT0 = 0x33,
	HNS_ROCE_CMD_READ_QPC_TIMER_BT0  = 0x37,

	/* EQC commands */
	HNS_ROCE_CMD_CREATE_AEQC	= 0x80,
	HNS_ROCE_CMD_MODIFY_AEQC	= 0x81,
	HNS_ROCE_CMD_QUERY_AEQC		= 0x82,
	HNS_ROCE_CMD_DESTROY_AEQC	= 0x83,
	HNS_ROCE_CMD_CREATE_CEQC	= 0x90,
	HNS_ROCE_CMD_MODIFY_CEQC	= 0x91,
	HNS_ROCE_CMD_QUERY_CEQC		= 0x92,
	HNS_ROCE_CMD_DESTROY_CEQC	= 0x93,

	/* SCC CTX BT commands */
	HNS_ROCE_CMD_READ_SCCC_BT0	= 0xa4,
	HNS_ROCE_CMD_WRITE_SCCC_BT0	= 0xa5,
};

enum {
	/* TPT commands */
	HNS_ROCE_CMD_CREATE_MPT		= 0xd,
	HNS_ROCE_CMD_DESTROY_MPT	= 0xf,

	/* CQ commands */
	HNS_ROCE_CMD_CREATE_CQC		= 0x16,
	HNS_ROCE_CMD_DESTROY_CQC	= 0x17,

	/* QP/EE commands */
	HNS_ROCE_CMD_RST2INIT_QP	= 0x19,
	HNS_ROCE_CMD_INIT2RTR_QP	= 0x1a,
	HNS_ROCE_CMD_RTR2RTS_QP		= 0x1b,
	HNS_ROCE_CMD_RTS2RTS_QP		= 0x1c,
	HNS_ROCE_CMD_2ERR_QP		= 0x1e,
	HNS_ROCE_CMD_RTS2SQD_QP		= 0x1f,
	HNS_ROCE_CMD_SQD2RTS_QP		= 0x20,
	HNS_ROCE_CMD_2RST_QP		= 0x21,
	HNS_ROCE_CMD_QUERY_QP		= 0x22,
	HNS_ROCE_CMD_SQD2SQD_QP		= 0x38,
	HNS_ROCE_CMD_CREATE_SRQ		= 0x70,
	HNS_ROCE_CMD_MODIFY_SRQC	= 0x72,
	HNS_ROCE_CMD_QUERY_SRQC		= 0x73,
	HNS_ROCE_CMD_DESTROY_SRQ	= 0x74,
};

int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
		      u8 cmd, unsigned long tag);

struct hns_roce_cmd_mailbox *
hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev);
void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
			       struct hns_roce_cmd_mailbox *mailbox);
int hns_roce_create_hw_ctx(struct hns_roce_dev *dev,
			   struct hns_roce_cmd_mailbox *mailbox,
			   u8 cmd, unsigned long idx);
int hns_roce_destroy_hw_ctx(struct hns_roce_dev *dev, u8 cmd,
			    unsigned long idx);

#endif /* _HNS_ROCE_CMD_H */
Commit	Line	Data
9a443537	1	/*
	2	* Copyright (c) 2016 Hisilicon Limited.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef _HNS_ROCE_CMD_H
	34	#define _HNS_ROCE_CMD_H
	35
	36	#define HNS_ROCE_MAILBOX_SIZE 4096
6b877c32	37	#define HNS_ROCE_CMD_TIMEOUT_MSECS 10000
9a443537	38
a81fba28 WHX	39	enum {
	40	/* QPC BT commands */
	41	HNS_ROCE_CMD_WRITE_QPC_BT0 = 0x0,
	42	HNS_ROCE_CMD_WRITE_QPC_BT1 = 0x1,
	43	HNS_ROCE_CMD_WRITE_QPC_BT2 = 0x2,
	44	HNS_ROCE_CMD_READ_QPC_BT0 = 0x4,
	45	HNS_ROCE_CMD_READ_QPC_BT1 = 0x5,
	46	HNS_ROCE_CMD_READ_QPC_BT2 = 0x6,
	47	HNS_ROCE_CMD_DESTROY_QPC_BT0 = 0x8,
	48	HNS_ROCE_CMD_DESTROY_QPC_BT1 = 0x9,
	49	HNS_ROCE_CMD_DESTROY_QPC_BT2 = 0xa,
	50
926a01dc WHX	51	/* QPC operation */
	52	HNS_ROCE_CMD_MODIFY_QPC = 0x41,
	53	HNS_ROCE_CMD_QUERY_QPC = 0x42,
	54
b156269d	55	HNS_ROCE_CMD_MODIFY_CQC = 0x52,
e1c9a0dc	56	HNS_ROCE_CMD_QUERY_CQC = 0x53,
a81fba28 WHX	57	/* CQC BT commands */
	58	HNS_ROCE_CMD_WRITE_CQC_BT0 = 0x10,
	59	HNS_ROCE_CMD_WRITE_CQC_BT1 = 0x11,
	60	HNS_ROCE_CMD_WRITE_CQC_BT2 = 0x12,
	61	HNS_ROCE_CMD_READ_CQC_BT0 = 0x14,
	62	HNS_ROCE_CMD_READ_CQC_BT1 = 0x15,
	63	HNS_ROCE_CMD_READ_CQC_BT2 = 0x1b,
	64	HNS_ROCE_CMD_DESTROY_CQC_BT0 = 0x18,
	65	HNS_ROCE_CMD_DESTROY_CQC_BT1 = 0x19,
	66	HNS_ROCE_CMD_DESTROY_CQC_BT2 = 0x1a,
	67
	68	/* MPT BT commands */
	69	HNS_ROCE_CMD_WRITE_MPT_BT0 = 0x20,
	70	HNS_ROCE_CMD_WRITE_MPT_BT1 = 0x21,
	71	HNS_ROCE_CMD_WRITE_MPT_BT2 = 0x22,
	72	HNS_ROCE_CMD_READ_MPT_BT0 = 0x24,
	73	HNS_ROCE_CMD_READ_MPT_BT1 = 0x25,
	74	HNS_ROCE_CMD_READ_MPT_BT2 = 0x26,
	75	HNS_ROCE_CMD_DESTROY_MPT_BT0 = 0x28,
	76	HNS_ROCE_CMD_DESTROY_MPT_BT1 = 0x29,
	77	HNS_ROCE_CMD_DESTROY_MPT_BT2 = 0x2a,
	78
0e40dc2f YL	79	/* CQC TIMER commands */
	80	HNS_ROCE_CMD_WRITE_CQC_TIMER_BT0 = 0x23,
	81	HNS_ROCE_CMD_READ_CQC_TIMER_BT0 = 0x27,
	82
a2c80b7b WHX	83	/* MPT commands */
	84	HNS_ROCE_CMD_QUERY_MPT = 0x62,
	85
a81fba28 WHX	86	/* SRQC BT commands */
	87	HNS_ROCE_CMD_WRITE_SRQC_BT0 = 0x30,
	88	HNS_ROCE_CMD_WRITE_SRQC_BT1 = 0x31,
	89	HNS_ROCE_CMD_WRITE_SRQC_BT2 = 0x32,
	90	HNS_ROCE_CMD_READ_SRQC_BT0 = 0x34,
	91	HNS_ROCE_CMD_READ_SRQC_BT1 = 0x35,
	92	HNS_ROCE_CMD_READ_SRQC_BT2 = 0x36,
	93	HNS_ROCE_CMD_DESTROY_SRQC_BT0 = 0x38,
	94	HNS_ROCE_CMD_DESTROY_SRQC_BT1 = 0x39,
	95	HNS_ROCE_CMD_DESTROY_SRQC_BT2 = 0x3a,
a5073d60	96
0e40dc2f YL	97	/* QPC TIMER commands */
	98	HNS_ROCE_CMD_WRITE_QPC_TIMER_BT0 = 0x33,
	99	HNS_ROCE_CMD_READ_QPC_TIMER_BT0 = 0x37,
	100
a5073d60 YL	101	/* EQC commands */
	102	HNS_ROCE_CMD_CREATE_AEQC = 0x80,
	103	HNS_ROCE_CMD_MODIFY_AEQC = 0x81,
	104	HNS_ROCE_CMD_QUERY_AEQC = 0x82,
	105	HNS_ROCE_CMD_DESTROY_AEQC = 0x83,
	106	HNS_ROCE_CMD_CREATE_CEQC = 0x90,
	107	HNS_ROCE_CMD_MODIFY_CEQC = 0x91,
	108	HNS_ROCE_CMD_QUERY_CEQC = 0x92,
	109	HNS_ROCE_CMD_DESTROY_CEQC = 0x93,
6a157f7d YL	110
	111	/* SCC CTX BT commands */
	112	HNS_ROCE_CMD_READ_SCCC_BT0 = 0xa4,
	113	HNS_ROCE_CMD_WRITE_SCCC_BT0 = 0xa5,
a81fba28 WHX	114	};
a81fba28 WHX	115
9a443537	116	enum {
9a443537	117	/* TPT commands */
6eef5242 YL	118	HNS_ROCE_CMD_CREATE_MPT = 0xd,
6eef5242 YL	119	HNS_ROCE_CMD_DESTROY_MPT = 0xf,
9a443537	120
9a443537	121	/* CQ commands */
707783ab YL	122	HNS_ROCE_CMD_CREATE_CQC = 0x16,
707783ab YL	123	HNS_ROCE_CMD_DESTROY_CQC = 0x17,
9a443537	124
	125	/* QP/EE commands */
	126	HNS_ROCE_CMD_RST2INIT_QP = 0x19,
	127	HNS_ROCE_CMD_INIT2RTR_QP = 0x1a,
	128	HNS_ROCE_CMD_RTR2RTS_QP = 0x1b,
	129	HNS_ROCE_CMD_RTS2RTS_QP = 0x1c,
	130	HNS_ROCE_CMD_2ERR_QP = 0x1e,
	131	HNS_ROCE_CMD_RTS2SQD_QP = 0x1f,
9a443537	132	HNS_ROCE_CMD_SQD2RTS_QP = 0x20,
	133	HNS_ROCE_CMD_2RST_QP = 0x21,
	134	HNS_ROCE_CMD_QUERY_QP = 0x22,
6eef5242 YL	135	HNS_ROCE_CMD_SQD2SQD_QP = 0x38,
6eef5242 YL	136	HNS_ROCE_CMD_CREATE_SRQ = 0x70,
c7bcb134 LO	137	HNS_ROCE_CMD_MODIFY_SRQC = 0x72,
c7bcb134 LO	138	HNS_ROCE_CMD_QUERY_SRQC = 0x73,
6eef5242	139	HNS_ROCE_CMD_DESTROY_SRQ = 0x74,
9a443537	140	};
9a443537	141
9a443537	142	int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
162e29fe	143	u8 cmd, unsigned long tag);
9a443537	144
dc93a0d9 LC	145	struct hns_roce_cmd_mailbox *
dc93a0d9 LC	146	hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev);
9a443537	147	void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
9a443537	148	struct hns_roce_cmd_mailbox *mailbox);
cf7f8f5c CT	149	int hns_roce_create_hw_ctx(struct hns_roce_dev *dev,
	150	struct hns_roce_cmd_mailbox *mailbox,
	151	u8 cmd, unsigned long idx);
	152	int hns_roce_destroy_hw_ctx(struct hns_roce_dev *dev, u8 cmd,
	153	unsigned long idx);
9a443537	154
9a443537	155	#endif /* _HNS_ROCE_CMD_H */