[linux-2.6-block.git] / drivers / infiniband / hw / hfi1 / trace.c

/*
 * Copyright(c) 2015, 2016 Intel Corporation.
 *
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * BSD LICENSE
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  - Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  - Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  - Neither the name of Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#define CREATE_TRACE_POINTS
#include "trace.h"

u8 ibhdr_exhdr_len(struct ib_header *hdr)
{
	struct ib_other_headers *ohdr;
	u8 opcode;
	u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);

	if (lnh == HFI1_LRH_BTH)
		ohdr = &hdr->u.oth;
	else
		ohdr = &hdr->u.l.oth;
	opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
	return hdr_len_by_opcode[opcode] == 0 ?
	       0 : hdr_len_by_opcode[opcode] - (12 + 8);
}

#define IMM_PRN  "imm %d"
#define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
#define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
#define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
#define IETH_PRN "ieth rkey 0x%.8x"
#define ATOMICACKETH_PRN "origdata %llx"
#define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %llx cdata %llx"

#define OP(transport, op) IB_OPCODE_## transport ## _ ## op

static const char *parse_syndrome(u8 syndrome)
{
	switch (syndrome >> 5) {
	case 0:
		return "ACK";
	case 1:
		return "RNRNAK";
	case 3:
		return "NAK";
	}
	return "";
}

const char *parse_everbs_hdrs(
	struct trace_seq *p,
	u8 opcode,
	void *ehdrs)
{
	union ib_ehdrs *eh = ehdrs;
	const char *ret = trace_seq_buffer_ptr(p);

	switch (opcode) {
	/* imm */
	case OP(RC, SEND_LAST_WITH_IMMEDIATE):
	case OP(UC, SEND_LAST_WITH_IMMEDIATE):
	case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
	case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
	case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
	case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
		trace_seq_printf(p, IMM_PRN,
				 be32_to_cpu(eh->imm_data));
		break;
	/* reth + imm */
	case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
	case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
		trace_seq_printf(p, RETH_PRN " " IMM_PRN,
				 get_ib_reth_vaddr(&eh->rc.reth),
				 be32_to_cpu(eh->rc.reth.rkey),
				 be32_to_cpu(eh->rc.reth.length),
				 be32_to_cpu(eh->rc.imm_data));
		break;
	/* reth */
	case OP(RC, RDMA_READ_REQUEST):
	case OP(RC, RDMA_WRITE_FIRST):
	case OP(UC, RDMA_WRITE_FIRST):
	case OP(RC, RDMA_WRITE_ONLY):
	case OP(UC, RDMA_WRITE_ONLY):
		trace_seq_printf(p, RETH_PRN,
				 get_ib_reth_vaddr(&eh->rc.reth),
				 be32_to_cpu(eh->rc.reth.rkey),
				 be32_to_cpu(eh->rc.reth.length));
		break;
	case OP(RC, RDMA_READ_RESPONSE_FIRST):
	case OP(RC, RDMA_READ_RESPONSE_LAST):
	case OP(RC, RDMA_READ_RESPONSE_ONLY):
	case OP(RC, ACKNOWLEDGE):
		trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
				 parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
				 be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
		break;
	/* aeth + atomicacketh */
	case OP(RC, ATOMIC_ACKNOWLEDGE):
		trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
				 be32_to_cpu(eh->at.aeth) >> 24,
				 parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
				 be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
				 ib_u64_get(&eh->at.atomic_ack_eth));
		break;
	/* atomiceth */
	case OP(RC, COMPARE_SWAP):
	case OP(RC, FETCH_ADD):
		trace_seq_printf(p, ATOMICETH_PRN,
				 get_ib_ateth_vaddr(&eh->atomic_eth),
				 eh->atomic_eth.rkey,
				 get_ib_ateth_swap(&eh->atomic_eth),
				 get_ib_ateth_compare(&eh->atomic_eth));
		break;
	/* deth */
	case OP(UD, SEND_ONLY):
	case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
		trace_seq_printf(p, DETH_PRN,
				 be32_to_cpu(eh->ud.deth[0]),
				 be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
		break;
	/* ieth */
	case OP(RC, SEND_LAST_WITH_INVALIDATE):
	case OP(RC, SEND_ONLY_WITH_INVALIDATE):
		trace_seq_printf(p, IETH_PRN,
				 be32_to_cpu(eh->ieth));
		break;
	}
	trace_seq_putc(p, 0);
	return ret;
}

const char *parse_sdma_flags(
	struct trace_seq *p,
	u64 desc0, u64 desc1)
{
	const char *ret = trace_seq_buffer_ptr(p);
	char flags[5] = { 'x', 'x', 'x', 'x', 0 };

	flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
	flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ?  'H' : '-';
	flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
	flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
	trace_seq_printf(p, "%s", flags);
	if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
		trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
				 (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
				      SDMA_DESC1_HEADER_MODE_MASK),
				 (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
				      SDMA_DESC1_HEADER_INDEX_MASK),
				 (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
				      SDMA_DESC1_HEADER_DWS_MASK));
	return ret;
}

const char *print_u32_array(
	struct trace_seq *p,
	u32 *arr, int len)
{
	int i;
	const char *ret = trace_seq_buffer_ptr(p);

	for (i = 0; i < len ; i++)
		trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
	trace_seq_putc(p, 0);
	return ret;
}

__hfi1_trace_fn(PKT);
__hfi1_trace_fn(PROC);
__hfi1_trace_fn(SDMA);
__hfi1_trace_fn(LINKVERB);
__hfi1_trace_fn(DEBUG);
__hfi1_trace_fn(SNOOP);
__hfi1_trace_fn(CNTR);
__hfi1_trace_fn(PIO);
__hfi1_trace_fn(DC8051);
__hfi1_trace_fn(FIRMWARE);
__hfi1_trace_fn(RCVCTRL);
__hfi1_trace_fn(TID);
__hfi1_trace_fn(MMU);
__hfi1_trace_fn(IOCTL);
Commit	Line	Data
77241056	1	/*
05d6ac1d	2	* Copyright(c) 2015, 2016 Intel Corporation.
77241056 MM	3	*
	4	* This file is provided under a dual BSD/GPLv2 license. When using or
	5	* redistributing this file, you may do so under either license.
	6	*
	7	* GPL LICENSE SUMMARY
	8	*
77241056 MM	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of version 2 of the GNU General Public License as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* BSD LICENSE
	19	*
77241056 MM	20	* Redistribution and use in source and binary forms, with or without
	21	* modification, are permitted provided that the following conditions
	22	* are met:
	23	*
	24	* - Redistributions of source code must retain the above copyright
	25	* notice, this list of conditions and the following disclaimer.
	26	* - Redistributions in binary form must reproduce the above copyright
	27	* notice, this list of conditions and the following disclaimer in
	28	* the documentation and/or other materials provided with the
	29	* distribution.
	30	* - Neither the name of Intel Corporation nor the names of its
	31	* contributors may be used to endorse or promote products derived
	32	* from this software without specific prior written permission.
	33	*
	34	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	35	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	36	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	37	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	38	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	39	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	40	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	41	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	42	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	43	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	44	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	45	*
	46	*/
	47	#define CREATE_TRACE_POINTS
	48	#include "trace.h"
	49
261a4351	50	u8 ibhdr_exhdr_len(struct ib_header *hdr)
77241056	51	{
261a4351	52	struct ib_other_headers *ohdr;
77241056 MM	53	u8 opcode;
	54	u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
	55
	56	if (lnh == HFI1_LRH_BTH)
	57	ohdr = &hdr->u.oth;
	58	else
	59	ohdr = &hdr->u.l.oth;
	60	opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
	61	return hdr_len_by_opcode[opcode] == 0 ?
	62	0 : hdr_len_by_opcode[opcode] - (12 + 8);
	63	}
	64
	65	#define IMM_PRN "imm %d"
	66	#define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
3802f7eb	67	#define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
77241056	68	#define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
bdd8a98c	69	#define IETH_PRN "ieth rkey 0x%.8x"
37aab620 MM	70	#define ATOMICACKETH_PRN "origdata %llx"
37aab620 MM	71	#define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %llx cdata %llx"
77241056 MM	72
	73	#define OP(transport, op) IB_OPCODE_## transport ## _ ## op
	74
3802f7eb DL	75	static const char *parse_syndrome(u8 syndrome)
	76	{
	77	switch (syndrome >> 5) {
	78	case 0:
	79	return "ACK";
	80	case 1:
	81	return "RNRNAK";
	82	case 3:
	83	return "NAK";
	84	}
	85	return "";
	86	}
	87
77241056 MM	88	const char *parse_everbs_hdrs(
	89	struct trace_seq *p,
	90	u8 opcode,
	91	void *ehdrs)
	92	{
	93	union ib_ehdrs *eh = ehdrs;
	94	const char *ret = trace_seq_buffer_ptr(p);
	95
	96	switch (opcode) {
	97	/* imm */
	98	case OP(RC, SEND_LAST_WITH_IMMEDIATE):
	99	case OP(UC, SEND_LAST_WITH_IMMEDIATE):
	100	case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
	101	case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
	102	case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
	103	case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
	104	trace_seq_printf(p, IMM_PRN,
17fb4f29	105	be32_to_cpu(eh->imm_data));
77241056 MM	106	break;
	107	/* reth + imm */
	108	case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
	109	case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
	110	trace_seq_printf(p, RETH_PRN " " IMM_PRN,
261a4351	111	get_ib_reth_vaddr(&eh->rc.reth),
17fb4f29 JJ	112	be32_to_cpu(eh->rc.reth.rkey),
	113	be32_to_cpu(eh->rc.reth.length),
	114	be32_to_cpu(eh->rc.imm_data));
77241056 MM	115	break;
	116	/* reth */
	117	case OP(RC, RDMA_READ_REQUEST):
	118	case OP(RC, RDMA_WRITE_FIRST):
	119	case OP(UC, RDMA_WRITE_FIRST):
	120	case OP(RC, RDMA_WRITE_ONLY):
	121	case OP(UC, RDMA_WRITE_ONLY):
	122	trace_seq_printf(p, RETH_PRN,
261a4351	123	get_ib_reth_vaddr(&eh->rc.reth),
17fb4f29 JJ	124	be32_to_cpu(eh->rc.reth.rkey),
17fb4f29 JJ	125	be32_to_cpu(eh->rc.reth.length));
77241056 MM	126	break;
	127	case OP(RC, RDMA_READ_RESPONSE_FIRST):
	128	case OP(RC, RDMA_READ_RESPONSE_LAST):
	129	case OP(RC, RDMA_READ_RESPONSE_ONLY):
	130	case OP(RC, ACKNOWLEDGE):
3802f7eb DL	131	trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
	132	parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
	133	be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
77241056 MM	134	break;
	135	/* aeth + atomicacketh */
	136	case OP(RC, ATOMIC_ACKNOWLEDGE):
	137	trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
3802f7eb DL	138	be32_to_cpu(eh->at.aeth) >> 24,
	139	parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
	140	be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
261a4351	141	ib_u64_get(&eh->at.atomic_ack_eth));
77241056 MM	142	break;
	143	/* atomiceth */
	144	case OP(RC, COMPARE_SWAP):
	145	case OP(RC, FETCH_ADD):
	146	trace_seq_printf(p, ATOMICETH_PRN,
261a4351	147	get_ib_ateth_vaddr(&eh->atomic_eth),
17fb4f29	148	eh->atomic_eth.rkey,
261a4351 MM	149	get_ib_ateth_swap(&eh->atomic_eth),
261a4351 MM	150	get_ib_ateth_compare(&eh->atomic_eth));
77241056 MM	151	break;
	152	/* deth */
	153	case OP(UD, SEND_ONLY):
	154	case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
	155	trace_seq_printf(p, DETH_PRN,
17fb4f29 JJ	156	be32_to_cpu(eh->ud.deth[0]),
17fb4f29 JJ	157	be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
77241056	158	break;
bdd8a98c JX	159	/* ieth */
	160	case OP(RC, SEND_LAST_WITH_INVALIDATE):
	161	case OP(RC, SEND_ONLY_WITH_INVALIDATE):
	162	trace_seq_printf(p, IETH_PRN,
	163	be32_to_cpu(eh->ieth));
	164	break;
77241056 MM	165	}
	166	trace_seq_putc(p, 0);
	167	return ret;
	168	}
	169
	170	const char *parse_sdma_flags(
	171	struct trace_seq *p,
	172	u64 desc0, u64 desc1)
	173	{
	174	const char *ret = trace_seq_buffer_ptr(p);
	175	char flags[5] = { 'x', 'x', 'x', 'x', 0 };
	176
	177	flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
	178	flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ? 'H' : '-';
	179	flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
	180	flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
	181	trace_seq_printf(p, "%s", flags);
	182	if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
	183	trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
17fb4f29 JJ	184	(u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
	185	SDMA_DESC1_HEADER_MODE_MASK),
	186	(u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
	187	SDMA_DESC1_HEADER_INDEX_MASK),
	188	(u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
	189	SDMA_DESC1_HEADER_DWS_MASK));
77241056 MM	190	return ret;
	191	}
	192
	193	const char *print_u32_array(
	194	struct trace_seq *p,
	195	u32 *arr, int len)
	196	{
	197	int i;
	198	const char *ret = trace_seq_buffer_ptr(p);
	199
	200	for (i = 0; i < len ; i++)
	201	trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
	202	trace_seq_putc(p, 0);
	203	return ret;
	204	}
	205
77241056 MM	206	__hfi1_trace_fn(PKT);
	207	__hfi1_trace_fn(PROC);
	208	__hfi1_trace_fn(SDMA);
	209	__hfi1_trace_fn(LINKVERB);
	210	__hfi1_trace_fn(DEBUG);
	211	__hfi1_trace_fn(SNOOP);
	212	__hfi1_trace_fn(CNTR);
	213	__hfi1_trace_fn(PIO);
	214	__hfi1_trace_fn(DC8051);
	215	__hfi1_trace_fn(FIRMWARE);
	216	__hfi1_trace_fn(RCVCTRL);
	217	__hfi1_trace_fn(TID);
353b71c7	218	__hfi1_trace_fn(MMU);
8a1882eb	219	__hfi1_trace_fn(IOCTL);