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77241056 | 1 | /* |
05d6ac1d | 2 | * Copyright(c) 2015, 2016 Intel Corporation. |
77241056 MM |
3 | * |
4 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
5 | * redistributing this file, you may do so under either license. | |
6 | * | |
7 | * GPL LICENSE SUMMARY | |
8 | * | |
77241056 MM |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of version 2 of the GNU General Public License as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * BSD LICENSE | |
19 | * | |
77241056 MM |
20 | * Redistribution and use in source and binary forms, with or without |
21 | * modification, are permitted provided that the following conditions | |
22 | * are met: | |
23 | * | |
24 | * - Redistributions of source code must retain the above copyright | |
25 | * notice, this list of conditions and the following disclaimer. | |
26 | * - Redistributions in binary form must reproduce the above copyright | |
27 | * notice, this list of conditions and the following disclaimer in | |
28 | * the documentation and/or other materials provided with the | |
29 | * distribution. | |
30 | * - Neither the name of Intel Corporation nor the names of its | |
31 | * contributors may be used to endorse or promote products derived | |
32 | * from this software without specific prior written permission. | |
33 | * | |
34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
35 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
36 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
37 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
38 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
39 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
40 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
41 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
42 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
43 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
44 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
45 | * | |
46 | */ | |
47 | #ifndef _HFI1_MAD_H | |
48 | #define _HFI1_MAD_H | |
49 | ||
50 | #include <rdma/ib_pma.h> | |
77241056 MM |
51 | #include <rdma/opa_smi.h> |
52 | #include <rdma/opa_port_info.h> | |
77241056 MM |
53 | #include "opa_compat.h" |
54 | ||
71a1d624 JJ |
55 | /* |
56 | * OPA Traps | |
57 | */ | |
58 | #define OPA_TRAP_GID_NOW_IN_SERVICE cpu_to_be16(64) | |
59 | #define OPA_TRAP_GID_OUT_OF_SERVICE cpu_to_be16(65) | |
60 | #define OPA_TRAP_ADD_MULTICAST_GROUP cpu_to_be16(66) | |
61 | #define OPA_TRAL_DEL_MULTICAST_GROUP cpu_to_be16(67) | |
62 | #define OPA_TRAP_UNPATH cpu_to_be16(68) | |
63 | #define OPA_TRAP_REPATH cpu_to_be16(69) | |
64 | #define OPA_TRAP_PORT_CHANGE_STATE cpu_to_be16(128) | |
65 | #define OPA_TRAP_LINK_INTEGRITY cpu_to_be16(129) | |
66 | #define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN cpu_to_be16(130) | |
67 | #define OPA_TRAP_FLOW_WATCHDOG cpu_to_be16(131) | |
68 | #define OPA_TRAP_CHANGE_CAPABILITY cpu_to_be16(144) | |
69 | #define OPA_TRAP_CHANGE_SYSGUID cpu_to_be16(145) | |
70 | #define OPA_TRAP_BAD_M_KEY cpu_to_be16(256) | |
71 | #define OPA_TRAP_BAD_P_KEY cpu_to_be16(257) | |
72 | #define OPA_TRAP_BAD_Q_KEY cpu_to_be16(258) | |
73 | #define OPA_TRAP_SWITCH_BAD_PKEY cpu_to_be16(259) | |
74 | #define OPA_SMA_TRAP_DATA_LINK_WIDTH cpu_to_be16(2048) | |
75 | ||
76 | /* | |
77 | * Generic trap/notice other local changes flags (trap 144). | |
78 | */ | |
79 | #define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable | |
80 | * changed | |
81 | */ | |
82 | #define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */ | |
83 | #define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */ | |
84 | #define OPA_NOTICE_TRAP_NODE_DESC_CHG 0x01 | |
85 | ||
86 | struct opa_mad_notice_attr { | |
87 | u8 generic_type; | |
88 | u8 prod_type_msb; | |
89 | __be16 prod_type_lsb; | |
90 | __be16 trap_num; | |
91 | __be16 toggle_count; | |
92 | __be32 issuer_lid; | |
93 | __be32 reserved1; | |
94 | union ib_gid issuer_gid; | |
95 | ||
96 | union { | |
97 | struct { | |
98 | u8 details[64]; | |
99 | } raw_data; | |
100 | ||
101 | struct { | |
102 | union ib_gid gid; | |
103 | } __packed ntc_64_65_66_67; | |
104 | ||
105 | struct { | |
106 | __be32 lid; | |
107 | } __packed ntc_128; | |
108 | ||
109 | struct { | |
110 | __be32 lid; /* where violation happened */ | |
111 | u8 port_num; /* where violation happened */ | |
112 | } __packed ntc_129_130_131; | |
113 | ||
114 | struct { | |
115 | __be32 lid; /* LID where change occurred */ | |
116 | __be32 new_cap_mask; /* new capability mask */ | |
117 | __be16 reserved2; | |
118 | __be16 cap_mask; | |
119 | __be16 change_flags; /* low 4 bits only */ | |
120 | } __packed ntc_144; | |
121 | ||
122 | struct { | |
123 | __be64 new_sys_guid; | |
124 | __be32 lid; /* lid where sys guid changed */ | |
125 | } __packed ntc_145; | |
126 | ||
127 | struct { | |
128 | __be32 lid; | |
129 | __be32 dr_slid; | |
130 | u8 method; | |
131 | u8 dr_trunc_hop; | |
132 | __be16 attr_id; | |
133 | __be32 attr_mod; | |
134 | __be64 mkey; | |
135 | u8 dr_rtn_path[30]; | |
136 | } __packed ntc_256; | |
137 | ||
138 | struct { | |
139 | __be32 lid1; | |
140 | __be32 lid2; | |
141 | __be32 key; | |
142 | u8 sl; /* SL: high 5 bits */ | |
143 | u8 reserved3[3]; | |
144 | union ib_gid gid1; | |
145 | union ib_gid gid2; | |
146 | __be32 qp1; /* high 8 bits reserved */ | |
147 | __be32 qp2; /* high 8 bits reserved */ | |
148 | } __packed ntc_257_258; | |
149 | ||
150 | struct { | |
151 | __be16 flags; /* low 8 bits reserved */ | |
152 | __be16 pkey; | |
153 | __be32 lid1; | |
154 | __be32 lid2; | |
155 | u8 sl; /* SL: high 5 bits */ | |
156 | u8 reserved4[3]; | |
157 | union ib_gid gid1; | |
158 | union ib_gid gid2; | |
159 | __be32 qp1; /* high 8 bits reserved */ | |
160 | __be32 qp2; /* high 8 bits reserved */ | |
161 | } __packed ntc_259; | |
162 | ||
163 | struct { | |
164 | __be32 lid; | |
165 | } __packed ntc_2048; | |
77241056 | 166 | |
71a1d624 JJ |
167 | }; |
168 | u8 class_data[0]; | |
169 | }; | |
77241056 MM |
170 | |
171 | #define IB_VLARB_LOWPRI_0_31 1 | |
172 | #define IB_VLARB_LOWPRI_32_63 2 | |
173 | #define IB_VLARB_HIGHPRI_0_31 3 | |
174 | #define IB_VLARB_HIGHPRI_32_63 4 | |
175 | ||
176 | #define OPA_MAX_PREEMPT_CAP 32 | |
177 | #define OPA_VLARB_LOW_ELEMENTS 0 | |
178 | #define OPA_VLARB_HIGH_ELEMENTS 1 | |
179 | #define OPA_VLARB_PREEMPT_ELEMENTS 2 | |
180 | #define OPA_VLARB_PREEMPT_MATRIX 3 | |
181 | ||
182 | #define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00) | |
183 | ||
184 | struct ib_pma_portcounters_cong { | |
185 | u8 reserved; | |
186 | u8 reserved1; | |
187 | __be16 port_check_rate; | |
188 | __be16 symbol_error_counter; | |
189 | u8 link_error_recovery_counter; | |
190 | u8 link_downed_counter; | |
191 | __be16 port_rcv_errors; | |
192 | __be16 port_rcv_remphys_errors; | |
193 | __be16 port_rcv_switch_relay_errors; | |
194 | __be16 port_xmit_discards; | |
195 | u8 port_xmit_constraint_errors; | |
196 | u8 port_rcv_constraint_errors; | |
197 | u8 reserved2; | |
198 | u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */ | |
199 | __be16 reserved3; | |
200 | __be16 vl15_dropped; | |
201 | __be64 port_xmit_data; | |
202 | __be64 port_rcv_data; | |
203 | __be64 port_xmit_packets; | |
204 | __be64 port_rcv_packets; | |
205 | __be64 port_xmit_wait; | |
206 | __be64 port_adr_events; | |
207 | } __packed; | |
208 | ||
209 | #define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004) | |
210 | #define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008) | |
211 | #define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C) | |
212 | #define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C) | |
213 | ||
214 | #define OPA_MAX_PREEMPT_CAP 32 | |
215 | #define OPA_VLARB_LOW_ELEMENTS 0 | |
216 | #define OPA_VLARB_HIGH_ELEMENTS 1 | |
217 | #define OPA_VLARB_PREEMPT_ELEMENTS 2 | |
218 | #define OPA_VLARB_PREEMPT_MATRIX 3 | |
219 | ||
220 | #define HFI1_XMIT_RATE_UNSUPPORTED 0x0 | |
221 | #define HFI1_XMIT_RATE_PICO 0x7 | |
222 | /* number of 4nsec cycles equaling 2secs */ | |
223 | #define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC | |
224 | ||
225 | #define IB_CC_SVCTYPE_RC 0x0 | |
226 | #define IB_CC_SVCTYPE_UC 0x1 | |
227 | #define IB_CC_SVCTYPE_RD 0x2 | |
228 | #define IB_CC_SVCTYPE_UD 0x3 | |
229 | ||
77241056 MM |
230 | /* |
231 | * There should be an equivalent IB #define for the following, but | |
232 | * I cannot find it. | |
233 | */ | |
234 | #define OPA_CC_LOG_TYPE_HFI 2 | |
235 | ||
236 | struct opa_hfi1_cong_log_event_internal { | |
237 | u32 lqpn; | |
238 | u32 rqpn; | |
239 | u8 sl; | |
240 | u8 svc_type; | |
241 | u32 rlid; | |
242 | s64 timestamp; /* wider than 32 bits to detect 32 bit rollover */ | |
243 | }; | |
244 | ||
245 | struct opa_hfi1_cong_log_event { | |
246 | u8 local_qp_cn_entry[3]; | |
247 | u8 remote_qp_number_cn_entry[3]; | |
248 | u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */ | |
249 | u8 reserved; | |
250 | __be32 remote_lid_cn_entry; | |
251 | __be32 timestamp_cn_entry; | |
252 | } __packed; | |
253 | ||
254 | #define OPA_CONG_LOG_ELEMS 96 | |
255 | ||
256 | struct opa_hfi1_cong_log { | |
257 | u8 log_type; | |
258 | u8 congestion_flags; | |
259 | __be16 threshold_event_counter; | |
260 | __be32 current_time_stamp; | |
8638b77f | 261 | u8 threshold_cong_event_map[OPA_MAX_SLS / 8]; |
77241056 MM |
262 | struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS]; |
263 | } __packed; | |
264 | ||
265 | #define IB_CC_TABLE_CAP_DEFAULT 31 | |
266 | ||
267 | /* Port control flags */ | |
268 | #define IB_CC_CCS_PC_SL_BASED 0x01 | |
269 | ||
270 | struct opa_congestion_setting_entry { | |
271 | u8 ccti_increase; | |
272 | u8 reserved; | |
273 | __be16 ccti_timer; | |
274 | u8 trigger_threshold; | |
275 | u8 ccti_min; /* min CCTI for cc table */ | |
276 | } __packed; | |
277 | ||
278 | struct opa_congestion_setting_entry_shadow { | |
279 | u8 ccti_increase; | |
280 | u8 reserved; | |
281 | u16 ccti_timer; | |
282 | u8 trigger_threshold; | |
283 | u8 ccti_min; /* min CCTI for cc table */ | |
284 | } __packed; | |
285 | ||
286 | struct opa_congestion_setting_attr { | |
287 | __be32 control_map; | |
288 | __be16 port_control; | |
289 | struct opa_congestion_setting_entry entries[OPA_MAX_SLS]; | |
290 | } __packed; | |
291 | ||
292 | struct opa_congestion_setting_attr_shadow { | |
293 | u32 control_map; | |
294 | u16 port_control; | |
295 | struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS]; | |
296 | } __packed; | |
297 | ||
298 | #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1 | |
299 | #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1 | |
300 | ||
301 | /* 64 Congestion Control table entries in a single MAD */ | |
302 | #define IB_CCT_ENTRIES 64 | |
303 | #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2) | |
304 | ||
305 | struct ib_cc_table_entry { | |
306 | __be16 entry; /* shift:2, multiplier:14 */ | |
307 | }; | |
308 | ||
309 | struct ib_cc_table_entry_shadow { | |
310 | u16 entry; /* shift:2, multiplier:14 */ | |
311 | }; | |
312 | ||
313 | struct ib_cc_table_attr { | |
314 | __be16 ccti_limit; /* max CCTI for cc table */ | |
315 | struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES]; | |
316 | } __packed; | |
317 | ||
318 | struct ib_cc_table_attr_shadow { | |
319 | u16 ccti_limit; /* max CCTI for cc table */ | |
320 | struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES]; | |
321 | } __packed; | |
322 | ||
323 | #define CC_TABLE_SHADOW_MAX \ | |
324 | (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES) | |
325 | ||
326 | struct cc_table_shadow { | |
327 | u16 ccti_limit; /* max CCTI for cc table */ | |
328 | struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX]; | |
329 | } __packed; | |
330 | ||
331 | /* | |
332 | * struct cc_state combines the (active) per-port congestion control | |
333 | * table, and the (active) per-SL congestion settings. cc_state data | |
334 | * may need to be read in code paths that we want to be fast, so it | |
335 | * is an RCU protected structure. | |
336 | */ | |
337 | struct cc_state { | |
338 | struct rcu_head rcu; | |
339 | struct cc_table_shadow cct; | |
340 | struct opa_congestion_setting_attr_shadow cong_setting; | |
341 | }; | |
342 | ||
343 | /* | |
344 | * OPA BufferControl MAD | |
345 | */ | |
346 | ||
347 | /* attribute modifier macros */ | |
348 | #define OPA_AM_NPORT_SHIFT 24 | |
349 | #define OPA_AM_NPORT_MASK 0xff | |
350 | #define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT) | |
351 | #define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \ | |
352 | OPA_AM_NPORT_MASK) | |
353 | ||
354 | #define OPA_AM_NBLK_SHIFT 24 | |
355 | #define OPA_AM_NBLK_MASK 0xff | |
356 | #define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT) | |
357 | #define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \ | |
358 | OPA_AM_NBLK_MASK) | |
359 | ||
360 | #define OPA_AM_START_BLK_SHIFT 0 | |
361 | #define OPA_AM_START_BLK_MASK 0xff | |
362 | #define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \ | |
363 | OPA_AM_START_BLK_SHIFT) | |
364 | #define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \ | |
365 | OPA_AM_START_BLK_MASK) | |
366 | ||
367 | #define OPA_AM_PORTNUM_SHIFT 0 | |
368 | #define OPA_AM_PORTNUM_MASK 0xff | |
369 | #define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT) | |
370 | #define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \ | |
371 | OPA_AM_PORTNUM_MASK) | |
372 | ||
373 | #define OPA_AM_ASYNC_SHIFT 12 | |
374 | #define OPA_AM_ASYNC_MASK 0x1 | |
375 | #define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT) | |
376 | #define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \ | |
377 | OPA_AM_ASYNC_MASK) | |
378 | ||
379 | #define OPA_AM_START_SM_CFG_SHIFT 9 | |
380 | #define OPA_AM_START_SM_CFG_MASK 0x1 | |
381 | #define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \ | |
382 | OPA_AM_START_SM_CFG_SHIFT) | |
383 | #define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \ | |
384 | & OPA_AM_START_SM_CFG_MASK) | |
385 | ||
386 | #define OPA_AM_CI_ADDR_SHIFT 19 | |
387 | #define OPA_AM_CI_ADDR_MASK 0xfff | |
388 | #define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT) | |
389 | #define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \ | |
390 | OPA_AM_CI_ADDR_MASK) | |
391 | ||
392 | #define OPA_AM_CI_LEN_SHIFT 13 | |
393 | #define OPA_AM_CI_LEN_MASK 0x3f | |
394 | #define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT) | |
395 | #define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \ | |
396 | OPA_AM_CI_LEN_MASK) | |
397 | ||
398 | /* error info macros */ | |
399 | #define OPA_EI_STATUS_SMASK 0x80 | |
400 | #define OPA_EI_CODE_SMASK 0x0f | |
401 | ||
402 | struct vl_limit { | |
403 | __be16 dedicated; | |
404 | __be16 shared; | |
405 | }; | |
406 | ||
407 | struct buffer_control { | |
408 | __be16 reserved; | |
409 | __be16 overall_shared_limit; | |
410 | struct vl_limit vl[OPA_MAX_VLS]; | |
411 | }; | |
412 | ||
413 | struct sc2vlnt { | |
414 | u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */ | |
415 | }; | |
416 | ||
417 | /* | |
418 | * The PortSamplesControl.CounterMasks field is an array of 3 bit fields | |
419 | * which specify the N'th counter's capabilities. See ch. 16.1.3.2. | |
420 | * We support 5 counters which only count the mandatory quantities. | |
421 | */ | |
422 | #define COUNTER_MASK(q, n) (q << ((9 - n) * 3)) | |
423 | #define COUNTER_MASK0_9 \ | |
424 | cpu_to_be32(COUNTER_MASK(1, 0) | \ | |
425 | COUNTER_MASK(1, 1) | \ | |
426 | COUNTER_MASK(1, 2) | \ | |
427 | COUNTER_MASK(1, 3) | \ | |
428 | COUNTER_MASK(1, 4)) | |
429 | ||
34d351f8 SS |
430 | void hfi1_event_pkey_change(struct hfi1_devdata *dd, u8 port); |
431 | ||
77241056 | 432 | #endif /* _HFI1_MAD_H */ |